CN115765641A - Low-noise JFET differential parallel amplifier with multiple discrete current sources - Google Patents
Low-noise JFET differential parallel amplifier with multiple discrete current sources Download PDFInfo
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Abstract
The invention relates to the field of geophysical exploration equipment, in particular to a multi-discrete-current-source low-noise JFET differential parallel amplifier, which comprises a JFET primary amplification circuit and an IOA secondary amplification circuit; the JFET primary amplifying circuit comprises a common source amplifying circuit consisting of two groups of JFET geminate transistors which are connected in parallel, the drain electrode of each group of JFET geminate transistors is connected with the anode of the lithium battery, the source electrode of each JFET geminate transistor is connected with the cathode of the lithium battery through an NPN type BJT (bipolar junction transistor), the grid electrodes of the JFET geminate transistors are connected with one side of the differential coil together to output signals, and the drain electrodes of the JFET geminate transistors are used as output; the IOA secondary amplifying circuit adopts a subtracter structure, and two input ends are connected with two outputs of the JFET primary amplifying circuit. A discrete current source is used for supplying power to the two pairs of JFETs connected in parallel, parameter difference between the JFET pairs is reduced, background noise of the JFET device is reduced by using a parallel connection method, and the advantage of low noise amplification of the JFET device is played.
Description
Technical Field
The invention relates to the field of geophysical exploration equipment, in particular to a multi-discrete-current-source low-noise JFET differential parallel amplifier.
Background
Transient Electromagnetic (TEM) is a geophysical exploration Method based on the electromagnetic induction law, and due to the characteristic of sensitivity to low resistivity bodies, the TEM is a preferred Method for geological problems such as geological structure exploration and geological mineral exploration. The TEM system is miniaturized, and is convenient to lay in a city after being lightened, compared with the traditional TEM system, the size of the urban TEM system is reduced, the emission magnetic moment is limited, the secondary field generated by a deep geologic body is weak in response, and under the interference of urban human noise, the signal-to-noise ratio of a secondary field signal acquired by an instrument is low, so that the later deep data interpretation is influenced. Therefore, urban TEM systems need to be equipped with low-noise preamplifiers for low-noise amplification to provide high-quality data for subsequent data processing and data interpretation.
'aviation ZTEM magnetic sensor conditioning circuit low noise optimization design' published in the study of instruments and meters by Wang Chao, shijiaqing, shihong, and the like discloses a low noise signal conditioning circuit built by using a low noise parallel JFET device, the circuit coil has good adaptability, excellent noise characteristic in a TEM signal frequency band, and the lowest noise is only the lowest noise
The JFET differential parallel technology provides a new idea for the low-noise optimization design of the preamplifier, the input voltage noise can be effectively reduced through the parallel design, and theoretically, the differential parallel design also provides possibility for the design of an amplifying circuit which tends to the noise limit. However, due to the process limitations of semiconductor epitaxy, diffusion, oxidation, photolithography and the like, the difference of parameters between JFET devices of the same type is large, the multiple JFET devices are difficult to work in a matching manner when being subjected to differential parallel amplification, the problems of nonuniform flow and the like occur, and an ideal amplification effect cannot be obtained. To suppress this difference in parameters leading to unreliable operation, JFET manufacturers also design the tubes, i.e., include a pair of JFET tubes with substantially the same parameters in one device. The design can ensure the design of the JFET-based differential amplification circuit, but the problem cannot be solved fundamentally for the differential parallel design. Moreover, as measured on JFET devices of uniform type, most JFET single tubes or pairs are foundThe parameters vary widely between the devices. Therefore, a new technology is needed to solve the problem that the differential parallel amplification cannot be realized due to the large parameter difference between the JFET devices of the same model.
Disclosure of Invention
The invention aims to solve the technical problem of providing a multi-discrete-current-source low-noise JFET differential parallel amplifier, wherein a discrete current source is used for supplying power for two pairs of parallel JFETs, the parameter difference between the JFET pairs is reduced, the background noise of a JFET device is reduced by using a parallel method, and the advantage of low-noise amplification of the JFET device is exerted.
The present invention has been accomplished in such a manner that,
a low-noise JFET differential parallel amplifier with multiple discrete current sources comprises a JFET primary amplification circuit and an IOA secondary amplification circuit;
the JFET primary amplifying circuit comprises a common source amplifying circuit consisting of two groups of JFET geminate transistors which are connected in parallel, the drain electrode of each group of JFET geminate transistors is connected with the anode of the lithium battery, the source electrode of each JFET geminate transistor is connected with the cathode of the lithium battery through an NPN type BJT (bipolar junction transistor), the grid electrodes of the JFET geminate transistors are connected with one side of the differential coil together to output signals, and the drain electrodes of the JFET geminate transistors are used as output;
the IOA secondary amplification circuit adopts a subtractor structure and is connected with two outputs of the JFET primary amplification circuit through two input ends.
Further, the JFET pair transistor comprises two JFET devices, the drain electrodes of the JFET devices are connected with the anode of the lithium battery through a first resistor, the source electrodes of the two JFET devices are connected with the collector electrode of the NPN type BJT through a second resistor, the emitter electrode of the NPN type BJT is connected with the cathode of the lithium battery through a third resistor, and the second resistor, the NPN type BJT and the third resistor form a constant current source.
Further, the constant current source is connected with a first capacitor in parallel.
Furthermore, the IOA secondary amplification circuit comprises a low-noise IOA, two input ends of the low-noise IOA are connected with one side signal output of the JFET primary amplification circuit through a fourth resistor and a second capacitor which are connected in series, and a fifth resistor is arranged between an inverted input end and an output end of the low-noise IOA; the same-direction input end of the low-noise IOA is grounded by connecting a sixth resistor.
The JFET primary amplification circuit realizes the setting of the JFET static working point by two low-noise JFET geminate transistors and matching with a current source consisting of a pair of NPN BJTs, ensures that the JFET is stabilized at the minimum noise working point, exerts the optimal noise performance of the device, and avoids the deviation and amplification difference of the JFET static working point caused by the non-uniform flow of two arms in a long tail differential structure due to the difference of device parameters. The JFET has large input impedance, is convenient for impedance matching of a front-end coil, and can be matched with a front-end differential coil by utilizing a differential structure to inhibit the receiving noise of the coil. In addition, the JFET primary amplifying circuit can also be used as a JFET parameter detection circuit, JFETs with high parameter performance consistency at a required static working point are screened out, and the JFETs are used for JFET pairing.
The IOA secondary amplification circuit adopts a subtractor structure and is provided with a CBB capacitor to eliminate direct current bias at the output end of the primary amplification circuit, so that signal gain is improved.
Compared with the prior art, the invention has the beneficial effects that:
the invention provides a multi-discrete current source low-noise JFET differential parallel amplifier, which is used for designing a low-noise amplification circuit with background noise tending to a noise limit, reducing the common-mode noise of a sensor through differential design, effectively reducing the equivalent input voltage noise of the amplifier through parallel design, and achieving the equivalent input noise of the newly designed amplifier
The invention provides a design scheme of a multi-discrete current source for solving the problem that the static working point is deviated due to large parameter discreteness of JFET devices (single tubes or paired tubes) of the same type at present and cannot work reliably. Firstly, the core parameter I of the JFET is controlled by modulating the parameter of the independent current source circuit D 、V GS 、V DS Maintaining each JFET at a minimum noise static operating point; secondly, a capacitor C is connected in parallel with two sides of the constant current source 1 ， C 2 The alternating current loop of the JFET common source amplifying circuit is changed, the limitation of the internal resistance of the constant current source on the source resistance of the JFET circuit is overcome, the amplification factor of the common source amplifying circuit is improved, and each path of JFET works reliablyAnd the problem that the JFET cannot reliably work due to inconsistent parameters is solved in a large state.
Drawings
FIG. 1 shows a block circuit diagram of a low noise amplifier of the present invention;
FIG. 2 is a circuit configuration diagram of the low noise amplifier of the present invention;
FIG. 3 shows an AC equivalent model of a first-stage amplification circuit of the low noise amplifier of the present invention;
FIG. 4 shows the system function of the low noise amplifier of the present invention;
FIG. 5 shows an equivalent input noise curve for the low noise amplifier of the present invention;
figure 6 shows the measured equivalent input noise for the discrete current source low noise JFET differential parallel amplifier of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail with reference to the following embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The invention provides a multi-discrete-current-source low-noise JFET differential amplification circuit, and a circuit block diagram and a circuit structure diagram are shown in figures 1 and 2.
A low-noise JFET differential parallel amplifier with multiple discrete current sources comprises a JFET primary amplification circuit and an IOA secondary amplification circuit;
the JFET primary amplifying circuit comprises a common source amplifying circuit consisting of two groups of JFET geminate transistors which are connected in parallel, the drain electrode of each group of JFET geminate transistors is connected with the anode of the lithium battery, the source electrode of each JFET geminate transistor is connected with the cathode of the lithium battery through an NPN type BJT (bipolar junction transistor), the grid electrodes of the JFET geminate transistors are connected with one side of the differential coil together to output signals, and the drain electrodes of the JFET geminate transistors are used as output;
the IOA secondary amplifying circuit adopts a subtracter structure, and two input ends are connected with two outputs of the JFET primary amplifying circuit.
According to the Fries formula as shown in formula (1)
Wherein F is the total noise factor of the circuit, F 1 For the noise factor, K, of the first stage amplifier circuit 1 Is the amplification factor of the first stage of the amplifying circuit, F 2 The noise factor of the second stage amplifying circuit. As can be seen from equation (1), for the cascade amplifier circuit, the noise floor of the first stage amplifier circuit determines the noise level of the overall amplifier circuit. Compared with a low-noise IOA amplifying circuit, the low-noise JFET amplifying circuit is lower in background noise, and because the JFET only forms a conducting channel between drain and source electrodes when working, only voltage is applied between a grid drain and a grid source electrode to control the conducting channel between the drain and the source, and nearly no conducting current exists between the grid drain and the grid source, the JFET has the characteristics of low voltage noise and negligible current noise, and the source impedance is large and can be adapted to a plurality of differential coils. Therefore, the multi-current-source low-noise JFET differential amplification circuit comprises the JFET amplification circuit and the IOA amplification circuit, the JFET amplification circuit with lower noise level and larger source impedance is used as a first-stage amplification circuit, and the IOA amplification circuit is used for two-stage amplification.
In order to further reduce the background noise of the JFET and improve the noise performance of the differential amplification circuit, a parallel connection method is needed, and the voltage noise and the current noise after parallel connection are shown in formulas (2) and (3).
Wherein e n For voltage noise per device, i n For the current noise of each device, M is the number of parallel connections, e ntot For equivalent voltage noise, i, of M devices connected in parallel ntot The equivalent current noise of M devices after being connected in parallel. After the devices are connected in parallel, the voltage noise of the devices can be in accordance with N 1/2 Reduction of current noise by N 1/2 And (4) increasing. Due to the fact thatIn the working principle of the JFET device, only conduction current exists between a drain electrode and a source electrode when amplification is carried out, only voltage is applied between a grid electrode source and a grid electrode drain electrode to control the width of a conduction channel, and the conduction current between a grid electrode and the source electrode and the drain electrode is below pA level. Therefore, the current noise of the JFET can be ignored, only the voltage noise of the device is considered, and the circuit background noise of the JFET amplifying circuit can be reduced by adopting a parallel connection method.
The JFET primary amplifying circuit comprises a JFET device J 1 JFET device J 2 JFET device J 3 JFET device J 4 Wherein the JFET device J 1 JFET device J 2 Integrated in the same JFET pair, JFET device J 3 JFET device J 4 NPN BJT integrated in another JFET transistor pair 1 NPN type BJT T 2 Resistance R 1 And a resistor R 2 Resistance R 3 Resistance R 4 Resistance R 5 Resistance R 6 Capacitor C 1 Capacitor C 2 . Two common-source amplifying circuits are connected in parallel to realize differential amplification, wherein a resistor R 1 JFET device J 1 JFET device J 2 Resistance R 3 NPN type BJT T 1 Resistance R 5 Capacitor C 1 Form a common source amplifying circuit, a resistor R 2 JFET device J 3 JFET device J 4 Resistance R 4 NPN type BJT T 2 Resistance R 6 Capacitor C 2 And the other path of common source amplifying circuit is formed, and the circuit structures at two sides are symmetrical.
Resistance R 1 One end of the grid is connected with the positive electrode of the lithium battery, and the other end of the grid is connected with a JFET device J 1 And JFET device J 2 Of the substrate. JFET device J 1 And JFET device J 2 The grid is connected with one side output signal of the differential coil, and the source is connected with the resistor R 3 And the drain electrode is used as a signal output end of the JFET primary amplifying circuit. Resistance R 3 NPN BJT 1 And a resistor R 5 Constitute a constant current source, a resistor R 3 One end of which is connected with NPN type BJT T 1 Collector electrode, resistor R 5 One end of the negative electrode is connected with the negative electrode of the lithium battery, NPN type BJTT 1 The base is grounded. Capacitor C 1 Is connected with a constant current source in parallel, and one end of the constant current source is connected with a resistor R 3 JFET device J 1 JFET device J 2 Source electrode connected to resistor R 5 And the negative electrode of the lithium battery is connected.
The JFET common source amplifying circuit on the other side is connected in the same way:
resistance R 2 One end of the grid is connected with the positive electrode of the lithium battery, and the other end of the grid is connected with a JFET device J 4 And JFET device J 3 Of the substrate. JFET device J 4 And JFET device J 3 The grid is connected with one side output signal of the differential coil, and the source is connected with the resistor R 2 And the drain electrode is used as a signal output end of the JFET primary amplifying circuit. Resistance R 4 NPN BJT 2 Resistance R 6 Constitute a constant current source, a resistor R 4 One end of the transistor is connected with an NPN type BJT T 2 Collector electrode, resistor R 6 One end of the negative electrode is connected with the negative electrode of the lithium battery, NPN type BJTT 2 The base is grounded. Capacitor C 2 Connected in parallel with the constant current source, and having one end connected with the resistor R 4 JFET device J 4 JFET device J 3 Source electrode connected to resistor R 6 And the negative electrode of the lithium battery is connected.
Two low-noise JFET geminate transistors in the JFET primary amplification circuit are matched with a current source consisting of a pair of NPN BJTs to realize the setting of the static working point of the JFET, so that the problem of V in the JFET common-source amplification circuit is solved DS 、V GS 、I D The mutual restriction of the three parameters and the inconsistency of the theoretical static operating point and the actual static operating point of the circuit. Wherein I D The formula (4) is shown as follows:
wherein V PN The positive conducting voltage of the PN junction in the BJT, and V-is the negative voltage of the power supply. Matched with the resistor to set V DS And V GS And the JFET stably operates at a minimum noise static operating point. Adjustment I D ，V DS ，V GS To the required static working point, the JFET is ensured to be stabilized at the minimum noise working point, the optimal noise performance of the device is exerted, and the problem of long tail differential circuit statics caused by the self parameter discreteness of the JFET due to the defects of the device is solvedAnd (4) a state operating point deviation problem. In addition, the JFET primary amplifying circuit is simple in structure, simple and convenient in parameter setting and capable of being used for JFET pairing.
Although the JFET primary amplifying circuit adopts a common source amplifying circuit mode, the static working point setting principle of the JFET primary amplifying circuit is the same as that of the long tail differential structure, the long tail differential structure avoids the influence of tail resistance or current source on the amplification factor in an alternating current path, and the amplification factor is only determined by JFET transconductance and resistance between a power source and a drain electrode. The alternating current loop of the common source amplifying circuit cannot avoid the limitation of the resistance between the source and the power supply to the amplification factor, and particularly, the constant current source is used for stabilizing the current I D The internal resistance of the constant current source is connected, and the amplification factor of the common source amplification circuit is further clamped. Therefore, the capacitance value of the CBB capacitor C is stabilized by the method shown in FIG. 3 1 Capacitor C 2 And (3) changing an alternating current loop and a small signal model of the JFET common source amplifying circuit between the source electrode of the parallel JFET and the negative electrode of the battery, wherein the amplification factor is shown as the formula (5).
H 1 (w)＝-g m R 1 ＝-g m R 2 (5)
Wherein g is m The JFET transconductance is connected with the CBB capacitor in parallel, the limitation of constant current source internal resistance on the circuit amplification factor is eliminated, the amplification factor is consistent with that of the traditional long tail differential structure, the low-noise amplification of the differential coil receiving signal is realized, and the total noise of the amplifier is maintained at an extremely low level.
The IOA two-stage amplifying circuit adopts a subtraction circuit structure and comprises a low-noise IOA 1 Capacitor C 3 Capacitance C 4 Resistance R 7 Resistance R 8 Resistance R 9 Resistance R 10 . Capacitor C 3 One end of the first-stage amplification circuit is connected with the JFET first-stage amplification circuit, and the other end of the first-stage amplification circuit is connected with the resistor R 7 . Resistance R 7 The other side and the low noise IOA 1 Inverting input terminal and resistor R 9 Resistance R 9 Another side and low noise IOA 1 The signal output ends are connected as a secondary amplification output end. Capacitor C 4 One end of the capacitor is connected with one side signal output of the JFET primary amplifying circuit, and the other end of the capacitor is connected with a resistor R 8 . Resistance R 8 The other side and the low noise IOA 1 And the same-direction input end of the resistor R 10 Connected by a resistor R 10 The other side of which is grounded. Low noise IOA 1 The power supply end pins are respectively connected with the anode and the cathode of the lithium battery. The two-stage circuit subtracter structure and the capacitor are matched to form a low-pass filter. The differential coil induction signal amplified by the low noise of the preceding stage circuit is further amplified, the residual common mode noise in the circuit is eliminated, and the signal to noise ratio is improved.
At this time, the system function of the multiple discrete current source low-noise JFET differential parallel amplifier is as follows (6):
the system transfer function is shown in fig. 4.
Examples
Step 1, after connecting circuits according to the specific implementation mode, firstly, pairing JFET (junction field effect transistor) pair tubes by using a first-stage amplifying circuit, and selecting a parameter V DS 、V GS 、I D JFET pairs with similar parameters.
Step 2, adjusting the resistance R in the constant current source circuit according to the JFET parameter table 5 Resistance R 6 Is shown by D Set to 5mA. Matching resistance R 1 Resistance R 2 Setting V DS ,V GS Size.
Step 3, sequentially connecting JFET geminate transistors in the same batch into a circuit, and recording V of the JFET geminate transistors DS ,V GS And drawing a table. Table 1 shows the statistics of parameters of the same batch of low noise JFETs on the IF 3602. The JFETs integrated in the JFET pair tubes are subjected to type selection pairing, the parameter difference is small, the parameter difference between devices is large, and if lower circuit background noise is sought, device screening pairing needs to be carried out according to a test result.
TABLE 1
| Serial number | Internal JFET | I D | V DS | V GS |
| 1 | A | 5mA | 7.39V | -1.017V |
| B | 5mA | 7.31V | -1.014V | |
| 2 | A | 5mA | 7.44V | -0.655V |
| B | 5mA | 7.48V | -0.649V | |
| 3 | A | 5mA | 7.39V | -0.983V |
| B | 5mA | 7.34V | -0.957V | |
| 4 | A | 5mA | 7.42V | -1.000V |
| B | 5mA | 7.36V | -0.995V | |
| 5 | A | 5mA | 7.38V | -0.929V |
| B | 5mA | 7.34V | -0.926V |
Step 4, adjusting R according to the two selected JFET geminate transistors 1 ，R 2 Parameters of V of both DS ,V GS The parameters are nearly identical.
And 5, adjusting the static working point according to the step 4, respectively applying input signals with the amplitude of 20mV, the frequency of 1kHz and the phase difference of 180 degrees to the amplifiers Sig + and Sig-, observing the amplitude of the output signals, and calculating the actual amplification factor. Due to transconductance g m Related to static operating point and cannot be guaranteed to be completely consistent due to internal parameters of the device, and the resistance R 1 Resistance R 2 The difference exists when the static operating point of the actual circuit is adjusted, so the actually measured amplification factor can verify the amplification capability, and simultaneously, the transfer function of the system is corrected, so that the subsequent equivalent input noise conversion is facilitated.
And 6, after the detection of the primary amplifying circuit in the step 5 is finished, the IOA secondary amplifying circuit is accessed, and an output end signal is tested.
And 7, short-circuiting the input end of the multi-discrete current source low-noise JFET differential parallel amplifier, measuring output noise by using a dynamic signal analyzer, or acquiring output data by using a collecting card, and converting the power spectral density of the output end to obtain the output noise. In conjunction with the test corrected system transfer function, equivalent input noise can be obtained. Fig. 5 is an equivalent input noise curve obtained by the simulation of the ltsspice software, and fig. 6 is the measured equivalent input noise of the multi-discrete-current-source low-noise JFET differential parallel amplifier.
Through simulation and actual measurement, the noise level of the invention is maintained at nV level, and the equivalent input noise is at 1kHz
The parallel connection method can obviously reduce the background noise of the circuit, and the power supply scheme of the multiple discrete current sources can correct the influence of the discreteness of the devices on the circuit result, so that the simulation result is identical with the actual measurement result. Compared with the noise of the integrated operational amplifier of the foreign import LT1028
The noise level of the invention is obviously reduced。
In summary, the multiple discrete current source low-noise JFET differential amplifier circuit of the invention has the characteristics of high gain, low noise, high stability and the like. The invention can be directly used in an urban TEM receiving system to realize low-noise amplification of urban TEM signals, and can also be used in other TEM receiving systems. The circuit has simple structure, low dependence on JFET device parameters and JFET pairing instruments, and good economic and military prospects.
The invention has been described without limitation, and other structural modifications and embodiments of the invention will come to mind to one skilled in the art to which this invention pertains without departing from the scope of the appended claims.
Claims (4)
1. A multi-discrete-current-source low-noise JFET differential parallel amplifier is characterized by comprising a JFET primary amplifying circuit and an IOA secondary amplifying circuit;
the JFET primary amplification circuit comprises a common source amplification circuit consisting of two groups of JFET geminate transistors which are connected in parallel, the drain electrode of each group of JFET geminate transistors is connected with the anode of the lithium battery, the source electrodes of the JFET geminate transistors are connected with the cathode of the lithium battery through an NPN-type BJT, the grid electrodes of the JFET geminate transistors are connected with one side of the differential coil together to output signals, and the drain electrodes of the JFET geminate transistors are used as output;
the IOA secondary amplification circuit adopts a subtractor structure and is connected with two outputs of the JFET primary amplification circuit through two input ends.
2. The multi-discrete-current-source low-noise JFET differential parallel amplifier of claim 1, wherein the JFET pair comprises two JFET devices, a drain of the JFET devices is connected with a positive electrode of a lithium battery through a first resistor, sources of the two JFET devices are connected with a collector of an NPN BJT through a second resistor, an emitter of the NPN BJT is connected with a negative electrode of the lithium battery through a third resistor, and the second resistor, the NPN BJT and the third resistor form a constant current source.
3. The differential parallel amplifier with multiple discrete current sources and low noise JFET of claim 2, wherein the constant current source is connected in parallel with a first capacitor.
4. The differential parallel amplifier with multiple discrete current sources and low noise JFET (junction field effect transistors) according to claim 1, wherein the IOA secondary amplifying circuit comprises a low noise IOA, two input ends of the low noise IOA are connected with a signal output at one side of the JFET primary amplifying circuit through a fourth resistor and a second capacitor which are connected in series, and a fifth resistor is arranged between an inverted input end and an output end of the low noise IOA; the same-direction input end of the low-noise IOA is grounded by connecting a sixth resistor.
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