CN114710123A - Amplifying circuit and signal detector - Google Patents
Amplifying circuit and signal detector Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/0084—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring voltage only
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
- G01R19/2503—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques for measuring voltage only, e.g. digital volt meters (DVM's)
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
- H03F3/45928—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit
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Abstract
The application discloses amplifier circuit and signal detector, amplifier circuit include two constant current source circuit, difference gain configuration circuit and fully differential amplifier circuit. The two constant current source circuits are symmetrically arranged and used for providing stable current; the input end of the differential gain configuration circuit is connected with the output end of the constant current source circuit, and the differential gain configuration circuit is used for configuring an amplification factor to cooperate with the constant current source circuit to carry out primary amplification on an input signal; the input end of the fully differential amplifying circuit is connected with the output end of the differential gain configuration circuit, and the fully differential amplifying circuit is used for carrying out secondary amplification on the input signal amplified by the differential gain configuration circuit. Therefore, very low input noise spectral density, a symmetrical amplification form and a fully differential amplification structure can be realized under the condition of high-resistance input, common-mode interference can be effectively inhibited, and the output structure is a differential structure and can be conveniently used as a signal detector, particularly for the preposed amplification of a weak signal detector.
Description
Technical Field
The application relates to the technical field of signal detection, in particular to an amplifying circuit and a signal detector.
Background
The weak signal detection technology can detect useful weak signals from noise, when the weak signals are detected in a low signal-to-noise ratio, the noise introduced by equipment for collecting the signals needs to be reduced as much as possible due to very weak characteristic signals of the weak signal detection technology, and further, the output impedance of the detected signals can be low resistance or high resistance, so that the input of a detection circuit of the equipment needs to meet the high resistance condition in order to meet the voltage detection requirements under all conditions.
Disclosure of Invention
The embodiment of the application provides an amplifying circuit and a signal detector.
The amplification circuit of the embodiment of the present application includes: two constant current source circuits, a differential gain configuration circuit and a fully differential amplification circuit. The two constant current source circuits are symmetrically arranged and used for providing stable current; the input end of the differential gain configuration circuit is connected with the output end of the constant current source circuit, and the differential gain configuration circuit is used for configuring an amplification factor to cooperate with the constant current source circuit to carry out primary amplification on an input signal; the input end of the fully differential amplification circuit is connected with the output end of the differential gain configuration circuit, and the fully differential amplification circuit is used for carrying out secondary amplification on the input signal amplified by the differential gain configuration circuit.
In the amplifying circuit of the embodiment of the application, very low input noise spectral density can be realized under the condition of high-resistance input, common-mode interference can be effectively inhibited by adopting a symmetrical amplifying form and a fully differential amplifying structure, and the output structure is a differential structure and can be conveniently used as a signal detector, particularly the prepositive amplification of a weak signal detector.
In some embodiments, the constant current source circuit includes a bias setting module, a current setting module, a first operational amplifier, and a transistor, wherein the bias setting module is connected to a positive input terminal of the first operational amplifier, the current setting module is connected to a negative input terminal of the first operational amplifier, a drain of the transistor is connected to a negative input terminal of the first operational amplifier, a source of the transistor is connected to an input terminal of the differential gain configuration circuit, and an output terminal of the first operational amplifier is connected to an output terminal of the differential gain configuration circuit.
In some embodiments, the bias setting module includes a first dc voltage source, a first resistor, and a second resistor, a first end of the first resistor is connected to the first dc voltage source, a second end of the first resistor is connected to the positive input end of the first operational amplifier, a first end of the second resistor is grounded, a second end of the second resistor is connected to the positive input end of the first operational amplifier, and a voltage configuration value of the bias setting module is obtained by dividing the voltage between the first resistor and the second resistor.
In some embodiments, the current setting module includes a second dc voltage source and a third resistor, a first end of the third resistor is connected to the second dc voltage source, a second end of the third resistor is connected to the negative input terminal of the first operational amplifier, and the current configuration value of the current setting module is determined by the second dc voltage source, the third resistor and the voltage configuration value of the bias setting module.
In some embodiments, the constant current source circuit further includes a first capacitor, one end of the first capacitor is connected to the negative input terminal of the first operational amplifier, and the other end of the first capacitor is connected to the output terminal of the first operational amplifier.
In some embodiments, the constant current source circuit further comprises an input impedance configuration module, the input impedance configuration module is connected to the gates of the transistors, the input signal is input through the input impedance configuration module, and the input mode of the input signal comprises a differential input and a single-ended input.
In some embodiments, the amplifying circuit includes a positive voltage input terminal and a negative voltage input terminal, and in the case that the input mode is the single-ended input, the positive voltage input terminal is connected with the input signal, and the negative voltage input terminal is connected to the ground.
In some embodiments, the amplifying circuit includes a positive voltage input terminal and a negative voltage input terminal, and in the case that the input mode is the differential input mode, the positive voltage input terminal is connected to the positive terminal of the input signal, and the negative voltage input terminal is connected to the negative terminal of the input signal.
In some embodiments, the input impedance configuration module includes a fourth resistor, one end of the fourth resistor is connected to the gate of the transistor, and the other end of the fourth resistor is grounded.
In some embodiments, the differential gain configuration circuit includes a fifth resistor, a sixth resistor, and a seventh resistor, two ends of the fifth resistor are respectively connected to the source terminals of the transistors of the two constant current source circuits, a first end of the sixth resistor is connected to the fifth resistor, a second end of the sixth resistor is connected to the output terminal of the first operational amplifier of one of the constant current source circuits, a first end of the seventh resistor is connected to the fifth resistor, a second end of the seventh resistor is connected to the output terminal of the first operational amplifier of the other constant current source circuit, and a second end of the sixth resistor and a second end of the seventh resistor are further connected to the fully differential amplification circuit.
In some embodiments, the fully differential amplifying circuit includes an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, and a second operational amplifier, a first end of the eighth resistor is connected to the second end of the seventh resistor, a second end of the eighth resistor is connected to the positive input terminal of the second operational amplifier, a first end of the ninth resistor is connected to the second end of the sixth resistor, a second end of the ninth resistor is connected to the negative input terminal of the second operational amplifier, the tenth resistor is disposed between the positive input terminal and the output terminal of the second operational amplifier, and the eleventh resistor is disposed between the negative input terminal and the output terminal of the second operational amplifier.
The present application provides a signal detector comprising an amplification circuit as in any of the above embodiments.
Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.
Drawings
The above and/or additional aspects and advantages of the present application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 is a schematic circuit block diagram of an amplifying circuit in an embodiment of the present application;
fig. 2 is a schematic circuit diagram of an amplifier circuit according to an embodiment of the present invention.
Description of the main element symbols:
the amplifier circuit 100, the constant current source circuit 11, the bias setting module 110, the current setting module 111, the input impedance configuration module 112, the differential gain configuration circuit 12, and the fully differential amplifier circuit 13.
Detailed Description
Reference will now be made in detail to embodiments of the present application, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary only for explaining the present application and are not to be construed as limiting the present application.
In the description of the present application, it is to be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the present application and for simplicity in description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed in a particular orientation, and be operated in a particular manner, and are not to be construed as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; may be mechanically, electrically or may be in communication with each other; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as the case may be.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact of the first and second features, or may comprise contact of the first and second features not directly but through another feature in between. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.
The following disclosure provides many different embodiments or examples for implementing different features of the application. In order to simplify the disclosure of the present application, specific example components and arrangements are described below. Of course, they are merely examples and are not intended to limit the present application. Moreover, the present application may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, examples of various specific processes and materials are provided herein, but one of ordinary skill in the art may recognize applications of other processes and/or use of other materials.
Referring to fig. 1, an amplifying circuit 100 according to an embodiment of the present disclosure includes two constant current source circuits 11, a differential gain configuration circuit 12 and a fully differential amplifying circuit 13, where the two constant current source circuits 11 are symmetrically designed, the constant current source circuits 11 are used for providing a stable current, an input end of the differential gain configuration circuit 12 is connected to an output end of the constant current source circuits 11, and the differential gain configuration circuit 12 is used for configuring an amplifying gain.
In the amplifying circuit 100 of the embodiment of the present application, a very low input noise spectral density can be achieved under a high impedance input condition, a symmetric amplification form and a fully differential amplification structure are adopted, common mode interference can be effectively suppressed, and the output structure is a differential structure and can be conveniently used as a signal detector, particularly for pre-amplification of a weak signal detector.
The embodiment of the present application also provides a signal detector, which includes the amplifying circuit 100 provided in the present application. The signal detector includes a weak signal detector and other detection devices, and the weak signal detector is described herein, and the signal detector can detect a useful weak signal from noise, and the signal detector can amplify the weak signal for detection via the amplifying circuit 100 during operation.
The weak signal detection technique employs a series of signal processing methods to detect a useful weak signal from noise. When a weak signal is detected in a low signal-to-noise ratio, because the characteristic signal of the weak signal itself is very weak, noise introduced by a device for acquiring the signal, such as an amplifying circuit in a signal detector, needs to be reduced as much as possible.
It is to be appreciated that well-established integrated operational amplifiers can achieve very low input voltage noise spectral density when BJTs (bipolar transistors) are used as input electrodes. However, the input impedance of the BJT is not high, which cannot satisfy the high impedance input condition. In the field of weak signal detection, the output impedance of a detected signal may be low resistance or high resistance. Therefore, in order to be able to satisfy the voltage detection requirements under all conditions, the input of the detection circuit must be able to satisfy the high impedance condition.
When the JFET (junction field effect transistor) is used as an input amplifier at the input end, a signal source with large input impedance can be accessed, however, no JFET input exists in the market at present and the integrated operational amplifier with very low input voltage noise spectral density exists, so that the integrated operational amplifier can be realized only by adopting a mode of connecting a plurality of integrated operational amplifiers in parallel or adopting a discrete JFET element to build a pre-amplification circuit. Although the scheme of parallel connection of multiple integrated operational amplifiers can also reduce the spectral density of input voltage noise to a sufficiently low level, the scheme needs a large number of integrated operational amplifiers, which increases the cost on the one hand, increases the area of a circuit board and the design difficulty on the other hand, and is particularly difficult to apply to the circuit board with limited area.
Therefore, the present application provides an amplifying circuit 100, and the overall architecture adopts a symmetrical amplifying form, and the symmetrical manner can greatly suppress common mode interference and reduce the influence of temperature fluctuation on the amplifying circuit 100. The input of the amplifying circuit 100 supports differential or single-ended input, and the output structure is a differential structure, which can be conveniently used as a preamplifier of a weak signal detection device. The amplification circuit 100 can be designed with discrete JFET elements to achieve very low input noise spectral density at high input impedance.
Referring to fig. 2, in an embodiment, the amplifying circuit 100 is composed of two stages of amplifying circuits 100, and the amplifying ratio of the two stages of amplifying circuits 100 can be configured according to actual requirements. Generally, the first stage amplification circuit plays a decisive role in the noise of the overall circuit. The first-stage amplifying circuit mainly comprises two symmetrically arranged constant current source circuits 11 and a differential gain configuration circuit 12, and the symmetrically arranged structure can greatly inhibit common mode interference and reduce the influence of temperature fluctuation on the amplifying circuit 100. The second stage amplification circuit includes a fully differential amplification circuit 13.
The constant current source circuit 11 includes a bias setting module 110, a current setting module 111, a first operational amplifier and a transistor, wherein the bias setting module 110 is connected to an anode input terminal of the first operational amplifier, the current setting module 111 is connected to a cathode input terminal of the first operational amplifier, a drain of the transistor is connected to a cathode input terminal of the first operational amplifier, a source of the transistor is connected to an input terminal of the differential gain configuration circuit 12, and an output terminal of the first operational amplifier is connected to an output terminal of the differential gain configuration circuit 12.
It is understood that the transistor may be a low noise JFET transistor, the first operational amplifier may be a low noise integrated operational amplifier, and the constant current source circuit 11 further includes a first capacitor having one end connected to the negative input terminal of the first operational amplifier and the other end connected to the output terminal of the first operational amplifier. The first capacitance may be used to cancel a phase shift or delay in the feedback network of the first operational amplifier.
Since the two constant current source circuits 11 are completely symmetrical in structure, the transistors include a transistor Q1 and a transistor Q2, and the models of the transistors are the same. The first operational amplifier comprises U1 and U2, both low noise integrated operational amplifiers, and the first capacitor comprises C1 and C2.
More specifically, as shown in fig. 2, the bias setting module 110 includes a first dc voltage source V1, a first resistor and a second resistor, a first end of the first resistor is connected to the first dc voltage source V1, a second end of the first resistor is connected to the positive input end of the first operational amplifier, a first end of the second resistor is grounded, a second end of the second resistor is connected to the positive input end of the first operational amplifier, and a voltage configuration value of the bias setting module 110 is obtained by dividing voltage between the first resistor and the second resistor.
Since the two constant current source circuits 11 are completely symmetrical in structure, the bias setting module 110 is two, the first resistor includes R1 and R2, the second resistor includes R5 and R6, and the resistance value of R1 is usually set to be equal to the resistance value of R6, and the resistance value of R2 is set to be equal to the resistance value of R5. The voltage configuration value of the bias setting module 110 is obtained by dividing the first dc voltage source V1 by R1 and R2. Similarly, the voltage configuration value of the other bias setting module 110 is obtained by dividing the other first dc voltage source V1 by R5 and R6.
A second end of the first resistor R1 is connected to the positive input terminal of the first operational amplifier U1, and a second end of the second resistor R5 is connected to the positive input terminal of the first operational amplifier U2.
As shown in fig. 2, the current setting module 111 includes a second dc voltage source V2 and a third resistor, a first end of the third resistor is connected to the second dc voltage source V2, a second end of the third resistor is connected to the negative input terminal of the first operational amplifier, and a current configuration value of the current setting module 111 is determined by the voltage configuration values of the second dc voltage source V2, the third resistor and the bias setting module 110.
In which the two constant current source circuits 11 are arranged completely symmetrically, the third resistor includes R3 and R4, and the resistance value of R3 is generally the same as that of R4. The current configuration value of one of the current setting modules 111 is determined by the voltage offset values of the second dc voltage sources V2, R3 and the corresponding one of the offset setting modules 110. Similarly, the current configuration value of the other current setting module 111 is determined by the voltage configuration values of the other second dc voltage source V2, R4 and the corresponding bias setting module 110. Generally, the resistance value of R3 is the same as the resistance value of R4. A second end of the third resistor R3 is connected to the negative input terminal of the first operational amplifier U1, and a second end of the third resistor R4 is connected to the negative input terminal of the first operational amplifier U2.
As shown in fig. 2, the constant current source circuit 11 may further include an input impedance configuration module 112, where the input impedance configuration module 112 is connected to the gates of the transistors, the input signal is input through the input impedance configuration module 112, and the input mode of the input signal includes a differential input and a single-ended input.
It should be noted that the amplifying circuit 100 may include a positive voltage input terminal and a negative voltage input terminal, where the input mode is single-ended input, the positive voltage input terminal is connected with the input signal, and the negative voltage input terminal is grounded.
The amplifier circuit 100 includes a positive voltage input terminal and a negative voltage input terminal, and when the input method is differential input, the positive voltage input terminal is connected to the positive terminal of the input signal, and the negative voltage input terminal is connected to the negative terminal of the input signal.
Specifically, as shown in fig. 2, the input impedance configuration module 112 may include a fourth resistor, one end of which is connected to the gate of the transistor, and the other end of which is grounded. The input impedance may be configured to be typically 50 ohm input or 10 mega ohm input depending on the actual requirements. In the field of weak signal detection, in order to improve the detection accuracy, the input impedance is usually configured to be 10 megohms, i.e., the fourth resistor is configured to be 10 megohms. Wherein, the fourth resistor may include R9 and R10. Then one terminal of the fourth resistor R9 is connected to the gate of the transistor Q1 and one terminal of the fourth resistor R10 is connected to the gate of the transistor Q2.
As shown in fig. 2, the differential gain configuration circuit 12 includes a fifth resistor, a sixth resistor, and a seventh resistor, two ends of the fifth resistor are respectively connected to the source terminals of the transistors of the two constant current source circuits 11, a first end of the sixth resistor is connected to the fifth resistor, a second end of the sixth resistor is connected to the output terminal of the first operational amplifier of one of the constant current source circuits 11, a first end of the seventh resistor is connected to the fifth resistor, a second end of the seventh resistor is connected to the output terminal of the first operational amplifier of the other constant current source circuit 11, and the second end of the sixth resistor and the second end of the seventh resistor are further connected to the fully differential amplifier circuit 13.
The fifth resistor, the sixth resistor and the seventh resistor in the differential gain configuration circuit 12 are respectively determined by R11, R12 and R13, and the resistance value of R12 and the resistance value of R13 are generally the same. In the case of configuring the gain ratio using the differential gain configuration circuit 12 to form a voltage amplification ratio, the amplification ratio can be calculated by R12/(1/2) R11. Two ends of the fifth resistor R11 are respectively connected with the source electrodes of the transistor Q1 and the transistor Q2; a second end of the sixth resistor R12 is connected to the output terminal of the first operational amplifier U1, and a second end of the seventh resistor R13 is connected to the output terminal of the first operational amplifier U2.
As shown in fig. 2, the fully differential amplifier circuit 13 includes an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, and a second operational amplifier U3, a first end of the eighth resistor is connected to a second end of the seventh resistor, a second end of the eighth resistor is connected to a positive input terminal of the second operational amplifier U3, a first end of the ninth resistor is connected to a second end of the sixth resistor, a second end of the ninth resistor is connected to a negative input terminal of the second operational amplifier U3, the tenth resistor is disposed between the positive input terminal and the output terminal of the second operational amplifier U3, and the eleventh resistor is disposed between the negative input terminal and the output terminal of the second operational amplifier U3.
The eighth resistor, the ninth resistor, the tenth resistor and the eleventh resistor in the fully differential amplifier circuit 13 are R15, R16, R14 and R17, respectively, and usually, the resistance of R14 is the same as that of R17, and the resistances of R15 and R16 are the same.
In the amplifying circuit 100 of the present application, the input signal is input through the input impedance configuration module 112, and the user can select the single-ended input or differential input mode, and the selection is determined by connecting the negative pole of the voltage input to the ground or the negative pole of the input signal. The fourth resistors R9 and R10 of the input impedance configuration block 112 may be selected to be 10 mega ohms to improve the accuracy of the detection. Then the input signal passes through the transistors Q1 and Q2 of the two constant current source circuits 11, and matches with the amplification ratio configured by the differential gain configuration circuit 12, that is, the input signal is amplified to a larger voltage by the first stage amplification circuit, and because of the design structure of the two symmetrical constant current source circuits 11, the output ends of the two constant current source circuits 11 are both connected to the differential gain configuration circuit 12, so as to realize the differential output structure, and the amplified input signal forms a differential structure and is connected with the input end of the fully differential amplification circuit 13, so as to realize the further amplification of the input signal by using the differential amplification mode.
In the present application, the amplifier circuit 100 is built based on discrete JFET elements, i.e., two transistors, and can achieve very low input noise spectral density under the condition of high impedance input. The amplifying circuit 100 adopts a fully differential amplifying structure, can effectively inhibit the influence of common-mode signals such as temperature and the like on the circuit, and can be used as the pre-amplifying circuit 100 of the signal detector under the condition of high-resistance input.
In the description herein, references to the description of the terms "one embodiment," "certain embodiments," "an illustrative embodiment," "an example," "a specific example," or "some examples" or the like mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
While embodiments of the present application have been shown and described, it will be understood by those of ordinary skill in the art that: numerous changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the application, the scope of which is defined by the claims and their equivalents.
Claims (12)
1. An amplification circuit, comprising:
the two constant current source circuits are symmetrically arranged and used for providing stable current;
the input end of the differential gain configuration circuit is connected with the output end of the constant current source circuit, and the differential gain configuration circuit is used for configuring an amplification factor to cooperate with the constant current source circuit to carry out primary amplification on an input signal; and
and the input end of the fully differential amplification circuit is connected with the output end of the differential gain configuration circuit, and the fully differential amplification circuit is used for carrying out secondary amplification on the input signal amplified by the differential gain configuration circuit.
2. The amplifier circuit according to claim 1, wherein the constant current source circuit comprises a bias setting module, a current setting module, a first operational amplifier, and a transistor, wherein the bias setting module is connected to a positive input terminal of the first operational amplifier, the current setting module is connected to a negative input terminal of the first operational amplifier, a drain of the transistor is connected to a negative input terminal of the first operational amplifier, a source of the transistor is connected to an input terminal of the differential gain configuration circuit, and an output terminal of the first operational amplifier is connected to an output terminal of the differential gain configuration circuit.
3. The amplifier circuit according to claim 2, wherein the bias setting module includes a first dc voltage source, a first resistor, and a second resistor, a first end of the first resistor is connected to the first dc voltage source, a second end of the first resistor is connected to the positive input terminal of the first operational amplifier, a first end of the second resistor is grounded, a second end of the second resistor is connected to the positive input terminal of the first operational amplifier, and the voltage configuration value of the bias setting module is obtained by dividing the voltage of the first resistor and the voltage of the second resistor.
4. The amplifier circuit of claim 3, wherein the current setting module comprises a second DC voltage source and a third resistor, a first end of the third resistor is connected to the second DC voltage source, a second end of the third resistor is connected to a negative input terminal of the first operational amplifier, and a current configuration value of the current setting module is determined by the second DC voltage source, the third resistor and a voltage configuration value of the bias setting module.
5. The amplifier circuit according to claim 2, wherein the constant current source circuit further comprises a first capacitor, one end of the first capacitor is connected to the negative input terminal of the first operational amplifier, and the other end of the first capacitor is connected to the output terminal of the first operational amplifier.
6. The amplifier circuit according to claim 2, wherein the constant current source circuit further comprises an input impedance configuration block, the input impedance configuration block is connected to the gate of the transistor, the input signal is input through the input impedance configuration block, and the input mode of the input signal includes a differential input and a single-ended input.
7. The amplifier circuit according to claim 6, wherein the amplifier circuit comprises a positive voltage input terminal and a negative voltage input terminal, and when the input mode is the single-ended input mode, the positive voltage input terminal is connected with the input signal, and the negative voltage input terminal is connected to ground.
8. The amplifier circuit according to claim 6, wherein the amplifier circuit comprises a positive voltage input terminal and a negative voltage input terminal, and when the input mode is the differential input mode, the positive voltage input terminal is connected to the positive terminal of the input signal, and the negative voltage input terminal is connected to the negative terminal of the input signal.
9. The amplifier circuit according to claim 6, wherein the input impedance configuration module comprises a fourth resistor, one end of the fourth resistor is connected to the gate of the transistor, and the other end of the fourth resistor is grounded.
10. The amplifier circuit according to claim 2, wherein the differential gain configuration circuit includes a fifth resistor, a sixth resistor and a seventh resistor, two ends of the fifth resistor are respectively connected to the source terminals of the transistors of the two constant current source circuits, a first end of the sixth resistor is connected to the fifth resistor, a second end of the sixth resistor is connected to the output terminal of the first operational amplifier of one of the constant current source circuits, a first end of the seventh resistor is connected to the fifth resistor, a second end of the seventh resistor is connected to the output terminal of the first operational amplifier of the other constant current source circuit, and the second ends of the sixth resistor and the seventh resistor are further connected to the fully differential amplifier circuit.
11. The amplifying circuit according to claim 10, wherein the fully differential amplifying circuit comprises an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, and a second operational amplifier, a first end of the eighth resistor is connected to a second end of the seventh resistor, a second end of the eighth resistor is connected to a positive input terminal of the second operational amplifier, a first end of the ninth resistor is connected to a second end of the sixth resistor, a second end of the ninth resistor is connected to a negative input terminal of the second operational amplifier, the tenth resistor is disposed between the positive input terminal and the output terminal of the second operational amplifier, and the eleventh resistor is disposed between the negative input terminal and the output terminal of the second operational amplifier.
12. A signal detector comprising an amplification circuit as claimed in any one of claims 1 to 11.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210410776.5A CN114710123A (en) | 2022-04-19 | 2022-04-19 | Amplifying circuit and signal detector |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210410776.5A CN114710123A (en) | 2022-04-19 | 2022-04-19 | Amplifying circuit and signal detector |
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| CN114710123A true CN114710123A (en) | 2022-07-05 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114866042A (en) * | 2022-07-07 | 2022-08-05 | 国仪量子(合肥)技术有限公司 | Signal amplifying circuit |
| CN115603669A (en) * | 2022-09-27 | 2023-01-13 | 中船重工安谱（湖北）仪器有限公司（Cn） | Differential amplifier circuit |
| CN116048189A (en) * | 2023-03-29 | 2023-05-02 | 国仪量子(合肥)技术有限公司 | Arbitrary waveform generating circuit, method and arbitrary waveform generator |
-
2022
- 2022-04-19 CN CN202210410776.5A patent/CN114710123A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114866042A (en) * | 2022-07-07 | 2022-08-05 | 国仪量子(合肥)技术有限公司 | Signal amplifying circuit |
| CN115603669A (en) * | 2022-09-27 | 2023-01-13 | 中船重工安谱（湖北）仪器有限公司（Cn） | Differential amplifier circuit |
| CN115603669B (en) * | 2022-09-27 | 2024-03-19 | 中船重工安谱（湖北）仪器有限公司 | Differential amplifying circuit |
| CN116048189A (en) * | 2023-03-29 | 2023-05-02 | 国仪量子(合肥)技术有限公司 | Arbitrary waveform generating circuit, method and arbitrary waveform generator |
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