CN115663020A - GaN HEMT epitaxial structure based on silicon substrate - Google Patents

GaN HEMT epitaxial structure based on silicon substrate Download PDF

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CN115663020A
CN115663020A CN202211629458.4A CN202211629458A CN115663020A CN 115663020 A CN115663020 A CN 115663020A CN 202211629458 A CN202211629458 A CN 202211629458A CN 115663020 A CN115663020 A CN 115663020A
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silicon substrate
epitaxially grown
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陈振
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Xuzhou Jinshajiang Semiconductor Co ltd
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Xuzhou Jinshajiang Semiconductor Co ltd
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Abstract

The invention discloses a GaN HEMT epitaxial structure based on a silicon substrate, which belongs to the technical field of semiconductors and comprises a silicon substrate, wherein a buffer layer, an AlGaN stress control layer and an N-type semiconductor layer are sequentially epitaxially grown on the surface of the silicon substrate, the buffer layer is a CdS buffer layer, the N-type semiconductor layer comprises a low-quality GaN layer epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer epitaxially grown on the upper surface of the low-quality GaN layer, and a channel layer and an AlGaN barrier layer are sequentially epitaxially grown on the surface of the N-type semiconductor layer; the defects in the N-type semiconductor layer which is epitaxially grown later are reduced, the crystal quality and the quality of the high-electron-mobility transistor are improved, the current collapse effect of the device is further reduced, and the dynamic effect of the device is improved.

Description

GaN HEMT epitaxial structure based on silicon substrate
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to a GaN HEMT epitaxial structure based on a silicon substrate.
Background
In the past decades, silicon plays an extremely important role as an important semiconductor basic material in the development of electronic integrated circuits and discrete devices, however, with the arrival of the mole limit of silicon materials, due to the limitation of the material characteristics, the application of the silicon material in higher voltage and higher frequency occasions is restricted mainly by the low forbidden band width and the electronic drift rate, and the difficulty of further reducing the circuit size is increased; under the condition, gallium nitride is used as a third-generation semiconductor material, and due to the wide forbidden band width (the Eg =3.4eV and the Eg =1.12 eV) and the high electron drift rate (the electron drift rate of gallium nitride is 2.5 times that of silicon), the gallium nitride has the advantages of ensuring higher breakdown electric field intensity, being suitable for preparing high-voltage-resistant and high-frequency-resistant power devices, being widely used in power electronic devices, radio frequency devices and photoelectric devices, and being an ideal material in emerging fields such as electric vehicles, 5G base stations, satellites and the like.
Although gallium nitride is an excellent semiconductor material, at present, due to the fact that the material preparation difficulty is high, large-size commercialized gallium nitride single crystals are difficult to obtain, a gallium nitride device cannot be obtained in a homoepitaxy mode, heteroepitaxy by using a silicon material as a substrate for epitaxial growth of the gallium nitride device is the most common practice in the industry at present, however, the inventor believes that 16.9% of lattice mismatch exists between the silicon material and the gallium nitride material, the higher lattice mismatch can cause higher defect density in the device, and the technical challenges of large lattice mismatch and high stress of silicon and gallium nitride are faced when the gallium nitride material is heteroepitaxy on a silicon substrate; the thermal expansion coefficient of gallium nitride is 6.2X 10 -6 K, the thermal expansion coefficient of silicon is 2.6X 10 -6 the/K and the GaN epitaxial film have thermal expansion coefficient mismatch, the GaN film material on the silicon substrate is easy to crack due to large thermal expansion coefficient difference, the defect density is high, the interface electronic local state is high, the warping/bending degree is large, further, the (Al) GaN epitaxial film has low quality and poor material uniformity, the performance of the device fails due to a leakage channel formed by the defects, the breakdown characteristic of the device is influenced, and fine cracks can be generated due to large lattice mismatch stress in the epitaxial growth process. For this reason, a GaN HEMT epitaxial structure based on a silicon substrate needs to be designed.
It should be noted that the information disclosed in the above background section is only for enhancement of understanding of the background of the present disclosure, and thus, may include information that does not constitute prior art.
Disclosure of Invention
The inventor finds that heteroepitaxial gallium nitride materials on a silicon substrate are influenced by large lattice mismatch, high stress and large difference of thermal expansion coefficients between the silicon substrate and the gallium nitride materials, so that the GaN thin film materials on the silicon substrate are easy to crack, high in defect density, high in interface electronic local state and large in warping/bending, and further the technical problems of low quality and poor material uniformity of (Al) GaN epitaxial thin films are solved.
In view of at least one of the above technical problems, the present disclosure provides a GaN HEMT epitaxial structure based on a silicon substrate, which has the following specific technical scheme:
the invention discloses a GaN HEMT epitaxial structure based on a silicon substrate, which comprises the silicon substrate, wherein a buffer layer, an AlGaN stress control layer and an N-type semiconductor layer are epitaxially grown on the surface of the silicon substrate in sequence, the buffer layer is a CdS buffer layer, the N-type semiconductor layer comprises a low-quality GaN layer epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer epitaxially grown on the upper surface of the low-quality GaN layer, and a channel layer and an AlGaN barrier layer are epitaxially grown on the surface of the N-type semiconductor layer in sequence.
In some embodiments of the present disclosure, the buffer layer is a ZnS/CdS/ZnO multilayer buffer layer.
In some embodiments of the present disclosure, the silicon substrate has a thickness of 300 to 1500mm.
In some embodiments of the present disclosure, the CdS buffer layer has a thickness of 5 to 500nm.
In some embodiments of the present disclosure, the AlGaN stress control layer has a thickness of 0.1 to 3 μm.
In some embodiments of the present disclosure, the composition of Al in the AlGaN stress control layer is 5% or more and less than 100%.
In some embodiments of the present disclosure, the low quality GaN layer is a doped or undoped GaN layer.
In some embodiments of the present disclosure, the high quality GaN layer is an undoped GaN layer.
In some embodiments of the present disclosure, the high quality GaN layer is a doped GaN layer, the doping concentration in the doped GaN layer is lower than the low quality GaN layer and lower than 10E19/cm 3
Compared with the prior art, the invention has the following beneficial effects:
according to the invention, the CdS material is adopted, and the buffer layer is formed between the Si substrate and the GaN material so as to reduce lattice mismatch and thermal mismatch between Si and GaN, reduce defects in a later epitaxially grown N-type semiconductor layer and improve the crystal quality and the quality of the high-electron-mobility transistor. Thereby reducing the current collapse effect of the device and improving the dynamic effect of the device.
Drawings
FIG. 1 is a schematic structural diagram of example 1 in the structure of the present invention;
fig. 2 is a schematic structural diagram of embodiment 3 in the structure of the present invention.
The reference numbers in the figures illustrate: 1. a silicon substrate; 2. a buffer layer; 3. an AlGaN stress control layer; 41. a low-quality GaN layer; 42. a high quality GaN layer; 5. a channel layer; 6. an AlGaN barrier layer.
The specific implementation mode is as follows:
for better understanding of the purpose, structure and function of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some embodiments of the present invention, but not all embodiments.
The numbering of the components as such is used herein only to distinguish between the objects represented and not to have any sequential or technical meaning. In the present disclosure, the term "connected", unless otherwise specified, includes both direct and indirect "connections". In the description of the present application, it is to be understood that the positional terms "upper", "lower", and the like, indicate the positional or positional relationship based on the positional or positional relationship shown in the drawings, and are only for convenience of describing the present application and brief description, but do not indicate or imply that the referred devices or units must have a specific orientation, be constituted in a specific orientation, and operate, and thus, should not be construed as limiting the present application.
As shown in figures 1 to 2 of the attached drawings, a GaN HEMT epitaxial structure based on a silicon substrate is designed, and comprises a silicon substrate 1, wherein a buffer layer 2, an AlGaN stress control layer 3 and an N-type semiconductor layer are epitaxially grown on the surface of the silicon substrate 1 in sequence, wherein the buffer layer 2 is a CdS buffer layer, the N-type semiconductor layer comprises a low-quality GaN layer 41 epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer 42 epitaxially grown on the upper surface of the low-quality GaN layer, and a channel layer 5 and an AlGaN barrier layer 6 are epitaxially grown on the surface of the N-type semiconductor layer in sequence. Thereby reducing the current collapse effect of the device and improving the dynamic effect of the device.
The working principle of the disclosure is as follows: to grow high quality GaN material on a silicon substrate, an intervening material may be used as a buffer layer. The material as the buffer layer needs to satisfy three conditions: firstly, si is an elementary semiconductor material, and GaN is a compound semiconductor material, so that the buffer layer material needs to complete the transition from the elementary material to the compound material; second, the material is crystalline and has a lattice type consistent with GaN. Third, the lattice constant is between Si and GaN. Firstly, cdS is a compound semiconductor material and can be well transited from a Si simple substance material substrate to a GaN compound material; secondly, cdS and GaN are both crystal materials, and the crystal structure belongs to a zinc blende structure; third, the ZnS lattice constant is 0.382 nm, the CdS lattice constant is 0.4160 nm, both between Si (lattice constant: 0.543095 nm) and GaN (lattice constant: 0.3189 nm), which can be used to transition the lattice mismatch between Si and GaN; fourth, the coefficient of thermal expansion of CdS is 6.6 × 10 -6 The thermal expansion coefficient of the/K, znS material is 4.74X 10 -6 /K~6.2×10 -6 and/K, their thermal expansion coefficient is between that of Si and GaN material. Thus, cdS may be employed as the first layer of buffer layer material between the Si substrate and the GaN material.
In the above embodiment, 3 examples are listed to realize the above technical solution:
example 1
As shown in fig. 1, the present embodiment discloses a GaN HEMT epitaxial structure based on a silicon substrate, including a silicon substrate 1, the thickness of the silicon substrate 1 is 300mm, and a buffer layer 2, an AlGaN stress control layer 3 and an N-type semiconductor layer are epitaxially grown on the surface of the silicon substrate 1 in sequence, where the buffer layer 2 is a CdS buffer layer, the CdS buffer layer is 5nm, the AlGaN stress control layer 3 is 0.1 μm thick, and the Al component in the AlGaN stress control layer 3 is 5%; the N-type semiconductor layer comprises a low-quality GaN layer 41 epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer 42 epitaxially grown on the upper surface of the low-quality GaN layer; a channel layer 5 and an AlGaN barrier layer 6 are epitaxially grown on the surface of the N-type semiconductor layer in sequence, and a buffer layer is formed between a Si substrate and a GaN material by adopting a CdS material so as to reduce lattice mismatch and thermal mismatch between Si and GaN, reduce defects in the N-type semiconductor layer epitaxially grown later and improve the crystal quality and the quality of the high-electron-mobility transistor. And further, the current collapse effect of the device is reduced, and the dynamic effect of the device is improved.
Example 2
The embodiment discloses a GaN HEMT epitaxial structure based on a silicon substrate, which comprises a silicon substrate 1, wherein the thickness of the silicon substrate 1 is 1300mm, and a buffer layer 2, an AlGaN stress control layer 3 and an N-type semiconductor layer are epitaxially grown on the surface of the silicon substrate 1 in sequence, wherein the buffer layer 2 is a CdS buffer layer, the CdS buffer layer is 500nm, the AlGaN stress control layer 3 is 3 mu m, and the Al component in the AlGaN stress control layer 3 is 60%; the N-type semiconductor layer comprises a low-quality GaN layer 41 epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer 42 epitaxially grown on the upper surface of the low-quality GaN layer, wherein the low-quality GaN layer 41 is a doped GaN layer, and the high-quality GaN layer 42 is an undoped GaN layer; according to the invention, the CdS material is adopted, and the buffer layer is formed between the Si substrate and the GaN material to reduce lattice mismatch and thermal mismatch between Si and GaN, reduce defects in the N-type semiconductor layer which is epitaxially grown later, and improve the crystal quality and the quality of the high-electron-mobility transistor. Thereby reducing the current collapse effect of the device and improving the dynamic effect of the device.
Example 3
As shown in fig. 2, the present embodiment discloses a GaN HEMT epitaxial structure based on a silicon substrate, which includes a silicon substrate 1, the thickness of the silicon substrate 1 is 1500mm, a buffer layer 2, an AlGaN stress control layer 3 and an N-type semiconductor layer are sequentially epitaxially grown on the surface of the silicon substrate 1, wherein the buffer layer 2 is a ZnS/CdS/ZnO multilayer buffer layer, that is, the structure is Si/CdS/ZnS/ZnO/GaN, and the lattice constants of the structure are respectively: the structure has the advantages that the lattice constant of Si (the lattice constant is 0.543095 nm)/CdS (the lattice constant is 0.4160 nm)/ZnS (the lattice constant is 0.382 nm)/ZnO (the lattice constant is 0.3249 nm)/GaN (the lattice constant is 0.3189 nm), the lattice constant is gradually changed from the largest Si substrate to the smallest GaN, the stress is gradually released, the crystal quality of epitaxial GaN is improved, the defect density is reduced, and the performance of all aspects of the device is improved; the thickness of the AlGaN stress control layer 3 is 2.7 mu m, and the Al component in the AlGaN stress control layer 3 is 99%; the N-type semiconductor layer comprises a low-quality GaN layer 41 epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer 42 epitaxially grown on the upper surface of the low-quality GaN layer, the low-quality GaN layer 41 is a doped GaN layer, the high-quality GaN layer 42 is a doped GaN layer, and the doping concentration in the doped GaN layer is lower than that of the low-quality GaN layer 41 and lower than 10E19/cm 3 (ii) a A channel layer 5 and an AlGaN barrier layer 6 are epitaxially grown on the surface of the N-type semiconductor layer in sequence, and a buffer layer is formed between a Si substrate and a GaN material by adopting a CdS material so as to reduce lattice mismatch and thermal mismatch between Si and GaN, reduce defects in the N-type semiconductor layer epitaxially grown later and improve the crystal quality and the quality of the high-electron-mobility transistor. Thereby reducing the current collapse effect of the device and improving the dynamic effect of the device.
It is to be understood that the present invention has been described with reference to certain embodiments and that various changes in form and details may be made therein by those skilled in the art without departing from the spirit and scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the essential scope thereof. Therefore, it is intended that the invention not be limited to the particular embodiment disclosed, but that the invention will include all embodiments falling within the scope of the appended claims.

Claims (9)

1. The GaN HEMT epitaxial structure based on the silicon substrate is characterized by comprising a silicon substrate (1), wherein a buffer layer (2), an AlGaN stress control layer (3) and an N-type semiconductor layer are sequentially epitaxially grown on the surface of the silicon substrate (1), the buffer layer (2) is a CdS buffer layer, the N-type semiconductor layer comprises a low-quality GaN layer (41) epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer (42) epitaxially grown on the upper surface of the low-quality GaN layer, and a channel layer (5) and an AlGaN barrier layer (6) are sequentially epitaxially grown on the surface of the N-type semiconductor layer.
2. The GaN HEMT epitaxial structure of claim 1, wherein said buffer layer (2) is a ZnS/CdS/ZnO multilayer buffer layer.
3. The GaN HEMT epitaxial structure of claim 1 or 2, wherein said silicon substrate (1) has a thickness of 300 to 1500mm.
4. The silicon substrate-based GaN HEMT epitaxial structure according to claim 1, wherein the CdS buffer layer has a thickness of 5-500 nm.
5. The GaN HEMT epitaxial structure of claim 1 or 2, wherein said AlGaN stress control layer (3) has a thickness of 0.1 to 3 μm.
6. The GaN HEMT epitaxial structure of claim 1 or 2, wherein the composition of Al in said AlGaN stress control layer (3) is 5% or more and less than 100%.
7. The GaN HEMT epitaxial structure of claim 1 or 2, wherein said low quality GaN layer (41) is a doped or undoped GaN layer.
8. The GaN HEMT epitaxial structure of claim 1 or 2, wherein said high quality GaN layer (42) is an undoped GaN layer.
9. The GaN HEMT epitaxial structure of the silicon substrate based, according to claim 1 or 2, characterized in that the high quality GaN layer (42) is a doped GaN layer, the doping concentration in the doped GaN layer being lower than the low quality GaN layer (41) and lower than 10E19/cm 3
CN202211629458.4A 2022-12-19 2022-12-19 GaN HEMT epitaxial structure based on silicon substrate Pending CN115663020A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117276336A (en) * 2023-11-22 2023-12-22 江西兆驰半导体有限公司 Epitaxial structure of HEMT and preparation method thereof

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* Cited by examiner, † Cited by third party
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US20040011280A1 (en) * 2002-03-27 2004-01-22 Takamitsu Higuchi Device substrate and method for producing device substrate
CN1722482A (en) * 2005-06-27 2006-01-18 金芃 Electric and insulative zinc oxide underlay and vertical structure semiconductor LED
US20120305992A1 (en) * 2011-06-06 2012-12-06 Fabio Alessio Marino Hybrid monolithic integration
CN109560159A (en) * 2018-11-02 2019-04-02 云南师范大学 A kind of copper-zinc-tin-sulfur film solar cell
TWI785864B (en) * 2021-10-27 2022-12-01 財團法人工業技術研究院 Semiconductor substrate and transistor

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040011280A1 (en) * 2002-03-27 2004-01-22 Takamitsu Higuchi Device substrate and method for producing device substrate
CN1722482A (en) * 2005-06-27 2006-01-18 金芃 Electric and insulative zinc oxide underlay and vertical structure semiconductor LED
US20120305992A1 (en) * 2011-06-06 2012-12-06 Fabio Alessio Marino Hybrid monolithic integration
CN109560159A (en) * 2018-11-02 2019-04-02 云南师范大学 A kind of copper-zinc-tin-sulfur film solar cell
TWI785864B (en) * 2021-10-27 2022-12-01 財團法人工業技術研究院 Semiconductor substrate and transistor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117276336A (en) * 2023-11-22 2023-12-22 江西兆驰半导体有限公司 Epitaxial structure of HEMT and preparation method thereof
CN117276336B (en) * 2023-11-22 2024-02-20 江西兆驰半导体有限公司 Epitaxial structure of HEMT and preparation method thereof

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