CN115663020A - A GaN HEMT Epitaxial Structure Based on Silicon Substrate - Google Patents

Abstract

The invention discloses a GaN HEMT epitaxial structure based on a silicon substrate, belonging to the field of semiconductor technology, including a silicon substrate, on which a buffer layer, an AlGaN stress control layer and an N-type semiconductor layer are epitaxially grown in sequence, wherein, The buffer layer is a CdS buffer layer, and the N-type semiconductor layer includes a low-quality GaN layer epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer epitaxially grown on the upper surface of the low-quality GaN layer, and the N-type semiconductor layer is epitaxially grown on the surface Grown with a channel layer and an AlGaN barrier layer, the present invention forms a buffer layer between the Si substrate and the GaN material by using CdS as a buffer material to reduce lattice mismatch and thermal mismatch between Si and GaN; The defects in the epitaxially grown N-type semiconductor layer improve the crystal quality and the quality of the high electron mobility transistor, thereby reducing the current collapse effect of the device and improving the dynamic effect of the device.

Description

A GaN HEMT Epitaxial Structure Based on Silicon Substrate

technical field

The invention belongs to the technical field of semiconductors, in particular to a GaN HEMT epitaxial structure based on a silicon substrate.

Background technique

In the past few decades, silicon, as an important basic semiconductor material, has played an extremely important role in the development of electronic integrated circuits and discrete devices. The low bandgap width and electron drift rate restrict its application in higher voltage and higher frequency occasions, and it becomes more and more difficult to further reduce the circuit size; under these conditions, gallium nitride is used as the third generation Semiconductor materials, because of their wide band gap (gallium nitride Eg=3.4eV, silicon Eg=1.12eV) and high electron drift rate (the electron drift rate of gallium nitride is 2.5 times that of silicon), ensure its With higher breakdown electric field strength, it is suitable for the preparation of high-voltage and high-frequency power devices. It is widely used in power electronic devices, radio frequency devices and optoelectronic devices. It is an ideal material for emerging fields such as electric vehicles, 5G base stations, and satellites.

Although gallium nitride is an excellent semiconductor material, it is still difficult to obtain large-scale commercial gallium nitride single crystals due to the difficulty in material preparation, and it is impossible to obtain gallium nitride devices through homoepitaxial methods. It is currently the most common practice in the industry to perform heterogeneous epitaxy on silicon materials as substrates for epitaxial growth of gallium nitride devices. However, the inventors believe that there is a 16.9% lattice mismatch between silicon materials and gallium nitride materials, which is relatively large. High lattice mismatch will cause higher defect density in the device. Heteroepitaxial gallium nitride materials on silicon substrates face the technical challenges of large lattice mismatch and high stress between silicon and gallium nitride; The thermal expansion coefficient of gallium is 6.2×10 ^-6 /K, and that of silicon is 2.6×10 ^-6 /K. There is still a thermal expansion coefficient mismatch between the two. The large difference in thermal expansion coefficient makes GaN thin film materials on silicon substrates very easy to Cracks, high defect density, high interface electronic localized state, large warpage/curvature, and (Al)GaN epitaxial film quality is low, material uniformity is poor, and leakage channels formed by defects cause device performance failure and affect device breakdown characteristics, and will produce fine cracks due to the large lattice mismatch stress during the epitaxial growth process. For this reason, it is necessary to design a GaN HEMT epitaxial structure based on a silicon substrate.

It should be noted that the information disclosed in the above Background section is only for enhancement of understanding of the background of the disclosure and therefore it may contain information that does not constitute prior art.

Contents of the invention

The inventors have found through research that the heterogeneous epitaxial gallium nitride material on a silicon substrate is affected by the large lattice mismatch, high stress, and large difference in thermal expansion coefficient between the silicon substrate and the gallium nitride material, which will cause the silicon substrate The GaN thin film material on the surface is very easy to crack, high defect density, high interface electronic localized state, large warping/bending, and then the technical problems of (Al)GaN epitaxial thin film quality is low and material uniformity is poor.

In view of at least one of the above technical problems, this disclosure provides a GaN HEMT epitaxial structure based on a silicon substrate, the specific technical solution is as follows:

A GaN HEMT epitaxial structure based on a silicon substrate, including a silicon substrate, a buffer layer, an AlGaN stress control layer and an N-type semiconductor layer are epitaxially grown on the surface of the silicon substrate in sequence, wherein the buffer layer is a CdS buffer layer, and the N-type The semiconductor layer includes a low-quality GaN layer epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer epitaxially grown on the upper surface of the low-quality GaN layer, and a channel layer and an AlGaN barrier are epitaxially grown on the surface of the N-type semiconductor layer in sequence layer, the present invention uses CdS as a buffer material to form a buffer layer between the Si substrate and the GaN material to reduce the lattice mismatch and thermal mismatch between Si and GaN, reducing the subsequent epitaxial growth of the N-type semiconductor layer defects, improve the crystal quality and the quality of high electron mobility transistors, thereby reducing the current collapse effect of the device and improving the dynamic effect of the device.

In some embodiments of the present disclosure, the buffer layer is a ZnS/CdS/ZnO multilayer structure buffer layer.

In some embodiments of the present disclosure, the thickness of the silicon substrate is 300-1500 mm.

In some embodiments of the present disclosure, the thickness of the CdS buffer layer is 5-500 nm.

In some embodiments of the present disclosure, the AlGaN stress control layer has a thickness of 0.1-3 μm.

In some embodiments of the present disclosure, the composition of Al in the AlGaN stress control layer is greater than or equal to 5% and less than 100%.

In some embodiments of the present disclosure, the low-quality GaN layer is a doped or undoped GaN layer.

In some embodiments of the present disclosure, the high-quality GaN layer is an undoped GaN layer.

In some embodiments of the present disclosure, the high-quality GaN layer is a doped GaN layer, and the doping concentration in the doped GaN layer is lower than that of the low-quality GaN layer and lower than 10E19/cm ³ .

Compared with the prior art, the present invention has the following beneficial effects:

The present invention forms a buffer layer between the Si substrate and the GaN material by using the CdS material to reduce the lattice mismatch and thermal mismatch between Si and GaN, reduce the defects in the N-type semiconductor layer after epitaxial growth, and improve the Crystal quality and quality of high electron mobility transistors. Furthermore, the current collapse effect of the device is reduced, and the dynamic effect of the device is improved.

Description of drawings

Fig. 1 is the structural representation of embodiment 1 in the structure of the present invention;

Fig. 2 is a structural schematic diagram of Embodiment 3 in the structure of the present invention.

Explanation of symbols in the figure: 1. Silicon substrate; 2. Buffer layer; 3. AlGaN stress control layer; 41. Low-quality GaN layer; 42. High-quality GaN layer; 5. Channel layer; 6. AlGaN barrier layer.

Detailed ways:

In order to better understand the purpose, structure and function of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are the Some, but not all, embodiments are invented.

The serial numbers assigned to the components in this article are only used to distinguish the objects described, and do not have any sequence or technical meaning. The "connection" mentioned in the present disclosure includes direct and indirect "connection" unless otherwise specified. In the description of this application, it should be understood that the orientation or positional relationship indicated by the orientation terms "upper", "lower", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the application and the brief description , rather than indicating or implying that the device or unit referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore should not be construed as limiting the application.

As shown in Figures 1 to 2 of the accompanying drawings, a GaN HEMT epitaxial structure based on a silicon substrate is designed, including a silicon substrate 1, a buffer layer 2 is epitaxially grown on the surface of the silicon substrate 1, and AlGaN stress control layer 3 and an N-type semiconductor layer, wherein the buffer layer 2 is a CdS buffer layer, and the N-type semiconductor layer includes a low-quality GaN layer 41 epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer epitaxially grown on the upper surface of the low-quality GaN layer. High quality GaN layer 42, channel layer 5 and AlGaN barrier layer 6 are epitaxially grown in sequence on the surface of the N-type semiconductor layer. The present invention uses CdS material to form a buffer layer between the Si substrate and the GaN material to reduce Si and GaN The lattice mismatch and thermal mismatch between them reduce the defects in the N-type semiconductor layer after epitaxial growth, and improve the crystal quality and the quality of high electron mobility transistors. Furthermore, the current collapse effect of the device is reduced, and the dynamic effect of the device is improved.

The working principle of the present disclosure is: to grow high-quality GaN material on a silicon substrate, an intermediate material can be used as a buffer layer. The material used as a buffer layer needs to meet three conditions: first, Si is a simple semiconductor material, and GaN is a compound semiconductor material, so the buffer layer material needs to complete the transition from a simple material to a compound material; second, the material is a crystal, and The lattice type is consistent with GaN. Third, the lattice constant is between Si and GaN. First of all, CdS is a compound semiconductor material, which can make a good transition from a simple material substrate of Si to a compound material such as GaN; secondly, both CdS and GaN are crystalline materials, and the crystal structure belongs to the zinc blende structure; third, ZnS crystal The lattice constant is 0.382nm, and the lattice constant of CdS is 0.4160nm, both of which are between Si (lattice constant: 0.543095nm) and GaN (lattice constant: 0.3189nm), and can be used to transition between Si and GaN The lattice mismatch; fourth, the thermal expansion coefficient of CdS is 6.6×10 ^-6 /K, the thermal expansion coefficient of ZnS is 4.74×10 ^-6 /K～6.2×10 ^-6 /K, and their thermal expansion coefficients are between Si and GaN material. Therefore, CdS can be used as the first buffer layer material between the Si substrate and the GaN material.

In the above implementation manner, enumerate 3 kinds of embodiments to realize above-mentioned technical scheme:

Example 1

As shown in Figure 1, this embodiment discloses a GaN HEMT epitaxial structure based on a silicon substrate, including a silicon substrate 1, the thickness of the silicon substrate 1 is 300 mm, and a buffer layer is epitaxially grown on the surface of the silicon substrate 1 in sequence 2. The AlGaN stress control layer 3 and the N-type semiconductor layer, wherein the buffer layer 2 is a CdS buffer layer, the thickness of the CdS buffer layer is 5 nm, and the thickness of the AlGaN stress control layer 3 is 0.1 μm. In the AlGaN stress control layer 3 The composition of Al is 5%; the N-type semiconductor layer includes a low-quality GaN layer 41 epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer 42 epitaxially grown on the upper surface of the low-quality GaN layer; the surface of the N-type semiconductor layer A channel layer 5 and an AlGaN barrier layer 6 are epitaxially grown on the substrate in sequence. The present invention forms a buffer layer between the Si substrate and the GaN material by using CdS material to reduce the lattice mismatch and thermal mismatch between Si and GaN. Matching, reducing the defects in the N-type semiconductor layer grown by epitaxial growth, improving the crystal quality and the quality of the high electron mobility transistor. Furthermore, the current collapse effect of the device is reduced, and the dynamic effect of the device is improved.

Example 2

This embodiment discloses a GaN HEMT epitaxial structure based on a silicon substrate, including a silicon substrate 1, the thickness of the silicon substrate 1 is 1300 mm, and a buffer layer 2 and an AlGaN stress control layer are epitaxially grown on the surface of the silicon substrate 1 in sequence. 3 and an N-type semiconductor layer, wherein the buffer layer 2 is a CdS buffer layer, the thickness of the CdS buffer layer is 500nm, the thickness of the AlGaN stress control layer 3 is 3 μm, and the composition of Al in the AlGaN stress control layer 3 is 60% The N-type semiconductor layer includes a low-quality GaN layer 41 epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer 42 epitaxially grown on the upper surface of the low-quality GaN layer, and the low-quality GaN layer 41 is a doped GaN layer , the high-quality GaN layer 42 is a non-doped GaN layer; the N-type semiconductor layer surface is sequentially epitaxially grown with a channel layer 5 and an AlGaN barrier layer 6. The present invention uses CdS material to form a Si substrate and an AlGaN barrier layer 6. A buffer layer is formed between the GaN materials to reduce the lattice mismatch and thermal mismatch between Si and GaN, reduce the defects in the N-type semiconductor layer after epitaxial growth, and improve the crystal quality and the quality of high electron mobility transistors. Furthermore, the current collapse effect of the device is reduced, and the dynamic effect of the device is improved.

Example 3

As shown in Fig. 2, this embodiment discloses the design of a GaN HEMT epitaxial structure based on a silicon substrate, including a silicon substrate 1, the thickness of the silicon substrate 1 is 1500 mm, and epitaxially grown on the surface of the silicon substrate 1. The buffer layer 2, the AlGaN stress control layer 3 and the N-type semiconductor layer, wherein the buffer layer 2 is a ZnS/CdS/ZnO multilayer buffer layer, that is, the structure is Si/CdS/ZnS/ZnO/GaN. The lattice constants are respectively: Si (lattice constant: 0.543095 nm)/CdS (lattice constant: 0.4160 nm)/ZnS (lattice constant: 0.382 nm)/ZnO (lattice constant: 0.3249 nm)/GaN (crystal Lattice constant: 0.3189 nanometers), this structure makes the lattice constant gradually change from the largest Si substrate to the smallest GaN, the stress is gradually released, the crystal quality of epitaxial GaN is improved, and the defect density is reduced, so the performance of the device in all aspects improved; the thickness of the AlGaN stress control layer 3 is 2.7 μm, and the composition of Al in the AlGaN stress control layer 3 is 99%; the N-type semiconductor layer includes a low-quality GaN layer 41 epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer 42 epitaxially grown on the upper surface of the low-quality GaN layer, the low-quality GaN layer 41 is a doped GaN layer, the high-quality GaN layer 42 is a doped GaN layer, and the low-quality GaN layer 41 is a doped GaN layer, the high-quality GaN layer 42 is a doped GaN layer, and the doping concentration in the doped GaN layer is lower than that of the low-quality GaN layer 41 and lower than 10E19/cm ³ ; The channel layer 5 and the AlGaN barrier layer 6 are epitaxially grown, and the present invention uses CdS material to form a buffer layer between the Si substrate and the GaN material to reduce the lattice mismatch and thermal mismatch between Si and GaN, The defects in the N-type semiconductor layer grown by epitaxial growth are reduced, and the crystal quality and the quality of high electron mobility transistors are improved. Furthermore, the current collapse effect of the device is reduced, and the dynamic effect of the device is improved.

It can be understood that the present invention is described through some embodiments, and those skilled in the art know that various changes or equivalent substitutions can be made to these features and embodiments without departing from the spirit and scope of the present invention. In addition, the features and examples may be modified to adapt a particular situation and material to the teachings of the invention without departing from the spirit and scope of the invention. Therefore, the present invention is not limited by the specific embodiments disclosed here, and all embodiments falling within the scope of the claims of the present application belong to the protection scope of the present invention.

Claims (9)

1. The GaN HEMT epitaxial structure based on the silicon substrate is characterized by comprising a silicon substrate (1), wherein a buffer layer (2), an AlGaN stress control layer (3) and an N-type semiconductor layer are sequentially epitaxially grown on the surface of the silicon substrate (1), the buffer layer (2) is a CdS buffer layer, the N-type semiconductor layer comprises a low-quality GaN layer (41) epitaxially grown on the upper surface of the AlGaN stress control layer and a high-quality GaN layer (42) epitaxially grown on the upper surface of the low-quality GaN layer, and a channel layer (5) and an AlGaN barrier layer (6) are sequentially epitaxially grown on the surface of the N-type semiconductor layer.

2. The GaN HEMT epitaxial structure of claim 1, wherein said buffer layer (2) is a ZnS/CdS/ZnO multilayer buffer layer.

3. The GaN HEMT epitaxial structure of claim 1 or 2, wherein said silicon substrate (1) has a thickness of 300 to 1500mm.

4. The silicon substrate-based GaN HEMT epitaxial structure according to claim 1, wherein the CdS buffer layer has a thickness of 5-500 nm.

5. The GaN HEMT epitaxial structure of claim 1 or 2, wherein said AlGaN stress control layer (3) has a thickness of 0.1 to 3 μm.

6. The GaN HEMT epitaxial structure of claim 1 or 2, wherein the composition of Al in said AlGaN stress control layer (3) is 5% or more and less than 100%.

7. The GaN HEMT epitaxial structure of claim 1 or 2, wherein said low quality GaN layer (41) is a doped or undoped GaN layer.

8. The GaN HEMT epitaxial structure of claim 1 or 2, wherein said high quality GaN layer (42) is an undoped GaN layer.

9. The GaN HEMT epitaxial structure of the silicon substrate based, according to claim 1 or 2, characterized in that the high quality GaN layer (42) is a doped GaN layer, the doping concentration in the doped GaN layer being lower than the low quality GaN layer (41) and lower than 10E19/cm ³ 。

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