CN115632670A - CMOS current multiplexing type self-oscillation receiver front end - Google Patents

CMOS current multiplexing type self-oscillation receiver front end Download PDF

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Publication number
CN115632670A
CN115632670A CN202211227474.0A CN202211227474A CN115632670A CN 115632670 A CN115632670 A CN 115632670A CN 202211227474 A CN202211227474 A CN 202211227474A CN 115632670 A CN115632670 A CN 115632670A
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capacitor
resistor
terminal
mixer
inductor
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郭本青
樊润伍
廖星月
王海时
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Chengdu University of Information Technology
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Chengdu University of Information Technology
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1228—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device the amplifier comprising one or more field effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/16—Multiple-frequency-changing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H03F3/45183—Long tailed pairs
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/372—Noise reduction and elimination in amplifier

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)

Abstract

The invention discloses a CMOS current multiplexing type self-oscillation receiver front end, which comprises a low-noise transconductance amplifying circuit, a mixer and an orthogonal voltage-controlled oscillator; the input ends of the low-noise transconductance amplifying circuit Gm are Vin + and Vin-; the mixer comprises a first mixer and a second mixer; the output end V1 of the low-noise transconductance amplifying circuit Gm, the input end Vm1 of the first mixer, the input end Vm3 of the second mixer and the input end V of the quadrature voltage-controlled oscillator QVCO Q1 The output end V2 of the low-noise transconductance amplifying circuit Gm, the input end Vm2 of the first mixer, the input end Vm4 of the second mixer and the input end V of the quadrature voltage-controlled oscillator QVCO are connected Q2 And (4) connecting. The transconductor of the inventionThe flow is reused by the mixer and the oscillator, and the power consumption is obviously reduced.

Description

CMOS current multiplexing type self-oscillation receiver front end
Technical Field
The invention relates to the technical field of radio frequency integrated circuits, in particular to a CMOS current multiplexing type self-oscillation receiver front end.
Background
With the development of semiconductor integrated circuits and the explosion of wireless communication, the front-end circuits of receivers are continuously facing to technical innovation and performance improvement, wherein the requirement of low power consumption is more and more prominent, and meanwhile, it is noted that the generation of orthogonal signals is very commonly applied to the direct-conversion receiver structure. Recall that common methods of generating quadrature signals include the use of analog polyphase filter structures, or digital quadrature logic gate divider structures, or direct quadrature coupled VCO structures; for the current millimeter wave broadband communication application field, the former two structures are limited by the technical bottleneck and are not sufficient, and as a result, the quadrature coupled oscillator becomes a few effective solutions. Its superior power and area efficiency is an attractive technical advantage; however, the conventional quadrature coupled oscillator has the disadvantages of phase noise and poor quadrature precision performance.
Conventionally, the lna, mixer, and oscillator are usually of modular design, which means that, to a large extent, they are designed as separate modules and finally wired. Over the years, there have been continuing innovative designs that are attempting to highly integrate these modules for the purpose of reducing the power consumption of the receiver. A typical representative is shown in fig. 1, in prior document 1, the innovative structure includes an oscillator, and a mixer, wherein the oscillator is stacked on the output load of the mixer, and shares a dc path; this circuit is called a self-oscillating mixer. However, the phase noise of the oscillator and the noise figure of the mixer have a compromise problem, the low phase noise requires the oscillator to have enough bias current, however, the switch contributes noise to the noise inevitably, the noise figure of the mixer is deteriorated, in addition, the structure has no quadrature performance, and the structure cannot be applied to the mainstream direct conversion receiver scheme, and therefore, a CMOS current multiplexing type self-oscillation receiver front end with higher practicability is provided.
Disclosure of Invention
The invention aims to provide a CMOS current multiplexing type self-oscillation receiver front end, which solves the existing problems.
In order to achieve the purpose, the invention provides the following technical scheme: the CMOS current multiplexing type self-oscillation receiver front end comprises a low-noise transconductance amplifying circuit, a mixer and an orthogonal voltage-controlled oscillator;
the input ends of the low-noise transconductance amplifying circuit Gm are Vin + and Vin-;
the mixer comprises a first mixer and a second mixer;
the output end V1 of the low-noise transconductance amplifying circuit Gm, the input end Vm1 of the first mixer, the input end Vm3 of the second mixer and the input end V of the quadrature voltage-controlled oscillator QVCO Q1 The output end V2 of the low-noise transconductance amplifying circuit Gm, the input end Vm2 of the first mixer, the input end Vm4 of the second mixer and the input end V of the quadrature voltage-controlled oscillator QVCO are connected Q2 And (4) connecting.
Preferably, the low-noise transconductance amplifying circuit comprises an NMOS transistor Mn1, an NMOS transistor Mn2, a PMOS transistor Mp1, a PMOS transistor Mp2, a PMOS transistor Mp3, a PMOS transistor Mp4, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a capacitor C16, a capacitor C17, a capacitor Cntr1, a capacitor Cntr2, an inductor L5, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, and a resistor R14.
Preferably, one end of the capacitor C1, one end of the capacitor C2 and one end of the capacitor C16 are connected as an input terminal Vin + of the low noise transconductance amplifying circuit, the other end of the capacitor C2 is connected with the grid end of the NMOS tube Mn1, one end of the capacitor Cntr1 and one end of the resistor R10, the source end of the NMOS tube Mn1 is grounded, the drain end of the NMOS tube Mn1 and the drain end of the PMOS tube Mp3 are connected, the drain end of the PMOS tube Mp1 and one end of the capacitor Cntr2 are connected as the output end V1 of the low-noise transconductance amplifying circuit, the grid end of the PMOS tube Mp3 is connected with the other end of the capacitor C1 and one end of the resistor R9, the drain end of the PMOS tube Mp3 is connected with a power supply voltage VDD, the gate end of the PMOS tube Mp1 is connected with one end of a capacitor C6 and one end of a resistor R11, the source end of the PMOS tube Mp1 is connected with one end of the capacitor C5, one end of the capacitor C17 and the a end of the inductor L5, the end C of the inductor L5 is connected with a power supply voltage VDD, the end b of the inductor L5 is connected with the other end of the capacitor C16 and the other end of the capacitor C6 is connected with the source end of the PMOS tube Mp2, the grid end of the PMOS tube Mp2 is connected with the other end of the capacitor C5 and one end of the resistor R12, the other end of the resistor R12 is connected with the other end of the resistor R11, the drain end of the PMOS tube Mp2 is connected with the other end of the capacitor Cntr1, the drain end of the PMOS tube Mp4 is connected with the drain end of the NMOS tube Mn2 to serve as the output end V2 of the low-noise transconductance amplifying circuit, the source end of the PMOS tube Mp4 is connected with a power supply voltage VDD, the gate end of the PMOS tube Mp4 is connected with one end of a capacitor C4 and one end of a resistor R13, the other end of the capacitor C4 is connected with the other end of the capacitor C17 and one end of the capacitor C3 to be used as an input end Vin-of the low-noise transconductance amplifying circuit, the other end of the capacitor C3 is connected with the grid end of the NMOS tube Mn2 and the other end of the capacitor Cntr2 is connected with one end of the resistor R14, and the source end of the NMOS tube Mn2 is grounded.
Preferably, the output terminals of the first mixer are IFq + and IFq-, respectively, and the input terminal LO0 of the first mixer is connected to the output terminal V of the quadrature voltage controlled oscillator QVCO through a capacitor C11 QO2 The input end LO2 of the first mixer is connected with the output end V of the quadrature voltage-controlled oscillator QVCO through a capacitor C10 QO1 The output ends of the second frequency mixer are respectively IFi + and IFi-, and the input end LO3 of the second frequency mixer is connected with the output end V of the quadrature voltage controlled oscillator QVCO through a capacitor C9 QO3 The input end LO1 of the second mixer is connected with the output end V of the quadrature voltage-controlled oscillator QVCO through a capacitor C8 QO4 And (4) connecting.
Preferably, the first mixer and the second mixer have the same structure, and include a PMOS transistor M1, a PMOS transistor M2, an NMOS transistor M3, an NMOS transistor M4, an NMOS transistor M5, an NMOS transistor M6, and a capacitor C L1 Resistance R L1 And a resistor R L2 A resistor R7 and a resistor R8, and a comparator Opamp.
Preferably, the gate terminal of the NMOS transistor M4, the gate terminal of the NMOS transistor M5, and one end of the resistor R7 are connected as the input terminal V of the mixer LO+ The source end of the NMOS tube M4 is connected with the source end of the NMOS tube M3 to be Vmix +, the drain end of the NMOS tube M4, the drain end of the PMOS tube M1 and the resistor R L1 One terminal of and a capacitor C L1 Is connected with the drain terminal of the NMOS tube M6 as the output terminal IF + of the mixer, the source terminal of the PMOS tube M1 is connected with the supply voltage VDD, the gate terminal of the PMOS tube M1 is connected with the output terminal IF + of the mixerThe output end of the comparator Opamp is connected with the gate end of the PMOS tube M2, the positive end of the comparator Opamp is connected with the reference voltage vref, and the negative end of the comparator Opamp is connected with the resistor R L1 Another terminal of (1) and a resistor R L2 Is connected to one end of the resistor R L2 The other end of the PMOS tube M2 is connected with the drain end of the PMOS tube M2 and the capacitor C L1 The other end of the NMOS tube M3 is connected with the drain end of the NMOS tube M3 to be used as the output end IF-of the frequency mixer, the source end of the PMOS tube M2 is connected with the power supply voltage VDD, the grid end of the NMOS tube M3 is connected with one end of the grid end resistor R8 of the NMOS tube M6 to be used as the input end V of the frequency mixer LO- The other end of the resistor R8 is connected with the other end of the resistor R7, and the source end of the NMOS tube M6 is connected with the source end of the NMOS tube M5 to be Vmix-.
Preferably, the quadrature voltage-controlled oscillator includes an inductor L1, an inductor L2, an inductor L3, an inductor L4, an NMOS transistor Mn3, an NMOS transistor Mn4, a PMOS transistor Mp5, a PMOS transistor Mp6, an NMOS transistor Mn5, an NMOS transistor Mn6, a PMOS transistor M7, an NMOS transistor M8, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a capacitor C7, a capacitor C12, a capacitor C13, a capacitor Cp1, a capacitor Cp2, a capacitor C14, a capacitor C15, a variable capacitor Cvar1, a variable capacitor Cvar2, a variable capacitor Cvar3, and a variable capacitor Cvar4.
Preferably, a of the inductor L4 is connected to the input terminal V Q1 The b end of the inductor L4 is connected with the input end V Q2 A C terminal of the inductor L4 is connected to a drain terminal of the PMOS transistor M7, a source terminal of the NMOS transistor M8 and a drain terminal of the NMOS transistor M8, a gate terminal of the NMOS transistor M8 is connected to the power supply voltage VDD, a gate terminal of the PMOS transistor M7 is connected to the bias voltage Vbp2, a source terminal of the PMOS transistor M7 is connected to one end of the capacitor C7 and a C terminal of the inductor L3, the other end of the capacitor C7 is grounded, an a terminal of the inductor L3 is connected to the source terminals of the NMOS transistor Mn3 and the NMOS transistor Mn4, a drain terminal of the PMOS transistor Mp5 and one end of the capacitor Cp1, a gate terminal of the NMOS transistor Mn3 is connected to one ends of the resistor R1 and the capacitor C13, a drain terminal of the NMOS transistor Mn3 and one end of the capacitor C12 and one end of the inductor Cvar1 are connected to an a terminal of the inductor L1 as an output terminal Vosc + of the orthogonal voltage-controlled oscillator, a C terminal of the inductor L1 is connected to the power supply voltage control oscillator, a b terminal of the inductor L1 and the other end of the NMOS transistor Mn4 are connected to one end of the drain terminal of the capacitor cv 13 and one end of the capacitor cv 2 as an orthogonal voltage-controlled oscillator V2The other end of the variable capacitor Cvar2 is connected with the other end of the variable capacitor Cvar1, the gate end of the NMOS tube Mn4 is connected with the other end of the capacitor C12 and one end of the resistor R2, the other end of the resistor R2 is connected with the other end of the resistor R1, the b end of the inductor L3 is connected with the source end of the NMOS tube Mn6, the source end of the NMOS tube Mn5, the drain end of the PMOS tube Mp6 and one end of the capacitor Cp2, the gate end of the NMOS tube Mn6 is connected with one end of the resistor R6 and one end of the capacitor C14, the drain end of the NMOS tube Mn6, one end of the capacitor C15, one end of the variable capacitor Cvar4 and the b end of the inductor L2 are connected to serve as the output end Voscq-of the orthogonal voltage-controlled oscillator, and the C end of the inductor L2 is connected with the power supply voltage VDD, the a end of the inductor L1 is connected with the drain end of an NMOS tube Mn5, the other end of a capacitor C14 and one end of a variable capacitor Cvar3 to serve as an output end Voscq + of the orthogonal voltage-controlled oscillator, the other end of the variable capacitor Cvar3 is connected with the other end of a variable capacitor Cvar4, the gate end of the NMOS tube Mn5 is connected with the other end of a capacitor C15 and one end of a resistor R5, the other end of the resistor R5 is connected with the other end of a resistor R6, the gate end of a PMOS tube Mp6 is connected with one end of the resistor R4 and the other end of a capacitor Cp1, the source end of the PMOS tube Mp6 is connected with the source end of the PMOS tube Mp5 and the power supply voltage VDD, the gate end of the PMOS tube Mp5 is connected with one end of the resistor R3 and the other end of the capacitor Cp2, and the other end of the resistor R3 is connected with the other end of the resistor R4.
Compared with the prior art, the invention has the following beneficial effects:
1. the current of the transconductor is reused by the mixer and the oscillator, so that the power consumption is obviously reduced.
2. The auxiliary positive feedback cross coupling structure improves the differential mode loop gain of the tail node transformer, so that the output signal phase quadrature precision of the quadrature oscillator is more accurate, and the phase noise is lower.
Drawings
Fig. 1 is a circuit configuration diagram of a conventional self-oscillating mixer;
FIG. 2 is a front end architecture diagram of the present invention;
FIG. 3 is a schematic diagram of an embodiment of the present invention;
FIG. 4 is a schematic diagram of a low noise transconductance amplifier circuit of the present invention;
FIG. 5 is a schematic diagram of a mixer of the present invention;
fig. 6 is a schematic diagram of a quadrature voltage controlled oscillator of the present invention;
FIG. 7 is a schematic diagram of the input matching feature S11 of the present invention;
FIG. 8 is a schematic diagram of gain bandwidth of the present invention
FIG. 9 is a graph illustrating the noise figure of the present invention;
FIG. 10 is a schematic of the in-band linearity of the present invention;
FIG. 11 is a schematic diagram of the oscillation frequency of the quadrature oscillator of the present invention;
FIG. 12 is a phase noise diagram of the present invention;
FIG. 13 is a schematic diagram of the quadrature oscillator quadrature phase error of the present invention;
fig. 14 is a schematic diagram of the differential phase error of the quadrature oscillator of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments.
Detailed description of the preferred embodiment
As shown in fig. 1 and fig. 2, the CMOS current multiplexing self-oscillating receiver front-end includes a low noise transconductance amplifier circuit and a mixer, and a quadrature voltage-controlled oscillator;
the input ends of the low-noise transconductance amplifying circuit Gm are Vin + and Vin-;
the mixer comprises a first mixer and a second mixer;
the output end V1 of the low-noise transconductance amplifying circuit Gm, the input end Vm1 of the first mixer, the input end Vm3 of the second mixer and the input end V of the quadrature voltage-controlled oscillator QVCO Q1 The output end V2 of the low-noise transconductance amplifying circuit Gm, the input end Vm2 of the first mixer, the input end Vm4 of the second mixer and the input end V of the quadrature voltage-controlled oscillator QVCO are connected Q2 Connecting;
the input radio frequency signal is input from a port Vin + and a port Vin-double end, converted into current through a low-noise transconductance amplifying circuit, and mixed by a mixer to obtain useful intermediate frequency signal outputs IFi +/-and IFq +/-, particularly, the local oscillation source of the mixer is provided by a self-oscillation voltage-controlled oscillator, and the direct current of the oscillator and the mixer is reused by a transconductor, thereby achieving the effect of reducing power consumption; in addition, based on the super-harmonic coupling structure, an auxiliary cross-coupling structure is adopted, and the oscillator can provide local oscillation signals with high phase precision.
Referring to fig. 3, the overall structure of the present invention is clearly shown, and the front end of the CMOS current multiplexing type self-oscillating receiver is composed of a low noise transconductance amplifier circuit, a mixer, and a quadrature voltage controlled oscillator; the bias current of the low-noise transconductor is multiplexed by the mixer and the oscillator, and the low-power consumption effect is obtained.
In the case of a low noise transconductor, the structure diagram is shown in fig. 4, which comprises a capacitively cross-coupled common-gate input structure (Mp 1/Mp 2) for providing input impedance matching; the input stage comprises a complementary common source input stage (Mn 1/Mp3 and Mn2/Mp 4); on one hand, the complementary common source stage improves the input transconductance of the circuit, and can partially eliminate the noise of the common gate input electrode, and the noise output of the common gate transistor is halved by the capacitor cross coupling (C5 and C6); therefore, the structure ensures the low noise effect of the circuit to a great extent; in addition, cross-coupled neutralization capacitances (Cntr 1, cntr 2) are used to reduce the adverse effect of the miller effect on input matching.
The mixer circuit is given in fig. 5, based on a classical gilbert fully differential architecture, where an active feedback architecture is used at its mid-frequency load; the active feedback structure samples the common mode level of the load resistor, and controls the bias of the transistor grid electrode through the feedback of the comparator, thereby ensuring that the bias of the direct current level of the load is proper and obtaining good linearity; meanwhile, the bias current of the oscillator shunts the bias current of the transconductor through the transistor M7, so that the mixer obtains reduced bias current and reduced noise output, and the technical effect of current injection is indirectly obtained; further, the inductor L4 is used for resonance absorption of a tail node parasitic capacitance of the switching tube of the mixer, so that the noise charge-discharge effect of the switching tube is avoided, and the low-noise effect of the whole circuit is facilitated.
The quadrature oscillator circuit is shown in fig. 6, and comprises two main LC oscillators and an auxiliary positive feedback cross-coupling structure (Mp 5/Mp 6); specifically, the two LC oscillators use the coupling structure of the transformer (L3) at the tail node; therefore, the transformer can form orthogonal oscillation at the f0 frequency of the LC oscillator by ensuring the reverse coupling resonance (the self-inductance of the transformer and the parasitic capacitance at the node) of the transformer at the 2f0 frequency, but the amplitude of the 2f0 frequency signal is very weak, and the coupling coefficient of the transformer is often smaller than 1, so that the orthogonal oscillation at the f0 frequency of the LC oscillator is possibly damaged and becomes undesirable homodromous oscillation by considering the mismatch generated by the layout and the strong common-mode interference on the transformer caused by the radio-frequency signals leaked by the transconductor and the mixer through the M7 path.
In order to solve the problem, on one hand, a positive feedback loop can be designed at the transformer to properly increase the differential mode loop gain of a tail node, so that the output signal orthogonality of the LC oscillator is improved; certainly, the gain of the differential mode loop cannot be too large, so that a positive feedback cross coupling structure and a transformer form a further oscillator under the frequency of 2f0 to influence the on and off of the transistor of the main LC oscillator; specifically, the control tuning of the differential mode loop gain can be realized by adjusting the control bias voltage Vadj; on the other hand, the filter capacitor is added through an M7 path to overcome the leakage of the radio frequency signal of the transconductor mixer; under the condition of layout mismatch of the radio frequency input differential pair, a radio frequency port signal interferes with differential mode work of the oscillator tail node transformer in a common mode; of course, the 2f0 harmonic frequency signal at the mixer tail node directly constitutes the common mode interference of the oscillator tail node transformer. For the two mechanisms, two capacitors M8 and C7 can be added for filtering; here, the transistor M8 functions as an effect of a filter capacitor, although the transistor capacitor has the disadvantages of noise and branching, the transistor M8 is located in a common mode path and does not affect the output of the mixer, and the C7 capacitor can absorb the noise of the transistor M8 and the interference of nonlinearity on the oscillator.
In document 2, in the case of a strong signal at the rf port, the signal can be coupled to an output node of the intermediate frequency load through a parasitic capacitor of a transistor of the mixer, so that an injection locking phenomenon may occur in an oscillator at the output node, and the mixer cannot operate at a desired intermediate frequency; in contrast, in the structure of the invention, a stronger signal of the radio frequency port can be filtered by the two capacitors M8 and C7, and the M7 transistor can also play a certain reverse isolation effect, so that the injection locking phenomenon is less likely to occur.
Detailed description of the preferred embodiment
The front-end circuit of the current multiplexing self-oscillation direct-conversion receiver provided by the embodiment is realized by adopting a 65nm standard CMOS process design.
In the circuit, only an intermediate frequency load transistor (M1/M2) of a mixer adopts a 250nm long channel structure to reduce flicker noise, and other transistors all use 60nm length to obtain good radio frequency performance; the power supply voltage is 1.2V, the consumption current of the differential transconductor is 4.6mA × 2, the overall power consumption is 12mW, the bias current of a single transistor of the mixer is 128uA, the current of M7 in the I/O path is 3.3mA, the coupling consumption current of the auxiliary cross unit is 0.3mA, the common-gate input stage bias current is 0.6mA, the capacitor C7 takes 15pF, and the equivalent capacitance of the transistor M8 is 200pF; based on the above optimized bias current, circuit simulation performance was obtained, and the results are as follows.
FIG. 7 shows the simulation result of the input matching characteristic S11 of the circuit, and it can be seen that S is within the frequency band of 7.7-9.8GHz 11 Are all less than-10 dB;
FIG. 8 shows the simulation results for the gain bandwidth of the circuit, with a 3dB bandwidth of about 50MHz and a gain of up to 34.8dB at low frequencies;
fig. 9 shows the simulation results of the noise figure NF of the circuit, and it can be seen that the noise figure is below 3dB in all of 1MHz to 100 MHz. And the corner of flicker noise is near 400 KHz;
FIG. 10 shows the simulation results for the third order intermodulation input IP3 of the circuit, at-19.5 dBm;
fig. 11 shows the output waveform of the quadrature oscillator of the circuit, the frequency of the four-way signal is 8.5215GHz, and the tuning capacitance of the tuning oscillator can be adjusted to change the frequency within a certain range, and the illustration is not shown here;
fig. 12 shows the simulation results of the phase noise of the circuit, which falls from-80 dBc/Hz to-108 dBc/Hz in the frequency range of 0.1MHz to 1MHz, and which achieves a good level thanks to the cross-coupling structure assisted by the oscillator, and the CLASS C configuration (avoiding the degradation of the Q-value of the LC resonant network due to the main oscillator transistor entering the deep triode region);
fig. 13 shows a simulation result of the 270 ° phase error between the quadrature ports of the quadrature oscillator, which is known by the illustrated delay profile to be within about 2 ° in phase quadrature error and about 8ns in settling time. Simulations also show that without using an auxiliary cross-coupling structure, the obtained quadrature error is around 5 °, and a separate diagram is not given here, and a lower quadrature error means that the receiver can obtain a better demodulation signal-to-noise ratio at baseband;
fig. 14 shows the results of a simulation of the 180 ° phase error of the quadrature oscillator differential port of the circuit, the delay curve showing good differential performance of a single oscillator and settling time within 1 ns.
Table 1 shows a comprehensive comparison of the performance of the present invention and the previous documents, and it can be seen that the upper power consumption is the same, but the structure of the present invention provides an IQ dual-channel receiving manner, and compared with the comparison documents, the same dual-channel receiving is realized, and half of the power is saved, so that the present invention is very competitive; the invention also achieves an overwhelming technical advantage in terms of key electrical indicators such as gain, noise/phase noise, even if the linearity is high, the invention also has a significant advantage if the output IP3 (OIP 3) is used for measurement; the reference needs 6 inductors, and occupies a large area; the invention needs 5 inductors/transformers, reduces the area and the cost of a chip, and based on the comparison and the discussion, the invention provides a current multiplexing type orthogonal receiver front end on the whole; the currents of the oscillator and the mixer are reused by the transconductor, and the highly integrated circuit structure obviously reduces the power consumption and even simplifies the bias circuit; the quadrature oscillator including the auxiliary cross-coupled structure provides more accurate phase accuracy and lower phase noise.
TABLE 1 comparison of the comprehensive Properties
Figure BDA0003880488420000101
Wherein references 1 and 2 are both [ Stanley s.k.ho; carlos E.Saavedra, "A Low-Noise Self-oscillation Mixer Using a Balanced VCO Load," IEEE Transactions on Circuits and Systems, vol.58, no.8, pp.1705-1712, feb.2011.

Claims (8)

  1. The CMOS current multiplexing type self-oscillation receiver front end is characterized by comprising a low-noise transconductance amplifying circuit, a mixer and an orthogonal voltage-controlled oscillator;
    the input ends of the low-noise transconductance amplifying circuit Gm are respectively Vin + and Vin-;
    the mixer comprises a first mixer and a second mixer;
    the output end V1 of the low-noise transconductance amplifying circuit Gm, the input end Vm1 of the first mixer, the input end Vm3 of the second mixer and the input end V of the quadrature voltage-controlled oscillator QVCO Q1 The output end V2 of the low-noise transconductance amplifying circuit Gm, the input end Vm2 of the first mixer, the input end Vm4 of the second mixer and the input end V of the quadrature voltage-controlled oscillator QVCO are connected Q2 And (4) connecting.
  2. 2. The CMOS current multiplexing self-oscillating receiver front end of claim 1, wherein the low noise transconductance amplifier circuit comprises an NMOS transistor Mn1, an NMOS transistor Mn2, a PMOS transistor Mp1, a PMOS transistor Mp2, a PMOS transistor Mp3, a PMOS transistor Mp4, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a capacitor C16, a capacitor C17, a capacitor Cntr1, a capacitor Cntr2, an inductor L5, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, and a resistor R14.
  3. 3. The front end of a CMOS current multiplexing-type self-oscillation receiver according to claim 1, wherein one end of the capacitor C1 is connected to one end of a capacitor C2 and one end of a capacitor C16 as an input terminal Vin + of a low noise transconductance amplifier circuit, the other end of the capacitor C2 is connected to a gate terminal of an NMOS transistor Mn1 and one end of a capacitor Cntr1 and one end of a resistor R10, a source terminal of the NMOS transistor Mn1 is grounded, a drain terminal of the NMOS transistor Mn1 is connected to a drain terminal of a PMOS transistor Mp3 and one end of a capacitor Cntr2 as an output terminal V1 of the low noise transconductance amplifier circuit, a gate terminal of the PMOS transistor Mp3 is connected to the other end of the capacitor C1 and one end of a resistor R9, a drain terminal of the PMOS transistor Mp3 is connected to a source voltage VDD, a gate terminal of the PMOS transistor Mp1 is connected to one end of a capacitor C6 and one end of a resistor R11, a gate terminal of the PMOS transistor Mp1 is connected to one end of a capacitor C5 and one end of a capacitor C17 and one end of a inductor L5, the end C of the inductor L5 is connected with a power supply voltage VDD, the end b of the inductor L5, the other end of the capacitor C16 and the other end of the capacitor C6 are connected with the source end of a PMOS tube Mp2, the gate end of the PMOS tube Mp2, the other end of the capacitor C5 and one end of a resistor R12 are connected, the other end of the resistor R12 is connected with the other end of a resistor R11, the drain end of the PMOS tube Mp2, the other end of the capacitor Cntr1 and the drain end of the PMOS tube Mp4 are connected with the drain end of an NMOS tube Mn2 to serve as an output end V2 of a low-noise transconductance amplifying circuit, the source end of the PMOS tube Mp4 is connected with the power supply voltage VDD, the gate end of the PMOS tube Mp4, one end of the capacitor C4 and one end of a resistor R13 are connected, the other end of the capacitor C4, the other end of the capacitor C17 and one end of the capacitor C3 are connected as an input end of a low-noise amplification transconductance circuit, and the other end of the capacitor C3, the gate end of the NMOS tube Mn2 and one end of the capacitor Cntr2 are connected with a resistor R14, and the source end of the NMOS tube Mn2 is grounded.
  4. 4. The CMOS current multiplexed self-oscillating receiver front-end of claim 1, wherein the outputs of the first mixer are IFq + and IFq-, respectively, and wherein the input LO0 of the first mixer is connected to the output V of the quadrature voltage controlled oscillator QVCO through a capacitor C11 QO2 The input end LO2 of the first mixer is connected with the input end LO2 of the first mixer through a capacitor C10Output terminal V of quadrature voltage controlled oscillator QVCO QO1 The output ends of the second frequency mixer are respectively IFi + and IFi-, and the input end LO3 of the second frequency mixer is connected with the output end V of the quadrature voltage controlled oscillator QVCO through a capacitor C9 QO3 The input end LO1 of the second mixer is connected with the output end V of the quadrature voltage-controlled oscillator QVCO through a capacitor C8 QO4 And (4) connecting.
  5. 5. The CMOS current multiplexing self-oscillating receiver front-end of claim 1, wherein the first mixer and the second mixer have the same structure and comprise a PMOS transistor M1, a PMOS transistor M2, an NMOS transistor M3, an NMOS transistor M4, an NMOS transistor M5, an NMOS transistor M6, and a capacitor C L1 And a resistor R L1 And a resistor R L2 A resistor R7 and a resistor R8, and a comparator Opamp.
  6. 6. The CMOS current multiplexing self-oscillating receiver front-end of claim 5, wherein the gate terminal of NMOS transistor M4 is connected to the gate terminal of NMOS transistor M5, and one terminal of resistor R7 is connected as input terminal V of mixer LO+ The source end of the NMOS tube M4 is connected with the source end of the NMOS tube M3 to be Vmix +, the drain end of the NMOS tube M4, the drain end of the PMOS tube M1 and the resistor R L1 One terminal of and a capacitor C L1 Is connected with the drain terminal of the NMOS transistor M6 as the output terminal IF + of the mixer, the source terminal of the PMOS transistor M1 is connected with the supply voltage VDD, the gate terminal of the PMOS transistor M1 is connected with the output terminal of the comparator Opamp and the gate terminal of the PMOS transistor M2, the positive terminal of the comparator Opamp is connected with the reference voltage vref, the negative terminal of the comparator Opamp is connected with the resistor R L1 Another terminal of (1) and a resistor R L2 Is connected to one end of the resistor R L2 The other end of the PMOS tube M2 is connected with the drain end of the PMOS tube M2 and the capacitor C L1 The other end of the NMOS tube M3 is connected with the drain end of the NMOS tube M3 to be used as the output end IF-of the frequency mixer, the source end of the PMOS tube M2 is connected with the power supply voltage VDD, the grid end of the NMOS tube M3 is connected with one end of the grid end resistor R8 of the NMOS tube M6 to be used as the input end V of the frequency mixer LO- The other end of the resistor R8 is connected with the other end of the resistor R7, and the source end of the NMOS tube M6 is connected with the source end of the NMOS tube M5 to be Vmix-.
  7. 7. The CMOS current multiplexing self-oscillating receiver front-end according to claim 1, wherein the quadrature voltage controlled oscillator includes an inductor L1, an inductor L2, an inductor L3, an inductor L4, an NMOS transistor Mn3, an NMOS transistor Mn4, a PMOS transistor Mp5, a PMOS transistor Mp6, an NMOS transistor Mn5, an NMOS transistor Mn6, a PMOS transistor M7, an NMOS transistor M8, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a capacitor C7, a capacitor C12, a capacitor C13, a capacitor Cp1, a capacitor Cp2, a capacitor C14, a capacitor C15, a variable capacitor Cvar1, a variable capacitor Cvar2, a variable capacitor Cvar3, and a variable capacitor Cvar4.
  8. 8. The CMOS current multiplexing self-oscillating receiver front-end of claim 7, wherein a of the inductor L4 is connected to the input V Q1 The b end of the inductor L4 is connected with the input end V Q2 A terminal C of the inductor L4 is connected to a drain terminal of a PMOS transistor M7, a source terminal of an NMOS transistor M8 and a drain terminal of the NMOS transistor M8, a gate terminal of the NMOS transistor M8 is connected to a power supply voltage VDD, a gate terminal of the PMOS transistor M7 is connected to a bias voltage Vbp2, a source terminal of the PMOS transistor M7 is connected to one terminal of a capacitor C7 and a terminal C of an inductor L3, the other terminal of the capacitor C7 is grounded, a terminal a of the inductor L3 is connected to a source terminal of an NMOS transistor Mn3, a source terminal of an NMOS transistor Mn4, a drain terminal of a PMOS transistor Mp5 and a terminal of a capacitor Cp1, a gate terminal of the NMOS transistor Mn3 is connected to one terminals of a resistor R1 and a capacitor C13, a drain terminal of the NMOS transistor Mn3, a terminal of a capacitor C12, a terminal of a capacitor Cvar1 and a terminal of the inductor L1 are connected as output terminals Vosc +, the C end of the inductor L1 is connected with a power supply voltage VDD, the b end of the inductor L1 is connected with the drain end of an NMOS tube Mn4, the other end of a capacitor C13 and one end of a variable capacitor Cvar2 to serve as an output end Vosc-of the orthogonal voltage-controlled oscillator, the other end of the variable capacitor Cvar2 is connected with the other end of the variable capacitor Cvar1, the gate end of the NMOS tube Mn4 is connected with the other end of a capacitor C12 and one end of a resistor R2, the other end of the resistor R2 is connected with the other end of the resistor R1, the b end of the inductor L3 is connected with the source ends of an NMOS tube Mn6, an NMOS tube Mn5, the drain end of a PMOS tube Mp6 and one end of a capacitor Cp2, the gate end of the NMOS tube Mn6 is connected with one ends of the resistor R6 and the capacitor C14, and the source end of the NMOS tube Mn6 is connected with the drain end of the capacitor C14The drain terminal of an NMOS tube Mn6 is connected with one end of a capacitor C15, one end of a variable capacitor Cvar4 and the b terminal of an inductor L2 to serve as the output end Voscq & lt- & gt of an orthogonal voltage-controlled oscillator, the C terminal of the inductor L2 is connected with the power supply voltage VDD, the a terminal of an inductor L1 is connected with the drain terminal of an NMOS tube Mn5, the other end of a capacitor C14 and one end of a variable capacitor Cvar3 to serve as the output end Voscq & lt + & gt of the orthogonal voltage-controlled oscillator, the other end of the variable capacitor Cvar3 is connected with the other end of the variable capacitor Cvar4, the gate terminal of the NMOS tube Mn5 is connected with the other end of the capacitor C15 and one end of a resistor R5, the other end of the resistor R5 is connected with the other end of a resistor R6, the gate terminal of the PMOS tube MP6 is connected with one end of the resistor R4 and the other end of the capacitor Cp1, the gate terminal of the source tube MP6 is connected with one end of the PMOS tube MP5 and the power supply voltage, the gate terminal Cp 5 is connected with one end of the resistor R3 and the other end of the capacitor R2, and the resistor VDD 3 are connected with the other end of the resistor VDD.
CN202211227474.0A 2022-10-09 2022-10-09 CMOS current multiplexing type self-oscillation receiver front end Pending CN115632670A (en)

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