CN112491364A - Millimeter wave CMOS quadrature mixer circuit - Google Patents

Millimeter wave CMOS quadrature mixer circuit Download PDF

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CN112491364A
CN112491364A CN202011357029.7A CN202011357029A CN112491364A CN 112491364 A CN112491364 A CN 112491364A CN 202011357029 A CN202011357029 A CN 202011357029A CN 112491364 A CN112491364 A CN 112491364A
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CN112491364B (en
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郭本青
王雪冰
刘海峰
邬经伟
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Chengdu University of Information Technology
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
    • H03D7/16—Multiple-frequency-changing
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    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

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Abstract

本发明公开了一种毫米波CMOS正交混频器电路，包括跨导输入级、正交谐振级、开关混频级和输出负载级，跨导输入级接收射频电压信号，进行放大处理将射频电压信号转换为电流信号；正交谐振级将电流信号传输到I路，并通过变压器耦合将转换后的电流信号传输到Q路；开关混频级由本振信号控制，对电流信号进行周期性换向，将频率从射频变换到中频，完成频率下变换；及换向中频电流信号在输出负载级被转换为中频电压；其中，正交谐振级将电流信号转化为两路大小相等、相位差为90度的信号，分别送至I路和Q路，实现了混频器的正交性。本发明电路在高频下保持较低的功耗，高的转换增益，低的噪声系数，通过设计正交谐振级，取得了良好正交性。

Figure 202011357029

The invention discloses a millimeter-wave CMOS quadrature mixer circuit, comprising a transconductance input stage, an orthogonal resonance stage, a switch mixing stage and an output load stage. The transconductance input stage receives a radio frequency voltage signal, and performs amplification processing to convert the radio frequency The voltage signal is converted into a current signal; the quadrature resonance stage transmits the current signal to the I channel, and the converted current signal is transmitted to the Q channel through the transformer coupling; the switching mixing stage is controlled by the local oscillator signal, and the current signal is periodically changed. The frequency is converted from radio frequency to intermediate frequency to complete frequency down-conversion; and the commutated intermediate frequency current signal is converted into an intermediate frequency voltage at the output load stage; wherein, the quadrature resonance stage converts the current signal into two channels of equal size and a phase difference of The 90-degree signal is sent to the I channel and the Q channel respectively, realizing the orthogonality of the mixer. The circuit of the invention maintains low power consumption, high conversion gain and low noise coefficient under high frequency, and achieves good orthogonality by designing the orthogonal resonance stage.

Figure 202011357029

Description

Millimeter wave CMOS quadrature mixer circuit
Technical Field
The invention relates to the technical field of radio frequency integrated circuits, in particular to a millimeter wave CMOS quadrature mixer circuit.
Background
The millimeter wave phased array receiver has high carrier frequency, adopts a simple modulation scheme, can achieve high data rate, can improve space selectivity and spectral efficiency, is an ideal solution for broadband communication, and can be applied to the aspects of wireless high-definition video, wireless USB, butt joint, instant synchronization and the like.
As shown in fig. 1, a millimeter wave phased array receiver based on radio frequency path signal phase shift only needs one radio frequency path, has little hardware occupation space, and the structure avoids interference signals in an irrelevant direction, thereby generating a better signal-to-interference ratio and improving the performance of the receiver. However, the mixer part of such a receiver needs to shift the local oscillator signal into two orthogonal signals, and needs to implement two mixers, which inevitably needs an oscillator capable of providing the orthogonal local oscillator signal. Usually, extra power consumption of the oscillator is consumed, and the requirements of miniaturization and low power consumption of electronic equipment are not met.
The above problem can be solved if the mixer can provide quadrature characteristics. Note that the accuracy of the quadrature signal generation is also important because any mismatch in both the amplitude and phase of the quadrature signal will cause gain and phase imbalance in the I and Q outputs. Present wireless systems modulate different information in the I and Q signals, so the balance of amplitude and phase is critical. Conventionally, the quadrature generator in the quadrature mixer may be implemented by an RC-CR polyphase filter, which however has a larger insertion loss at high frequencies, and a polyphase filter based on CMOS technology is obviously not suitable for the design of the millimeter wave quadrature signal generator.
Disclosure of Invention
The present invention is directed to solve the above-mentioned problems, and an object of the present invention is to provide a millimeter wave CMOS quadrature mixer circuit, which maintains low power consumption, high conversion gain, and low noise figure at high frequency, and by designing a quadrature resonator stage, the I-path and Q-path outputs of the mixer are equal in size, the phase difference is 90 degrees, and good orthogonality is achieved.
The invention is realized by the following technical scheme:
a millimeter-wave CMOS quadrature mixer circuit, comprising: the input circuit comprises a transconductance input stage, a quadrature resonant stage, a switch mixing stage and an output load stage, wherein the switch mixing stage comprises an I-path mixer and a Q-path mixer;
the transconductance input stage receives a radio frequency voltage signal and performs amplification processing to convert the radio frequency voltage signal into a current signal;
the orthogonal resonance stage transmits the converted current signal to an I path and transmits the converted current signal to a Q path through transformer coupling;
the switch mixing stage is controlled by a local oscillator signal, periodically commutates the current signal, converts the frequency from radio frequency to intermediate frequency, and finishes frequency down-conversion; and the commutating intermediate frequency current signal is converted into an intermediate frequency voltage at the output load stage;
the orthogonal resonance stage converts the current signal into two paths of signals with equal size and 90-degree phase difference, and the two paths of signals are respectively sent to the I path and the Q path, so that the orthogonality of the frequency mixer is realized.
The working principle is as follows: based on the conventional method, the quadrature generator in the quadrature mixer can be realized by an RC-CR polyphase filter, however, the RC-CR polyphase filter has larger insertion loss at high frequency, and the polyphase filter based on CMOS technology is obviously not suitable for the design of the millimeter wave quadrature signal generator. The invention designs a millimeter wave CMOS quadrature mixer circuit, which comprises: the circuit comprises a transconductance input stage, a quadrature resonant stage, a switching mixing stage and an output load stage, wherein the quadrature resonant stage, the switching mixing stage and the output load stage of the circuit are of the same structure; according to the invention, through designing the orthogonal resonance stage, the I path output signal and the Q path output signal of the frequency mixer are equal in size, the phase difference is 90 degrees, and good orthogonality is realized; in addition, two mixer branches of the I path and the Q path share one group of radio frequency input ports, so that the realization of low power consumption is realized while the orthogonal frequency mixing is realized.
The circuit structure of the invention is reasonable, keeps lower power consumption, high conversion gain and low noise coefficient under high frequency, and ensures that the I path output and the Q path output of the frequency mixer have equal size and the phase difference is 90 degrees by designing the orthogonal resonance stage, thereby obtaining good orthogonality.
As a further preferred aspect, the spanThe conductive input stage comprises a first transistor M1A second transistor M2A third transistor M3A fourth transistor M4A first inductor L1A second inductor L2A third inductor L3A fourth inductor L4A first capacitor C1A second capacitor C2A first resistor R1A second resistor R2；
The first transistor M1Is connected with a first capacitor C1A first terminal of (C), a first capacitor C1Second terminal of the second terminal is connected with a radio frequency input voltage signal VRF-First transistor M1Is connected with a first resistor R1A first terminal of (1), a first resistor R1Second terminal of the second terminal is connected with a radio frequency input voltage signal VRF+First transistor M1Is connected with a third inductor L3First terminal of (1), third inductance L3Is connected to the third transistor M3A source electrode of (a);
the second transistor M2Is connected with a second capacitor C2A first terminal of a second capacitor C2Second terminal of the second terminal is connected with a radio frequency input voltage signal VRF+Second transistor M2Is connected with a second resistor R2A first terminal of (1), a second resistor R2Second terminal of the second terminal is connected with a radio frequency input voltage signal VRF-Second transistor M2Is connected with a fourth inductor L4First terminal of (1), fourth inductance L4A second terminal of the first transistor is connected with a source electrode of the fourth transistor;
the third transistor M3Is connected to a bias voltage VbA third transistor M3Is connected with a third inductor L3A second terminal of (1), a third transistor M3Is connected to the quadrature resonant stage (i.e. the fifth inductance L)5The first end of (a);
the fourth transistor M4Is connected to a bias voltage VbFourth transistor M4Is connected with a fourth inductor L4Second terminal of (1), fourth transistor M4Is connected to the quadrature resonant stage (i.e. the fifth inductance L)5Second end of (2)。
As a further preferable scheme, the quadrature resonance stage comprises an I-path quadrature resonance stage and a Q-path quadrature resonance stage, and the I-path quadrature resonance stage and the Q-path quadrature resonance stage are in alternating current coupling through a transformer; the I-path orthogonal resonant stage comprises a fifth inductor L5A third capacitor C3The Q-way quadrature resonant stage comprises a sixth inductor L6A fourth capacitor C4；
The fifth inductor L5Is connected to the transconductance input stage (i.e. the third transistor M)3Drain electrode of) the fifth inductor L5Is connected to the transconductance input stage (i.e. the fourth transistor M)4Drain electrode of) the fifth inductor L5The third end of the power supply is connected with a power supply voltage VDD(ii) a The fifth inductor L5And a third capacitor C3Parallel connection, a third capacitor C3Connecting the corresponding switching mixer stage (i.e. third capacitor C)3Is connected to the fifth transistor M5Source, sixth transistor M6Common to the sources);
sixth inductance L6Is connected with a fourth capacitor C4The first terminal of (1), the sixth inductance L6Is connected with a fourth capacitor C4Second terminal of (1), sixth inductance L6The third end of the power supply is connected with a power supply voltage VDD(ii) a Fourth capacitor C4Connecting the corresponding switching mixer stage (i.e. the fourth capacitor C)4Is connected to the ninth transistor M9Source, tenth transistor M10Common to the sources);
combined with a fifth inductor L5A sixth inductor L6Transformer coupling is achieved.
As a further preferable scheme, the coupling coefficient of the primary coil and the secondary coil of the transformer is k, and the value range of k is 0.2-0.3.
Preferably, the coupling coefficient between the primary coil and the secondary coil of the transformer is 0.23, and the self-inductance L of the primary coil and the secondary coil is L5＝L6＝210pH。
As a further preferred solution, the switching mixing stage comprises an I-switch mixer and a Q-switch mixerThe I-way switching mixer comprises a fifth transistor M5A sixth transistor M6The seventh transistor M7And an eighth transistor M8The Q-way switching mixer comprises a ninth transistor M9The tenth transistor M10Eleventh transistor M11The twelfth transistor M12；
The fifth transistor M5And the sixth transistor M6Is connected with the source electrode of the first capacitor and the common end of the first capacitor is connected with the third capacitor C3A first end of (a); seventh transistor M7And the eighth transistor M8Is connected with the source electrode of the first capacitor and the common end of the first capacitor is connected with the third capacitor C3A second end of (a); ninth transistor M9Source of and tenth transistor M10Is connected with the source electrode of the first capacitor and the common end of the first capacitor is connected with the fourth capacitor C4A first end of (a); eleventh transistor M11Source of and the twelfth transistor M12Is connected with the source electrode of the first capacitor and the common end of the first capacitor is connected with the fourth capacitor C4A second end of (a);
fifth transistor M5Grid connected local oscillator voltage signal VLO+Fifth transistor M5Is connected with a third resistor R3A first end of (a); sixth transistor M6Grid connected local oscillator voltage signal VLO-The sixth transistor M6Is connected with a fourth resistor R4A first end of (a); seventh transistor M7Grid connected local oscillator voltage signal VLO-(ii) a Seventh transistor M7Is connected with a third resistor R3A first end of (a); eighth transistor M8Grid connected local oscillator voltage signal VLO+The eighth transistor M8Is connected with a fourth resistor R4A first end of (a); ninth transistor M9Grid connected local oscillator voltage signal VLO+The ninth transistor M9Is connected with a fifth resistor R5A first end of (a); the tenth transistor M10Grid connected local oscillator voltage signal VLO-The tenth transistor M10Is connected with a sixth resistor R6A first end of (a); eleventh transistor M11Grid connected local oscillator voltage signalNumber VLO-An eleventh transistor M11Is connected with a fifth resistor R5A first end of (a); twelfth transistor M12Grid connected local oscillator voltage signal VLO+The twelfth transistor M12Is connected with a sixth resistor R6The first end of (a).
As a further preferable mode, the fifth transistor M5A sixth transistor M6The seventh transistor M7An eighth transistor M8The ninth transistor M9The tenth transistor M10Eleventh transistor M11The twelfth transistor M12Are designed by adopting 180nm CMOS process.
As a further preferred solution, the output load stage comprises an I-way output load stage and a Q-way output load stage, and the I-way output load stage comprises a third resistor R3A fourth resistor R4The Q-path output load stage comprises a fifth resistor R5A sixth resistor R6；
The third resistor R3Is connected with the intermediate frequency voltage signal VIF1+The second end is grounded; a fourth resistor R4Is connected with the intermediate frequency voltage signal VIF1-The second end is grounded; fifth resistor R5Is connected with the intermediate frequency voltage signal VIF2+The second end is grounded; a sixth resistor R6Is connected with the intermediate frequency voltage signal VIF2-And the second terminal is grounded.
Compared with the prior art, the invention has the following advantages and beneficial effects:
1. according to the invention, through designing the orthogonal resonance stage, the I path output signal and the Q path output signal of the frequency mixer are equal in size, the phase difference is 90 degrees, and good orthogonality is realized;
2. the two mixer branches of the I path and the Q path share one group of radio frequency input ports, so that the orthogonal frequency mixing is realized and the low power consumption is simultaneously utilized.
Drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principles of the invention. In the drawings:
fig. 1 is a schematic diagram of a millimeter wave phased array receiver based on radio frequency signal phase shift.
Fig. 2 is a circuit diagram of a millimeter wave CMOS quadrature mixer of the present invention.
Fig. 3 is a phase balance characteristic diagram of a millimeter wave CMOS quadrature mixer circuit of the present invention.
Fig. 4 is a conversion gain balance characteristic diagram of a millimeter wave CMOS quadrature mixer circuit of the present invention.
Fig. 5 is a noise figure diagram of a millimeter wave CMOS quadrature mixer circuit of the present invention.
Fig. 6 is a linearity diagram of a millimeter wave CMOS quadrature mixer circuit of the present invention.
FIG. 7 is a graph of the input reflection coefficient of a millimeter wave CMOS quadrature mixer circuit of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to examples and accompanying drawings, and the exemplary embodiments and descriptions thereof are only used for explaining the present invention and are not meant to limit the present invention.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to one of ordinary skill in the art that: it is not necessary to employ these specific details to practice the present invention. In other instances, well-known structures, circuits, materials, or methods have not been described in detail so as not to obscure the present invention.
Throughout the specification, reference to "one embodiment," "an embodiment," "one example," or "an example" means: the particular features, structures, or characteristics described in connection with the embodiment or example are included in at least one embodiment of the invention. Thus, the appearances of the phrases "one embodiment," "an embodiment," "one example" or "an example" in various places throughout this specification are not necessarily all referring to the same embodiment or example. Furthermore, the particular features, structures, or characteristics may be combined in any suitable combination and/or sub-combination in one or more embodiments or examples. Further, those of ordinary skill in the art will appreciate that the illustrations provided herein are for illustrative purposes and are not necessarily drawn to scale. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
In the description of the present invention, it is to be understood that the terms "front", "rear", "left", "right", "upper", "lower", "vertical", "horizontal", "high", "low", "inner", "outer", etc. indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of description and simplicity of description, and do not indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and therefore, are not to be construed as limiting the scope of the present invention.
Example 1
As shown in fig. 1 to 7, a millimeter wave CMOS quadrature mixer circuit of the present invention includes: the input circuit comprises a transconductance input stage, a quadrature resonant stage, a switch mixing stage and an output load stage, wherein the switch mixing stage comprises an I-path mixer and a Q-path mixer;
the transconductance input stage receives a radio frequency voltage signal and performs amplification processing to convert the radio frequency voltage signal into a current signal;
the orthogonal resonance stage transmits the converted current signal to an I path and transmits the converted current signal to a Q path through transformer coupling;
the switch mixing stage is controlled by a local oscillator signal, periodically commutates the current signal, converts the frequency from radio frequency to intermediate frequency, and finishes frequency down-conversion; and the commutating intermediate frequency current signal is converted into an intermediate frequency voltage at the output load stage;
the orthogonal resonance stage converts the current signal into two paths of signals with equal size and 90-degree phase difference, and the two paths of signals are respectively sent to the I path and the Q path, so that the orthogonality of the frequency mixer is realized.
The invention designs a millimeter wave CMOS quadrature mixer circuit, which comprises: the circuit comprises a transconductance input stage, a quadrature resonant stage, a switching mixing stage and an output load stage, wherein the quadrature resonant stage, the switching mixing stage and the output load stage of the circuit are of the same structure; according to the invention, through designing the orthogonal resonance stage, the I path output signal and the Q path output signal of the frequency mixer are equal in size, the phase difference is 90 degrees, and good orthogonality is realized; in addition, two mixer branches of the I path and the Q path share one group of radio frequency input ports, so that the realization of low power consumption is realized while the orthogonal frequency mixing is realized.
In this embodiment, the transconductance input stage includes a first transistor M1A second transistor M2A third transistor M3A fourth transistor M4A first inductor L1A second inductor L2A third inductor L3A fourth inductor L4A first capacitor C1A second capacitor C2A first resistor R1A second resistor R2；
The first transistor M1Is connected with a first capacitor C1A first terminal of (C), a first capacitor C1Second terminal of the second terminal is connected with a radio frequency input voltage signal VRF-First transistor M1Is connected with a first resistor R1A first terminal of (1), a first resistor R1Second terminal of the second terminal is connected with a radio frequency input voltage signal VRF+First transistor M1Is connected with a third inductor L3First terminal of (1), third inductance L3Is connected to the third transistor M3A source electrode of (a);
the second transistor M2Is connected with a second capacitor C2A first terminal of a second capacitor C2Second terminal of the second terminal is connected with a radio frequency input voltage signal VRF+Second transistor M2Is connected with a second resistor R2A first terminal of (1), a second resistor R2Second terminal of the second terminal is connected with a radio frequency input voltage signal VRF-Second transistor M2Is connected with a fourth inductor L4First terminal of (1), fourth inductance L4A second terminal of the first transistor is connected with a source electrode of the fourth transistor;
the third transistor M3Grid electrode ofIs connected with a bias voltage VbA third transistor M3Is connected with a third inductor L3A second terminal of (1), a third transistor M3Is connected to the fifth inductor L5A first end of (a);
the fourth transistor M4Is connected to a bias voltage VbFourth transistor M4Is connected with a fourth inductor L4Second terminal of (1), fourth transistor M4Is connected to the fifth inductor L5The second end of (a).
In this embodiment, the quadrature resonance stage includes an I-path quadrature resonance stage and a Q-path quadrature resonance stage, and the I-path quadrature resonance stage and the Q-path quadrature resonance stage are ac-coupled by a transformer; the I-path orthogonal resonant stage comprises a fifth inductor L5A third capacitor C3The Q-way quadrature resonant stage comprises a sixth inductor L6A fourth capacitor C4；
The fifth inductor L5Is connected to the third transistor M3Drain electrode of (1), fifth inductance L5Is connected to the fourth transistor M4Drain electrode of (1), fifth inductance L5The third end of the power supply is connected with a power supply voltage VDD(ii) a The fifth inductor L5And a third capacitor C3Parallel connection, a third capacitor C3Connecting a third capacitor C3Is connected to the fifth transistor M5Source, sixth transistor M6A common terminal of the source;
sixth inductance L6Is connected with a fourth capacitor C4The first terminal of (1), the sixth inductance L6Is connected with a fourth capacitor C4Second terminal of (1), sixth inductance L6The third end of the power supply is connected with a power supply voltage VDD(ii) a Fourth capacitor C4Is connected with a fourth capacitor C4Is connected to the ninth transistor M9Source, tenth transistor M10A common terminal of the source;
combined with a fifth inductor L5A sixth inductor L6Transformer coupling is achieved.
In the embodiment, the coupling coefficient of the primary coil and the secondary coil of the transformer is k, and the value range of k is 0.2-0.3.
In this embodiment, the coupling coefficient between the primary and secondary coils of the transformer is 0.23, and the primary and secondary coils have self-inductance L5＝L6＝210pH。
In this embodiment, the switching mixer stage includes an I-way switching mixer and a Q-way switching mixer, and the I-way switching mixer includes a fifth transistor M5A sixth transistor M6The seventh transistor M7And an eighth transistor M8The Q-way switching mixer comprises a ninth transistor M9The tenth transistor M10Eleventh transistor M11The twelfth transistor M12；
The fifth transistor M5And the sixth transistor M6Is connected with the source electrode of the first capacitor and the common end of the first capacitor is connected with the third capacitor C3A first end of (a); seventh transistor M7And the eighth transistor M8Is connected with the source electrode of the first capacitor and the common end of the first capacitor is connected with the third capacitor C3A second end of (a); ninth transistor M9Source of and tenth transistor M10Is connected with the source electrode of the first capacitor and the common end of the first capacitor is connected with the fourth capacitor C4A first end of (a); eleventh transistor M11Source of and the twelfth transistor M12Is connected with the source electrode of the first capacitor and the common end of the first capacitor is connected with the fourth capacitor C4A second end of (a);
fifth transistor M5Grid connected local oscillator voltage signal VLO+Fifth transistor M5Is connected with a third resistor R3A first end of (a); sixth transistor M6Grid connected local oscillator voltage signal VLO-The sixth transistor M6Is connected with a fourth resistor R4A first end of (a); seventh transistor M7Grid connected local oscillator voltage signal VLO-(ii) a Seventh transistor M7Is connected with a third resistor R3A first end of (a); eighth transistor M8Grid connected local oscillator voltage signal VLO+The eighth transistor M8Is connected with a fourth resistor R4A first end of (a); ninth transistor M9Grid connected local oscillator voltage signalVLO+The ninth transistor M9Is connected with a fifth resistor R5A first end of (a); the tenth transistor M10Grid connected local oscillator voltage signal VLO-The tenth transistor M10Is connected with a sixth resistor R6A first end of (a); eleventh transistor M11Grid connected local oscillator voltage signal VLO-An eleventh transistor M11Is connected with a fifth resistor R5A first end of (a); twelfth transistor M12Grid connected local oscillator voltage signal VLO+The twelfth transistor M12Is connected with a sixth resistor R6The first end of (a).
In this embodiment, the fifth transistor M5A sixth transistor M6The seventh transistor M7An eighth transistor M8The ninth transistor M9The tenth transistor M10Eleventh transistor M11The twelfth transistor M12Are designed by adopting 180nm CMOS process.
In this embodiment, the output load stage includes an I-path output load stage and a Q-path output load stage, and the I-path output load stage includes a third resistor R3A fourth resistor R4The Q-path output load stage comprises a fifth resistor R5A sixth resistor R6；
The third resistor R3Is connected with the intermediate frequency voltage signal VIF1+The second end is grounded; a fourth resistor R4Is connected with the intermediate frequency voltage signal VIF1-The second end is grounded; fifth resistor R5Is connected with the intermediate frequency voltage signal VIF2+The second end is grounded; a sixth resistor R6Is connected with the intermediate frequency voltage signal VIF2-And the second terminal is grounded.
When in implementation: the orthogonal resonance stage of the millimeter wave mixer utilizes a fifth inductor L5A sixth inductor L6The coupling structure of the transformer is realized, when the direction is proper, the coupling between the two inductance coils mutually enhances effective inductance, and the parasitic resistance of the inductance coils is not influenced by the coupling, which is equivalent to increase the effective quality of the inductanceThe value of the factor Q. The transformer is also essentially a higher order LC network with more degrees of freedom, more pole positions and therefore greater bandwidth. Specifically, the coupling coefficient between the primary and secondary windings of the transformer of this embodiment is 0.23, and the primary and secondary windings have self-inductance L5＝L6pH 210. The layout is as shown in fig. 2, and is realized by adopting thick metal close to the top layer, so that low ohmic loss obtains a higher Q value.
The orthogonal resonance level of the millimeter wave mixer enables the I path output signal and the Q path output signal of the mixer to be equal in size, the phase difference is 90 degrees, and good orthogonality is achieved. And the two mixer branches of the I path and the Q path share one group of radio frequency input ports, so that the power consumption is reduced while the orthogonal frequency mixing is realized.
The transconductance input stage of the millimeter wave mixer adopts a common gate + cascode structure, and the common gate transistor is a first transistor M1A second transistor M2Providing input impedance matching. In particular, the noise of the whole circuit is determined by the transconductance stage and can be expressed as:
Figure BDA0002802888800000071
gm1is a transistor M1Transconductance of (1). The parameter gamma represents the thermal noise figure. The input impedance of the circuit can be represented as:
Figure BDA0002802888800000072
note that in conventional common-gate structures, g needs to be satisfied even after capacitive cross-coupling is used, because of the impedance matching constraintsm1The noise figure can then be characterized as 1+ γ, given the requirement of 10 mS. After the device channel is shortened, the gamma value is large (its typical value is 2.5), so that the noise contribution of the common-gate tube becomes significant. Here the scheme introduces a resistor R1 (approximately 30 ohms) to increase the freedom of noise design, then at gm1The result of the latter two terms in equation (1) can be calculated to be 2.05, for equation (2) satisfied at 14.3mSCompared with the traditional structure, the noise reduction rate is reduced by nearly 0.5, and the noise advantage is obvious. The method has a remarkable effect especially under the condition of high gamma value of a device under the condition of a short channel. On the other hand, the cascode transistor is a third transistor M3A fourth transistor M4The output impedance and the input-output isolation can be improved, the interaction between the tuning output and the tuning input can be reduced, and the grid-drain parasitic capacitance C of the common-grid transistor can be reducedgdThe influence of (c). First inductance L1A second inductor L2Input parasitic capacitance for resonant absorption common-gate transistor, third inductance L3A fourth inductor L4And the output parasitic capacitance of the common-gate transistor and the input parasitic capacitance of the cascode transistor are used for resonance absorption, so that a pi-type resonance network is formed to obtain broadband interstage matching. Third inductance L3A fourth inductor L4Not only can the gain of the transconductance input stage at the central frequency be improved and the noise of the common-gate transistor be suppressed, but also the middle pole of the cascode stage can be adjusted and the lower f of the middle pole can be compensatedT.
The invention adopts 180nm CMOS process to design, uses Cadence spectrum software to simulate, uses Momentum of ADS to model and simulate the inductor, obtains EM model, introduces the inductor model into Cadence, and carries out post-layout simulation. The circuit works under the power supply voltage of 1.5V, and the power consumption of the circuit is 23.7 mW. The phase of the millimeter wave CMOS quadrature mixer circuit is shown in fig. 3, and it can be seen that, in the intermediate frequency range of 100MHz around the local oscillation frequency of 25GHz, the phase of the I path is 140 degrees, the phase of the Q path is 50 degrees, and the phase difference is approximately 90 degrees. The gain of the millimeter wave CMOS quadrature mixer circuit is shown in FIG. 4, and the gains of the I path and the Q path of the quadrature mixer circuit are observed in the 100MHz intermediate frequency near the local oscillation frequency of 25GHz, and the gains of the two paths are approximately equal and are 7.45 dB. Similarly, having simulated the noise performance of the millimeter wave quadrature mixer, FIG. 5 shows the variation of the noise figure of the proposed millimeter wave CMOS quadrature mixer circuit with respect to the intermediate frequency when the local oscillator frequency is fixed around 25GHz, the noise figure of the mixer is not higher than 9.51dB in the frequency range of 0-300 MHz. As shown in fig. 6, which is a simulation of the linearity of the millimeter wave CMOS quadrature mixer circuit, the two-tone test indicated that the IIP3 was 0.33 dBm. Fig. 7 shows an input reflection coefficient diagram of the millimeter wave CMOS quadrature mixer circuit, and it can be seen that the frequency range where the reflection coefficient of the rf port is lower than-10 dB is approximately 5Ghz, and a larger matching bandwidth is obtained.
Therefore, the circuit structure of the invention is reasonable, the low power consumption, the high conversion gain and the low noise coefficient are kept under the high frequency, the I path and the Q path of the frequency mixer are equal in output size through designing the orthogonal resonant stage, the phase difference is 90 degrees, and the good orthogonality is obtained.
The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are merely exemplary embodiments of the present invention, and are not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims (8)

1.一种毫米波CMOS正交混频器电路，其特征在于，包括：跨导输入级、正交谐振级、开关混频级和输出负载级，开关混频级包括I路混频器和Q路混频器；1. a millimeter wave CMOS quadrature mixer circuit, is characterized in that, comprises: transconductance input stage, quadrature resonance stage, switch mixing stage and output load stage, switch mixing stage comprises I road mixer and Q mixer; 所述跨导输入级接收射频电压信号，进行放大处理将射频电压信号转换为电流信号；The transconductance input stage receives the radio frequency voltage signal, and performs amplification processing to convert the radio frequency voltage signal into a current signal; 所述正交谐振级将转换后的电流信号传输到I路，并通过变压器耦合将转换后的电流信号传输到Q路；The quadrature resonance stage transmits the converted current signal to the I path, and transmits the converted current signal to the Q path through transformer coupling; 所述开关混频级由本振信号控制，对所述电流信号进行周期性换向，将频率从射频变换到中频，完成频率下变换；及换向中频电流信号在所述输出负载级被转换为中频电压；The switch mixing stage is controlled by the local oscillator signal, periodically commutates the current signal, converts the frequency from the radio frequency to the intermediate frequency, and completes the frequency down-conversion; and the commutated intermediate frequency current signal is converted into the output load stage. IF voltage; 其中，所述正交谐振级将电流信号转化为两路大小相等、相位差为90度的信号，分别送至I路和Q路，实现了混频器的正交性。Wherein, the quadrature resonant stage converts the current signal into two signals with the same size and a phase difference of 90 degrees, which are respectively sent to the I channel and the Q channel, thereby realizing the orthogonality of the mixer. 2.根据权利要求1所述的一种毫米波CMOS正交混频器电路，其特征在于，所述跨导输入级包括第一晶体管M1、第二晶体管M2、第三晶体管M3、第四晶体管M4、第一电感L1、第二电感L2、第三电感L3、第四电感L4、第一电容C1、第二电容C2、第一电阻R1、第二电阻R2；2 . The millimeter-wave CMOS quadrature mixer circuit according to claim 1 , wherein the transconductance input stage comprises a first transistor M 1 , a second transistor M 2 , a third transistor M 3 , the fourth transistor M 4 , the first inductor L 1 , the second inductor L 2 , the third inductor L 3 , the fourth inductor L 4 , the first capacitor C 1 , the second capacitor C 2 , the first resistor R 1 , the second resistance R 2 ; 所述第一晶体管M1的栅极连接第一电容C1的第一端，第一电容C1的第二端连接射频输入电压信号VRF-，第一晶体管M1的源极连接第一电阻R1的第一端，第一电阻R1的第二端连接射频输入电压信号VRF+，第一晶体管M1的漏极连接第三电感L3的第一端，第三电感L3的第二端连接第三晶体管M3的源极；The gate of the first transistor M1 is connected to the first terminal of the first capacitor C1 , the second terminal of the first capacitor C1 is connected to the radio frequency input voltage signal V RF- , and the source of the first transistor M1 is connected to the first terminal of the first capacitor C1. The first end of the resistor R1, the second end of the first resistor R1 is connected to the radio frequency input voltage signal VRF+ , the drain of the first transistor M1 is connected to the first end of the third inductor L3, the third inductor L3 The second end is connected to the source of the third transistor M3; 所述第二晶体管M2的栅极连接第二电容C2的第一端，第二电容C2的第二端连接射频输入电压信号VRF+，第二晶体管M2的源极连接第二电阻R2的第一端，第二电阻R2的第二端连接射频输入电压信号VRF-，第二晶体管M2的漏极连接第四电感L4的第一端，第四电感L4的第二端连接第四晶体管的源极；The gate of the second transistor M 2 is connected to the first end of the second capacitor C 2 , the second end of the second capacitor C 2 is connected to the radio frequency input voltage signal V RF+ , and the source of the second transistor M 2 is connected to the second resistor The first terminal of R 2 , the second terminal of the second resistor R 2 is connected to the radio frequency input voltage signal V RF- , the drain of the second transistor M 2 is connected to the first terminal of the fourth inductor L 4 , and the The second end is connected to the source of the fourth transistor; 所述第三晶体管M3的栅极连接偏置电压Vb，第三晶体管M3的源极连接第三电感L3的第二端，第三晶体管M3的漏极连接所述正交谐振级；The gate of the third transistor M3 is connected to the bias voltage Vb , the source of the third transistor M3 is connected to the second end of the third inductor L3, and the drain of the third transistor M3 is connected to the quadrature resonance class; 所述第四晶体管M4的栅极连接偏置电压Vb，第四晶体管M4的源极连接第四电感L4的第二端，第四晶体管M4的漏极连接所述正交谐振级。The gate of the fourth transistor M4 is connected to the bias voltage Vb , the source of the fourth transistor M4 is connected to the second end of the fourth inductor L4, and the drain of the fourth transistor M4 is connected to the quadrature resonance class. 3.根据权利要求1所述的一种毫米波CMOS正交混频器电路，其特征在于，所述正交谐振级包括I路正交谐振级和Q路正交谐振级，所述I路正交谐振级和Q路正交谐振级之间通过变压器进行交流耦合；所述I路正交谐振级包括第五电感L5、第三电容C3，所述Q路正交谐振级包括第六电感L6、第四电容C4；3. The millimeter-wave CMOS quadrature mixer circuit according to claim 1, wherein the quadrature resonance stage comprises an I-channel quadrature resonance stage and a Q-channel quadrature resonance stage, and the I-channel quadrature resonance stage The quadrature resonance stage and the Q-channel quadrature resonance stage are AC coupled through a transformer; the I-channel quadrature resonance stage includes a fifth inductor L 5 and a third capacitor C 3 , and the Q-channel quadrature resonance stage includes a Six inductances L 6 and fourth capacitors C 4 ; 所述第五电感L5的第一端连接所述跨导输入级，第五电感L5的第二端连接所述跨导输入级，第五电感L5的第三端连接电源电压VDD；所述第五电感L5与第三电容C3并联，第三电容C3连接对应的开关混频级；The first end of the fifth inductor L5 is connected to the transconductance input stage, the second end of the fifth inductor L5 is connected to the transconductance input stage, and the third end of the fifth inductor L5 is connected to the power supply voltage V DD ; The fifth inductor L 5 is connected in parallel with the third capacitor C 3 , and the third capacitor C 3 is connected to the corresponding switch mixing stage; 第六电感L6的第一端连接第四电容C4的第一端，第六电感L6的第二端连接第四电容C4的第二端，第六电感L6的第三端连接电源电压VDD；第四电容C4连接对应的开关混频级；The first end of the sixth inductor L6 is connected to the first end of the fourth capacitor C4 , the second end of the sixth inductor L6 is connected to the second end of the fourth capacitor C4 , and the third end of the sixth inductor L6 is connected the power supply voltage V DD ; the fourth capacitor C 4 is connected to the corresponding switching mixing stage; 结合第五电感L5、第六电感L6实现变压器耦合。Transformer coupling is realized in combination with the fifth inductor L 5 and the sixth inductor L 6 . 4.根据权利要求3所述的一种毫米波CMOS正交混频器电路，其特征在于，所述变压器的主副线圈耦合系数为k，k的取值范围为0.2～0.3。4 . The millimeter-wave CMOS quadrature mixer circuit according to claim 3 , wherein the coupling coefficient of the primary and secondary coils of the transformer is k, and the value of k ranges from 0.2 to 0.3. 5 . 5.根据权利要求4所述的一种毫米波CMOS正交混频器电路，其特征在于，所述变压器的主副线圈之间耦合系数为0.23，主副线圈自感L5＝L6＝210pH。5 . The millimeter-wave CMOS quadrature mixer circuit according to claim 4 , wherein the coupling coefficient between the primary and secondary coils of the transformer is 0.23, and the self-inductance of the primary and secondary coils L 5 =L 6 = 210 pH. 6.根据权利要求3所述的一种毫米波CMOS正交混频器电路，其特征在于，所述开关混频级包括I路开关混频器和Q路开关混频器，所述I路开关混频器包括第五晶体管M5、第六晶体管M6、第七晶体管M7和第八晶体管M8，所述Q路开关混频器包括第九晶体管M9、第十晶体管M10、第十一晶体管M11、第十二晶体管M12；6. The millimeter-wave CMOS quadrature mixer circuit according to claim 3, wherein the switch mixing stage comprises an I-way switch mixer and a Q-way switch mixer, and the I-way switch mixer The switching mixer includes a fifth transistor M 5 , a sixth transistor M 6 , a seventh transistor M 7 and an eighth transistor M 8 , and the Q-channel switching mixer includes a ninth transistor M 9 , a tenth transistor M 10 , The eleventh transistor M 11 and the twelfth transistor M 12 ; 所述第五晶体管M5的源极与第六晶体管M6的源极相连接，且其公共端连接第三电容C3的第一端；第七晶体管M7的源极与第八晶体管M8的源极相连接，且其公共端连接第三电容C3的第二端；第九晶体管M9的源极与第十晶体管M10的源极相连接，且其公共端连接第四电容C4的第一端；第十一晶体管M11的源极与第十二晶体管M12的源极相连接，且其公共端连接第四电容C4的第二端；The source of the fifth transistor M5 is connected to the source of the sixth transistor M6, and its common terminal is connected to the first end of the third capacitor C3; the source of the seventh transistor M7 is connected to the eighth transistor M 8 is connected to the source, and its common terminal is connected to the second terminal of the third capacitor C3; the source of the ninth transistor M9 is connected to the source of the tenth transistor M10, and its common terminal is connected to the fourth capacitor The first end of C4 ; the source of the eleventh transistor M11 is connected to the source of the twelfth transistor M12, and its common end is connected to the second end of the fourth capacitor C4 ; 第五晶体管M5的栅极连接本振电压信号VLO+，第五晶体管M5的漏极连接第三电阻R3的第一端；第六晶体管M6的栅极连接本振电压信号VLO-，第六晶体管M6的漏极连接第四电阻R4的第一端；第七晶体管M7的栅极连接本振电压信号VLO-；第七晶体管M7的漏极连接第三电阻R3的第一端；第八晶体管M8的栅极连接本振电压信号VLO+，第八晶体管M8的漏极连接第四电阻R4的第一端；第九晶体管M9的栅极连接本振电压信号VLO+，第九晶体管M9的漏极连接第五电阻R5的第一端；第十晶体管M10的栅极连接本振电压信号VLO-，第十晶体管M10的漏极连接第六电阻R6的第一端；第十一晶体管M11的栅极连接本振电压信号VLO-，第十一晶体管M11的漏极连接第五电阻R5的第一端；第十二晶体管M12的栅极连接本振电压信号VLO+，第十二晶体管M12的漏极连接第六电阻R6的第一端。The gate of the fifth transistor M 5 is connected to the local oscillator voltage signal V LO+ , the drain of the fifth transistor M 5 is connected to the first end of the third resistor R 3 ; the gate of the sixth transistor M 6 is connected to the local oscillator voltage signal V LO - , the drain of the sixth transistor M6 is connected to the first end of the fourth resistor R4; the gate of the seventh transistor M7 is connected to the local oscillator voltage signal VLO- ; the drain of the seventh transistor M7 is connected to the third resistor The first end of R3 ; the gate of the eighth transistor M8 is connected to the local oscillator voltage signal V LO+ , the drain of the eighth transistor M8 is connected to the first end of the fourth resistor R4; the gate of the ninth transistor M9 Connected to the local oscillator voltage signal V LO+ , the drain of the ninth transistor M 9 is connected to the first end of the fifth resistor R 5 ; the gate of the tenth transistor M 10 is connected to the local oscillator voltage signal V LO- , the drain of the tenth transistor M 10 is connected to the local oscillator voltage signal V LO- The drain is connected to the first end of the sixth resistor R6; the gate of the eleventh transistor M11 is connected to the local oscillator voltage signal V LO- , and the drain of the eleventh transistor M11 is connected to the first end of the fifth resistor R5 ; The gate of the twelfth transistor M 12 is connected to the local oscillator voltage signal V LO+ , and the drain of the twelfth transistor M 12 is connected to the first end of the sixth resistor R 6 . 7.根据权利要求6所述的一种毫米波CMOS正交混频器电路，其特征在于，所述第五晶体管M5、第六晶体管M6、第七晶体管M7、第八晶体管M8、第九晶体管M9、第十晶体管M10、第十一晶体管M11、第十二晶体管M12均采用180nm CMOS工艺设计而成。7 . The millimeter-wave CMOS quadrature mixer circuit according to claim 6 , wherein the fifth transistor M 5 , the sixth transistor M 6 , the seventh transistor M 7 , and the eighth transistor M 8 . , the ninth transistor M 9 , the tenth transistor M 10 , the eleventh transistor M 11 , and the twelfth transistor M 12 are all designed using a 180 nm CMOS process. 8.根据权利要求1所述的一种毫米波CMOS正交混频器电路，其特征在于，所述输出负载级包括I路输出负载级和Q路输出负载级，所述I路输出负载级包括第三电阻R3、第四电阻R4，所述Q路输出负载级包括第五电阻R5、第六电阻R6；8. A millimeter-wave CMOS quadrature mixer circuit according to claim 1, wherein the output load stage comprises an output load stage of the I road and an output load stage of the Q road, and the output load stage of the I road including a third resistor R 3 and a fourth resistor R 4 , and the Q-channel output load stage includes a fifth resistor R 5 and a sixth resistor R 6 ; 所述第三电阻R3的第一端连接中频电压信号VIF1+，第二端接地；第四电阻R4的第一端连接中频电压信号VIF1-，第二端接地；第五电阻R5的第一端连接中频电压信号VIF2+，第二端接地；第六电阻R6的第一端连接中频电压信号VIF2-，第二端接地。The first end of the third resistor R 3 is connected to the intermediate frequency voltage signal V IF1+ , and the second end is grounded; the first end of the fourth resistor R 4 is connected to the intermediate frequency voltage signal V IF1- , and the second end is grounded; the fifth resistor R 5 The first terminal of the resistor R 6 is connected to the intermediate frequency voltage signal V IF2+ , and the second terminal is grounded; the first terminal of the sixth resistor R 6 is connected to the intermediate frequency voltage signal V IF2- , and the second terminal is grounded.
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CN117907349B (en) * 2024-03-19 2024-05-24 成都信息工程大学 A portable radio frequency detection system and method for detecting micro defects in materials

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