CN113472295A - Power mixer capable of suppressing third harmonic of local oscillator - Google Patents
Power mixer capable of suppressing third harmonic of local oscillator Download PDFInfo
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- H04B1/0053—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges with common antenna for more than one band
- H04B1/006—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission adapting radio receivers, transmitters andtransceivers for operation on two or more bands, i.e. frequency ranges with common antenna for more than one band using switches for selecting the desired band
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- H04B—TRANSMISSION
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Abstract
The application discloses a power mixer capable of suppressing third harmonic of a local oscillator, which comprises a local oscillator signal link circuit, a transconductance circuit, a switching stage circuit, a cascade circuit and a load circuit. The local oscillator signal link circuit provides two local oscillator signals for the switching stage circuit, wherein one local oscillator signal has a phase difference of 60 degrees relative to the other local oscillator signal. The transconductance stage circuit has two circuits and is used for converting a baseband voltage signal into a current signal. And the two switching stage circuits are used for up-converting the current signals from the two transconductance stage circuits into the required radio-frequency signals respectively. The number of the cascode stage circuits is two, and the cascode stage circuits respectively transmit the radio-frequency signals output by the two switching stage circuits to the load circuit. The load circuit realizes the addition of the output currents of the two cascode stage circuits. And the function of inhibiting third harmonic is realized through special phase difference design.
Description
Technical Field
The present application relates to the field of wireless communications technologies, and in particular, to a power mixer for a radio frequency transmitter capable of suppressing third harmonic of a local oscillator.
Background
In radio frequency transceivers, the third harmonic of the local oscillator signal can degrade the performance of the wireless communication system. For example, the third harmonic output from the mixer passes through the power amplifier, and the third harmonic is mixed back to the required frequency band due to the nonlinearity of the power amplifier itself, which deteriorates the efficiency and linearity of the rf transmitter. The third harmonic of the local oscillation signal of the mixer in the rf transmitter may also fall into the frequency band where the rf receiver is located, deteriorating the performance of the rf receiver.
Referring to fig. 1, a conventional radio frequency transmitter with direct up-conversion architecture sequentially includes, from left to right, a driver B1, a frequency divider DT, a driver B2, an active mixer M1, a pre-power amplifier PPA, a power amplifier PA, and an antenna. The drivers B1 and B2 are both composed of inverters and are used for improving the driving capability of signals. Local oscillator input signal fLO(t) the signal is enhanced by a driver B1, and then four paths of IQ orthogonal signals are generated by a frequency divider DT, and then four further enhanced signals are obtained by a driver B2, which are four orthogonal local oscillator signals LO _0, LO _90, LO _180, and LO _270 with phase offsets of 0 degree, 90 degree, 180 degree, and 270 degree, respectively, and are provided to an active mixer M1. The active mixer M1 up-converts the baseband signal from the baseband chip BB into a radio frequency signal, which is amplified by the pre-power amplifier PPA and the power amplifier PA, respectively, and then transmitted through the antenna.
The radio frequency transmitter of the direct up-conversion architecture shown in fig. 1 has further variants, each with certain drawbacks.
The first scheme is as follows: a kirschner mixer and a power amplifier. The defect is that the function of inhibiting the third harmonic of the local oscillator is not provided; the load of the mixer is an inductor, and the load of the pre-power amplifier also needs the inductor, so that the layout area is large, and the design cost is high.
Scheme II: using 8-phase local oscillator drive
There are 3 passive harmonic rejection mixers and power amplifiers as shown in fig. 2. The divide-by-two divider DT of fig. 1 is replaced by a divide-by-four divider DF in fig. 2, one driver B2 of fig. 1 is replaced by two drivers B2, B3 in fig. 2, and three passive mixers in fig. 2M1 to M3 replace one active mixer M1 in fig. 1, a 25% duty cycle circuit LOG1 is further added between the driver B2 and the three passive mixers M1 to M3 in fig. 2, and a 25% duty cycle circuit LOG2 is further added between the driver B3 and the three passive mixers M1 to M3 in fig. 2. The disadvantages are that: the traditional 8-phase local oscillator signal design at least needs one four-frequency divider to generate, and the design complexity of the frequency divider is high; three mixers are adopted to realize the harmonic suppression function, and the layout area is large; need to do
The approximation is that the design difficulty is high, and the load of the local oscillator is sensitive to the loss of the local oscillator signal, namely the design difficulty of the frequency mixer is high; a passive mixer is used, so a 25% duty cycle circuit is required; the circuit needs to be added with a power amplifier to transmit power, and the design difficulty is further increased.
The third scheme is as follows: a passive mixer and a power amplifier which can counteract the third local oscillator harmonic wave at the resonance of an inductor and a capacitor are adopted. The defects are that a large-area passive device is needed, the layout area is large, and a power amplifier is needed to transmit power afterwards.
In summary, a harmonic suppression power mixer integrating frequency conversion, amplification and harmonic suppression functions is designed, that is, one circuit simultaneously realizes the functions of the mixer, the power amplifier and the harmonic suppression, so that the design of the radio frequency transmitter circuit is simplified, and the cost is reduced.
Disclosure of Invention
The technical problem to be solved by the present application is to provide a power mixer capable of suppressing the third harmonic of the local oscillator, that is, a circuit integrating the functions of a gilbert mixer, a power amplifier and harmonic suppression.
In order to solve the technical problem, the application provides a power mixer capable of suppressing the third harmonic of a local oscillator, which comprises a local oscillator signal link circuit, a transconductance circuit, a switching circuit, a cascode circuit and a load circuit. The local oscillator signal link circuit provides two local oscillator signals for the switching stage circuit, wherein one local oscillator signal has a phase difference of 60 degrees relative to the other local oscillator signal. The transconductance stage circuit has two circuits and is used for converting a baseband voltage signal into a current signal. And the two switching stage circuits are used for up-converting the current signals from the two transconductance stage circuits into the required radio-frequency signals respectively. The number of the cascode stage circuits is two, and the cascode stage circuits respectively transmit the radio-frequency signals output by the two switching stage circuits to the load circuit. The load circuit realizes the addition of the output currents of the two cascode stage circuits. And the function of inhibiting third harmonic is realized through special phase difference design.
Furthermore, an active mixer is adopted in the switching stage circuit, the gain of the active mixer is equal to the product of transconductance of the transconductance stage and the load, and the product value is greater than 1.
Furthermore, the local oscillation signal link circuit comprises a delay module, a plurality of drivers, two frequency dividers, a plurality of capacitors and a plurality of resistors. Local oscillator input signal fLO(t) is divided into two paths; one path is called local oscillation signal f without changeLO(t), the other path of signals passes through a delay module to obtain a delayed local oscillator signal fLO(T-T/6), where T represents the local oscillator signal fLO(t) period. Local oscillator signal fLO(t) after signal enhancement by a driver, generating four paths of IQ orthogonal signals by a two-frequency divider, further enhancing the four paths of IQ orthogonal signals by four drivers respectively, then connecting the four paths of IQ orthogonal signals to four blocking capacitors respectively, wherein the output ends of the four blocking capacitors are four paths of orthogonal local oscillator signals LOip, LOIn, LOQp and LOQn respectively, and finally connecting the four paths of IQ orthogonal signals to a mixer module; the four resistors provide DC bias voltage to four paths of orthogonal local oscillator signals LOip, LOIn, LOQp and LOQn respectively. Delayed local oscillator signal fLO(T-T/6) after signal enhancement by a driver, generating four paths of IQ orthogonal signals by a two-frequency divider, further enhancing the four paths of IQ orthogonal signals by four drivers respectively, then connecting to four blocking capacitors respectively, and connecting to a mixer module, wherein output ends of the four blocking capacitors are four paths of orthogonal local oscillator signals LOQp _60, LOQn _60, LOIn _60 and LOIp _60 delayed by 60 degrees respectively; the four resistors provide dc bias voltages to four quadrature local oscillator signals LOQp _60, LOQn _60, LOIn _60 and LOIp _60 delayed by 60 degrees, respectively.
Further, the local oscillation signal fLO(t) Fourier expansion of
Delayed local oscillator signal fLO(T-T/6) Fourier expansion of
Wherein ω isLORepresenting the angular frequency of the local oscillator signal; the sum of the two offsets the third harmonic of the local oscillation signal.
Further, the transconductance stage circuit, the switching stage circuit and the cascode stage circuit are integrally formed by a mixer module composed of two IQ quadrature power mixers.
Further, the local oscillator signal LOIp is connected to the Ip terminal of the first mixer, and the local oscillator signal LOIp _60 is connected to the Ip terminal of the second mixer, where the phase difference between the input of the Ip terminal of the first mixer and the input of the Ip terminal of the second mixer is 60 degrees. The local oscillator signal LOIn is connected to the In end of the first mixer, the local oscillator signal LOIn _60 is connected to the In end of the second mixer, and the phase difference between the input of the In end of the first mixer and the input of the In end of the second mixer is 60 degrees. The local oscillator signal LOQp is connected to the Qp end of the first mixer, the local oscillator signal LOQp _60 is connected to the Qp end of the second mixer, and the phase difference between the Qp end input of the first mixer and the Qp end input of the second mixer is 60 degrees. The local oscillator signal LOQn is connected to the Qn end of the first mixer, the local oscillator signal LOQn _60 is connected to the Qn end of the second mixer, and the phase difference between the Qn end input of the first mixer and the Qn end input of the second mixer is 60 degrees.
Furthermore, each IQ quadrature power mixer is composed of an I-path mixer and a Q-path mixer; in the I-path mixer, a transconductance stage circuit comprises a pair of NMOS differential pair transistors which respectively convert an input differential baseband signal from a voltage domain to a current domain; the transconductance stage circuit outputs baseband signal current to enter a switching stage circuit, and the switching stage circuit comprises two groups of NMOS differential pair transistors; under the drive of four paths of orthogonal local oscillation signals, a geminate transistor in the switching stage circuit samples an input signal from the transconductance stage circuit to realize up-conversion; the radio-frequency signal output by the switching stage circuit enters a cascode stage circuit, the cascode stage circuit consists of two NMOS (N-channel metal oxide semiconductor) tubes, and the gate end of the cascode stage circuit is connected with direct-current bias voltage; the Q-path mixer and the I-path mixer have the same structure; I. the Q two-path frequency mixer connects the radio frequency current signals after up-conversion through the output ends of respective cascode circuits, so that the addition of the I-path signals and the Q-path signals in a current domain is realized.
Furthermore, a transistor in a switching stage circuit of one IQ quadrature power mixer is driven by four paths of quadrature local oscillation signals LOip, LOIn, LOQp and LOQn; the transistors in the switching stage circuit of the other IQ quadrature power mixer are driven by four quadrature local oscillator signals LOQp _60, LOQn _60, LOIn _60 and LOIP _60 delayed by 60 degrees; the output currents of the two IQ quadrature power mixers have a delay of 60 degrees in the time domain.
Further, the load circuit comprises an adjustable capacitor, a transformer and a load resistor; the current signal passes through a resonant frequency-selecting network formed by a transformer and an adjustable capacitor, and power is transmitted to a load resistor through the impedance transformation ratio of the transformer, so that signal output is realized.
Furthermore, the adjustable capacitor is a programmable capacitor array, and different frequency bands are covered by adjusting the programmable capacitor array.
The method has the advantages of good harmonic suppression effect, low design complexity, high efficiency and high linearity.
Drawings
Fig. 1 is a schematic diagram of a conventional direct upconversion transmitter.
FIG. 2 shows a conventional 8-phase local oscillator drive
Schematic diagram of a direct upconversion transmitter with 3 passive harmonic rejection mixers.
Fig. 3 is a schematic diagram of an overall structure of the power mixer capable of suppressing the third harmonic of the local oscillator according to the present application.
Fig. 4 is a schematic diagram of an overall structure of a power mixer capable of suppressing the third harmonic of the local oscillator according to the present application.
Fig. 5 is a schematic diagram of waveforms of the local oscillator signal and the delayed local oscillator signal.
Fig. 6 is a schematic diagram of frequency spectrums of local oscillator signals and delayed local oscillator signals.
Fig. 7 is a schematic circuit diagram of a single IQ quadrature power mixer.
Fig. 8 is a schematic diagram comparing the suppression effect of the third harmonic of the local oscillator signal of the present application with that of a conventional power mixer.
The reference numbers in the figures illustrate: the circuit comprises a local oscillation signal link circuit 1, a transconductance stage circuit 2, a switching stage circuit 3, a cascode stage circuit 4 and a load circuit 5.
Detailed Description
Referring to fig. 3, the power mixer capable of suppressing the third harmonic of the local oscillator provided by the present application includes a local oscillator signal link circuit 1, a transconductance stage circuit 2, a switching stage circuit 3, a cascode stage circuit 4, and a load circuit 5. The local oscillation signal link circuit 1 provides two local oscillation signals for the switching stage circuit 3, wherein one local oscillation signal has a phase difference of 60 degrees with respect to the other local oscillation signal. The local oscillator signal link circuit 1 input is the local oscillator input signal received from the frequency synthesizer. The transconductance stage circuit 2 has two circuits, and is used for converting a baseband voltage signal into a current signal. The number of the switching stage circuits 3 is two, and the two local oscillator signals are respectively used for up-converting the current signals from the two transconductance stage circuits 2 into the required radio frequency signals. The number of the cascode circuits 4 is two, and the cascode circuits respectively transmit the radio-frequency signals output by the two switching stage circuits to the load circuit, so that the reliability of the circuit is improved, and the circuit is prevented from being broken down; and improve the local oscillation suppression degree. The load circuit 5 adds the output currents of the two cascode stage circuits 4, so that third harmonic suppression of local oscillation signals is achieved, power is transmitted to an output load, and high-power output is achieved. The switching stage circuit 3 adopts an active mixer, the gain of the active mixer is equal to the product of transconductance of the transconductance stage and load, and the product value is greater than 1 in the design, namely, the amplification of the signal is realized.
Referring to fig. 4, the delay module B0, the drivers B1 and B6, the frequency dividers DT1 and DT2, the drivers B2 to B5 and B7 to B10, the capacitors C1 to C8, and the resistors R1 to R8 form the local oscillation signal link circuit 1. By two mixersThe mixer module formed by elements M1 and M2 forms a transconductance stage circuit 2, a switching stage circuit 3 and a cascode stage circuit 4. An adjustable capacitor C, a transformer T1 and a load resistor R behind the mixer moduleLA load circuit 5 is constituted.
Referring to fig. 4, in the local oscillator signal link circuit 1, a local oscillator input signal f with a 50% duty ratioLO(t) is divided into two paths. One path is called local oscillation signal f without changeLO(t), the other path of signals passes through a delay module B0 to obtain a delayed local oscillation signal fLO(T-T/6), where T represents the local oscillator signal fLO(t) period. Local oscillator signal fLO(t) Fourier expansion of
Delayed local oscillator signal fLO(T-T/6) Fourier expansion of
The expansion here omits higher harmonics of order 3 or more, where ωLORepresenting the angular frequency of the local oscillator signal. According to the Fourier expansion of the two signals, the sum of the two signals can offset the third harmonic of the local oscillation signal. Fig. 5 and fig. 6 are schematic diagrams of waveforms and frequency spectrums of the two signals, respectively. In FIG. 6, fLORepresenting the frequencies of the two signals, 3fLORepresenting the frequencies of the third harmonics of the two signals.
Local oscillator signal fLO(t) the signal is enhanced after passing through a driver B1, four paths of IQ orthogonal signals are generated after passing through a frequency divider DT1, the four paths of IQ orthogonal signals further enhance the driving capability through drivers B2 to B5 respectively, and then are connected to DC blocking capacitors C1 to C4 respectively, the output ends of the DC blocking capacitors C1 to C4 are four paths of orthogonal local oscillator signals LOip, LOIn, LOQp and LOQn respectively, and finally are connected to the mixer module. The coupling mode of the local oscillator signal link circuit 1 and the mixer module is alternating current coupling, and the direct current bias voltage LOvbias is respectively provided for four paths of orthogonal local oscillator signals LOip, LOIn, LOQp and LOQn through large resistors R1-R4.
Delayed local oscillator signal fLO(T-T/6) path and local oscillator signal fLO(t) ofThe vias are similar. Delayed local oscillator signal fLO(T-T/6) is subjected to signal enhancement by a driver B6, then is subjected to signal enhancement by a frequency divider DT2 to generate four paths of IQ orthogonal signals, the four paths of IQ orthogonal signals are respectively subjected to further enhanced driving capability by drivers B7 to B10, and then are respectively connected to DC blocking capacitors C5 to C8, the output ends of the DC blocking capacitors C5 to C8 are respectively four paths of orthogonal local oscillator signals LOQp _60, LOQn _60, LOIn _60 and LOIp _60 delayed by 60 degrees, and finally are connected to the mixer module. The large resistors R5 to R8 supply the dc bias voltage LOvbias to four quadrature local oscillator signals LOQp _60, LOQn _60, LOIn _60 and LOIp _60 delayed by 60 degrees, respectively. However, in the delayed signal path, after passing through the two-way frequency divider DT2, the delay value of the four-way IQ quadrature signal is fLO(T-T/12), i.e., the delay value becomes T/12. It is therefore necessary to exchange the phases of the four quadrature local oscillator signals LOQp _60, LOQn _60, LOIn _60 and LOIp _60 by f before entering the mixer moduleLO(t-T/12+T/4)＝fLO(T + T/6) so that the required T/6 delay signal can be realized. The phase switching is realized by changing the connection mode of the local oscillation signal link circuit 1 and the mixer module, and specifically comprises the following steps: the mixers M1 and M2 have the same structure and have four local oscillator inputs, and it can be seen from the above derivation that when the local oscillator signal LOIp output from the capacitor C1 is connected to the Ip terminal of the mixer M1 and the local oscillator signal LOIp _60 output from the capacitor C8 is connected to the Ip terminal of the mixer M2, the Ip terminal input of the mixer M1 and the Ip terminal input of the mixer M2 are 60 degrees out of phase. The reason why the output terminal of the capacitor C8 is selected as LOIp _60 is that the output terminal of the capacitor C8 should be identical to the output terminal of the capacitor C4, i.e., Qn, if no phase change is made. However, as can be derived from the foregoing, the capacitor C5 and the capacitor C8 have a delay of T/4, and the capacitor C8 is output as LOIp _60, so that a delay of-T/12 + T/4 to T/6 is realized. Similarly, the other three-terminal phase swapping is similar, as shown in FIG. 4.
The mixer module in fig. 4 consists of two IQ quadrature power mixers as power mixer units M1, M2, respectively. One advantage of the IQ quadrature power mixer is that it has good image rejection.
Referring to FIG. 7, the IQ quadrature power mixer M1 is composed of an I-path mixer and a Q-path mixerAnd (4) forming. For the I-mixer of the IQ quadrature power mixer M1, the NMOS differential pair transistors MI1 and MI2 of the transconductance stage circuit respectively transfer the input baseband signals BBIp and BBIn from the voltage domain to the current domain. To achieve efficiency and linearity, the transistors MI1 and MI2 in the transconductance stage are typically biased in a class AB state. The transconductance stage circuit outputs baseband signal current to the switching stage circuit, and the switching stage circuit is composed of two groups of NMOS differential pair transistors MI3 and MI4, and MI5 and MI 6. In general, the swing of the four quadrature local oscillator signals LOIp, LOIn, LOQp, and LOQn should be large enough to make the pair transistors in the switching stage circuit have good switching characteristics, so as to sample the input signal from the transconductance stage circuit, achieve the up-conversion effect, and reduce the influence of the switching stage circuit on the linearity and noise of the circuit. The full-differential circuit structure can improve the suppression degree of the frequency mixer, namely, the leakage from the local oscillator to the radio frequency end and the leakage from the local oscillator to the baseband input end are reduced. And the radio-frequency signal output by the switching stage circuit enters the cascode stage circuit. The cascode stage circuit consists of an NMOS transistor MC1 and an NMOS transistor MC2, and the gate end of the cascode stage circuit is connected with a direct current bias voltage Vcas to improve the reliability of the circuit. The conventional power supply voltage is 1.8V, and in order to improve the speed response of the circuit, the transconductance stage circuit and the switching stage circuit adopt transistors with the highest withstand voltage of 1.2V, so that an NMOS (N-channel metal oxide semiconductor) tube capable of bearing 1.8V in the cascode stage circuit needs to be added to share the voltage drop. Because the power mixer has the characteristic of a linear power amplifier, namely the drain voltages of the NMOS tube MC1 and the NMOS tube MC2 can reach 2 times of the power supply voltage 3.6V at most under the ideal condition, the possibility that transistors in the transconductance stage circuit and the switching stage circuit are broken down is reduced by adding the cascode stage circuit, and meanwhile, the leakage of a local oscillation signal to a radio frequency output end is reduced, namely, the isolation degree of the circuit is improved. The Q-branch mixer in the IQ-quadrature mixer M1 is the same as the I-branch mixer, and the NMOS transistors MQ1 to MQ6, MC3, and MC4 in the Q-branch mixer have the same functions as the NMOS transistors MI1 to MI6, MC1, and MC2 in the I-branch mixer, respectively. I. The Q two-path mixer connects the radio frequency current signals after up-conversion through the output ends (drains) of the MC1, the MC2, the MC3 and the MC4, so that the addition of signals of the I path and the Q path in a current domain is realized, and image signals are restrained. After IQ synthesisThe current signal of the load stage passes through a transformer T1 and a programmable capacitor array C of the load stage to form a resonant frequency-selecting network, and the power of a primary coil of a transformer T1 is transferred to a load resistor R of a secondary coil through a proper impedance transformation ratio of a transformer T1LTherefore, high-power signal output is realized. The sub-1GHz (lower than 1GHz) frequency band can be covered by adjusting the programmable capacitor array C, and the programmable capacitor array C can be used in wireless communication systems such as 2G, LTE (long term evolution technology), NB-IoT (narrowband Internet of things), LoRa (long distance Wide area network) and the like. By changing the load, for example, adjusting the value of an inductor or a capacitor, or using a resistive load, the method can also be applied to sub-6GHz (lower than 6GHz) frequency bands.
The structure of the IQ quadrature power mixer M2 is the same as the IQ quadrature power mixer M1, the only difference being the signal. The transistors in the switching stage circuit of the IQ quadrature power mixer M2 are driven by four quadrature local oscillator signals LOQp _60, LOQn _60, LOIn _60, and LOIp _60 delayed by 60 degrees. Finally, the output currents of the IQ quadrature power mixers M1 and M2 have 60-degree delay in the time domain, that is, the current frequency spectrums are consistent with the frequency spectrum of the local oscillation signal, the amplitude values at the local oscillation signal third harmonic are equal but the phase difference is 180 degrees, and the suppression of the local oscillation signal third harmonic is realized by adding the currents of the two, that is, the 1:1 harmonic suppression power mixer is adopted.
Referring to fig. 8, the solid line corresponds to the left vertical axis, and the dashed line corresponds to the right vertical axis. Under the condition of sub-1GHz frequency band and same output power, compared with a mixer without a harmonic suppression function (a lower solid line), the harmonic suppression power mixer (an upper solid line) can improve the third harmonic suppression effect of a local oscillation signal by 25.35dB to 34.59dB, and effectively improves the linearity of the power mixer. Meanwhile, in the frequency band, the efficiency value of the harmonic suppression power mixer can reach 7.71-10.78%, which is relatively high for the circuit in front of the power amplifier, and the harmonic suppression power mixer has good efficiency.
Compared with the prior art, the power mixer capable of suppressing the third harmonic of the local oscillator has the following beneficial effects.
First, the combination of the Gilbert mixer and the pre-power amplifier eliminates the pre-power amplifier. The load of the pre-power amplifier generally consists of a transformer and a capacitor array, so that only one transformer T1 is needed, the layout area is reduced, and the cost is reduced.
Secondly, the harmonic suppression circuit has a good harmonic suppression function, can suppress the third harmonic of the local oscillation signal, can be used as a driving stage in communication systems such as LTE and 5G, provides good linearity for subsequent circuits, and reduces the influence on other frequency bands. The suppression of the third harmonic in the sub-1GHz bandwidth can reach 49.2dB to 59.3dB, and is improved by 25dB to 34.6dB compared with a mixer without harmonic suppression. Meanwhile, the linearity of the output signal is effectively improved through harmonic suppression.
Third, only two identical power mixer units are required and do not need to be done
And the method can realize harmonic suppression, has high reuse rate and simplifies the circuit design.
Fourthly, only a two-frequency divider and no four-frequency divider are needed in the local oscillation signal link circuit, and the design difficulty is reduced. Meanwhile, a local oscillation signal link circuit does not need a 25% duty ratio generating circuit, and design is further simplified.
The low-cost harmonic suppression power mixer is simple in structure and capable of suppressing the third harmonic of the local oscillation signal, and harmonic suppression and signal amplification can be achieved only by using a simple frequency divider and two power mixer units.
The above are merely preferred embodiments of the present application and are not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (10)
1. A power mixer capable of suppressing third harmonic of a local oscillator is characterized by comprising a local oscillator signal link circuit, a transconductance circuit, a switching circuit, a cascode circuit and a load circuit;
the local oscillator signal link circuit provides two local oscillator signals for the switching stage circuit, wherein one local oscillator signal link circuit has a phase difference of 60 degrees relative to the other local oscillator signal link circuit;
the transconductance stage circuits are used for converting baseband voltage signals into current signals;
the two switching stage circuits are used for up-converting the current signals from the two transconductance stage circuits into required radio frequency signals by respectively using the two local oscillator signals;
the number of the cascode stage circuits is two, and the cascode stage circuits respectively transmit radio-frequency signals output by the two switching stage circuits to the load circuit;
the load circuit realizes the addition of the output currents of the two cascode stage circuits.
2. The power mixer of claim 1, wherein the switching stage circuit comprises an active mixer having a gain equal to a product of transconductance and a load of the transconductance stage, the product being greater than 1.
3. The power mixer of claim 1, wherein the local oscillator signal link circuit comprises a delay module, a plurality of drivers, two dividers, a plurality of capacitors, and a plurality of resistors;
local oscillator input signal fLO(t) is divided into two paths; one path is called local oscillation signal f without changeLO(t), the other path of signals passes through a delay module to obtain a delayed local oscillator signal fLO(T-T/6), where T represents the local oscillator signal fLO(t) period;
local oscillator signal fLO(t) after signal enhancement by a driver, generating four paths of IQ orthogonal signals by a two-frequency divider, further enhancing the four paths of IQ orthogonal signals by four drivers respectively, then connecting the four paths of IQ orthogonal signals to four blocking capacitors respectively, wherein the output ends of the four blocking capacitors are four paths of orthogonal local oscillator signals LOip, LOIn, LOQp and LOQn respectively, and finally connecting the four paths of IQ orthogonal signals to a mixer module; four resistors respectively provide direct current bias voltage to four paths of orthogonal local oscillatorsSignals LOIp, LOIn, LOQp, and LOQn;
delayed local oscillator signal fLO(T-T/6) after signal enhancement by a driver, generating four paths of IQ orthogonal signals by a two-frequency divider, further enhancing the four paths of IQ orthogonal signals by four drivers respectively, then connecting to four blocking capacitors respectively, and connecting to a mixer module, wherein output ends of the four blocking capacitors are four paths of orthogonal local oscillator signals LOQp _60, LOQn _60, LOIn _60 and LOIp _60 delayed by 60 degrees respectively; the four resistors provide dc bias voltages to four quadrature local oscillator signals LOQp _60, LOQn _60, LOIn _60 and LOIp _60 delayed by 60 degrees, respectively.
4. The power mixer of claim 3, wherein the local oscillator signal f is a local oscillator signalLO(t) Fourier expansion of
Delayed local oscillator signal fLO(T-T/6) Fourier expansion of
Wherein ω isLORepresenting the angular frequency of the local oscillator signal; the sum of the two offsets the third harmonic of the local oscillation signal.
5. The power mixer of claim 1, wherein the transconductance stage, the switching stage, and the cascode stage are formed integrally with a mixer module comprising two IQ quadrature power mixers.
6. The power mixer of claim 5, wherein the lo signal LOIp is coupled to the Ip terminal of the first mixer, and the lo signal LOIp _60 is coupled to the Ip terminal of the second mixer, wherein the Ip terminal input of the first mixer and the Ip terminal input of the second mixer are 60 degrees out of phase;
the local oscillator signal LOIn is connected to the In end of the first frequency mixer, the local oscillator signal LOIn _60 is connected to the In end of the second frequency mixer, and the phase difference between the input of the In end of the first frequency mixer and the input of the In end of the second frequency mixer is 60 degrees;
the local oscillator signal LOQp is connected to the Qp end of the first frequency mixer, the local oscillator signal LOQn _60 is connected to the Qp end of the second frequency mixer, and the phase difference between the Qp end input of the first frequency mixer and the Qp end input of the second frequency mixer is 60 degrees;
the local oscillator signal LOQn is connected to the Qn end of the first mixer, the local oscillator signal LOQn _60 is connected to the Qn end of the second mixer, and the phase difference between the Qn end input of the first mixer and the Qn end input of the second mixer is 60 degrees.
7. The power mixer capable of suppressing local oscillator third harmonics according to claim 5, wherein each IQ quadrature power mixer is further comprised of an I-path mixer and a Q-path mixer; in the I-path mixer, a transconductance stage circuit comprises a pair of NMOS differential pair transistors which respectively convert an input differential baseband signal from a voltage domain to a current domain; the transconductance stage circuit outputs baseband signal current to enter a switching stage circuit, and the switching stage circuit comprises two groups of NMOS differential pair transistors; under the drive of four paths of orthogonal local oscillation signals, a geminate transistor in the switching stage circuit samples an input signal from the transconductance stage circuit to realize up-conversion; the radio-frequency signal output by the switching stage circuit enters a cascode stage circuit, the cascode stage circuit consists of two NMOS (N-channel metal oxide semiconductor) tubes, and the gate end of the cascode stage circuit is connected with direct-current bias voltage; the Q-path mixer and the I-path mixer have the same structure; I. the Q two-path frequency mixer connects the radio frequency current signals after up-conversion through the output ends of respective cascode circuits, so that the addition of the I-path signals and the Q-path signals in a current domain is realized.
8. The power mixer of claim 5, wherein the transistors in the switching stage of an IQ quadrature power mixer are driven by four quadrature local oscillator signals LOip, LOIn, LOQp and LOQn; the transistors in the switching stage circuit of the other IQ quadrature power mixer are driven by four quadrature local oscillator signals LOQp _60, LOQn _60, LOIn _60 and LOIP _60 delayed by 60 degrees; the output currents of the two IQ quadrature power mixers have a delay of 60 degrees in the time domain.
9. The power mixer of claim 1, wherein the load circuit comprises an adjustable capacitor, a transformer and a load resistor; the current signal passes through a resonant frequency-selecting network formed by a transformer and an adjustable capacitor, and power is transmitted to a load resistor through the impedance transformation ratio of the transformer, so that signal output is realized.
10. The power mixer of claim 7, wherein the tunable capacitor is a programmable capacitor array that is tuned to cover different frequency bands.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114421990A (en) * | 2021-12-29 | 2022-04-29 | 北京时代民芯科技有限公司 | Quadrature demodulator chip |
| CN114491395A (en) * | 2022-01-04 | 2022-05-13 | 电子科技大学 | Current domain system design applied to analog front-end signal processing based on FFT algorithm |
| CN114584076A (en) * | 2022-03-03 | 2022-06-03 | 北京大学 | Correction method for suppressing harmonic waves of passive upper frequency mixer of transmitter |
| CN114785287A (en) * | 2022-06-17 | 2022-07-22 | 成都旋极星源信息技术有限公司 | Transmitter circuit and electronic equipment |
| WO2022247410A1 (en) * | 2021-05-28 | 2022-12-01 | 深圳市中兴微电子技术有限公司 | Frequency mixer and transceiver |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022247410A1 (en) * | 2021-05-28 | 2022-12-01 | 深圳市中兴微电子技术有限公司 | Frequency mixer and transceiver |
| CN114421990A (en) * | 2021-12-29 | 2022-04-29 | 北京时代民芯科技有限公司 | Quadrature demodulator chip |
| CN114491395A (en) * | 2022-01-04 | 2022-05-13 | 电子科技大学 | Current domain system design applied to analog front-end signal processing based on FFT algorithm |
| CN114584076A (en) * | 2022-03-03 | 2022-06-03 | 北京大学 | Correction method for suppressing harmonic waves of passive upper frequency mixer of transmitter |
| CN114584076B (en) * | 2022-03-03 | 2024-04-16 | 北京大学 | Correction method for restraining harmonic waves of passive up-mixer of transmitter |
| CN114785287A (en) * | 2022-06-17 | 2022-07-22 | 成都旋极星源信息技术有限公司 | Transmitter circuit and electronic equipment |
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