CN115629371A - Transmission delay control method, device, controller, chip and ultrasonic system - Google Patents
Transmission delay control method, device, controller, chip and ultrasonic system Download PDFInfo
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Abstract
The application relates to a method, a device, a controller, a chip and an ultrasonic system for controlling emission delay, wherein the method comprises the following steps: receiving waveform transmitting information, and acquiring waveform control parameters corresponding to the channel and channel delay information corresponding to the channel based on the waveform transmitting information; the channel delay information comprises a channel target delay value, a coarse delay value and a fine delay value; the system comprises a rough delay value, a fine delay value, a channel target delay value and a channel target delay value, wherein the rough delay value and the fine delay value are obtained by quantizing the channel target delay value according to a transmitting clock frequency corresponding to an ultrasonic system and a bit width value of parallel-serial conversion input data; carrying out time delay operation on the waveform control parameter by adopting a coarse time delay value to obtain a waveform control parameter after coarse time delay; based on the width value and the fine delay value of the parallel-serial conversion input data bit, carrying out delay operation on the waveform control parameter after the coarse delay, and outputting the waveform control parameter after the fine delay; the waveform control parameters after the fine delay are used for indicating the waveform conversion device to generate corresponding transmitting waveforms.
Description
Technical Field
The present application relates to the field of ultrasound technologies, and in particular, to a method, an apparatus, a controller, a chip, and an ultrasound system for controlling emission delay.
Background
In order to improve the signal-to-noise ratio of the echo signal of the ultrasonic system, technicians often change the emission scanning focusing angle of the ultrasonic wave beam by setting an emission delay module for each emission channel of the ultrasonic system, thereby improving the detection sensitivity of the ultrasonic system. In addition, since the resolution of the delay value is directly related to the resolution of the transmit scan focal angle of the ultrasound system, the resolution of the delay value is high or low, which directly affects the overall performance of the ultrasound system.
Conventional techniques generally increase the transmit delay resolution of an ultrasound system by increasing the clock frequency of the ultrasound transmit system, i.e., by changing the minimum time interval between transmit waveforms of each channel of the ultrasound system. However, when the transmission delay resolution of the ultrasound system is improved by using this method, timing problems often occur in the internal circuit of the FPGA, and thus the technical difficulty in designing and developing the internal circuit of the FPGA is increased.
Disclosure of Invention
In view of the above, it is necessary to provide a transmission delay control method, device, controller, chip and ultrasound system for solving the above technical problems.
In a first aspect, the present application provides a transmission delay control method, applied to a controller in an ultrasound system, the method including:
receiving waveform transmitting information, and acquiring waveform control parameters corresponding to the channel and channel delay information corresponding to the channel based on the waveform transmitting information; the channel delay information comprises a channel target delay value, a coarse delay value and a fine delay value; the coarse delay value and the fine delay value are obtained by quantizing the channel target delay value according to the corresponding transmitting clock frequency of the ultrasonic system and the bit width value of parallel-serial conversion input data;
carrying out time delay operation on the waveform control parameter by adopting the coarse time delay value to obtain a waveform control parameter after coarse time delay;
delaying the waveform control parameter after the coarse delay based on the parallel-serial conversion input data bit width value and the fine delay value, and outputting the waveform control parameter after the fine delay; and the waveform control parameters after the fine delay are used for indicating the waveform conversion device to generate corresponding transmitting waveforms.
In one embodiment, the coarse delay value comprises a number of transmit clock cycles; the number of transmit clock cycles is determined based on the transmit clock frequency; the step of performing delay operation on the waveform control parameter by using the coarse delay value to obtain the waveform control parameter after coarse delay includes:
writing the waveform control parameters into an asynchronous data memory, and starting a clock cycle counter corresponding to the asynchronous data memory; the clock cycle counter operates at the transmit clock frequency;
and when the count value of the clock period counter reaches the emission clock period number, determining the waveform control parameter read from the asynchronous data memory as the waveform control parameter after the coarse delay.
In one embodiment, the delay value comprises a number of delay precision values; the step of performing a delay operation on the waveform control parameter after the coarse delay and outputting the waveform control parameter after the fine delay based on the parallel-to-serial conversion input data bit width value and the fine delay value includes:
based on the bit width value of the parallel-serial conversion input data, performing bit width broadening on the waveform control parameter after the coarse delay to obtain a waveform control parameter after the bit width broadening;
based on the number of the delay precision values, splicing adjacent parameters in the waveform control parameters with the broadened bit width to obtain spliced waveform control parameters;
and performing parallel-serial conversion on the waveform control parameters after splicing processing to obtain the waveform control parameters after parallel-serial conversion, and determining the waveform control parameters after parallel-serial conversion as the waveform control parameters after fine time delay.
In one embodiment, the parallel-to-serial conversion input data bit width value is determined based on a required delay resolution of the ultrasound system; the method further comprises the following steps:
and according to the product of the width value of the parallel-serial conversion input data bit and the frequency of the transmitting clock, carrying out integer quantization on the channel target delay value to respectively obtain the coarse delay value and the fine delay value.
In one embodiment, the parallel to serial converted input data bit width value comprises an OSERDES input data bit width value;
in the step of performing integer quantization on the channel target delay value according to the product of the bit width value of the parallel-to-serial conversion input data and the frequency of the transmission clock to obtain the coarse delay value and the fine delay value, the channel target delay value is subjected to integer quantization by using the following formula:
wherein, T d For the channel target delay value, F is the width value of the parallel-serial conversion input data bit, M is the number of transmission clock cycles in the coarse delay value, K is the number of delay precision values in the fine delay value, F t Is the transmit clock frequency.
In a second aspect, the present application further provides a transmission delay control apparatus applied to a controller in an ultrasound system, the apparatus including:
the data receiving module is used for receiving waveform transmitting information, and acquiring waveform control parameters corresponding to the channel and channel delay information corresponding to the channel based on the waveform transmitting information; the channel delay information comprises a channel target delay value, a coarse delay value and a fine delay value; the coarse delay value and the fine delay value are obtained by quantizing the channel target delay value according to the corresponding transmitting clock frequency of the ultrasonic system and the bit width value of parallel-serial conversion input data;
the coarse delay module is used for performing delay operation on the waveform control parameter by adopting the coarse delay value to obtain a waveform control parameter after coarse delay;
the fine delay module is used for carrying out delay operation on the waveform control parameter after the coarse delay and outputting the waveform control parameter after the fine delay based on the parallel-serial conversion input data bit width value and the fine delay value; and the waveform control parameters after the fine delay are used for indicating the waveform conversion device to generate corresponding transmitting waveforms.
In a third aspect, the present application further provides a controller for use in an ultrasound system; the ultrasonic system comprises a waveform conversion device connected with the controller;
the controller comprises a data receiving device and a delay device which are connected in sequence; the delay device comprises a coarse delay unit and a fine delay unit which are connected in sequence; the input end of the coarse delay unit and the input end of the fine delay unit are connected to the data receiving device, and the output end of the fine delay unit is used for connecting the waveform conversion device;
the data receiving device is used for receiving waveform transmitting information, and acquiring waveform control parameters corresponding to the channel and channel delay information corresponding to the channel based on the waveform transmitting information; the channel delay information comprises a channel target delay value, a coarse delay value and a fine delay value; the coarse delay value and the fine delay value are obtained by quantizing the channel target delay value according to the corresponding transmitting clock frequency of the ultrasonic system and the bit width value of parallel-serial conversion input data;
the coarse delay unit is used for performing delay operation on the waveform control parameter by adopting the coarse delay value to obtain a waveform control parameter after coarse delay;
the fine delay unit is used for performing delay operation on the waveform control parameter after the coarse delay based on the parallel-serial conversion input data bit width value and the fine delay value, and outputting the waveform control parameter after the fine delay; and the waveform control parameters after the fine delay are used for indicating the waveform conversion device to generate corresponding transmitting waveforms.
In a fourth aspect, the present application further provides a chip including the controller.
In one embodiment, the chip is an FPGA chip.
In a fifth aspect, the present application further provides an ultrasound system, which is characterized by comprising a waveform conversion device, and the chip; the output end of the chip is used for being connected with the waveform conversion device; the waveform conversion device comprises a pulse waveform conversion unit and a transmitting waveform conversion unit which are connected in sequence;
the pulse waveform conversion unit is used for converting the received waveform control parameters after the fine delay according to a pulse waveform mapping rule and outputting a high-voltage pulse waveform;
and the transmitting waveform conversion unit is used for performing sound-electricity conversion processing on the received high-voltage pulse waveform and outputting the transmitting waveform.
In one embodiment, the pulse waveform conversion unit is specifically configured to:
generating a high-voltage pulse waveform mapping instruction of a corresponding type based on a logic value corresponding to the received waveform control parameter after the fine delay; and obtaining the high-voltage pulse waveform according to the high-voltage pulse waveform mapping instruction of the corresponding type, and outputting the high-voltage pulse waveform.
In a sixth aspect, the present application further provides a computer-readable storage medium. The computer-readable storage medium has stored thereon a computer program which, when being executed by a processor, carries out the steps of the above-mentioned method.
According to the emission delay control method, the emission delay control device, the controller, the chip and the ultrasonic system, firstly, waveform emission information is received, and waveform control parameters corresponding to the channel and channel delay information corresponding to the channel are obtained based on the waveform emission information. And then, delaying the waveform control parameter by adopting a coarse delay value to obtain the waveform control parameter after coarse delay. And then, based on the width value and the fine delay value of the parallel-serial conversion input data bit, delaying the waveform control parameter after the coarse delay, and outputting the waveform control parameter after the fine delay. According to the method and the device, the delay resolution ratio of the ultrasonic system is effectively improved by combining the coarse delay operation and the fine delay operation on the premise of not changing the clock frequency of the ultrasonic transmitting system, so that the time sequence problem of an internal circuit of the FPGA is successfully avoided, and the technical difficulty of designing and developing the internal circuit of the FPGA is effectively reduced.
Drawings
FIG. 1 is a flow chart illustrating a method for controlling transmission delay according to an embodiment;
FIG. 2 is a schematic flow chart illustrating a specific manner of obtaining the waveform control parameter after the coarse delay in one embodiment;
FIG. 3 is a schematic flow chart illustrating a specific manner of obtaining fine-delayed waveform control parameters according to an embodiment;
FIG. 4 is a block diagram of a transmission delay control apparatus according to an embodiment;
FIG. 5 is a diagram illustrating an application architecture of any transmit channel (excluding the transmit waveform conversion unit) in the ultrasound system in one embodiment;
FIG. 6 is a schematic diagram illustrating an operation flow of obtaining fine-delayed waveform control parameters according to an embodiment;
figure 7 is an architectural approach to the application of multiple transmit channels (excluding the transmit waveform conversion unit) in an ultrasound system in one embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of and not restrictive on the broad application.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
It is to be understood that "connection" in the following embodiments is to be understood as "electrical connection", "communication connection", and the like if the connected circuits, modules, units, and the like have communication of electrical signals or data with each other.
As used herein, the singular forms "a", "an" and "the" may include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises/comprising," "includes" or "including," etc., specify the presence of stated features, integers, steps, operations, components, parts, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof. Also, as used in this specification, the term "and/or" includes any and all combinations of the associated listed items.
The transmission delay control method provided by the embodiment of the application can be applied to a server to execute. The data storage system can store data to be processed by the server; the data storage system can be integrated on a server, and can also be placed on a cloud or other network servers; the server may be implemented as a stand-alone server or as a server cluster consisting of a plurality of servers.
In one embodiment, as shown in fig. 1, there is provided a transmission delay control method applied to a controller in an ultrasound system, including the steps of:
step S110, receiving waveform emission information, and acquiring waveform control parameters corresponding to the channel and channel delay information corresponding to the channel based on the waveform emission information; the channel delay information comprises a channel target delay value, a coarse delay value and a fine delay value; the coarse delay value and the fine delay value are obtained by quantizing a channel target delay value according to the corresponding transmitting clock frequency of the ultrasonic system and the bit width value of the parallel-serial conversion input data.
In this step, the channel refers to any transmitting channel in the ultrasonic system; based on the channel delay information corresponding to the channel, corresponding delay processing can be performed on the waveform control parameter corresponding to the channel.
Specifically, the specific implementation manner of obtaining the waveform control parameter corresponding to the channel and the channel delay information corresponding to the channel based on the waveform transmission information may be that the waveform control parameter and the channel delay information corresponding to each of a plurality of transmission channels of the ultrasound system are generated based on the received waveform transmission information, and the waveform control parameter and the channel delay information corresponding to the channel are obtained from the waveform control parameter and the channel delay information corresponding to each of the plurality of transmission channels; the specific way of obtaining the coarse delay value and the fine delay value may be to quantize a local channel target delay value obtained based on channel delay information corresponding to the local channel according to a transmission clock frequency corresponding to the ultrasound system and a parallel-serial conversion input data bit width value, and further quantize the local channel target delay value into two parts, namely the coarse delay value and the fine delay value.
And step S120, delaying the waveform control parameter by using the coarse delay value to obtain the waveform control parameter after coarse delay.
In this step, the waveform control parameter after the coarse delay refers to a waveform control parameter after the coarse delay obtained by performing the coarse delay operation on the waveform control parameter by using the coarse delay value.
Step S130, based on the width value and the fine delay value of the parallel-serial conversion input data bit, the waveform control parameter after the coarse delay is delayed, and the waveform control parameter after the fine delay is output; the waveform control parameters after the fine delay are used for indicating the waveform conversion device to generate corresponding transmitting waveforms.
In this step, the width value of the parallel-to-serial conversion input data bit may be determined based on the actual requirement of the ultrasound system for the transmission angle resolution (i.e., the delay resolution); the waveform control parameter after fine delay refers to a waveform control parameter after fine delay obtained by performing fine delay operation on the waveform control parameter after coarse delay based on a parallel-to-serial conversion input data bit width value and a fine delay value.
Specifically, the specific implementation manner of indicating the waveform conversion device to generate the corresponding transmit waveform by using the waveform control parameter after the fine delay may be that the waveform control parameter after the fine delay is input to the waveform conversion device to perform mapping processing and acousto-electric conversion processing, so that the waveform conversion device generates the corresponding transmit waveform.
Further, in practical applications, the waveform conversion apparatus may be composed of a pulse generator (i.e., a pulser pulse output chip) having a function of mapping the waveform control parameter, and an ultrasonic probe (i.e., a probe) having an acousto-electric conversion function, or may be another waveform conversion apparatus having a function of converting the waveform control parameter into a corresponding transmission waveform, where a specific model of the waveform conversion apparatus is not strictly limited.
The transmission delay control method comprises the steps of receiving waveform transmission information, and acquiring waveform control parameters corresponding to a channel and channel delay information corresponding to the channel based on the waveform transmission information. And then, delaying the waveform control parameter by adopting a coarse delay value to obtain the waveform control parameter after coarse delay. And then, based on the width value and the fine delay value of the parallel-serial conversion input data bit, delaying the waveform control parameter after the coarse delay, and outputting the waveform control parameter after the fine delay. According to the method and the device, the delay resolution of the ultrasonic system is effectively improved by combining the coarse delay operation and the fine delay operation on the premise of not changing the clock frequency of the ultrasonic transmitting system, so that the time sequence problem of an internal circuit of the FPGA is successfully avoided, and the technical difficulty in designing and developing the internal circuit of the FPGA is effectively reduced.
In one embodiment, said coarse delay value comprises a number of transmit clock cycles; the number of the transmission clock cycles is determined based on the frequency of the transmission clock; as to a specific manner of obtaining the waveform control parameter after the coarse delay, as shown in fig. 2, the step S120 specifically includes:
step S210, writing the waveform control parameter into an asynchronous data memory, and starting a clock cycle counter corresponding to the asynchronous data memory; the clock cycle counter operates at the transmit clock frequency.
In this step, the asynchronous data memory is a FIFO (First-In First-Out) asynchronous data memory; the transmission clock frequency refers to the transmission clock frequency of the ultrasonic system; the clock period counter refers to a clock period counter corresponding to a FIFO (First-In First-Out) asynchronous data memory, and works under the emission clock frequency of the ultrasonic system.
Step S220, when the count value of the clock cycle counter reaches the number of the transmission clock cycles, determining the waveform control parameter read from the asynchronous data memory as the waveform control parameter after the coarse delay.
In this step, the asynchronous data memory is a FIFO (First-In First-Out) asynchronous data memory; the number of transmission clock cycles refers to the number of transmission clock cycles corresponding to the coarse delay value.
In the embodiment, the clock cycle counter working at the transmitting clock frequency of the ultrasonic system is adopted to control the time for reading the waveform control parameter from the asynchronous data memory, so that the coarse delay processing for the waveform control parameter is realized, and a foundation is laid for improving the delay resolution of the ultrasonic system on the premise of not changing the clock frequency of the ultrasonic transmitting system.
In one embodiment, said fine delay value comprises a number of delay fine values; as to a specific manner of obtaining the waveform control parameter after the fine delay, as shown in fig. 3, the step S130 specifically includes:
and step S310, based on the bit width value of the parallel-serial conversion input data, performing bit width broadening on the waveform control parameter after the coarse delay to obtain the waveform control parameter after the bit width broadening.
In this step, the width value of the parallel-to-serial conversion input data bit may be determined based on the actual requirement of the ultrasound system for the transmission angle resolution (i.e., the delay resolution); the waveform control parameter with the widened bit width may be the waveform control parameter with the widened bit width obtained by performing bit width widening processing on the waveform control parameter with the coarse delay, and performing multiple widening corresponding to the bit width value of the parallel-serial conversion input data on the bit width value corresponding to the waveform control parameter with the coarse delay to obtain the waveform control parameter with the widened bit width.
Exemplarily, assuming that a bit width value of parallel-to-serial conversion input data of a known ultrasound system is F, bit width widening is performed on the waveform control parameter after the coarse delay, which means that a bit width value of a bit width corresponding to the waveform control parameter after the coarse delay is widened to be F bit, and then the waveform control parameter after the bit width widening is obtained.
And step S320, splicing adjacent parameters in the waveform control parameters after the bit width expansion based on the number of the delay precision values to obtain the waveform control parameters after splicing.
In this step, the number of delay accuracy values refers to the number of delay accuracy values corresponding to the fine delay value; the waveform control parameter after the splicing processing refers to the waveform control parameter after the splicing processing, which is obtained by performing the splicing processing on the adjacent parameters in the waveform control parameter after the bit width is widened, and delaying the bit value digits corresponding to the waveform control parameter after the bit width is widened backward by the digits equal to the number of the delay precision values based on the number of the delay precision values.
For example, assuming that the target delay values of the above channels are known to be quantized, the delay precision value is 1/(F × F) t ) And if the number of the delay precision values is K, splicing the adjacent parameters in the waveform control parameter with the broadened bit width based on the number K of the delay precision values, and delaying the bit value number corresponding to the waveform control parameter with the broadened bit width backward by K bit as a whole to obtain the spliced waveform control parameter.
Step S330, performing parallel-to-serial conversion on the spliced waveform control parameters to obtain parallel-to-serial converted waveform control parameters, and determining the parallel-to-serial converted waveform control parameters as the waveform control parameters after the precise time delay.
In this step, the waveform control parameter after parallel-to-serial conversion refers to a waveform control parameter after parallel-to-serial conversion obtained by performing parallel-to-serial conversion on the waveform control parameter after splicing processing; the waveform control parameter after the fine delay refers to a waveform control parameter after the fine delay determined based on the waveform control parameter after the parallel-serial conversion.
Specifically, in practical applications, a specific object of performing parallel-to-serial conversion on the waveform control parameter after splicing processing may be a parallel-to-serial conversion module OSERDES having a function of converting a parallel signal into a high-speed serial signal, and in a case where a single-ended double-edge output control pin is used, a data rate of serial output of the parallel-to-serial conversion module OSERDES may be set to be 2, 3, 4, 6, 8, 10, and 14 times of a clock frequency of an input end by setting a bit width of input data of the module to be 2, 3, 4, 6, 8, 10, and 14.
Further, assuming that the width of the parallel-to-serial converted input data bit of the known ultrasound system is F, the transmission clock frequency of the ultrasound system is F t The fine delay value is K/(F F) t ) The delay precision value is 1/(Ff) t ) If the number of the delay precision values is K, the waveform control parameters after the coarse delay are delayed backwards by performing bit width widening, splicing processing and parallel-serial conversion processing on the waveform control parameters after the coarse delay in sequence, so that the waveform control parameters after the coarse delay are integrally delayed backwards by K/(F) t ) The fine delay effect. In practical applications, if the delay operation mode combining the coarse delay processing and the fine delay processing is applied to multiple transmit channels in an ultrasound system, the delay resolution of 1/(ff) can be achieved t ) The multi-channel waveform transmission delay operation.
With reference to the foregoing steps S310 to S330, as shown in fig. 6, a specific manner of obtaining the waveform control parameter after the fine delay is generally described as follows:
first, assuming that the waveform control parameters after the coarse delay are known as IN _ B, IN _ A _1 and IN _ A _0, the width of the parallel-to-serial conversion input data bit of the ultrasound system is F, and the transmission clock frequency of the ultrasound system is F t And the fine delay value is K/(F F) t ) The delay precision value is 1/(Ff) t ) The number of delay accuracy values is K.
Then, based on the width value F of the parallel-serial conversion input data bit of the ultrasonic system, the data bit width of the waveform control parameters IN _ B, IN _ a _1 and IN _ a _0 after the coarse delay is respectively widened to F bits, and the waveform control parameters IN _ B, IN _ a _1 and IN _ a _0 after the bit width widening are obtained.
Then, based on the number K of the delay precision values, the waveform control parameters IN _ B, IN _ a _1, and IN _ a _0 with the widened bit width are respectively spliced with adjacent data to obtain the spliced waveform control parameters IN _ B, IN _ a _1, and IN _ a _0 (i.e., bit values corresponding to the waveform control parameters IN _ B, IN _ a _1, and IN _ a _0 with the widened bit width are delayed by K bits backward as a whole).
Then, the waveform control parameters IN _ B, IN _ A _1 and IN _ A _0 after splicing processing are input to the OSERDES, and performing parallel-serial conversion to obtain parallel-serial converted waveform control parameters IN _ B, IN _ A _1 and IN _ A _0 (parallel-serial converted waveform control parameters IN _ B, IN _ A _1 and IN _ A _ 0), so as to realize overall backward delay of the waveform control parameters after coarse delay by K/(F F) t ) So that the waveform control parameters IN _ B, IN _ a _1 and IN _ a _0 after the parallel-to-serial conversion are the waveform control parameters after the fine delay).
In the embodiment, the waveform control parameter after the coarse delay is subjected to bit width widening, splicing processing and parallel-serial conversion, and further fine delay processing is performed on the waveform control parameter after the coarse delay, so that the delay resolution of the ultrasonic system is effectively improved on the premise of not changing the clock frequency of the ultrasonic transmitting system, and the time sequence problem of an FPGA internal circuit is successfully avoided.
In one embodiment, the parallel to serial converted input data bit width value is determined based on a required delay resolution of the ultrasound system; for the specific way of obtaining the coarse delay value and the fine delay value, the method further comprises the following steps:
according to the product of the width value of the parallel-serial conversion input data bit and the frequency of the transmitting clock, the target delay value of the channel is subjected to integer quantization to respectively obtain a coarse delay value and a fine delay value.
The width value of the parallel-to-serial conversion input data bit may be a width value of the parallel-to-serial conversion input data bit determined based on an actual requirement of the ultrasound system for the transmission angle resolution (i.e., the delay resolution); the transmission clock frequency refers to the transmission clock frequency of the ultrasonic system; the channel target delay value is the local channel target delay value obtained based on the channel delay information corresponding to the local channel.
Specifically, the specific manner of obtaining the coarse delay value and the fine delay value respectively may be to perform integer quantization processing on a local channel target delay value obtained based on channel delay information corresponding to the local channel according to a transmission clock frequency corresponding to the ultrasound system and a bit width value of parallel-to-serial conversion input data, and further quantize the local channel target delay value into two parts, i.e., the coarse delay value and the fine delay value.
In the embodiment, the channel target delay value is quantized into the coarse delay value and the fine delay value by means of integer quantization according to the product of the width value of the parallel-serial conversion input data bit and the frequency of the transmitting clock, so that a data base is laid for respectively performing coarse delay processing and fine delay processing on the waveform control parameter based on the coarse delay value and the fine delay value subsequently, and further the effective improvement of the delay resolution of the ultrasonic system is ensured.
In one embodiment, said parallel to serial converted input data bit width value comprises an OSERDES input data bit width value; in the step of performing integer quantization on the channel target delay value according to the product of the parallel-to-serial conversion input data bit width value and the transmission clock frequency to obtain the coarse delay value and the fine delay value respectively, the channel target delay value is subjected to integer quantization by using the following formula:
wherein, T d For the channel target delay value, F is the width of the parallel-to-serial converted input data bits, M is the number of transmit clock cycles in the coarse delay value, K is the number of delay precision values in the fine delay value, F t Is the transmit clock frequency of the ultrasound system described above.
In the embodiment, the data accuracy of the coarse delay value and the fine delay value obtained based on the channel target delay value is ensured by performing integer quantization on the channel target delay value based on the parallel-serial conversion input data bit width value and the transmission clock frequency, so that the delay resolution of the ultrasonic system is effectively improved.
In an embodiment, with reference to the above embodiments, a specific application manner of the transmission delay control method provided by the present application in practical application is generally described as follows:
assuming that a certain ultrasound system has 64 transmitting channels, the frequency of the corresponding transmitting clock of the ultrasound system is 200MHz (the period of the corresponding transmitting clock is 5 ns), the required delay resolution of the ultrasound system is that the waveform delay resolution between the channels is less than 2ns, and the ultrasound system adopts an FPGA chip to generate corresponding waveform control parameters, and performs the above-mentioned transmitting delay control operation for the 64 channels of the ultrasound system.
Firstly, according to the required delay resolution of the ultrasound system, the width value of the parallel-serial conversion input data bit is set to be 4 (when the width value of the parallel-serial conversion input data bit is set to be 4, the delay resolution which can be realized by the ultrasound system is 5ns/4=1.25ns, which meets the requirement that the required delay resolution of the ultrasound system is less than 2 ns).
Then, assuming that waveform control parameters IN _ B, IN _ a _1 and IN _ a _0 of any transmission channel (hereinafter referred to as "the channel") IN the ultrasound system are obtained based on the waveform transmission information, and a channel target delay value corresponding to the channel delay information of the channel is 133.75ns, the channel target delay value of the channel may be subjected to integer quantization processing IN the following manner, so that the channel target delay value of the channel is quantized into two parts, namely a coarse delay value and a fine delay value:
133.75ns＝(26*5+3*1.25)ns；
as can be seen from the above formula, the number of transmission clock cycles in the coarse delay value of the channel is 26, and the number of delay precision values in the fine delay value of the channel is 3.
Then, the waveform control parameters IN _ B, IN _ a _1 and IN _ a _0 of the channel are written into an asynchronous memory, the asynchronous memory is configured with a clock cycle counter operating at the transmission clock frequency of 200MHz of the ultrasound system, and when the count value of the clock cycle counter reaches the transmission clock cycle number 26 IN the coarse delay value of the channel, the waveform control parameters IN _ B, IN _ a _1 and IN _ a _0 read from the asynchronous data memory are determined as the waveform control parameters after coarse delay (i.e. the waveform control parameters of the channel are subjected to coarse delay operation of 130 ns).
Then, based on the width value 4 of the parallel-serial conversion input data bit, respectively widening the data bit width of the waveform control parameter after the coarse delay to 4 bits; based on the number 3 of the delay precision values, splicing the waveform control parameters with the widened bit widths respectively with adjacent data to obtain spliced waveform control parameters; and inputting the spliced waveform control parameters into an OSERDES (parallel to serial conversion module) for parallel to serial conversion to obtain the waveform control parameters after parallel to serial conversion (namely the waveform control parameters after fine delay), and further realizing the fine delay effect of delaying the waveform control parameters after coarse delay by 3.75ns integrally backwards (namely performing fine delay operation on the waveform control parameters of the channel by 3.75 ns).
Finally, outputting the waveform control parameters after the fine delay to a pulse generator (namely a pulser pulse output chip) with a waveform mapping processing function to obtain a high-voltage pulse waveform of a corresponding type converted from the waveform control parameters after the fine delay; inputting the high-voltage pulse waveform of the corresponding type into an ultrasonic probe (i.e. probe) with an acousto-electric conversion function, and obtaining a transmitting waveform converted from the high-voltage pulse waveform of the corresponding type.
In the embodiment, the coarse delay operation and the fine delay operation are combined, so that the delay resolution of the ultrasonic system is effectively controlled, and the delay resolution of the ultrasonic system is effectively improved.
It should be understood that, although the steps in the flowcharts related to the embodiments as described above are sequentially displayed as indicated by arrows, the steps are not necessarily performed sequentially as indicated by the arrows. The steps are not limited to being performed in the exact order illustrated and, unless explicitly stated herein, may be performed in other orders. Moreover, at least a part of the steps in the flowcharts related to the embodiments described above may include multiple steps or multiple stages, which are not necessarily performed at the same time, but may be performed at different times, and the execution order of the steps or stages is not necessarily sequential, but may be rotated or alternated with other steps or at least a part of the steps or stages in other steps.
Based on the same inventive concept, the embodiment of the present application further provides a transmission delay control device for implementing the transmission delay control method. The implementation scheme for solving the problem provided by the apparatus is similar to the implementation scheme recorded in the above method, so specific limitations in one or more embodiments of the transmission delay control apparatus provided below can be referred to the limitations of the transmission delay control method in the foregoing, and details are not described herein again.
In one embodiment, as shown in fig. 4, a transmission delay control device is provided for a controller in an ultrasound system; the apparatus 400 comprises:
a data receiving module 410, configured to receive waveform transmission information, and obtain a waveform control parameter corresponding to the channel and channel delay information corresponding to the channel based on the waveform transmission information; the channel delay information comprises a channel target delay value, a coarse delay value and a fine delay value; the coarse delay value and the fine delay value are obtained by quantizing the channel target delay value according to the corresponding transmitting clock frequency of the ultrasonic system and the bit width value of parallel-serial conversion input data;
a coarse delay module 420, configured to perform a delay operation on the waveform control parameter by using the coarse delay value, so as to obtain a waveform control parameter after the coarse delay;
a fine delay module 430, configured to perform a delay operation on the waveform control parameter after the coarse delay based on the parallel-to-serial conversion input data bit width value and the fine delay value, and output the waveform control parameter after the fine delay; and the waveform control parameters after the fine delay are used for indicating the waveform conversion device to generate corresponding transmitting waveforms.
In an embodiment, the coarse delay module 420 is specifically configured to write the waveform control parameter into an asynchronous data memory, and start a clock cycle counter corresponding to the asynchronous data memory; the clock cycle counter operates at the transmit clock frequency; and when the count value of the clock period counter reaches the emission clock period number, determining the waveform control parameter read from the asynchronous data memory as the waveform control parameter after the coarse delay.
In an embodiment, the fine delay module 430 is specifically configured to perform bit width widening on the waveform control parameter after the coarse delay based on the bit width value of the parallel-to-serial conversion input data, so as to obtain a waveform control parameter after the bit width widening; based on the number of the delay precision values, splicing adjacent parameters in the waveform control parameters with the broadened bit width to obtain spliced waveform control parameters; and performing parallel-serial conversion on the waveform control parameters after splicing processing to obtain the waveform control parameters after parallel-serial conversion, and determining the waveform control parameters after parallel-serial conversion as the waveform control parameters after fine time delay.
In one embodiment, the above apparatus further comprises: and the delay value acquisition module is used for carrying out integer quantization on the channel target delay value according to the product of the width value of the parallel-serial conversion input data bit and the frequency of the emission clock to respectively obtain the coarse delay value and the fine delay value.
In an embodiment, the delay value obtaining module is specifically configured to perform integer quantization on the channel target delay value by using the following formula:
wherein, T d For the channel target delay value, F is the width value of the parallel-serial conversion input data bit, M is the number of transmission clock cycles in the coarse delay value, K is the number of delay precision values in the fine delay value, F t Is the transmit clock frequency.
The modules in the transmission delay control apparatus may be wholly or partially implemented by software, hardware and a combination thereof. The modules can be embedded in a hardware form or independent from a processor in the computer device, and can also be stored in a memory in the computer device in a software form, so that the processor can call and execute operations corresponding to the modules.
In one embodiment, a controller is provided for use in an ultrasound system; the ultrasonic system comprises a waveform conversion device connected with the controller;
the controller comprises a data receiving device and a time delay device which are connected in sequence; the time delay device comprises a coarse time delay unit and a fine time delay unit which are connected in sequence; the input end of the coarse delay unit and the input end of the fine delay unit are connected to the data receiving device, and the output end of the fine delay unit is used for connecting the waveform conversion device;
the data receiving device is used for receiving the waveform transmitting information and acquiring the waveform control parameters corresponding to the channel and the channel delay information corresponding to the channel based on the waveform transmitting information; the channel delay information comprises a channel target delay value, a coarse delay value and a fine delay value; the system comprises a rough delay value, a fine delay value, a channel target delay value and a channel target delay value, wherein the rough delay value and the fine delay value are obtained by quantizing the channel target delay value according to a transmitting clock frequency corresponding to an ultrasonic system and a bit width value of parallel-serial conversion input data;
the coarse delay unit is used for carrying out delay operation on the waveform control parameter by adopting a coarse delay value to obtain the waveform control parameter after coarse delay;
the fine delay unit is used for delaying the waveform control parameter after the coarse delay and outputting the waveform control parameter after the fine delay based on a parallel-serial conversion input data bit width value and a fine delay value; the waveform control parameters after the fine delay are used for indicating the waveform conversion device to generate corresponding transmitting waveforms.
In one embodiment, a chip is provided, comprising the above controller.
In one embodiment, the chip is an FPGA chip.
In one embodiment, an ultrasound system is provided, comprising a waveform conversion device, and the above chip; the output end of the chip is used for connecting the waveform conversion device; the waveform conversion device comprises a pulse waveform conversion unit and a transmitting waveform conversion unit which are connected in sequence;
the pulse waveform conversion unit is used for converting the received waveform control parameters after the fine delay according to a pulse waveform mapping rule and outputting a high-voltage pulse waveform;
and the transmitting waveform conversion unit is used for performing sound-electricity conversion processing on the received high-voltage pulse waveform and outputting a transmitting waveform.
In some examples, the architecture of any transmit channel (excluding the transmit waveform converting unit) in the ultrasound system may be as shown in fig. 5; the architecture of the application of the multiple transmit channels (excluding the transmit waveform converting unit) in the ultrasound system may be as shown in fig. 7.
It should be noted that the pulse waveform conversion unit may be a pulse generator (i.e., a pulser pulse output chip) having a function of performing mapping processing on the waveform control parameter, or may be another pulse waveform conversion unit having a function of performing mapping processing on the waveform control parameter, where a specific model of the pulse waveform conversion unit is not strictly limited; the transmit waveform conversion unit may be an ultrasonic probe (i.e., probe) having an acousto-electric conversion function, or may be another transmit waveform conversion unit having an acousto-electric conversion function, and the specific type of the transmit waveform conversion unit is not strictly limited herein.
For example, assuming that the fine delayed waveform control parameters output by the FPGA chip are known as IN _ B, IN _ a _1 and IN _ a _0, the waveform mapping rule shown IN table 1 below may be adopted to perform waveform mapping conversion on the received fine delayed waveform control parameters, so as to output the corresponding types of high voltage pulse waveforms corresponding to the waveform control parameters IN _ B, IN _ a _1 and IN _ a _0.
TABLE 1
According to the embodiment, the waveform control parameters after fine delay are converted into the high-voltage pulse waveform and the transmitting waveform, so that the delay resolution of the ultrasonic system is effectively improved, and the operation stability of the ultrasonic system after the delay resolution is improved is further ensured.
In an embodiment, the pulse waveform conversion unit is specifically configured to:
generating a high-voltage pulse waveform mapping instruction of a corresponding type based on a logic value corresponding to the received waveform control parameter after the fine delay;
and obtaining a high-voltage pulse waveform according to the high-voltage pulse waveform mapping instruction of the corresponding type, and outputting the high-voltage pulse waveform.
The specific expression form of the logic value corresponding to the waveform control parameter after the fine delay may be a form of 0 or 1 as shown in table 1 above; the corresponding type of high voltage pulse waveform mapping command may include a high voltage pulse waveform mapping command corresponding to the pulse waveform output type shown in table 1 above.
Further, when the high-voltage pulse waveform mapping instruction of the corresponding type is determined to be the high-voltage pulse waveform mapping instruction corresponding to the pulse waveform output type shown in table 1 above, the high-voltage pulse waveform of the pulse waveform output type shown in table 1 above can be obtained according to the high-voltage pulse waveform mapping instruction of the corresponding type.
In the embodiment, the high-voltage pulse waveform of the corresponding type is generated by mapping the waveform control parameter after the fine delay based on the waveform mapping rule, so that not only is the data accuracy of the ultrasonic system effectively ensured, but also the delay resolution of the ultrasonic system is stably improved.
In an embodiment, a computer-readable storage medium is provided, on which a computer program is stored, which computer program, when being executed by a processor, carries out the steps of the above-mentioned method.
In an embodiment, a computer program product is provided, comprising a computer program which, when executed by a processor, performs the steps of the above-described method.
It should be noted that, the user information (including but not limited to user equipment information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) referred to in the present application are information and data authorized by the user or sufficiently authorized by each party, and the collection, use and processing of the related data need to comply with the relevant laws and regulations and standards of the relevant country and region.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, database, or other medium used in the embodiments provided herein may include at least one of non-volatile and volatile memory. The nonvolatile Memory may include Read-Only Memory (ROM), magnetic tape, floppy disk, flash Memory, optical Memory, high-density embedded nonvolatile Memory, resistive Random Access Memory (ReRAM), magnetic Random Access Memory (MRAM), ferroelectric Random Access Memory (FRAM), phase Change Memory (PCM), graphene Memory, and the like. Volatile Memory can include Random Access Memory (RAM), external cache Memory, and the like. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM), for example. The processors referred to in the embodiments provided herein may be general purpose processors, central processing units, graphics processors, digital signal processors, programmable logic devices, quantum computing based data processing logic devices, etc., without limitation.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is specific and detailed, but not construed as limiting the scope of the present application. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present application shall be subject to the appended claims.
Claims (12)
1. A transmission delay control method is characterized in that the method is applied to a controller in an ultrasonic system; the method comprises the following steps:
receiving waveform transmitting information, and acquiring waveform control parameters corresponding to the channel and channel delay information corresponding to the channel based on the waveform transmitting information; the channel delay information comprises a channel target delay value, a coarse delay value and a fine delay value; the coarse delay value and the fine delay value are obtained by quantizing the channel target delay value according to the corresponding transmitting clock frequency of the ultrasonic system and the bit width value of parallel-serial conversion input data;
carrying out time delay operation on the waveform control parameter by adopting the coarse time delay value to obtain a waveform control parameter after coarse time delay;
delaying the waveform control parameter after the coarse delay based on the parallel-serial conversion input data bit width value and the fine delay value, and outputting the waveform control parameter after the fine delay; and the waveform control parameters after the fine delay are used for indicating the waveform conversion device to generate corresponding transmitting waveforms.
2. The method of claim 1, wherein the coarse delay value comprises a number of transmit clock cycles; the number of transmit clock cycles is determined based on the transmit clock frequency;
the step of performing delay operation on the waveform control parameter by using the coarse delay value to obtain the waveform control parameter after coarse delay includes:
writing the waveform control parameters into an asynchronous data memory, and starting a clock cycle counter corresponding to the asynchronous data memory; the clock cycle counter operates at the transmit clock frequency;
and when the count value of the clock cycle counter reaches the emission clock cycle number, determining the waveform control parameter read from the asynchronous data memory as the waveform control parameter after the coarse delay.
3. The method of claim 1, wherein the delay value comprises a number of delay precision values;
the step of performing a delay operation on the waveform control parameter after the coarse delay and outputting the waveform control parameter after the fine delay based on the parallel-to-serial conversion input data bit width value and the fine delay value includes:
based on the bit width value of the parallel-serial conversion input data, carrying out bit width broadening on the waveform control parameter after the coarse delay to obtain a waveform control parameter after the bit width broadening;
based on the number of the delay precision values, splicing adjacent parameters in the waveform control parameters with the broadened bit width to obtain spliced waveform control parameters;
and performing parallel-serial conversion on the waveform control parameters after splicing processing to obtain the waveform control parameters after parallel-serial conversion, and determining the waveform control parameters after parallel-serial conversion as the waveform control parameters after fine time delay.
4. The method of any of claims 1 to 3, wherein the parallel-to-serial conversion input data bit width value is determined based on a required delay resolution of the ultrasound system;
the method further comprises the following steps:
and according to the product of the width value of the parallel-serial conversion input data bit and the frequency of the transmitting clock, carrying out integer quantization on the channel target delay value to respectively obtain the coarse delay value and the fine delay value.
5. The method of claim 4, wherein the parallel-to-serial converted input data bit width value comprises an OSERDES input data bit width value;
in the step of performing integer quantization on the channel target delay value according to the product of the bit width value of the parallel-to-serial conversion input data and the frequency of the transmission clock to obtain the coarse delay value and the fine delay value, the channel target delay value is subjected to integer quantization by using the following formula:
wherein, T d For the channel target delay value, F is the width value of the parallel-serial conversion input data bit, M is the number of transmission clock cycles in the coarse delay value, K is the number of delay precision values in the fine delay value, F t Is the transmit clock frequency.
6. The transmitting time delay control device is characterized by being applied to a controller in an ultrasonic system; the device comprises:
the data receiving module is used for receiving the waveform transmitting information and acquiring the waveform control parameters corresponding to the channel and the channel delay information corresponding to the channel based on the waveform transmitting information; the channel delay information comprises a channel target delay value, a coarse delay value and a fine delay value; the coarse delay value and the fine delay value are obtained by quantizing the channel target delay value according to the corresponding transmitting clock frequency of the ultrasonic system and the bit width value of parallel-serial conversion input data;
the coarse delay module is used for performing delay operation on the waveform control parameter by adopting the coarse delay value to obtain a waveform control parameter after coarse delay;
the fine delay module is used for carrying out delay operation on the waveform control parameter after the coarse delay and outputting the waveform control parameter after the fine delay based on the parallel-serial conversion input data bit width value and the fine delay value; and the waveform control parameters after the fine delay are used for indicating the waveform conversion device to generate corresponding transmitting waveforms.
7. A controller, for use in an ultrasound system; the ultrasonic system comprises a waveform conversion device connected with the controller;
the controller comprises a data receiving device and a time delay device which are connected in sequence; the delay device comprises a coarse delay unit and a fine delay unit which are connected in sequence; the input end of the coarse delay unit and the input end of the fine delay unit are connected to the data receiving device, and the output end of the fine delay unit is used for connecting the waveform conversion device;
the data receiving device is used for receiving waveform transmitting information, and acquiring waveform control parameters corresponding to the channel and channel delay information corresponding to the channel based on the waveform transmitting information; the channel delay information comprises a channel target delay value, a coarse delay value and a fine delay value; the coarse delay value and the fine delay value are obtained by quantizing the channel target delay value according to the corresponding transmitting clock frequency of the ultrasonic system and the bit width value of parallel-serial conversion input data;
the coarse delay unit is used for performing delay operation on the waveform control parameter by adopting the coarse delay value to obtain a waveform control parameter after coarse delay;
the fine delay unit is used for performing delay operation on the waveform control parameter after the coarse delay and outputting the waveform control parameter after the fine delay based on the parallel-serial conversion input data bit width value and the fine delay value; and the waveform control parameters after fine delay are used for indicating the waveform conversion device to generate corresponding transmitting waveforms.
8. A chip comprising the controller of claim 7.
9. The chip of claim 8, wherein the chip is an FPGA chip.
10. An ultrasound system, comprising a waveform conversion device, and a chip as claimed in claim 8 or 9; the output end of the chip is used for connecting the waveform conversion device; the waveform conversion device comprises a pulse waveform conversion unit and a transmitting waveform conversion unit which are connected in sequence;
the pulse waveform conversion unit is used for converting the received waveform control parameters after the fine delay according to a pulse waveform mapping rule and outputting a high-voltage pulse waveform;
and the transmitting waveform conversion unit is used for performing sound-electricity conversion processing on the received high-voltage pulse waveform and outputting the transmitting waveform.
11. The system of claim 10, wherein the pulse waveform conversion unit is specifically configured to:
generating a high-voltage pulse waveform mapping instruction of a corresponding type based on a logic value corresponding to the received waveform control parameter after the fine delay;
and obtaining the high-voltage pulse waveform according to the high-voltage pulse waveform mapping instruction of the corresponding type, and outputting the high-voltage pulse waveform.
12. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 5.
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| CN116559822B (en) * | 2023-07-03 | 2023-11-03 | 中国人民解放军国防科技大学 | Method and system for detecting laser ranging signals by code pulse shift accumulation |
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