CN115622518A - Push-pull power amplification circuit and radio frequency front end module - Google Patents
Push-pull power amplification circuit and radio frequency front end module Download PDFInfo
- Publication number
- CN115622518A CN115622518A CN202110741939.3A CN202110741939A CN115622518A CN 115622518 A CN115622518 A CN 115622518A CN 202110741939 A CN202110741939 A CN 202110741939A CN 115622518 A CN115622518 A CN 115622518A
- Authority
- CN
- China
- Prior art keywords
- bias
- terminal
- circuit
- input
- linear feedback
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000003321 amplification Effects 0.000 title claims abstract description 52
- 238000003199 nucleic acid amplification method Methods 0.000 title claims abstract description 52
- 239000003990 capacitor Substances 0.000 claims abstract description 139
- 238000010586 diagram Methods 0.000 description 12
- 238000000034 method Methods 0.000 description 11
- 230000000903 blocking effect Effects 0.000 description 10
- 230000005669 field effect Effects 0.000 description 10
- 230000008569 process Effects 0.000 description 9
- 238000004804 winding Methods 0.000 description 9
- 230000008859 change Effects 0.000 description 3
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000012994 industrial processing Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3211—Modifications of amplifiers to reduce non-linear distortion in differential amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/34—Negative-feedback-circuit arrangements with or without positive feedback
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/26—Push-pull amplifiers; Phase-splitters therefor
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Amplifiers (AREA)
Abstract
The application discloses a push-pull power amplification circuit, which comprises an input balun, a first bias circuit, a second bias circuit, a first capacitor, a first amplifier, a second amplifier, a first linear feedback circuit and a second linear feedback circuit; the first linear feedback circuit is arranged between the input balun and the first bias circuit, the second linear feedback circuit is arranged between the input balun and the second bias circuit, and the first linear feedback circuit and the second linear feedback circuit are utilized, so that the linearity of the radio frequency differential amplification circuit is improved under the condition that the overall performance of the push-pull power amplification circuit is guaranteed.
Description
Technical Field
The application relates to the technical field of radio frequency circuits, in particular to a push-pull power amplifying circuit and a radio frequency front-end module.
Background
The push-pull power amplifying circuit is widely used in the fields of communication, broadcasting, radar, industrial processing, medical instruments, scientific research and the like, and particularly when the radio frequency front end needs to meet the requirements of higher frequency, larger bandwidth and higher order QAM modulation, the power amplifying circuit can adopt a push-pull form, for example, in the application of a 5G NR frequency band of a mobile terminal. However, since the amplifying element in the push-pull power amplifying circuit is nonlinear, the push-pull power amplifying circuit cannot achieve the ideal linearity; especially, the requirement of the linearity of the push-pull power amplifying circuit is higher by using radio frequency signals of a complex modulation mode.
Content of application
The embodiment of the application provides a push-pull power amplification circuit and an antenna device, and aims to solve the problem that the linearity of the existing push-pull power amplification circuit is poor.
A push-pull power amplification circuit comprises an input balun, a first bias circuit, a second bias circuit, a first capacitor, a first amplifier, a second amplifier, a first linear feedback circuit and a second linear feedback circuit; the input balun comprises a primary coil and a secondary coil, wherein a first end of the secondary coil is connected to the first amplifier, and a second end of the secondary coil is connected to the second amplifier; the secondary coil comprises a first coil segment and a second coil segment, the first coil segment and the second coil segment are connected by the first capacitor, a first end of the first coil segment is connected with a first end of the first capacitor, a second end of the first capacitor is connected to a first end of the second coil segment, the first bias circuit is coupled to the first end of the first capacitor, and the second bias circuit is coupled to the second end of the first capacitor;
a first end of the first linear feedback circuit is connected with the input balun, and a second end of the first linear feedback circuit is connected with the first bias circuit;
a first end of the second linear feedback circuit is connected to the input balun, and a second end of the second linear feedback circuit is connected to the second bias circuit.
Further, if the first input terminal of the input balun receives a radio frequency signal input, the second input terminal is connected to a ground terminal or a power terminal, the first terminal of the first linear feedback circuit is configured to be connected to the first output terminal of the input balun, and the first terminal of the second linear feedback circuit is configured to be connected to the second output terminal of the input balun;
or, if the first input terminal of the input balun receives a radio frequency signal input, the second input terminal is connected to a ground terminal or a power terminal, the first terminal of the first linear feedback circuit is configured to be connected to the second output terminal of the input balun, and the first terminal of the second linear feedback circuit is configured to be connected to the first output terminal of the input balun.
Further, if the first input terminal of the input balun receives a first rf signal input and the second input terminal receives a second rf input signal, the first terminal of the first linear feedback circuit is configured to be connected to the first output terminal of the input balun, and the first terminal of the second linear feedback circuit is configured to be connected to the second output terminal of the input balun;
or, if the first input terminal of the input balun receives a first radio frequency signal input and the second input terminal receives a second radio frequency input signal, the first terminal of the first linear feedback circuit is configured to be connected to the second output terminal of the input balun, and the first terminal of the second linear feedback circuit is configured to be connected to the first output terminal of the input balun;
or, if the first input terminal of the input balun receives a first rf signal input and the second input terminal receives a second rf input signal, the first end of the first linear feedback circuit is configured to be connected to the first input terminal of the input balun, and the first end of the second linear feedback circuit is configured to be connected to the second input terminal of the input balun;
alternatively, if the first input terminal of the input balun receives a first rf signal input and the second input terminal receives a second rf input signal, the first end of the first linear feedback circuit is configured to be connected to the second input terminal of the input balun, and the first end of the second linear feedback circuit is configured to be connected to the first input terminal of the input balun.
Further, the first linear feedback circuit includes a first feedback capacitance and the second linear feedback circuit includes a second feedback capacitance.
Further, the first linear feedback circuit comprises a first feedback resistor and a first feedback capacitor which are connected in series, and the second linear feedback circuit comprises a second feedback resistor and a second feedback capacitor which are connected in series.
Further, the first bias circuit is coupled to a first terminal of the first capacitor through a first resistor, and the second bias circuit is coupled to a second terminal of the first capacitor through a second resistor.
Further, the first bias circuit comprises a first bias transistor, a first end of the first bias transistor is connected with a first bias power supply port, a second end of the first bias transistor is connected with a first power supply terminal, and a third end of the first bias transistor is connected with the first resistor;
the second bias circuit comprises a second bias transistor, a first end of the second bias transistor is connected with a second bias power supply port, a second end of the second bias transistor is connected with a second power supply end, and a third end of the second bias transistor is connected with the second resistor.
Further, the second terminal of the first linear feedback circuit is connected with the third terminal of the first bias transistor; the second terminal of the second linear feedback circuit is connected with the third terminal of the second bias transistor.
Further, a second terminal of the first linear feedback circuit is connected to a first terminal of the first bias transistor; a second terminal of the second linear feedback circuit is connected to a first terminal of the second bias transistor.
A push-pull power amplification circuit comprises an input balun, a first bias circuit, a second bias circuit, a first capacitor, a first amplifier, a second amplifier, a first linear feedback circuit and a second linear feedback circuit; the input balun comprises a primary coil and a secondary coil, wherein a first end of the secondary coil is connected to the first amplifier, and a second end of the secondary coil is connected to the second amplifier; the secondary coil comprises a first coil segment and a second coil segment, the first coil segment and the second coil segment are connected by the first capacitor, a first end of the first coil segment is connected with a first end of the first capacitor, a second end of the first capacitor is connected to a first end of the second coil segment, the first bias circuit is coupled to the first end of the first capacitor, and the second bias circuit is coupled to the second end of the first capacitor;
a first end of the first linear feedback circuit is connected with the output end of the first amplifier, and a second end of the first linear feedback circuit is connected with the first bias circuit; a first end of the second linear feedback circuit is connected with the output end of the second amplifier, and a second end of the second linear feedback circuit is connected with the second bias circuit;
or, a first end of the first linear feedback circuit is connected to the output end of the second amplifier, and a second end of the first linear feedback circuit is connected to the first bias circuit; the first end of the second linear feedback circuit is connected with the output end of the first amplifier, and the second end of the second linear feedback circuit is connected with the second bias circuit.
Further, the first linear feedback circuit includes a first feedback capacitance and the second linear feedback circuit includes a second feedback capacitance.
Further, the first linear feedback circuit comprises a first feedback resistor and a first feedback capacitor which are connected in series, and the second linear feedback circuit comprises a second feedback resistor and a second feedback capacitor which are connected in series.
Further, the first bias circuit is coupled to a first terminal of the first capacitor through a first resistor, and the second bias circuit is coupled to a second terminal of the first capacitor through a second resistor.
Further, the first bias circuit comprises a first bias transistor, a first end of the first bias transistor is connected with a first bias power supply port, a second end of the first bias transistor is connected with a first power supply terminal, and a third end of the first bias transistor is connected with the first resistor;
the second bias circuit comprises a second bias transistor, a first end of the second bias transistor is connected with a second bias power supply port, a second end of the second bias transistor is connected with a second power supply end, and a third end of the second bias transistor is connected with the second resistor.
A radio frequency front end module comprises the push-pull power amplifying circuit.
The application provides a push-pull power amplification circuit, which comprises an input balun, a first bias circuit, a second bias circuit, a first capacitor, a first amplifier, a second amplifier, a first linear feedback circuit and a second linear feedback circuit; the input balun comprises a primary coil and a secondary coil, wherein a first end of the secondary coil is connected to the first amplifier, and a second end of the secondary coil is connected to the second amplifier; the secondary coil comprises a first coil segment and a second coil segment, the first coil segment and the second coil segment are connected by the first capacitor, a first end of the first coil segment is connected with a first end of the first capacitor, a second end of the first capacitor is connected to a first end of the second coil segment, the first bias circuit is coupled to the first end of the first capacitor, and the second bias circuit is coupled to the second end of the first capacitor; a first end of the first linear feedback circuit is connected with the input balun, and a second end of the first linear feedback circuit is connected with the first bias circuit; a first end of the second linear feedback circuit is connected with the input balun, and a second end of the second linear feedback circuit is connected with the second bias circuit; the first linear feedback circuit is arranged between the input balun and the first bias circuit, the second linear feedback circuit is arranged between the input balun and the second bias circuit, and the first linear feedback circuit and the second linear feedback circuit are utilized, so that the linearity of the radio frequency differential amplification circuit is improved under the condition that the overall performance of the push-pull power amplification circuit is guaranteed.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the description of the embodiments of the present application will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without inventive exercise.
Fig. 1 is a schematic diagram of a push-pull power amplifier circuit according to the present application;
fig. 2 is another schematic diagram of a push-pull power amplifier circuit according to the present application;
fig. 3 is another schematic diagram of a push-pull power amplifier circuit according to the present application;
fig. 4 is another schematic diagram of a push-pull power amplifier circuit according to the present application;
fig. 5 is another schematic diagram of a push-pull power amplifier circuit according to the present application;
fig. 6 is another schematic diagram of a push-pull power amplifier circuit according to the present application;
fig. 7 is another schematic diagram of a push-pull power amplifier circuit according to the present application;
fig. 8 is another schematic diagram of a push-pull power amplifier circuit according to the present application;
fig. 9 is another schematic diagram of a push-pull power amplifier circuit according to the present application;
fig. 10 is another schematic diagram of a push-pull power amplifier circuit according to the present application;
fig. 11 is another schematic diagram of a push-pull power amplifier circuit according to the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some, but not all, embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It is to be understood that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity to indicate like elements throughout.
It will be understood that when an element or layer is referred to as being "on," "adjacent to," "8230303030, adjacent to," "with 8230, connected to," or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to, or coupled to the other elements or layers, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.
Spatial relationship terms such as "under 823030," "under 8230; below," "under 8230," "under," "over," and the like may be used herein for convenience of description to describe the relationship of one element or feature to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, then elements or features described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary terms "at 8230, below" and "at 8230, below" may include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatial descriptors used herein interpreted accordingly.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
An embodiment of the present invention provides a push-pull power amplifying circuit, as shown in fig. 1 to 5, the push-pull power amplifying circuit includes an input balun 10, a first bias circuit 40, a second bias circuit 50, a first capacitor C1, a first amplifier M1, a second amplifier M2, a first linear feedback circuit 20, and a second linear feedback circuit 30; the input balun 10 comprises a primary coil and a secondary coil, a first end of the secondary coil is connected to the first amplifier M1, and a second end of the secondary coil is connected to the second amplifier M2; the secondary coil includes a first coil segment and a second coil segment, the first coil segment and the second coil segment are connected by the first capacitor C1, a first end of the first coil segment is connected with a first end of the first capacitor C1, a second end of the first capacitor C1 is connected to a first end of the second coil segment, the first bias circuit 40 is coupled to the first end of the first capacitor C1, and the second bias circuit 40 is coupled to the second end of the first capacitor C1.
The input balun 10 includes a first input terminal P11, a second input terminal P12, a first output terminal P13, and a second output terminal P14. In this example, the input balun 10 converts the radio frequency signal received by the first input terminal P11 and/or the second input terminal P12 from an unbalanced radio frequency signal to a balanced radio frequency signal; then, the balanced radio frequency signals are respectively sent to a first amplifier M1 and a second amplifier M2 through a first output end P13 and a second output end P14; the first amplifier M1 and the second amplifier M2 amplify the balanced radio frequency signals output by the first output end P13 and the second output end P14, respectively, to form amplified balanced radio frequency signals; then, the amplified balanced RF signal is transmitted to a subsequent stage.
In this embodiment, the input balun 10 includes a primary coil and a secondary coil. The first end of the primary coil is a first input end of the push-pull power amplification circuit and is configured to receive a radio frequency input signal, and the second end of the primary coil is a second input end of the push-pull power amplification circuit and is connected with a ground end or a power supply end. The secondary coil includes a first coil segment and a second coil segment. The first coil section and the second coil section are arranged in a separated mode and are connected through a first capacitor C1.
In addition, the first coil section and the second coil section in the secondary coil may be provided in a non-separated manner, that is, the first coil section and the second coil section are still essentially a complete coil, and the first capacitor C1 is connected to the secondary coil and plays a role of blocking dc in the push-pull power amplifying circuit.
In a specific embodiment, the primary coil of the input balun 10 may be a complete coil, or may be composed of two independent coil segments, that is, the primary coil may be composed of a third coil segment and a fourth coil segment which are separately arranged, or may be composed of a complete coil.
Referring to fig. 11, a schematic structural diagram of the input balun 10 in the present embodiment is shown. In this example, the description will be made taking as an example that the primary coil includes a third coil and a fourth coil which are separated, and the secondary coil includes a first coil and a second coil which are separated. The third coil is connected with the fourth coil, and the first coil is connected with the second coil. The third coil and the first coil are coupled with each other; the fourth coil and the second coil are coupled to each other. As can be seen from fig. 10, compared with the balun in the prior art, the input balun in the present application can reduce the occupied space of the balun structure and make the circuit layout of the balun structure more flexible by improving the winding manner of the primary coil/the secondary coil while ensuring that the overall performance of the balun is not changed.
Since the secondary winding of the input balun 10 in the present application is formed by connecting the first winding section and the second winding section, the first capacitor C1 can be connected to the connection of the first winding section and the second winding section, without connecting a dc blocking capacitor C11 (not shown in the figure) between the first output terminal of the input balun 10 and the first amplifier M1, and without connecting a dc blocking capacitor C12 (not shown in the figure) between the second output terminal of the input balun 10 and the second amplifier M2, that is, by connecting the dc blocking capacitor C1 to the connection of the first winding section and the second winding section of the secondary winding of the input balun, the functions of the dc blocking capacitor C11 and the dc blocking capacitor C12 can be simultaneously achieved. Furthermore, because the access position of the capacitor C1 is different, under the same circuit requirement, the capacitance value of C1 is only equal to half of that of C11 or C12, and therefore, the occupied space of the improved capacitor C1 is only equal to one fourth of that of C11 and C12, which is beneficial to further reducing the occupied area of the push-pull power amplifying circuit.
In this embodiment, the first bias circuit 40 is coupled to the first end of the first capacitor C1, and the second bias circuit 50 is coupled to the second end of the first capacitor C1. The first bias circuit 40 provides a bias signal for the first amplifier M1, and the second bias circuit 50 provides a bias signal for the second amplifier M2, so that the respective quiescent operations of the first amplifier M1 and the second amplifier M2 do not affect each other. It should be noted that, since the bias signals provided by the first bias circuit 40 respectively flow through the secondary coils of the input balun and then enter the first amplifier M1, and the bias signals provided by the second bias circuit 50 respectively flow through the secondary coils of the input balun and then enter the second amplifier M2, the secondary coils of the input balun are equivalent to be multiplexed into an equivalent inductance device, so that the inductance devices at the output end of the bias circuit can be reduced, the number of devices of the push-pull power amplification circuit is further reduced, the occupied space is reduced, and the miniaturization of the push-pull power amplification circuit is facilitated.
In particular, the first amplifier M1 comprises at least one first amplifying transistor, which may be a BJT transistor (e.g., HBT transistor) or a field effect transistor. The second amplifier M2 comprises at least one second amplifying transistor, which may be a BJT transistor (e.g., HBT transistor) or a field effect transistor. Alternatively, the first amplifier M1 may be one power amplification stage formed by one amplification transistor, one power amplification stage formed by connecting a plurality of amplification transistors in parallel, or a plurality of power amplification stages formed by cascading a plurality of amplification transistors. It is to be understood that the first amplifier M1 may include other circuit elements such as a matching network, a bias circuit, and the like in addition to the amplifying transistor.
Further, the push-pull power amplifying circuit of the present application further includes an output balun (not shown in the figure). A first input end of the output balun is connected with an output end of a first amplifier M1, and a second input end of the output balun is connected with an output end of a second amplifier M2; the first output end of the output balun is connected with the signal output end, and the second output end of the output balun is connected with the grounding end or the power supply end. The first amplifier M1 and the second amplifier M2 respectively transmit the amplified balanced two-terminal differential signals to a first input terminal and a second input terminal of the output balun, and the output balun converts the amplified balanced two-terminal differential signals to form amplified unbalanced radio frequency signals, and transmits the amplified unbalanced radio frequency signals to the signal output terminal for output.
In this embodiment, a first end of the first linear feedback circuit is connected to the input balun, and a second end of the first linear feedback circuit is connected to the first bias circuit; a first end of the second linear feedback circuit is coupled to the input balun and a second end of the second linear feedback circuit is coupled to the second bias circuit.
In a specific embodiment, the first terminal of the first linear feedback circuit 20 may be connected to the input terminal or the output terminal of the input balun, and the second terminal is connected to the first bias circuit. A first terminal of the second linear feedback circuit 30 may be connected to an input or output terminal of the input balun and a second terminal is connected to said second biasing circuit. According to the method and the device, the first linear feedback circuit 20 and the second linear feedback circuit 30 are utilized to adjust and optimize the input radio frequency signals, so that distortion of the radio frequency signals is reduced, linearity of the push-pull power amplification circuit is improved, and overall performance of the push-pull power amplification circuit is optimized.
In one embodiment, as shown in fig. 1, if the first input terminal of the input balun receives a radio frequency signal input, the second input terminal is connected to a ground terminal or a power terminal, the first terminal of the first linear feedback circuit 20 is configured to be connected to the first output terminal P13 of the input balun 10, and the first terminal of the second linear feedback circuit 30 is configured to be connected to the second output terminal P14 of the input balun 10.
As shown in fig. 1, if the first input terminal of the input balun receives a radio frequency signal input, the second input terminal is connected to a ground terminal or a power terminal, the first terminal of the first linear feedback circuit 50 is configured to be connected to the first output terminal P13 of the input balun 10, and the first terminal of the second linear feedback circuit 60 is configured to be connected to the second output terminal P14 of the input balun 10. Namely, the first linear feedback circuit 50 is disposed between the first output end P13 of the input balun 10 and the first bias circuit 40, and is used for ensuring that the push-pull power amplification circuit performs a signal amplification process to achieve an ideal linearity. Accordingly, the second linear feedback circuit 30 is disposed between the second output terminal P14 of the input balun 10 and the second bias circuit 50, so as to improve the linearity of the rf differential amplifier circuit while ensuring the overall performance of the push-pull power amplifier circuit.
In one embodiment, as shown in fig. 2, if the first input terminal of the input balun receives a radio frequency signal input, the second input terminal is connected to the ground terminal or the power terminal, the first terminal of the first linear feedback circuit 20 is configured to be connected to the second output terminal P14 of the input balun 10, and the first terminal of the second linear feedback circuit 30 is configured to be connected to the first output terminal P13 of the input balun 10.
As shown in fig. 2, if the first input terminal of the input balun receives an rf signal input and the second input terminal is connected to the ground terminal or the power supply terminal, the first terminal of the first linear feedback circuit 20 is configured to be connected to the second output terminal P14 of the input balun 10, and the first terminal of the second linear feedback circuit 30 is configured to be connected to the first output terminal P13 of the input balun 10. Since there may be a certain degree of phase and power imbalance between the balanced ports (the first output terminal P13 and the second output terminal P14) of the input balun 10 under non-ideal conditions, in this embodiment, the balance of the balanced ports (the first output terminal P13 and the second output terminal P14) of the input balun 10 can be further ensured by disposing the first linear feedback circuit 20 between the second output terminal P14 of the input balun 10 and the first bias circuit 40, and disposing the second linear feedback circuit 30 between the first output terminal P13 of the input balun 10 and the second bias circuit 50, so as to ensure that the power magnitudes of the rf signals output by the first output terminal P13 and the second output terminal P14 of the input balun are the same; therefore, the linearity of the radio frequency differential amplifying circuit is improved under the condition that the overall performance of the push-pull power amplifying circuit is ensured.
Understandably, if the first input terminal of the input balun receives the rf signal input and the second input terminal is connected to the ground terminal or the power terminal, since only one rf signal is input to the two input terminals of the input balun 10, two rf signals are not formed and are respectively transmitted to the first linear feedback circuit 20 and the second linear feedback circuit 30, when the first input terminal of the input balun receives the rf signal input and the second input terminal is connected to the ground terminal or the power terminal, the first terminal of the first linear feedback circuit 20 and the first terminal of the second linear feedback circuit 30 can only be configured to be connected to the first output terminal P13 or the second output terminal P14 of the input balun 10. Understandably, if the first input terminal of the input balun receives an rf signal input, the second input terminal is connected to the ground terminal or the power supply terminal, and the rf signal received by the input terminal of the input balun 10 is an unbalanced rf signal, that is, the signals received by the first input terminal P11 and the second input terminal P12 of the input balun 10 are different, if the first terminal of the first linear feedback circuit 20 and the first terminal of the second linear feedback circuit 30 are configured to be connected to the first input terminal P11 and the second input terminal P12 of the input balun 10, the push-pull power amplifier circuit cannot operate normally.
In one embodiment, as shown in fig. 1, if the first input terminal of the input balun receives a first rf signal input and the second input terminal receives a second rf input signal, the first terminal of the first linear feedback circuit 20 is configured to be connected to the first output terminal P13 of the input balun 10, and the first terminal of the second linear feedback circuit 30 is configured to be connected to the second output terminal P14 of the input balun 10.
As shown in fig. 1, if the first input terminal of the input balun receives a first rf signal input and the second input terminal receives a second rf input signal, that is, the first input terminal P11 and the second input terminal P12 of the input balun 10 each receive an rf signal, there is no input terminal connected to the ground terminal, in this case, the first terminal of the first linear feedback circuit 20 is configured to be connected to the first output terminal P13 of the input balun 10, and the first terminal of the second linear feedback circuit 30 is configured to be connected to the second output terminal P14 of the input balun 10. Namely, the first linear feedback circuit 20 is arranged between the first output terminal P13 of the input balun 10 and the first bias circuit 20, so that the linearity of the radio frequency differential amplifier circuit is improved under the condition of ensuring the overall performance of the push-pull power amplifier circuit. Accordingly, the second linear feedback circuit 30 is disposed between the second output terminal P14 of the input balun 10 and the second bias circuit 50, so as to improve the linearity of the rf differential amplifier circuit while ensuring the overall performance of the push-pull power amplifier circuit.
In one embodiment, as shown in fig. 2, if the first input terminal of the input balun receives a first rf signal input and the second input terminal receives a second rf input signal, the first terminal of the first linear feedback circuit 20 is configured to be connected to the second output terminal P14 of the input balun 10, and the first terminal of the second linear feedback circuit 30 is configured to be connected to the first output terminal P13 of the input balun 10.
As shown in fig. 2, if the first input terminal of the input balun receives a first rf signal input, and the second input terminal receives a second rf input signal, that is, the first input terminal P11 and the second input terminal P12 of the input balun 10 each receive an rf signal, there is no input terminal connected to the ground terminal, then the first terminal of the first linear feedback circuit 20 is configured to be connected to the second output terminal P14 of the input balun 10, and the first terminal of the second linear feedback circuit 30 is configured to be connected to the first output terminal P13 of the input balun 10. Since there may be some phase and power imbalance between the balanced ports (the first output terminal P13 and the second output terminal P14) of the input balun 10 under non-ideal conditions, in this embodiment, the first linear feedback circuit 20 may be disposed between the second output terminal P14 of the input balun 10 and the first bias circuit 40, and the second linear feedback circuit 30 may be disposed between the first output terminal P13 of the input balun 10 and the second bias circuit 50; therefore, the balance of the balance ports (the first output end P13 and the second output end P14) of the input balun is further ensured, and the power of the radio-frequency signals output by the first output end P13 and the second output end P14 of the input balun is ensured to be the same; therefore, the linearity of the radio frequency differential amplifying circuit is improved under the condition that the overall performance of the push-pull power amplifying circuit is ensured.
In one embodiment, as shown in fig. 3, if the first input terminal of the input balun receives a first rf signal input and the second input terminal receives a second rf input signal, the first terminal of the first linear feedback circuit 20 is configured to be connected to the first input terminal P11 of the input balun 10, and the first terminal of the second linear feedback circuit 30 is configured to be connected to the second input terminal P12 of the input balun 10.
As shown in fig. 5, if the first input terminal of the input balun receives a first rf signal input, and the second input terminal receives a second rf input signal, that is, the first input terminal P11 and the second input terminal P12 of the input balun 10 each receive an rf signal, there is no input terminal connected to the ground terminal, in this case, the first terminal of the first linear feedback circuit 20 is configured to be connected to the first input terminal P11 of the input balun 10, and the first terminal of the second linear feedback circuit 30 is configured to be connected to the second input terminal P12 of the input balun 10. Namely, the first linear feedback circuit 20 is arranged between the first input end P11 of the input balun 10 and the first bias circuit 40, so that the linearity of the radio frequency differential amplification circuit is improved under the condition of ensuring the overall performance of the push-pull power amplification circuit; correspondingly, the second linear feedback circuit 30 is disposed between the second input terminal P12 of the input balun 10 and the second bias circuit 50, so as to improve the linearity of the radio frequency differential amplifier circuit while ensuring the overall performance of the push-pull power amplifier circuit.
In one embodiment, as shown in fig. 4, if the first input terminal of the input balun receives a first rf signal input, the second input terminal receives a second rf input signal, the first terminal of the first linear feedback circuit 20 is configured to be connected to the second input terminal P12 of the input balun 10, and the first terminal of the second linear feedback circuit 30 is configured to be connected to the first input terminal P11 of the input balun 10.
As shown in fig. 4, if the first input terminal of the input balun receives a first rf signal input and the second input terminal receives a second rf input signal, that is, the first input terminal P11 and the second input terminal P12 of the input balun 10 each receive an rf signal, there is no input terminal connected to the ground terminal, in this case, the first terminal of the first linear feedback circuit 20 is configured to be connected to the second input terminal P12 of the input balun 10, and the first terminal of the second linear feedback circuit 30 is configured to be connected to the first input terminal P11 of the input balun 10. Since there may be a certain degree of phase and power imbalance between the first input terminal P11 and the second input terminal P12 of the input balun 10 under non-ideal conditions, in this embodiment, the first linear feedback circuit 20 may be disposed between the second input terminal P12 of the input balun 10 and the first bias circuit 40, and the second linear feedback circuit 30 may be disposed between the first input terminal P11 of the input balun 10 and the second bias circuit 50; therefore, the balance of the first input end P11 and the second input end P12 of the input balun is further ensured, and the power of the radio-frequency signals input into the first input end P11 and the second input end P12 of the input balun is ensured to be the same; therefore, the linearity of the radio frequency differential amplifying circuit is improved under the condition that the overall performance of the push-pull power amplifying circuit is ensured.
Understandably, if the first input terminal of the input balun receives a first rf signal input, and the second input terminal receives a second rf input signal, since each of the two input terminals of the input balun 10 has an rf signal input, the first rf signal input can be respectively transmitted to the first linear feedback circuit 20 and the second linear feedback circuit 30, so that when the input balun 10 is a two-terminal rf signal input, the first terminal of the first linear feedback circuit 20 and the first terminal of the second linear feedback circuit 30 can be configured to be connected not only to the first output terminal P13 or the second output terminal P14 of the input balun 10, but also to be connected to the first input terminal P11 or the second input terminal P12 of the input balun 10. Understandably, when the input balun 10 is a two-terminal rf signal input, the signals received by the first input terminal P11 and the second input terminal P12 of the input balun 10 are the same, and the signals output by the first output terminal P13 or the second output terminal P14 of the input balun 10 are the same, so that the first terminal of the first linear feedback circuit 20 and the first terminal of the second linear feedback circuit 30 can be configured to be connected to the two input terminals of the input balun at the same time, or to be connected to the two output terminals at the same time, so as to ensure that the rf differential amplifying circuit can normally operate.
In one embodiment, as shown in fig. 8, the first linear feedback circuit 20 includes a first feedback capacitor C2, one end of the first feedback capacitor C2 is connected to the input balun 10, and the other end is connected to the first bias circuit 30; the second linear feedback circuit 30 includes a second feedback capacitor C3, and one end of the second feedback capacitor C3 is connected to the input balun 10, and the other end is connected to the second bias circuit 40.
In this example, the first feedback capacitor C2 and the second feedback capacitor C3 can both play a role in isolating direct current, that is, the first feedback capacitor C2 and the second feedback capacitor C3 both play a role in blocking direct current, and the capacitance reactance thereof changes with the frequency change of the radio frequency signal; in the process of amplifying signals by the first amplifier M1 and the second amplifier M2, the linearity of the push-pull power amplifying circuit is improved based on the effects of the first feedback capacitor C2 and the second feedback capacitor C3. Understandably, the connection of the first feedback capacitor C2 and the second feedback capacitor C3 to the input balun 10 can be referred to the examples shown in fig. 1-4.
In one embodiment, as shown in fig. 9, the first linear feedback circuit 20 includes a first feedback resistor R3 and a first feedback capacitor C2 connected in series, the first feedback resistor R3 is connected to the input balun 10, and the first feedback capacitor C3 is connected to the first bias circuit 40; the second linear feedback circuit 30 includes a second feedback resistor R4 and a second feedback capacitor C3 connected in series, the second feedback resistor R4 is connected to the input balun 10, and the second feedback capacitor C3 is connected to the second bias circuit 50.
In this example, the first feedback resistor R3 and the first feedback capacitor C2 are connected in series, and the total impedance of the first linear feedback circuit 20 formed by the first feedback resistor R3 and the first feedback capacitor C2 is determined by the impedance of the first feedback resistor R3 and the capacitive reactance of the first feedback capacitor C2, and the total impedance of the first linear feedback circuit 20 also changes with the frequency of the rf signal. Understandably, in the process of signal amplification by the first amplifier M1, the linearity of the push-pull power amplifying circuit is improved by the cooperation of the first feedback resistor R3 and the second feedback capacitor C2.
Accordingly, the second feedback resistor R4 and the second feedback capacitor C3 are connected in series, and the total impedance of the second linear feedback circuit 30 formed by the second feedback resistor R4 and the second feedback capacitor C3 is determined by the impedance of the second feedback resistor R4 and the capacitive reactance of the second feedback capacitor C3, and the total impedance of the second linear feedback circuit 30 also changes with the frequency change of the radio frequency signal. Understandably, in the process of signal amplification by the second amplifier M2, the linearity of the push-pull power amplifying circuit is improved under the cooperation of the second feedback resistor R4 and the second feedback capacitor C3.
Preferably, as shown in fig. 5, the first bias circuit 40 is coupled to the first end of the first capacitor C1 through a first resistor R1, and the second bias circuit 50 is coupled to the second end of the first capacitor C1 through a second resistor R2.
In a specific embodiment, when the first bias circuit 40 is coupled to the first coil segment of the secondary coil of the input balun 10 and the second bias circuit 50 is coupled to the second coil segment of the secondary coil of the input balun 10, the first bias circuit 40 can provide a proper bias signal for the first amplifier M1 and the second bias circuit 50 can provide a proper bias signal for the second amplifier M2 by flexibly adjusting the resistance values of the first resistor R1 and the second resistor R2, so that the first amplifier M1 and the second amplifier M2 are at proper working quiescent points; and the robustness of the whole circuit of the push-pull power amplification circuit is further improved.
It should be noted that, in the present application, the first bias circuit 40 is coupled to the first end of the capacitor through the first resistor R1, and the second bias circuit 50 is coupled to the second end of the capacitor through the second resistor R2, which is only one preferred embodiment, and the first bias circuit 40 and the second bias circuit 50 may also be coupled to the first end and the second end of the capacitor through any other manner. For example, the first bias circuit 40 may be further coupled to the first end of the capacitor through a first LC parallel circuit, and the second bias circuit 5 may be further coupled to the second end of the capacitor through a second LC parallel circuit, which is not illustrated here.
In a specific embodiment, the first bias circuit includes a first bias transistor K1, a first terminal of the first bias transistor is connected to the first bias power supply port, a second terminal of the first bias transistor is connected to the first power supply terminal, and a third terminal of the first bias transistor K1 is connected to the first resistor. The first bias power supply port is a port for receiving a first bias signal source.
The second bias circuit comprises a second bias transistor K2, a first end of the second bias transistor K2 is connected with a second bias power supply port, a second end of the second bias transistor K2 is connected with a second power supply end, and a third end of the second bias transistor K2 is connected with the second resistor. Wherein the second bias power supply port is a port for receiving a second bias signal source.
Specifically, referring to fig. 8 and 9, the first bias circuit 40 further includes a first bias power terminal S and a first voltage dividing unit 41, the first bias power terminal S1 is connected to a first terminal of the first bias transistor K1, the first bias power terminal S1 is connected to a ground terminal through the first voltage dividing unit 41, a second terminal of the first bias transistor K1 is connected to a first power supply power terminal, and a third terminal of the first bias transistor K1 is connected to the first resistor R1.
The second bias circuit 50 further includes a second bias power terminal S2 and a second voltage dividing unit 51, the second bias power terminal S2 is connected to the first terminal of the second bias transistor K2, the second bias power terminal S2 is connected to the ground terminal through the second voltage dividing unit 51, the second terminal of the second bias transistor K2 is connected to the power supply power terminal, and the third terminal of the second bias transistor K2 is connected to the second resistor R2.
Alternatively, the first bias power supply terminal S1 is configured to receive a source of a bias signal from a first bias power supply and to supply the source of the bias signal to the first bias transistor K1. The first bias power supply may be a bias current source or a bias voltage source. When the bias current source is used, the bias signal source provided for the first bias transistor K1 is a bias current, and when the bias current source is used, the bias signal source provided for the first bias transistor K1 is a bias voltage. The first bias transistor K1 may be a selection bipolar transistor (BJT) and a Field Effect Transistor (FET). When the first bias transistor K1 is a Bipolar Junction Transistor (BJT), the first bias power source terminal S1 is connected to the base of the first bias transistor K1, and is configured to provide a bias signal source to the base of the first bias transistor K1, and the emitter of the first bias transistor K1 is connected to the first resistor R1, thereby implementing the respective provision of bias signals to the first amplifier M1. When the first bias transistor K1 is a Field Effect Transistor (FET), the first bias power supply terminal S1 is connected to the gate of the first bias transistor K1, and is configured to supply a bias signal source to the gate of the first bias transistor K1, and the source of the first bias transistor K1 is connected to the first resistor R1, thereby realizing the supply of the bias signal to the first amplifier M1.
Further, the first bias circuit 40 further includes a first voltage dividing unit 41 disposed between the first bias power supply terminal S1 and the ground terminal, and a connection node between the first bias power supply terminal S1 and the first voltage dividing unit 41 is connected to the first terminal of the first bias transistor K1. The first voltage-dividing unit 41 includes a first voltage-dividing transistor and a second voltage-dividing transistor connected in series, a first terminal of the first voltage-dividing transistor is connected to the first bias power supply terminal S1, a second terminal thereof is connected to a first terminal of the second voltage-dividing transistor, and a second terminal thereof is connected to a ground terminal. The first voltage division unit 41 may stabilize a quiescent operating point of the bias signal. It should be noted that, in addition to the embodiment, the first voltage-dividing transistor and the second voltage-dividing transistor may be diodes, or may be replaced by a triode.
Likewise, the second bias power supply terminal S1 is configured to receive a source of bias signal from the second bias power supply and to provide the source of bias signal to the second bias transistor K2. The second bias power supply may be a bias current source or a bias voltage source. When the bias current source is used, the bias signal source provided for the second bias transistor K2 is a bias current, and when the bias current source is used, the bias signal source provided for the second bias transistor K2 is a bias voltage. The second bias transistor K2 may be a selection bipolar transistor (BJT) and a Field Effect Transistor (FET). When the first bias transistor K2 is a bipolar transistor (BJT), the second bias power supply terminal S2 is connected to the base of the thermal bias transistor K2, and is configured to provide a bias signal source to the base of the second bias transistor K2, and the emitter of the second bias transistor K2 is connected to the second resistor R2, thereby implementing the respective provision of bias signals to the second amplifier M2. When the second bias transistor K2 is a Field Effect Transistor (FET), the second bias power supply terminal S2 is connected to the gate of the second bias transistor K2, and is configured to supply a bias signal source to the gate of the second bias transistor K2, and the source of the second bias transistor K2 is connected to the second resistor R2, thereby realizing the supply of the bias signal to the second amplifier M2.
Further, the second bias circuit 50 further includes a second voltage dividing unit 51 disposed between the second bias power supply terminal S2 and the ground terminal, and a connection node between the second bias power supply terminal S2 and the second voltage dividing unit 51 is connected to the first terminal of the second bias transistor K2. The second voltage dividing unit 42 includes a third voltage dividing transistor and a fourth voltage dividing transistor connected in series, a first end of the third voltage dividing transistor is connected to the second bias power supply terminal S2, a second end of the third voltage dividing transistor is connected to a first end of the fourth voltage dividing transistor, and a second end of the fourth voltage dividing transistor is connected to the ground terminal. The second voltage division unit 51 may stabilize the quiescent operating point of the bias signal. It should be noted that, in addition to this embodiment, the third voltage division transistor and the fourth voltage division transistor may be diodes, or may be replaced by a triode.
It should be noted that the first bias power supply for providing the bias signal source for the first bias circuit 40 and the second bias power supply for providing the bias signal source for the second bias circuit 50 may be the same bias power supply or different bias power supplies. That is, the first bias transistor K1 in the first bias circuit 40 and the second bias transistor K2 in the second bias circuit 50 may be connected to one bias power source through the same bias power source terminal, or may be connected to two different bias power sources through two different bias power source terminals, respectively. The first bias power supply and the second bias power supply can adopt constant current sources for providing constant current as input current and ensuring the stability of the output first bias current and the output second bias current.
In a specific embodiment, referring to fig. 8 and 9 below, the second terminal of the first linear feedback circuit 20 is connected to the third terminal of the first bias transistor K1; a second terminal of the second linear feedback circuit 30 is connected to a third terminal of the second bias transistor K2. According to the method, the first end of the first linear feedback circuit 20 is connected with the input balun 10, the second end of the first linear feedback circuit 20 is connected with the third end of the first bias transistor K1 in the first bias circuit 40, the first end of the second linear feedback circuit 20 is connected with the input balun 10, the second end of the second linear feedback circuit 20 is connected with the third end of the second bias transistor K2 in the second bias circuit 50, the first bias signal output to the first amplifier M1 through the first bias circuit 40 and the second bias signal output to the second amplifier M2 through the second bias circuit 50 adjust and optimize the input radio-frequency signal, distortion of the radio-frequency signal is reduced, linearity of the push-pull power amplification circuit is improved, and overall performance of the push-pull power amplification circuit is optimized.
In a specific embodiment, referring to FIG. 10 below, the second terminal of the first linear feedback circuit is connected to the first terminal of the first bias transistor; a second terminal of the second linear feedback circuit is connected to a first terminal of the second bias transistor. According to the invention, by using the first linear feedback circuit 20 and the second linear feedback circuit 30, the first end of the first linear feedback circuit 20 is connected with the input balun 10, the second end is connected with the first end of the first bias transistor K1 in the first bias circuit 40, the first end of the second linear feedback circuit 20 is connected with the input balun 10, the second end is connected with the first end of the second bias transistor K2 in the second bias circuit 50, and the input radio-frequency signal is adjusted and optimized by the bias signal source provided by the first bias power supply end in the first bias circuit 40 and the bias signal source provided by the second bias power supply end in the second bias circuit 40, so that distortion of the radio-frequency signal is reduced, the linearity of the push-pull power amplification circuit is improved, and the overall performance of the push-pull power amplification circuit is optimized.
In this example, the first bias circuit 40 provides a first bias signal to the first amplifier M1 to thereby ensure that the first amplifier M1 can amplify the signal without distortion. Specifically, the first bias signal output by the first bias circuit 40 is coupled to the first end of the first amplifier M1 through the first coupling resistor R1, and the first dc blocking capacitor C1 plays a role of isolating the dc current, so that the first end, the second end, and the third end of the first amplifier M1 are at the required potentials, the emitter junction and the collector junction of the first amplifier M1 are forward biased and reverse biased, thereby ensuring that the first amplifier M1 can amplify the signal without distortion.
The second bias circuit 50 provides a second bias signal to the second amplifier M2 so that the second amplifier M2 can amplify the signal without distortion. Specifically, the second bias signal output by the second bias circuit 50 is coupled to the first terminal of the second amplifier M2 through the second coupling resistor R2, and the first dc blocking capacitor C1 plays a role of isolating the dc current, so that the first terminal, the second terminal, and the third terminal of the second amplifier M2 are at the required potentials, the emitter junction and the collector junction of the second amplifier M2 are forward biased and reverse biased, thereby ensuring that the second amplifier M2 can amplify the signal without distortion.
An embodiment of the present invention provides a push-pull power amplifying circuit, as shown in fig. 6 to 7, including an input balun 10, a first bias circuit 40, a second bias circuit 50, a first capacitor C1, a first amplifier M1, a second amplifier M2, a first linear feedback circuit 20, and a second linear feedback circuit 30; the input balun 10 comprises a primary coil and a secondary coil, a first end of the secondary coil is connected to the first amplifier M1, and a second end of the secondary coil is connected to the second amplifier M2; the secondary coil includes a first coil segment and a second coil segment, the first coil segment and the second coil segment are connected by the first capacitor C1, a first end of the first coil segment is connected with a first end of the first capacitor C1, a second end of the first capacitor is connected to a first end of the second coil segment, the first bias circuit 40 is coupled to the first end of the first capacitor C1, and the second bias circuit 50 is coupled to the second end of the first capacitor C1.
A first end of the first linear feedback circuit 20 is connected to the output end of the first amplifier M1, and a second end of the first linear feedback circuit 20 is connected to the first bias circuit 40; a first terminal of the second linear feedback circuit 30 is connected to the output terminal of the second amplifier M2, and a second terminal of the second linear feedback circuit 30 is connected to the second bias circuit 50; alternatively, the first end of the first linear feedback circuit 20 is connected to the output end of the second amplifier M2, and the second end of the first linear feedback circuit 20 is connected to the first bias circuit 40; a first terminal of the second linear feedback circuit 30 is connected to the output terminal of the first amplifier M1, and a second terminal of the second linear feedback circuit 30 is connected to the second bias circuit 50. The first linear feedback circuit 20 and the second linear feedback circuit 30 are used for adjusting and optimizing the output radio frequency signals, so that distortion of the radio frequency signals is reduced, linearity of the push-pull power amplifying circuit is improved, and overall performance of the push-pull power amplifying circuit is optimized.
In one embodiment, the first linear feedback circuit includes a first feedback capacitor C2, one end of the first feedback capacitor C2 is connected to the output terminal of the first amplifier M1, and the other end is connected to the first bias circuit 30. The second linear feedback circuit comprises a second feedback capacitor; one end of the second feedback capacitor C3 is connected to the output end of the second amplifier M2, and the other end is connected to the second bias circuit 40. Alternatively, one end of the first feedback capacitor C2 is connected to the output end of the second amplifier M2, the other end is connected to the first bias circuit 30, one end of the second feedback capacitor C3 is connected to the output end of the first amplifier M1, and the other end is connected to the second bias circuit 40.
In this example, the first feedback capacitor C2 and the second feedback capacitor C3 can both play a role in isolating direct current, that is, the first feedback capacitor C2 and the second feedback capacitor C3 both play a role in blocking direct current, and the capacitance reactance thereof changes with the frequency change of the radio frequency signal; in the process of signal amplification of the first amplifier M1 and the second amplifier M2, the linearity of the push-pull power amplification circuit is improved based on the effects of the first feedback capacitor C2 and the second feedback capacitor C3. Understandably, the connection manner of the first feedback capacitor C2 and the second feedback capacitor C3 with the first amplifier M1 and the second amplifier M2 can refer to the examples shown in fig. 6 to 7.
In a specific embodiment, the first linear feedback circuit includes a first feedback resistor and a first feedback capacitor connected in series, and the second linear feedback circuit includes a second feedback resistor and a second feedback capacitor connected in series.
In one embodiment, the first linear feedback circuit 20 includes a first feedback resistor R3 and a first feedback capacitor C2 connected in series, the first feedback resistor R3 is connected to the output terminal of the first amplifier M1, and the first feedback capacitor C3 is connected to the first bias circuit 40; the second linear feedback circuit 30 includes a second feedback resistor R4 and a second feedback capacitor C3 connected in series, the second feedback resistor R4 is connected to the output terminal of the second amplifier M2, and the second feedback capacitor C3 is connected to the second bias circuit 50.
In this example, the first feedback resistor R3 and the first feedback capacitor C2 are connected in series, and the total impedance of the first linear feedback circuit 20 formed by the first feedback resistor R3 and the first feedback capacitor C2 is determined by the impedance of the first feedback resistor R3 and the capacitive reactance of the first feedback capacitor C2, and the total impedance of the first linear feedback circuit 20 also changes with the frequency of the radio frequency signal. Understandably, in the process of signal amplification of the first amplifier M1, under the cooperation of the first feedback resistor R3 and the second feedback capacitor C2, the linearity of the push-pull power amplifying circuit is improved.
Accordingly, the second feedback resistor R4 and the second feedback capacitor C3 are connected in series, and the total impedance of the second linear feedback circuit 30 formed by the second feedback resistor R4 and the second feedback capacitor C3 is determined by the impedance of the second feedback resistor R4 and the capacitive reactance of the second feedback capacitor C3, and the total impedance of the second linear feedback circuit 30 also changes with the frequency of the radio frequency signal. Understandably, in the process of signal amplification by the second amplifier M2, the linearity of the push-pull power amplifying circuit is improved under the cooperation of the second feedback resistor R4 and the second feedback capacitor C3.
In a specific embodiment, the first bias circuit is coupled to a first terminal of the first capacitor through a first resistor, and the second bias circuit is coupled to a second terminal of the first capacitor through a second resistor.
In a specific embodiment, when the first bias circuit 40 is coupled to the first coil segment of the secondary coil of the input balun 10 and the second bias circuit 50 is coupled to the second coil segment of the secondary coil of the input balun 10, the first bias circuit 40 may provide a suitable bias signal for the first amplifier M1 and the second bias circuit 50 may provide a suitable bias signal for the second amplifier M2 by flexibly adjusting resistance values of the first resistor R1 and the second resistor R2, so that the first amplifier M1 and the second amplifier M2 are at suitable operating quiescent operating points; and the robustness of the whole circuit of the push-pull power amplification circuit is further improved.
It should be noted that, in the present application, the first bias circuit 40 is coupled to the first end of the capacitor through the first resistor R1, and the second bias circuit 50 is coupled to the second end of the capacitor through the second resistor R2, which is only one preferred embodiment, and the first bias circuit 40 and the second bias circuit 50 may also be coupled to the first end and the second end of the capacitor through any other manner. For example, the first bias circuit 40 may be further coupled to the first end of the capacitor through a first LC parallel circuit, and the second bias circuit 5 may be further coupled to the second end of the capacitor through a second LC parallel circuit, which is not illustrated here.
In a specific embodiment, the first bias circuit includes a first bias transistor K1, a first terminal of the first bias transistor is connected to the first bias power supply port, a second terminal of the first bias transistor is connected to the first power supply terminal, and a third terminal of the first bias transistor K1 is connected to the first resistor. The first bias power supply port is a port for receiving a first bias signal source.
The second bias circuit comprises a second bias transistor K2, a first end of the second bias transistor K2 is connected with a second bias power supply port, a second end of the second bias transistor K2 is connected with a second power supply end, and a third end of the second bias transistor K2 is connected with the second resistor. Wherein the second bias power supply port is a port for receiving a second bias signal source.
In one embodiment, the first bias circuit further includes a first bias power terminal and a first voltage divider, the first bias power terminal is connected to the first terminal of the first bias transistor, the first bias power terminal is connected to a ground terminal through the first voltage divider, the second terminal of the first bias transistor is connected to a power supply power terminal, and the third terminal of the first bias transistor is connected to the first resistor;
the second bias circuit further comprises a second bias power supply end and a second voltage-dividing unit, the second bias power supply end is connected with a first end of the second bias transistor, the second bias power supply end is connected with a ground end through the second voltage-dividing unit, a second end of the second bias transistor is connected with a power supply end, and a third end of the second bias transistor is connected with the second resistor.
Specifically, referring to fig. 8 and 9, the first bias circuit 40 includes a first bias power terminal S1, a first bias transistor K1, and a first voltage divider 41, where the first bias power terminal S1 is connected to a first terminal of the first bias transistor K1, the first bias power terminal S1 is connected to a ground terminal through the first voltage divider 41, a second terminal of the first bias transistor K1 is connected to a power supply power terminal, and a third terminal of the first bias transistor K1 is connected to the first resistor R1.
The second bias circuit 50 includes a second bias power terminal S2, a second bias transistor K2, and a second voltage divider 51, where the second bias power terminal S2 is connected to a first terminal of the second bias transistor K2, the second bias power terminal S2 is connected to a ground terminal through the second voltage divider 51, a second terminal of the second bias transistor K2 is connected to a power supply power terminal, and a third terminal of the second bias transistor K2 is connected to the second resistor R2.
Alternatively, the first bias power supply terminal S1 is configured to receive a source of a bias signal from a first bias power supply and to supply the source of the bias signal to the first bias transistor K1. The first bias power supply may be a bias current source or a bias voltage source. When the bias current source is used, the bias signal source provided for the first bias transistor K1 is a bias current, and when the bias current source is used, the bias signal source provided for the first bias transistor K1 is a bias voltage. The first bias transistor K1 may be a selection bipolar transistor (BJT) and a Field Effect Transistor (FET). When the first bias transistor K1 is a Bipolar Junction Transistor (BJT), the first bias power source terminal S1 is connected to the base of the first bias transistor K1, and is configured to provide a bias signal source to the base of the first bias transistor K1, and the emitter of the first bias transistor K1 is connected to the first resistor R1, thereby implementing the respective provision of bias signals to the first amplifier M1. When the first bias transistor K1 is a Field Effect Transistor (FET), the first bias power supply terminal S1 is connected to the gate of the first bias transistor K1, and is configured to supply a bias signal source to the gate of the first bias transistor K1, and the source of the first bias transistor K1 is connected to the first resistor R1, thereby realizing the supply of the bias signal to the first amplifier M1.
Further, the first bias circuit 40 further includes a first voltage dividing unit 41 disposed between the first bias power supply terminal S1 and the ground terminal, and a connection node between the first bias power supply terminal S1 and the first voltage dividing unit 41 is connected to the first terminal of the first bias transistor K1. The first voltage-dividing unit 41 includes a first voltage-dividing transistor and a second voltage-dividing transistor connected in series, a first terminal of the first voltage-dividing transistor is connected to the first bias power supply terminal S1, a second terminal thereof is connected to a first terminal of the second voltage-dividing transistor, and a second terminal thereof is connected to a ground terminal. The first voltage division unit 41 may stabilize a quiescent operating point of the bias signal. It should be noted that, in addition to this embodiment, the first voltage-dividing transistor and the second voltage-dividing transistor may be diodes, or may be triodes instead.
Likewise, the second bias power supply terminal S1 is configured to receive a source of bias signal from the second bias power supply and to provide the source of bias signal to the second bias transistor K2. The second bias power supply may be a bias current source or a bias voltage source. When the bias voltage source is a bias current source, the bias signal source provided for the second bias transistor K2 is a bias current, and when the bias voltage source is a bias voltage source, the bias signal source provided for the second bias transistor K2 is a bias voltage. The second bias transistor K2 may be a selection bipolar transistor (BJT) and a Field Effect Transistor (FET). When the first bias transistor K2 is a bipolar transistor (BJT), the second bias power supply terminal S2 is connected to the base of the thermal bias transistor K2, and is configured to provide a bias signal source to the base of the second bias transistor K2, and the emitter of the second bias transistor K2 is connected to the second resistor R2, thereby implementing the respective provision of bias signals to the second amplifier M2. When the second bias transistor K2 is a Field Effect Transistor (FET), the second bias power supply terminal S2 is connected to the gate of the second bias transistor K2, and is configured to provide a bias signal source to the gate of the second bias transistor K2, and the source of the second bias transistor K2 is connected to the second resistor R2, thereby implementing the provision of the bias signal to the second amplifier M2.
Further, the second bias circuit 50 further includes a second voltage dividing unit 51 disposed between the second bias power terminal S2 and the ground terminal, and a connection node between the second bias power terminal S2 and the second voltage dividing unit 51 is connected to the first terminal of the second bias transistor K2. The second voltage dividing unit 42 includes a third voltage dividing transistor and a fourth voltage dividing transistor connected in series, a first end of the third voltage dividing transistor is connected to the second bias power supply terminal S2, a second end of the third voltage dividing transistor is connected to a first end of the fourth voltage dividing transistor, and a second end of the fourth voltage dividing transistor is connected to the ground terminal. The second voltage division unit 51 may stabilize the quiescent operating point of the bias signal. It should be noted that, in addition to this embodiment, the third voltage division transistor and the fourth voltage division transistor may be diodes, or may be replaced by a triode.
It should be noted that the first bias power supply for providing the bias signal source for the first bias circuit 40 and the second bias power supply for providing the bias signal source for the second bias circuit 50 may be the same bias power supply or different bias power supplies. That is, the first bias transistor K1 in the first bias circuit 40 and the second bias transistor K2 in the second bias circuit 50 may be connected to one bias power source through the same bias power source terminal, or may be connected to two different bias power sources through two different bias power source terminals, respectively. The first bias power supply and the second bias power supply can adopt constant current sources for providing constant current as input current and ensuring the stability of the output first bias current and the second bias current.
The embodiment further provides a radio frequency front-end module, which includes the push-pull power amplification circuit, and by using the first linear feedback circuit and the second linear feedback circuit, the linearity of the radio frequency differential amplification circuit is improved under the condition that the overall performance of the push-pull power amplification circuit is ensured.
It should be understood that, the sequence numbers of the steps in the foregoing embodiments do not imply an execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned function distribution may be performed by different functional units and modules according to needs, that is, the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-mentioned functions.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the embodiments of the present application, and they should be construed as being included in the present application.
Claims (15)
1. A push-pull power amplifying circuit is characterized by comprising an input balun, a first bias circuit, a second bias circuit, a first capacitor, a first amplifier, a second amplifier, a first linear feedback circuit and a second linear feedback circuit; the input balun comprises a primary coil and a secondary coil, wherein a first end of the secondary coil is connected to the first amplifier, and a second end of the secondary coil is connected to the second amplifier; the secondary coil comprises a first coil segment and a second coil segment, the first coil segment and the second coil segment are connected by the first capacitor, a first end of the first coil segment is connected with a first end of the first capacitor, a second end of the first capacitor is connected to a first end of the second coil segment, the first bias circuit is coupled to the first end of the first capacitor, and the second bias circuit is coupled to the second end of the first capacitor;
a first end of the first linear feedback circuit is connected with the input balun, and a second end of the first linear feedback circuit is connected with the first bias circuit;
a first end of the second linear feedback circuit is coupled to the input balun and a second end of the second linear feedback circuit is coupled to the second bias circuit.
2. The push-pull power amplifier circuit as claimed in claim 1, wherein if the first input terminal of the input balun receives a radio frequency signal input and the second input terminal is connected to a ground terminal or a power terminal, the first terminal of the first linear feedback circuit is connected to the first output terminal of the input balun and the first terminal of the second linear feedback circuit is connected to the second output terminal of the input balun;
or, if the first input terminal of the input balun receives a radio frequency signal input, the second input terminal is connected to a ground terminal or a power supply terminal, the first terminal of the first linear feedback circuit is connected to the second output terminal of the input balun, and the first terminal of the second linear feedback circuit is connected to the first output terminal of the input balun.
3. Push-pull power amplification circuit according to claim 1, wherein if the first input terminal of the input balun receives a first radio frequency signal input and the second input terminal receives a second radio frequency input signal, the first terminal of the first linear feedback circuit is connected to the first output terminal of the input balun and the first terminal of the second linear feedback circuit is connected to the second output terminal of the input balun;
or, if the first input end of the input balun receives a first radio frequency signal input, the second input end receives a second radio frequency input signal, the first end of the first linear feedback circuit is connected to the second output end of the input balun, and the first end of the second linear feedback circuit is connected to the first output end of the input balun;
or, if the first input end of the input balun receives a first radio frequency signal input, the second input end receives a second radio frequency input signal, the first end of the first linear feedback circuit is connected to the first input end of the input balun, and the first end of the second linear feedback circuit is connected to the second input end of the input balun;
or, if the first input end of the input balun receives a first radio frequency signal input, the second input end receives a second radio frequency input signal, the first end of the first linear feedback circuit is connected to the second input end of the input balun, and the first end of the second linear feedback circuit is connected to the first input end of the input balun.
4. Push-pull power amplification circuit according to claim 1, wherein the first linear feedback circuit comprises a first feedback capacitance and the second linear feedback circuit comprises a second feedback capacitance.
5. Push-pull power amplification circuit according to claim 1, wherein the first linear feedback circuit comprises a first feedback resistor and a first feedback capacitor connected in series, and the second linear feedback circuit comprises a second feedback resistor and a second feedback capacitor connected in series.
6. Push-pull power amplification circuit as claimed in claim 1, wherein the first bias circuit is coupled to the first terminal of the first capacitor via a first resistor and the second bias circuit is coupled to the second terminal of the first capacitor via a second resistor.
7. The push-pull power amplifier circuit as claimed in claim 6, wherein the first bias circuit comprises a first bias transistor, a first terminal of the first bias transistor is connected to a first bias power supply port, a second terminal of the first bias transistor is connected to a first power supply terminal, and a third terminal of the first bias transistor is connected to the first resistor;
the second bias circuit comprises a second bias transistor, a first end of the second bias transistor is connected with a second bias power supply port, a second end of the second bias transistor is connected with a second power supply end, and a third end of the second bias transistor is connected with the second resistor.
8. Push-pull power amplification circuitry as claimed in claim 7 wherein the second terminal of the first linear feedback circuit is connected to the third terminal of the first bias transistor; the second terminal of the second linear feedback circuit is connected with the third terminal of the second bias transistor.
9. Push-pull power amplification circuitry as claimed in claim 7 wherein the second terminal of the first linear feedback circuit is connected to the first terminal of the first bias transistor; a second terminal of the second linear feedback circuit is connected to a first terminal of the second bias transistor.
10. A push-pull power amplifying circuit is characterized by comprising an input balun, a first bias circuit, a second bias circuit, a first capacitor, a first amplifier, a second amplifier, a first linear feedback circuit and a second linear feedback circuit; the input balun comprises a primary coil and a secondary coil, wherein a first end of the secondary coil is connected to the first amplifier, and a second end of the secondary coil is connected to the second amplifier; the secondary coil comprises a first coil segment and a second coil segment, the first coil segment and the second coil segment are connected by the first capacitor, a first end of the first coil segment is connected with a first end of the first capacitor, a second end of the first capacitor is connected to a first end of the second coil segment, the first bias circuit is coupled to the first end of the first capacitor, and the second bias circuit is coupled to the second end of the first capacitor;
a first end of the first linear feedback circuit is connected with the output end of the first amplifier, and a second end of the first linear feedback circuit is connected with the first bias circuit; a first end of the second linear feedback circuit is connected with the output end of the second amplifier, and a second end of the second linear feedback circuit is connected with the second bias circuit;
or, a first end of the first linear feedback circuit is connected to the output end of the second amplifier, and a second end of the first linear feedback circuit is connected to the first bias circuit; and the first end of the second linear feedback circuit is connected with the output end of the first amplifier, and the second end of the second linear feedback circuit is connected with the second bias circuit.
11. Push-pull power amplification circuitry as claimed in claim 10 wherein the first linear feedback circuitry comprises a first feedback capacitance and the second linear feedback circuitry comprises a second feedback capacitance.
12. The push-pull power amplification circuit of claim 10, wherein the first linear feedback circuit comprises a first feedback resistor and a first feedback capacitor connected in series, and the second linear feedback circuit comprises a second feedback resistor and a second feedback capacitor connected in series.
13. The push-pull power amplifier circuit according to claim 10, wherein the first bias circuit is coupled to a first terminal of the first capacitor through a first resistor, and the second bias circuit is coupled to a second terminal of the first capacitor through a second resistor.
14. The push-pull power amplifier circuit as claimed in claim 13, wherein the first bias circuit comprises a first bias transistor, a first terminal of the first bias transistor is connected to a first bias power supply port, a second terminal of the first bias transistor is connected to a first power supply terminal, and a third terminal of the first bias transistor is connected to the first resistor;
the second bias circuit comprises a second bias transistor, a first end of the second bias transistor is connected with a second bias power supply port, a second end of the second bias transistor is connected with a second power supply end, and a third end of the second bias transistor is connected with the second resistor.
15. A radio frequency front end module comprising a push-pull power amplification circuit as claimed in any one of claims 1 to 14.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202110741939.3A CN115622518B (en) | 2021-06-30 | 2021-06-30 | Push-pull power amplifying circuit and radio frequency front end module |
PCT/CN2022/098336 WO2023273850A1 (en) | 2021-06-30 | 2022-06-13 | Push-pull power amplifier circuit and radio frequency front-end module |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202110741939.3A CN115622518B (en) | 2021-06-30 | 2021-06-30 | Push-pull power amplifying circuit and radio frequency front end module |
Publications (2)
Publication Number | Publication Date |
---|---|
CN115622518A true CN115622518A (en) | 2023-01-17 |
CN115622518B CN115622518B (en) | 2024-08-23 |
Family
ID=84689718
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202110741939.3A Active CN115622518B (en) | 2021-06-30 | 2021-06-30 | Push-pull power amplifying circuit and radio frequency front end module |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN115622518B (en) |
WO (1) | WO2023273850A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116722829A (en) * | 2023-05-08 | 2023-09-08 | 锐石创芯(深圳)科技股份有限公司 | Power amplifying circuit and radio frequency module |
Citations (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB880475A (en) * | 1957-02-09 | 1961-10-25 | John Somerset Murray | Transistor amplifier providing a balanced output signal |
GB1147231A (en) * | 1965-03-26 | 1969-04-02 | Telefunken Patent | High-frequency push-pull amplifier circuit |
CN102428647A (en) * | 2009-03-12 | 2012-04-25 | 赫梯特微波公司 | Hybrid marchand/back-wave balun and double balanced mixer using same |
US20120262961A1 (en) * | 2011-04-18 | 2012-10-18 | Noveltek Semiconductor Corp. | Low cost high power factor LED driver |
US20160028432A1 (en) * | 2014-07-28 | 2016-01-28 | Rfaxis, Inc. | Complementary metal oxide semiconductor differential antenna transmit-receive switches with power combining circuitry for orthogonal frequency-division multiplexing systems |
CN205081703U (en) * | 2014-12-16 | 2016-03-09 | 意法半导体股份有限公司 | A equipment and converter system for power transistor of control power level |
US20170338781A1 (en) * | 2016-04-13 | 2017-11-23 | Skyworks Solutions, Inc. | Power amplification system with reactance compensation |
CN109347451A (en) * | 2018-08-29 | 2019-02-15 | 北京理工大学 | It is a kind of for improving the power amplifier of ultrasonic guided wave signals energy |
CN210380776U (en) * | 2019-11-05 | 2020-04-21 | 航天科工微系统技术有限公司 | Lossless negative feedback low-noise amplifier circuit |
CN210745090U (en) * | 2019-09-20 | 2020-06-12 | 重庆桴之科科技发展有限公司 | High-gain high-efficiency high-power amplifier for Internet of vehicles |
CN111600559A (en) * | 2020-06-16 | 2020-08-28 | 锐石创芯(深圳)科技有限公司 | Power amplifier output matching circuit, radio frequency front end module and wireless device |
CN112260654A (en) * | 2020-10-30 | 2021-01-22 | 锐石创芯(深圳)科技有限公司 | Power amplifier system |
CN112671356A (en) * | 2020-12-30 | 2021-04-16 | 北京百瑞互联技术有限公司 | Broadband matching circuit of radio frequency linear power amplifier |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP3145077B1 (en) * | 2015-09-16 | 2019-11-13 | Ampleon Netherlands B.V. | A power amplifier cell |
JP6497564B2 (en) * | 2015-12-17 | 2019-04-10 | 株式会社Wave Technology | Balun transformer and electronic equipment using the same |
EP3605842A1 (en) * | 2018-08-02 | 2020-02-05 | TRUMPF Huettinger Sp. Z o. o. | Balun and amplifier including the balun |
-
2021
- 2021-06-30 CN CN202110741939.3A patent/CN115622518B/en active Active
-
2022
- 2022-06-13 WO PCT/CN2022/098336 patent/WO2023273850A1/en active Application Filing
Patent Citations (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB880475A (en) * | 1957-02-09 | 1961-10-25 | John Somerset Murray | Transistor amplifier providing a balanced output signal |
GB1147231A (en) * | 1965-03-26 | 1969-04-02 | Telefunken Patent | High-frequency push-pull amplifier circuit |
CN102428647A (en) * | 2009-03-12 | 2012-04-25 | 赫梯特微波公司 | Hybrid marchand/back-wave balun and double balanced mixer using same |
US20120262961A1 (en) * | 2011-04-18 | 2012-10-18 | Noveltek Semiconductor Corp. | Low cost high power factor LED driver |
US20160028432A1 (en) * | 2014-07-28 | 2016-01-28 | Rfaxis, Inc. | Complementary metal oxide semiconductor differential antenna transmit-receive switches with power combining circuitry for orthogonal frequency-division multiplexing systems |
CN205081703U (en) * | 2014-12-16 | 2016-03-09 | 意法半导体股份有限公司 | A equipment and converter system for power transistor of control power level |
US20170338781A1 (en) * | 2016-04-13 | 2017-11-23 | Skyworks Solutions, Inc. | Power amplification system with reactance compensation |
CN109347451A (en) * | 2018-08-29 | 2019-02-15 | 北京理工大学 | It is a kind of for improving the power amplifier of ultrasonic guided wave signals energy |
CN210745090U (en) * | 2019-09-20 | 2020-06-12 | 重庆桴之科科技发展有限公司 | High-gain high-efficiency high-power amplifier for Internet of vehicles |
CN210380776U (en) * | 2019-11-05 | 2020-04-21 | 航天科工微系统技术有限公司 | Lossless negative feedback low-noise amplifier circuit |
CN111600559A (en) * | 2020-06-16 | 2020-08-28 | 锐石创芯(深圳)科技有限公司 | Power amplifier output matching circuit, radio frequency front end module and wireless device |
CN112260654A (en) * | 2020-10-30 | 2021-01-22 | 锐石创芯(深圳)科技有限公司 | Power amplifier system |
CN112671356A (en) * | 2020-12-30 | 2021-04-16 | 北京百瑞互联技术有限公司 | Broadband matching circuit of radio frequency linear power amplifier |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116722829A (en) * | 2023-05-08 | 2023-09-08 | 锐石创芯(深圳)科技股份有限公司 | Power amplifying circuit and radio frequency module |
Also Published As
Publication number | Publication date |
---|---|
CN115622518B (en) | 2024-08-23 |
WO2023273850A1 (en) | 2023-01-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7688158B2 (en) | Digitally tuned, integrated baluns with enhanced linearity for multi-band radio applications | |
CN113728550B (en) | Variable gain amplifier and phased array transceiver | |
US20190089309A1 (en) | Multi-mode stacked amplifier | |
US12074574B2 (en) | Output matching circuit and power amplifier comprised thereof | |
US12028027B2 (en) | Matching circuit with switchable load lines, load line switching method and power amplifier | |
CN114679140B (en) | High linearity radio frequency power amplifier | |
CN218772017U (en) | Differential stacked power amplifier and radio frequency transmission circuit | |
CN103684289A (en) | Push-pull amplifier and differential push-pull amplifier | |
US7388433B1 (en) | Ground inductance compensated quadrature radio frequency amplifier | |
CN107769739A (en) | Rf power amplifier circuit | |
US20230033265A1 (en) | Radio-frequency differential amplifying circuit and radio-frequency module | |
CN101669289A (en) | An RF input transconductor stage | |
US12034413B2 (en) | Dual-mode power amplifier with switchable operating frequencies | |
US7027792B1 (en) | Topology for a single ended input dual balanced mixer | |
CN115622518B (en) | Push-pull power amplifying circuit and radio frequency front end module | |
CN113872531A (en) | Push-pull power amplifying circuit and radio frequency front end module | |
US20020097096A1 (en) | Power amplifier (PA) with increased dynamics and efficiency | |
WO2022166655A1 (en) | Push-pull power amplifier | |
EP3493402B1 (en) | Signal amplifier structure for radio transmitter | |
CN216794945U (en) | Push-pull power amplifying circuit and radio frequency front end module | |
CN213990615U (en) | Power amplification module and circuit | |
CN114915273B (en) | Push-pull power amplifier | |
CN214900806U (en) | Push-pull power amplification circuit, radio frequency front end module and communication terminal | |
CN113922762A (en) | Push-pull power amplification circuit and push-pull power amplification chip | |
US20070132512A1 (en) | Variable gain amplifier |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |