CN115616275A - Method, system and application for adjusting sampling time parameter - Google Patents
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Abstract
In order to overcome the defects of the prior art, the invention provides a method, a system and an application for adjusting sampling time parameters, wherein the method comprises the following steps: setting a standard value of the sampling voltage and a comparison time step diameter; continuously collecting sampling voltage, and acquiring a sampling voltage stabilization time point through the standard value and the comparison time step diameter; forming an adjusted sampling time parameter by the sampling voltage stabilization time point and a preset delay time; and taking the adjusted sampling time parameter as the start time of the current sampling, and storing the adjusted sampling time parameter in a register. When the subsequent simulation file is converted into the pattern file of a specific machine, the adjusted sampling time parameter can be directly called, and the time corresponding to the adjusted sampling time parameter is used for directly sampling without continuous adjustment of AE personnel, so that a large amount of time and workload are saved.
Description
Technical Field
The invention relates to the field of chip design, in particular to a method, a system and application for adjusting sampling time parameters.
Background
Chip design, also called Integrated circuit design (IC design), or very large scale Integrated circuit design (VLSI design), refers to a design process for Integrated circuits and very large scale Integrated circuits. Integrated circuit design involves modeling of electronic devices (e.g., transistors, resistors, capacitors, etc.), inter-device interconnect lines. All of the devices and interconnections need to be placed on a block of semiconductor substrate material and these components are placed on a single silicon substrate by the semiconductor device fabrication process (e.g., photolithography, etc.) to form the circuit.
The simulation verification in the chip design process is a more critical step; the simulation verification can effectively shorten the research and development period, save the experimental research cost, achieve the effect of getting twice with half the effort, assist the research and development of the forward looking technology, preempt the market first opportunity, and realize the maximized industrial value.
However, in the process of simulation verification, when the simulation file is converted into the pattern file of a specific machine, some parameters, such as the determination of sampling time, need to be continuously debugged manually by the AE personnel until the proper sampling time is found, which not only increases the workload, but also has high requirements on the capability of the AE personnel, and seriously restricts the development of chip design.
An efficient method for dynamically adjusting sampling time parameters is urgently needed to be developed.
Disclosure of Invention
In order to overcome the deficiencies of the prior art, the present invention provides a method, system and application for adjusting a sampling time parameter, which is used for solving at least one of the aforementioned technical problems.
Specifically, the technical scheme is as follows:
a method of adjusting a sampling time parameter, comprising:
setting a standard value of the sampling voltage and a comparison time step diameter;
continuously collecting sampling voltage, and acquiring a sampling voltage stabilization time point through the standard value and the comparison time step diameter;
forming an adjusted sampling time parameter by the sampling voltage stabilization time point and a preset delay time;
taking the adjusted sampling time parameter as the starting time of the current sampling;
storing the adjusted sampling time parameter in a register.
The method for adjusting the sampling time parameter further comprises, after "storing the adjusted sampling time parameter in a register":
calling the adjusted sampling time parameter from the register;
when the sampling time parameter in the simulation file to be converted into the pattern file is debugged, the adjusted sampling time parameter is set as the sampling start time of any subsequent sampling.
The step of obtaining the sampling voltage stabilization time point comprises the following steps:
taking unit time as the comparison time step diameter, and comparing the actual sampling voltage with the standard value;
and when the actual sampling voltage is continuously higher than the standard value by N comparison time steps, taking a time point corresponding to the Nth period as the sampling voltage stabilization time point, wherein N =1,2,3 \8230;.
The application of the method for adjusting the sampling time parameter in the LCD Driver test direction as described above comprises the following steps:
setting a standard voltage and a comparison time step diameter in a comparator;
collecting a voltage value of an LCD pin as an actual sampling voltage, and comparing the actual sampling voltage with the standard voltage;
continuously acquiring a comparison result of the actual sampling voltage and the standard voltage:
when the actual sampling voltage is continuously higher than the standard value N comparison time steps, taking a time point corresponding to the Nth period as a sampling voltage stabilization time point, wherein N =1,2,3 \8230; 8230;
adding the sampling voltage stabilization time point and a preset delay time to obtain an adjusted sampling time parameter for starting to sample the LCD pin;
and storing the adjusted sampling time parameter, and writing the parameter into a specified register.
The standard voltage is a first voltage or a second voltage or any voltage value in a range of the first voltage and the second voltage.
A system for adjusting a sampling time parameter, comprising:
the acquisition module is connected with the outside and used for acquiring actual sampling voltage;
the control module is electrically connected with the acquisition module and used for acquiring the actual sampling voltage;
the comparison module is electrically connected with the control module and used for obtaining a sampling voltage stabilization time point;
and the control module performs data interaction with the comparison module and is used for adding the sampling voltage stabilization time point and the preset delay time in the control module to obtain an adjusted sampling time parameter.
The system for adjusting the sampling time parameter further includes:
and the storage module is electrically connected with the control module and is used for storing the adjusted sampling time parameters.
The comparison module comprises:
the first module is electrically connected with the control module and used for comparing the actual sampling voltage with the standard voltage in the comparison module to obtain a comparison result;
the second module is electrically connected with the first module and is used for providing a comparison time step path for the actual sampling voltage and the standard voltage;
the control module performs data interaction with the first module and is used for acquiring duration meeting the following conditions;
and the actual sampling voltage is continuously higher than the standard value N, and time points corresponding to the comparison time steps are N =1,2,3, 8230; and the like.
An LCD Driver testing apparatus, comprising:
a system for adjusting a sampling time parameter as described above;
and the trigger module is electrically connected with the control module in the system and used for triggering voltage sampling according to the adjusted sampling time parameter so as to test the LCD Driver testing device.
An electronic device, comprising:
a storage medium for storing a computer program;
a processing unit, which exchanges data with the storage medium, and is used for executing the computer program through the processing unit when the notification is performed, so as to perform the steps of the method for adjusting the sampling time parameter.
The invention has at least the following beneficial effects:
the method of the invention comprises the steps of setting a standard value of a sampling voltage and comparing time steps; continuously collecting sampling voltage to obtain a sampling voltage stabilization time point; then, forming an adjusted sampling time parameter by the sampling voltage stabilization time point and a preset delay time; finally, the adjusted sampling time parameter is used as the starting time of the current sampling, and the adjusted sampling time parameter is stored in a register; (ii) a In subsequent chip design, when the simulation file is converted into the pattern file of a specific machine, the adjusted sampling time parameter can be directly called, and the time corresponding to the adjusted sampling time parameter is directly used for sampling without continuous adjustment of AE personnel, so that a large amount of time and workload are saved.
The system is connected with the outside through the acquisition module and acquires actual sampling voltage; then, the control module is electrically connected with the acquisition module to acquire the actual sampling voltage; the comparison module is electrically connected with the control module to obtain a sampling voltage stabilization time point; performing data interaction by using the control module and the comparison module, and adding the sampling voltage stabilization time point and the preset delay time in the control module to obtain an adjusted sampling time parameter; the system has the advantages of simple composition and accurate acquisition of the adjusted sampling time parameter.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
FIG. 1 is a flow chart of the method of the present invention;
FIG. 2 is a general flow chart of the method of the present invention applied in the LCD Driver test direction;
FIG. 3 is a flow chart of the process of FIG. 2 for obtaining a sampling voltage stabilization time point;
FIG. 4 is a waveform diagram of sampling in a particular use of the process of FIG. 2;
FIG. 5 is a screenshot in which the pattern in the flow of FIG. 2 is specifically used;
FIG. 6 is a block diagram of a system for dynamically adjusting sampling time parameters based on pattern self-learning;
FIG. 7 is a system block diagram of an LCD Driver testing device;
in fig. 1-7:
100. an acquisition module; 200. a control module; 300. a comparison module; 400. a storage module; 500. a departure module; 31. a first module; 32. a second module.
Detailed Description
Those skilled in the art will appreciate that the modules in the devices in the implementation scenario may be distributed in the devices in the implementation scenario according to the description of the implementation scenario, or may be located in one or more devices different from the present implementation scenario with corresponding changes. The modules of the implementation scenario may be combined into one module, or may be further split into multiple sub-modules.
Specific example I:
the present invention provides an embodiment:
referring to fig. 1, a method for dynamically adjusting a sampling time parameter based on pattern self-learning includes: setting a standard value of the sampling voltage and a comparison time step diameter; continuously collecting sampling voltage, and acquiring a sampling voltage stabilization time point through the standard value and the comparison time step diameter; forming an adjusted sampling time parameter by the sampling voltage stabilization time point and a preset delay time; taking the adjusted sampling time parameter as the starting time of the current sampling; storing the adjusted sampling time parameter in a register; in subsequent work, if the simulation file is converted into a pattern file of a specific machine, the adjusted sampling time parameter can be automatically and directly called, and the time corresponding to the adjusted sampling time parameter is used for directly sampling;
the adjusted sampling time parameter may be obtained by: continuously collecting sampling voltage, and automatically adjusting the time parameter to be debugged through the sampling voltage in a self-learning mode to obtain an adjusted sampling time parameter; storing the adjusted sampling time parameter into a preset register; by the method, the continuous parameter adjustment of AE personnel is not needed, and only the adjusted sampling time parameter needs to be called, so that a large amount of time is saved;
specifically, a standard value of the sampling voltage and a comparison time step diameter in the comparator may be set in the comparator; acquiring actual sampling voltage, and acquiring a sampling voltage stabilization time point through the standard value and the comparison time step diameter; forming the adjusted sampling time parameter by the sampling voltage stabilization time point and a preset delay time;
in this embodiment, the self-learning manner may be to invoke a micro instruction with a self-learning function, such as trigger _ spare;
the step of obtaining the sampling voltage stabilization time point comprises the following steps:
taking the minimum time resolution of the compare function as the comparison time step diameter, and comparing the actual sampling voltage with the standard value; after the actual sampling voltage is continuously higher than the standard value N comparison time steps, taking a time point corresponding to the Nth period as a sampling voltage stabilization time point, wherein N =1,2,3 \8230;
when the micro instruction trigger _ spare is used, only one time delay after voltage stabilization is required to be appointed to start sampling, and the internal part of the trigger _ spare at the time point of voltage stabilization is compared according to the minimum resolution of time as a comparison time step path, so that the adjusted sampling time parameter is obtained.
Specific example II:
the invention also provides an embodiment:
in the present embodiment, as shown in fig. 4, taking LCD Driver test as an example, when the image data is transmitted, the time data must be accurate at which time point to start sampling the gray scale data of the LCD pins; the sampling time is strictly required and cannot be early or late; if too early, the gray scale data is still inaccurate, and the voltage may be still in the process of rising; if the time is too late, the acquisition is missed because the voltage holding time is short;
referring to fig. 2-5, an application of the method for dynamically adjusting sampling time parameters based on pattern self-learning in LCD Driver testing direction according to embodiment I includes: setting a standard voltage and a comparison time step diameter in a comparator; collecting a voltage value of an LCD pin as an actual sampling voltage, and comparing the actual sampling voltage with the standard voltage; continuously acquiring a comparison result of the actual sampling voltage and the standard voltage: when the actual sampling voltage is continuously higher than the standard value by N comparison time steps, taking a time point corresponding to the Nth period as the sampling voltage stabilization time point; preferably, N =3; adding the sampling voltage stabilization time point and a preset delay time to obtain an adjusted sampling time parameter for starting to sample the LCD pin; and storing the adjusted sampling time parameter, and writing the parameter into a specified register.
The principle of the embodiment is as follows:
by adding a micro instruction with a self-learning function, such as trigger _ spare, when the sampling circuit is used, only the delay is needed to be prolonged after a voltage stabilization time point is appointed; comparing the output voltage with the match function of the LCD pin according to the minimum resolution of time, such as 1ns, in the trigger _ spare at the voltage stabilization time point to determine the sampling voltage stabilization time point; then, adding the sampling voltage stabilization time point and the preset delay time to obtain an adjusted sampling time parameter for starting to sample the LCD pin; meanwhile, the adjusted sampling time parameters are stored; when the device runs again, the adjusted sampling time parameter can be directly used as a sampling time point, so that the device only needs to do self-learning for the first time after pattern loading, and then the device runs and can directly use the learning result; the adjusted sampling time parameter can be stored in a file, such as a configuration file, and a user can manually update the content of pattern according to the value, so that the complexity of chip debugging and the debugging workload can be reduced; of course, the preset delay time in this embodiment can be set by itself, such as 0 or 1ns;
preferably, the standard voltage is a point value, such as a first voltage or a second voltage; or, the standard voltage is a range value, such as any voltage value in a first voltage range and a second voltage range;
referring to fig. 3, the adjusted sampling time parameter may be obtained by referring to the following steps:
a) Issuing a voltage value of a standard voltage of an LCD pin, wherein the standard voltage can be any voltage between a second voltage VOH and a first voltage VOL;
b) Setting a comparison time step diameter value, such as 1ns, and setting a comparison time limit, namely a timeout time value;
c) Comparing the actual pin voltage with the standard voltage by using the compare function of the LCD pin;
d) If the match continues for 3 time step values, which are true, the sampling voltage stabilization time point is considered to be entered; the preset delay time value is 0; adding the time of the sampling voltage stabilization time point with a preset delay value to obtain a final sampling time value, namely an adjusted sampling time parameter;
e) Triggering the MDGT to sample at the time point corresponding to the adjusted sampling time parameter;
f) Saving the adjusted sampling time parameter of step d) to a file, such as a configuration file or directly storing the adjusted sampling time parameter to a specified register;
g) If the compare is false, the compare is cycled until timeout ends;
if the adjusted sampling time parameter is 5ns, then sampling needs to be triggered after 5ns, and multiple times of manual debugging are not needed.
Specific example III:
the invention also provides an embodiment:
referring to fig. 6, a system for dynamically adjusting a sampling time parameter based on pattern self-learning includes: the device comprises an acquisition module 100, a control module 200, a comparison module 300 and a storage module 400; the acquisition module 100 is connected with the outside and used for acquiring actual sampling voltage; the control module 200 is electrically connected to the acquisition module 100, and is configured to obtain the actual sampling voltage; the comparison module 300 is electrically connected to the control module 200, and is configured to obtain a sampling voltage stabilization time point; the control module 200 performs data interaction with the comparison module 300, and is configured to add the sampling voltage stabilization time point to a preset delay time in the control module 200 to obtain an adjusted sampling time parameter; the storage module 400 is electrically connected to the control module 200, and is configured to store the adjusted sampling time parameter.
In this embodiment, preferably, the acquisition module 100 may be a sampling resistor; the comparison module 300 is any type of comparator with comparison function, and can be selected according to the situation.
Further, the comparing module 300 includes: a first module 31 and a second module 32; the first module 31 is electrically connected to the control module 200, and configured to compare the actual sampling voltage with the standard voltage in the comparing module 300 to obtain a comparison result; the second module 32 is electrically connected to the first module 31, and is configured to provide a comparison time step for the actual sampling voltage and the standard voltage; the control module 200 performs data interaction with the first module 31, and is used for acquiring duration meeting the following conditions; and the actual sampling voltage is continuously higher than the standard value at the time points corresponding to the 3 comparison time steps.
Specific example IV:
the present invention further provides an embodiment:
referring to fig. 7, an LCD Driver testing apparatus including the system according to embodiment III further includes: a trigger module 500; the trigger module 500 is electrically connected with the control module 200 in the system, and can trigger voltage sampling according to the adjusted sampling time parameter so as to test the LCD Driver testing device and ensure the accuracy of sampling.
The invention also provides an embodiment:
an electronic device, comprising: a storage medium and a processing unit for storing a computer program; wherein, the processing unit exchanges data with the storage medium, and is used for executing the computer program through the processing unit when notification is performed, so as to perform the steps of the method for dynamically adjusting the sampling time parameter based on pattern self-learning as described above.
In the electronic apparatus, the storage medium is preferably a storage device such as a mobile hard disk, a solid state disk, or a usb disk; a processing unit, preferably a CPU, exchanging data with the storage medium, for executing the computer program by the processing unit when performing branch merging, so as to perform the steps of the method for dynamically adjusting the sampling time parameter based on pattern self-learning as described above.
The CPU described above can perform various appropriate actions and processes according to a program stored in a storage medium. The electronic device also includes peripherals including an input portion for a keyboard, a mouse, etc., and an output portion such as a Cathode Ray Tube (CRT), a Liquid Crystal Display (LCD), etc., and a speaker, etc.; in particular, according to the disclosed embodiments of the invention, the processes as described in any of fig. 1-4 may each be implemented as a computer software program.
The invention also provides an embodiment:
a computer-readable storage medium: the computer readable storage medium having stored therein a computer program; the computer program performs the steps of the method for dynamically adjusting the sampling time parameter based on pattern self-learning as described above when running.
In the present embodiment, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In the present invention, however, a computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wire, fiber optic cable, RF, etc., or any suitable combination of the foregoing.
The above disclosure is only a few specific implementation scenarios of the present invention, however, the present invention is not limited thereto, and any variations that can be made by those skilled in the art are intended to fall within the scope of the present invention. The above-mentioned serial numbers of the present invention are merely for description, and do not represent the merits of the implementation scenario.
Claims (10)
1. A method of adjusting a sampling time parameter, comprising:
setting a standard value of the sampling voltage and a comparison time step diameter;
continuously collecting sampling voltage, and acquiring a sampling voltage stabilization time point through the standard value and the comparison time step diameter;
forming an adjusted sampling time parameter by the sampling voltage stabilization time point and a preset delay time;
and taking the adjusted sampling time parameter as the start time of the current sampling, and storing the adjusted sampling time parameter in a register.
2. The method of adjusting a sampling time parameter of claim 1, wherein after storing the adjusted sampling time parameter in a register, further comprising:
calling the adjusted sampling time parameter from the register;
and when the sampling time parameter in the simulation file to be converted into the pattern file is debugged, setting the adjusted sampling time parameter as the sampling start time of any subsequent sampling of the current sampling.
3. The method for adjusting sampling time parameters according to claim 1, wherein the step of obtaining the sampling voltage stabilization time point comprises:
taking preset unit time as the comparison time step diameter, and comparing the actual sampling voltage with the standard value;
and when the actual sampling voltage is continuously higher than the standard value by N comparison time steps, taking a time point corresponding to the Nth period as the sampling voltage stabilization time point, wherein N =1,2,3 \8230;.
4. Use of a method of adjusting sampling time parameters according to any one of claims 1-3 in LCD Driver test direction, comprising:
setting a standard voltage and a comparison time step diameter in a comparator;
collecting the voltage value of an LCD pin as an actual sampling voltage, and comparing the actual sampling voltage with the standard voltage;
continuously collecting a comparison result of the actual sampling voltage and the standard voltage;
when the actual sampling voltage is continuously higher than the standard value N comparison time steps, taking a time point corresponding to the Nth period as a sampling voltage stabilization time point, wherein N =1,2,3 \8230;
adding the sampling voltage stabilization time point and a preset delay time to obtain an adjusted sampling time parameter for starting to sample the LCD pin;
and storing the adjusted sampling time parameter, and writing the parameter into a specified register.
5. The use according to claim 4,
the standard voltage is a first voltage or a second voltage or any voltage value in a range of the first voltage and the second voltage.
6. A system for adjusting a sampling time parameter, comprising:
the acquisition module is connected with the outside and used for acquiring actual sampling voltage;
the control module is electrically connected with the acquisition module and used for acquiring the actual sampling voltage;
the comparison module is electrically connected with the control module and used for obtaining a sampling voltage stabilization time point;
and the control module performs data interaction with the comparison module and is used for adding the sampling voltage stabilization time point and the preset delay time in the control module to obtain an adjusted sampling time parameter.
7. The system for adjusting a sampling time parameter of claim 6, further comprising: and the storage module is electrically connected with the control module and used for storing the adjusted sampling time parameters.
8. The system for adjusting a sampling time parameter of claim 6, wherein the comparison module comprises:
the first module is electrically connected with the control module and used for comparing the actual sampling voltage with the standard voltage in the comparison module to obtain a comparison result;
the second module is electrically connected with the first module and used for providing a comparison time step diameter for the actual sampling voltage and the standard voltage;
the control module is in data interaction with the first module and is used for acquiring duration meeting the following conditions as the sampling voltage stabilization time point;
and the actual sampling voltage is continuously higher than the standard value N, and time points corresponding to the comparison time steps are N =1,2,3, 8230; and the like.
9. An LCD Driver testing device, comprising: the system of any one of claims 6-8; and the trigger module is electrically connected with a control module in the system and used for triggering voltage sampling according to the adjusted sampling time parameters so as to test the LCD Driver testing device.
10. An electronic device, comprising: a storage medium for storing a computer program; a processing unit in data communication with the storage medium for performing the steps of the method of adjusting a sampling time parameter as claimed in any one of claims 1 to 5 by the processing unit executing the computer program when performing the notification.
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