CN115602735A - Silicon carbide junction barrier Schottky diode and manufacturing method thereof - Google Patents
Silicon carbide junction barrier Schottky diode and manufacturing method thereof Download PDFInfo
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- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 79
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 77
- 230000004888 barrier function Effects 0.000 title claims abstract description 37
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 44
- 239000002184 metal Substances 0.000 claims description 87
- 238000000034 method Methods 0.000 claims description 24
- 150000002500 ions Chemical class 0.000 claims description 22
- 238000005468 ion implantation Methods 0.000 claims description 14
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 12
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 claims description 12
- 238000000137 annealing Methods 0.000 claims description 10
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 6
- 229920002120 photoresistant polymer Polymers 0.000 claims description 6
- 238000004140 cleaning Methods 0.000 claims description 5
- 239000008367 deionised water Substances 0.000 claims description 5
- 229910021641 deionized water Inorganic materials 0.000 claims description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 5
- 229910052757 nitrogen Inorganic materials 0.000 claims description 3
- 238000005516 engineering process Methods 0.000 claims description 2
- 238000007664 blowing Methods 0.000 claims 1
- 238000013459 approach Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 6
- 230000009286 beneficial effect Effects 0.000 description 4
- 238000005137 deposition process Methods 0.000 description 4
- 238000013461 design Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 238000000407 epitaxy Methods 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 238000004891 communication Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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- 239000005416 organic matter Substances 0.000 description 1
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- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
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Abstract
The invention relates to the technical field of Schottky diodes and discloses a silicon carbide junction barrier Schottky diode and a manufacturing method thereof, wherein the silicon carbide junction barrier Schottky diode comprises a silicon carbide substrate, a first epitaxial layer is arranged on the top surface of the silicon carbide substrate, and a second epitaxial layer is arranged on the top surface of the first epitaxial layer; the epitaxial structure also comprises doped regions arranged on the first epitaxial layer and the second epitaxial layer, wherein the doped regions comprise an upper doped region and a lower doped region, and the lower doped region is wider than the upper doped region; when the device is actually used, the lower doped region with the wider width is easier to approach under reverse voltage, the withstand voltage of the device can be improved and the reverse leakage can be reduced when the reverse voltage is increased, and the reverse performance index is improved on the premise of not reducing the forward performance; in addition, the density of a doped region on the epitaxial layer is not increased by the silicon carbide junction barrier Schottky diode, so that the layout structure of the device is not complicated while the voltage resistance of the device is improved and the reverse leakage is reduced.
Description
Technical Field
The invention relates to the technical field of Schottky diodes, in particular to a silicon carbide junction barrier Schottky diode and a manufacturing method thereof.
Background
Silicon carbide (SiC) junction barrier schottky diodes are widely used in aerospace, wireless communication devices, radars, power systems, computers, electric vehicles, and other fields because they can be applied in higher voltage and higher temperature environments. For a good junction barrier schottky diode, it is required to have high withstand voltage, low voltage drop, small leakage, good high-frequency characteristics, and strong resistance to overvoltage and surge current.
As shown in fig. 1, most of conventional silicon carbide junction barrier schottky diodes include a substrate, an epitaxial layer on the top surface of the substrate, and a P-doped region, and the P-doped region is formed by implanting ions into the top surface of the epitaxial layer by an ion implantation technique. If the number of the P doping regions is increased, the requirements of dense P doping region injection on layout design and process conditions are high, and the forward voltage drop is increased and the power consumption is too high due to the wider P doping region injection, so that the high-frequency application is not facilitated, and the performance improvement of the SiC junction barrier Schottky diode is greatly limited.
Disclosure of Invention
In view of the defects of the background art, the invention provides the silicon carbide junction barrier Schottky diode and the manufacturing method thereof, and the silicon carbide junction barrier Schottky diode can improve the voltage endurance capability of the device and reduce reverse electric leakage on the premise of simpler layout structure.
In order to solve the above technical problems, in a first aspect, the present invention provides the following technical solutions: a silicon carbide junction barrier Schottky diode comprises a silicon carbide substrate, wherein a first epitaxial layer is arranged on the top surface of the silicon carbide substrate, and a second epitaxial layer is arranged on the top surface of the first epitaxial layer;
still including setting up at least one doping area on first epitaxial layer and the second epitaxial layer, the doping area includes doping area and lower doping area, the lower doping area is in the top surface downwardly extending to first degree of depth of first epitaxial layer, it sets up to go up the doping area on the second epitaxial layer and run through the second epitaxial layer, go up the bottom surface in doping area with the top surface contact in lower doping area, on the first epitaxial layer with it is in to go up the region that the doping area corresponds down on the doping area, just it is less than to go up the cross sectional area of doping area in the horizontal direction down.
In a certain implementation manner of the first aspect, two doped regions, namely a first doped region and a second doped region, are disposed on the first epitaxial layer and the second epitaxial layer; the first doped region comprises a first upper doped region and a first lower doped region, the first lower doped region is arranged in the middle of the first epitaxial layer, and the first upper doped region is arranged in the middle of the second epitaxial layer; the second doped region comprises a second upper doped region and a second lower doped region, the second lower doped region is arranged at the edge of the first epitaxial layer, and the second upper doped region is arranged at the edge of the second epitaxial layer.
In one embodiment of the first aspect, the first upper doped region and the first lower doped region are cylindrical, and the second upper doped region and the second lower doped region are annular.
In a certain implementation manner of the first aspect, a first upper metal layer is disposed on the top surface of the second epitaxial layer in the remaining region outside the upper doped region, a second upper metal layer is disposed on the top surface of the upper doped region and the top surface of the first upper metal layer, and a first lower metal layer and a second lower metal layer are sequentially disposed on the bottom surface of the silicon carbide substrate from top to bottom.
In a second aspect, the present invention further provides a method for manufacturing a silicon carbide junction barrier schottky diode, which is used for manufacturing the silicon carbide junction barrier schottky diode, and includes the following steps:
s1: extending a first epitaxial layer on the top surface of the silicon carbide substrate;
s2: implanting ions inwards on the top surface of the first epitaxial layer through an ion implantation process to form a lower doped region;
s3: extending a second epitaxial layer on the top surface of the first epitaxial layer;
s4: the top surface of the second epitaxial layer is implanted with ions inwards through an ion implantation process to form an upper doped region, the upper doped region penetrates through the second epitaxial layer, the bottom surface of the upper doped region is in contact with the top surface of the lower doped region, the region corresponding to the upper doped region on the first epitaxial layer is located on the lower doped region, and the cross-sectional area of the upper doped region in the horizontal direction is smaller than that of the lower doped region in the horizontal direction.
In one embodiment of the second aspect, before step S1, the silicon carbide substrate is sequentially cleaned with acetone, isopropanol and deionized water, and after the cleaning, the silicon carbide substrate is blow-dried with nitrogen.
In a certain embodiment of the second aspect, in step S2, ions are implanted inwards in the middle and the edge of the top surface of the first epitaxial layer by an ion implantation technique to form a first lower doped region and a second lower doped region; in the step S4, ions are respectively implanted inwards in the middle and the edge of the top surface of the second epitaxial layer through an ion implantation technology to form a first upper doped region and a second upper doped region;
the first upper doped region penetrates through the second epitaxial layer, the bottom surface of the first upper doped region is in contact with the top surface of the first lower doped region, a region, corresponding to the first upper doped region, on the first lower doped region is arranged on the first epitaxial layer, and the cross-sectional area of the first upper doped region in the horizontal direction is smaller than that of the first lower doped region in the horizontal direction;
the second upper doping region penetrates through the second epitaxial layer, the bottom surface of the second upper doping region is in contact with the top surface of the second lower doping region, the region, corresponding to the second upper doping region, of the first epitaxial layer is located on the second lower doping region, and the cross-sectional area of the second upper doping region in the horizontal direction is smaller than that of the second lower doping region in the horizontal direction.
In a certain embodiment of the second aspect, the first upper doped region and the first lower doped region are both cylindrical, the second upper doped region and the second lower doped region are both annular, and the depth of the first lower doped region is the same as the depth of the second lower doped region.
In one embodiment of the second aspect, the present invention further comprises step S5:
s5: and manufacturing an upper metal contact layer on the top surface of the second epitaxial layer, and manufacturing a lower metal contact layer on the bottom surface of the silicon carbide substrate.
In a certain embodiment of the second aspect,
in step S5, the step of forming an upper contact metal layer on the top surface of the second epitaxial layer is as follows:
firstly, arranging a photoresist layer in the upper doped region on the top surface of the second epitaxial layer;
then, manufacturing a first upper metal layer in a region outside the upper doped region on the top surface of the second epitaxial layer to form a first intermediate device;
then removing the photoresist layer;
then annealing the first intermediate device;
then manufacturing a second upper metal layer on the top surface of the upper doped region and the top surface of the first upper metal layer;
finally, ohmic annealing is carried out on the first upper metal layer and the second upper metal layer;
in step S5, the step of forming the lower metal contact layer on the bottom surface of the silicon carbide substrate is as follows:
firstly, manufacturing a first lower metal layer on the bottom surface of the silicon carbide substrate;
then manufacturing a second lower metal layer on the bottom surface of the first lower metal layer;
and finally, carrying out ohmic annealing on the first lower metal layer and the second lower metal layer.
Compared with the prior art, the invention has the beneficial effects that: according to the silicon carbide junction barrier Schottky diode, the first epitaxial layer is arranged on the top surface of the silicon carbide substrate, the second epitaxial layer is arranged on the top surface of the first epitaxial layer, the lower doped region is inwards arranged on the top surface of the first epitaxial layer, the upper doped region penetrating through the second epitaxial layer is arranged on the second epitaxial layer, and the width of the lower doped region is larger than that of the upper doped region, so that the lower doped region with the wider width is easier to approach under reverse voltage in actual use, the voltage resistance of the device can be improved and the reverse leakage can be reduced when the reverse bias voltage is increased, and the reverse performance index is improved on the premise that the forward performance is not reduced; in addition, the density of a doped region on the epitaxial layer is not increased by the silicon carbide junction barrier Schottky diode, so that the layout structure of the device is not complicated while the voltage resistance of the device is improved and the reverse leakage is reduced.
Drawings
FIG. 1 is a schematic structural diagram of a conventional SiC junction barrier Schottky diode;
FIG. 2 is a schematic diagram of a silicon carbide junction barrier Schottky diode according to the present invention;
FIG. 3 is a flow chart of a method of making a silicon carbide junction barrier Schottky diode in accordance with the present invention;
FIG. 4 is a schematic view of the structure after epitaxy of a first epitaxial layer on a silicon carbide substrate;
FIG. 5 is a schematic structural diagram of a lower doped region fabricated on a first epitaxial layer;
fig. 6 is a schematic structural view of a second epitaxial layer formed on the first epitaxial layer;
FIG. 7 is a schematic structural view of a completed upper doped region formed on the second epitaxial layer;
FIG. 8 is a schematic structural view of a first upper metal layer formed on the second epitaxial layer;
fig. 9 is a schematic structural diagram of a second upper metal layer formed on the first upper metal layer and the second epitaxial layer.
Detailed Description
The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic views illustrating only the basic structure of the present invention in a schematic manner, and thus show only the constitution related to the present invention.
As shown in fig. 2, a silicon carbide junction barrier schottky diode includes a silicon carbide substrate 1, a first epitaxial layer 2 is disposed on a top surface of the silicon carbide substrate 1, and a second epitaxial layer 4 is disposed on a top surface of the first epitaxial layer 2;
still including setting up at least one doping area on first epitaxial layer 2 and second epitaxial layer 4, the doping area includes doping area 5 and lower doping area 3, lower doping area 3 extends to first degree of depth in the top surface downwardly extending of first epitaxial layer 2, it sets up on second epitaxial layer 4 and runs through second epitaxial layer 4 to go up doping area 5, the bottom surface of going up doping area 5 contacts with the bottom surface of lower doping area 3, on the first epitaxial layer 2 with the regional position that last doping area 5 corresponds down on doping area 3, and the cross sectional area of going up doping area 5 at the horizontal direction is less than the cross sectional area of doping area 2 at the horizontal direction down.
In this embodiment, the silicon carbide substrate 1 is N + silicon carbide, the first epitaxial layer 2 and the second epitaxial layer 4 are both N-silicon carbide, and the upper doped region 5 and the lower doped region 3 are both P-type doped regions.
In this embodiment, the thickness of the first epitaxial layer 2 is between 8um-15um, and the thickness of the second epitaxial layer 4 is between 0.5um-1 um.
In practical use, the silicon carbide junction barrier schottky diode of the invention arranges the lower doped region 3 on the first epitaxial layer 2, arranges the upper doped region 5 on the second epitaxial layer 4, and enables the region corresponding to the upper doped region 5 on the first epitaxial layer 2 to be positioned on the lower doped region 3, and the cross-sectional area of the upper doped region 5 in the horizontal direction is smaller than that of the lower doped region 2 in the horizontal direction, so that the lower doped region 3 is wider than the upper doped region 5, and the lower doped region 3 with wider width is easier to be closed under reverse voltage in practical use, thereby not only improving the withstand voltage of the device and reducing reverse leakage when the reverse bias voltage is increased, but also improving the reverse performance index on the premise of not reducing the forward performance.
In fig. 2, two doped regions, namely a first doped region and a second doped region, are disposed on the first epitaxial layer 2 and the second epitaxial layer 4;
referring to fig. 5 and 7, the first doped region includes a first upper doped region 50 and a first lower doped region 30, the first lower doped region 30 is disposed in the middle of the first epitaxial layer 2, and the first upper doped region 50 is disposed in the middle of the second epitaxial layer 4; the second doped region includes a second upper doped region 51 and a second lower doped region 31, the second lower doped region 31 is disposed at the edge of the first epitaxial layer 2, and the second upper doped region 51 is disposed at the edge of the second epitaxial layer 4.
Wherein, the first upper doped region 50 and the first lower doped region 30 are both cylindrical, and the diameter of the first upper doped region 50 is smaller than that of the first lower doped region 30; the width of the second upper doped region 51 is smaller than the width of the second lower doped region 31.
In practical use, the second lower doped region 31 is arranged at the edge of the first epitaxial layer 2, and the second upper doped region 51 is arranged at the edge of the second epitaxial layer 4, so that the terminal structure design is facilitated; when reverse bias is applied to the device, ions injected into the first lower doped region 30 in the middle of the first epitaxial layer 2 and the first upper doped region 50 in the middle of the second epitaxial layer 4 help to draw together the PN junctions at the two ends more easily to realize a pinch-off effect, so that the purposes of improving the reverse withstand voltage of the device and reducing reverse electric leakage can be achieved on the premise of simple layout structure.
For the silicon carbide junction barrier schottky diode, the metal layer structures of the anode and the cathode are arranged differently, and the performance of the diode is changed differently. Referring to fig. 2, in the present embodiment, a first upper metal layer 6 is disposed on the top surface of the second epitaxial layer 4 in the remaining region outside the upper doped region 5, and a second upper metal layer 7 is disposed on the top surface of the upper doped region 5 and the top surface of the first upper metal layer 6.
Since the first upper doped region 50 is disposed in the middle of the second epitaxial layer 4 and the second upper doped region 51 is disposed at the edge of the second epitaxial layer 4 in fig. 2, the first upper metal layer 6 is between the first upper doped region 50 and the second upper doped region 51.
Specifically, the first upper metal layer 6 is a Ni metal layer, and the thickness of the first upper metal layer 6 is between 40nm and 75 nm; the second upper metal layer 7 is an Au metal layer, and the thickness of the second upper metal layer 7 is between 150nm and 400 nm.
In practical use, the top surface of the second epitaxial layer 4 except the area of the upper doped region 5 is a Schottky junction, and the upper doped region is a PN junction part.
Further, a first lower metal layer 8 and a second lower metal layer 9 are provided in this order from the top to the bottom of the silicon carbide substrate 1. Wherein the first lower metal layer 8 is a Ni metal layer with a thickness of 50nm-200nm, and the second lower metal layer 9 is an Au metal layer with a thickness of 100nm-300 nm.
In summary, in the silicon carbide junction barrier schottky diode of the present invention, the first epitaxial layer 2 is disposed on the top surface of the silicon carbide substrate 1, the second epitaxial layer 4 is disposed on the top surface of the first epitaxial layer 2, the lower doped region 3 is inwardly disposed on the top surface of the first epitaxial layer 2, the upper doped region 5 penetrating through the second epitaxial layer is disposed on the second epitaxial layer 4, and the width of the lower doped region 3 is greater than the width of the upper doped region 5, so that when the diode is actually used, the lower doped region 3 with a wider width is easier to be drawn together under a reverse voltage, when a reverse bias voltage is increased, a device breakdown voltage can be improved, a reverse leakage current can be reduced, and a reverse performance index can be improved on the premise that a forward performance is not reduced;
in addition, by arranging the second lower doped region 31 at the edge of the first epitaxial layer 2 and arranging the second upper doped region 51 at the edge of the second epitaxial layer 4, the terminal structure design is facilitated when the doped region is formed by ion implantation; moreover, the first lower doping region 30 is arranged in the middle of the first epitaxial layer 2, and the first upper doping region 50 is arranged in the middle of the second epitaxial layer 4, when reverse bias is applied to the device, ions injected into the first lower doping region 30 and the first upper doping region 50 are beneficial to the PN junctions at two ends to be more easily drawn together so as to realize the pinch-off effect, and then the purposes of improving the reverse withstand voltage of the device and reducing the reverse electric leakage can be achieved on the premise of simple layout structure;
finally, the Schottky junction part is provided with the Ni metal layer to realize Schottky metal contact, and the PN junction part is provided with the Au metal layer to realize ohmic metal contact, so that the forward and reverse performance improvement brought by the junction barrier Schottky diode structure can be utilized to the maximum extent.
In a second aspect, as shown in fig. 3, this embodiment further provides a method for manufacturing a silicon carbide junction barrier schottky diode, which is used to manufacture the silicon carbide junction barrier schottky diode, and includes the following steps:
s1: a first epitaxial layer 2 is epitaxially grown on the top surface of the silicon carbide substrate 1.
Fig. 4 schematically shows the structure of the first epitaxial layer 2 after epitaxy on the silicon carbide substrate 1. Wherein the silicon carbide substrate 1 isN + silicon carbide, the first epitaxial layer 2 is N-silicon carbide, the thickness of the second epitaxial layer 2 is between 8um and 15um, and the doping concentration of the second epitaxial layer 2 is 1e15 to 1e16cm -3 In the meantime.
In addition, if the silicon carbide substrate 1 has organic impurities on its surface before step S1 is performed, the silicon carbide substrate 1 needs to be cleaned in advance. The cleaning process is as follows:
the silicon carbide substrate 1 is sequentially cleaned by using acetone, isopropanol and deionized water, specifically, the silicon carbide substrate 1 is sequentially immersed in the acetone, the isopropanol and the deionized water respectively, and then the silicon carbide substrate 1 is cleaned by an ultrasonic cleaning mode, wherein the cleaning time can be 10-15 minutes. Wherein organic matter impurities on the silicon carbide substrate 1 can be removed through acetone, residual acetone on the silicon carbide substrate 1 can be removed through isopropanol, and residual isopropanol on the silicon carbide substrate 1 can be removed through deionized water. After the cleaning, the silicon carbide substrate 1 was blow-dried with nitrogen.
S2: the lower doped region 3 is formed by implanting ions inward at the top surface of the first epitaxial layer 2 through an ion implantation process.
Specifically, referring to fig. 5, in the present embodiment, the first and second lower doped regions 30 and 31 are formed by implanting ions respectively at the middle and the edge of the first epitaxial layer 2 through an ion implantation process. Wherein the depths of the first lower doped region 30 and the second lower doped region 31 are the same, and the doping concentrations of the first lower doped region 30 and the second lower doped region 31 are the same. In addition, the ions implanted into the first and second lower doped regions 30 and 31 are P-type ions.
S3: a second epitaxial layer 4 is epitaxial on top of the first epitaxial layer 2.
The schematic structure of the first epitaxial layer 2 after the second epitaxial layer 4 is epitaxial is shown in fig. 5, wherein the second epitaxial layer 4 is N-silicon carbide, the thickness is between 0.5um and 1um, and the doping concentration is 1e15 to 1e16cm -3 In between.
S4: ions are implanted inwards into the top surface of the second epitaxial layer 4 through an ion implantation process to form an upper doped region 5, the upper doped region 5 penetrates through the second epitaxial layer 4, the bottom surface of the upper doped region 5 is in contact with the top surface of the lower doped region 3, a region, corresponding to the upper doped region 5, of the first epitaxial layer 2 is located on the lower doped region 2, and the cross-sectional area of the upper doped region 5 in the horizontal direction is smaller than that of the lower doped region 3 in the horizontal direction.
Specifically, as shown in fig. 7, in step S4, ions are implanted inward in the middle and the edge of the top surface of the second epitaxial layer 4 by an ion implantation technique to form a first upper doped region 50 and a second upper doped region 51, respectively;
the first upper doped region 50 penetrates through the second epitaxial layer 4, the bottom surface of the first upper doped region 50 is in contact with the top surface of the first lower doped region 30, a region, corresponding to the first upper doped region 50, on the first lower doped region 30 is on the first epitaxial layer 2, and the cross-sectional area of the first upper doped region 50 in the horizontal direction is smaller than that of the first lower doped region 30 in the horizontal direction;
the second upper doped region 51 penetrates through the second epitaxial layer 4, the bottom surface of the second upper doped region 51 is in contact with the top surface of the second lower doped region 31, a region of the first epitaxial layer 2 corresponding to the second upper doped region 51 is on the second lower doped region 31, and the cross-sectional area of the second upper doped region 51 in the horizontal direction is smaller than the cross-sectional area of the second lower doped region 31 in the horizontal direction.
In practical use, the lower doped region 3 can be made wider by placing a region of the first epitaxial layer 2 corresponding to the upper doped region 5 on the lower doped region 2, and making the cross-sectional area of the upper doped region 5 in the horizontal direction smaller than the cross-sectional area of the lower doped region 3 in the horizontal direction. The wider lower doped region 3 is easier to be closed under reverse voltage, the voltage resistance of the device can be improved and the reverse leakage can be reduced when the reverse bias voltage is increased, and the reverse performance index is improved on the premise of not reducing the forward performance.
In this embodiment, the ions implanted into the first upper doped region 50 and the second upper doped region 51 are both P-type ions, so that the first upper doped region 50 and the second upper doped region 51 are both P-type doped regions, and the doping concentrations of the first upper doped region 50 and the second upper doped region 51 are the same.
In this embodiment, the first upper doped region 50 and the first lower doped region 30 are both cylindrical, the diameter of the first upper doped region 50 is smaller than that of the first lower doped region 30, the second upper doped region 51 and the second lower doped region 31 are both annular, and the width of the second upper doped region 51 is smaller than that of the second lower doped region 31.
In practical use, in the step S2 and the step S4 of the preparation method of the silicon carbide junction barrier schottky diode, ions are respectively implanted into the middle and the edge of the first epitaxial layer 2 and the middle and the edge of the second epitaxial layer 4, the implantation of ions into the edge of the first epitaxial layer 2 and the edge of the second epitaxial layer 4 is beneficial to realizing the design of a terminal structure, and the implantation of ions into the middle of the first epitaxial layer 2 and the middle of the second epitaxial layer 4 is beneficial to facilitating the PN junctions at two ends to be more easily closed when a reverse voltage is applied to the device so as to realize the pinch-off effect, so that the purposes of improving the reverse withstand voltage of the device and reducing the reverse electric leakage can be achieved on the premise of simple layout structure.
In addition, the preparation method of the silicon carbide junction barrier Schottky diode further comprises the step S5:
s5: an upper metal contact layer is formed on the top surface of the second epitaxial layer 4 and a lower metal contact layer is formed on the bottom surface of the silicon carbide substrate 1.
Specifically, the step of forming the upper contact metal layer on the top surface of the second epitaxial layer 4 in step S5 is as follows:
firstly, arranging a photoresist layer in the upper doped region 3 on the top surface of the second epitaxial layer 4;
then, a first upper metal layer 6 is manufactured in a region outside the upper doped region on the top surface 4 of the second epitaxial layer to form a first intermediate device, and the structural schematic diagram of the first intermediate device is shown in fig. 8; wherein, the first upper metal layer 6 can be made by a deposition process, and the deposition process can be a physical vapor deposition process; in addition, the first upper metal layer 6 is a Ni metal layer with the thickness of 40nm-75 nm.
Then removing the photoresist layer;
then annealing the first intermediate device; wherein the annealing temperature is between 400 and 550 ℃;
next, fabricating a second upper metal layer 7 on the upper doped region on the top surface of the second epitaxial layer 4 and the top surface of the first upper metal layer 6, and the schematic structural diagram of the fabricated second upper metal layer 7 is shown in fig. 9; wherein the second upper metal layer 7 may be formed by a deposition process, and the deposition process may be a physical vapor deposition process; in addition, the second upper metal layer 7 can be an Au metal layer, and the thickness is between 150nm and 400 nm;
finally, ohmic annealing is carried out on the first upper metal layer 6 and the second upper metal layer 7;
the step of forming the lower metal contact layer on the bottom surface of the silicon carbide substrate 1 in step S5 is as follows:
firstly, a first lower metal layer 8 is manufactured on the bottom surface of a silicon carbide substrate 1; wherein the first lower metal layer 8 is a Ni metal layer with a thickness of 50nm-100 nm;
then, a second lower metal layer 9 is manufactured on the bottom surface of the first lower metal layer 8; wherein the second lower metal layer 9 is an Au metal layer with a thickness of 100nm-300 nm.
And finally, carrying out ohmic annealing on the first lower metal layer 8 and the second lower metal layer 9 to form good ohmic contact.
In summary, in the method for manufacturing the silicon carbide junction barrier schottky diode of the present invention, the lower doped region 3 is formed on the first epitaxial layer 2, the upper doped region 5 is formed on the second epitaxial layer 4, and the width of the lower doped region 3 is greater than that of the upper doped region 5, so that the wider lower doped region 3 is more likely to be closed under a reverse voltage, and when the reverse voltage is increased, the breakdown voltage of the device can be improved and the reverse leakage can be reduced.
In light of the foregoing, it is to be understood that various changes and modifications may be made by those skilled in the art without departing from the spirit and scope of the invention. The technical scope of the present invention is not limited to the content of the specification, and must be determined according to the scope of the claims.
Claims (10)
1. A silicon carbide junction barrier Schottky diode comprises a silicon carbide substrate, wherein a first epitaxial layer is arranged on the top surface of the silicon carbide substrate;
still include that at least one sets up doped region on first epitaxial layer and the second epitaxial layer, doped region includes doped region and lower doped region, doped region is in down the top surface downwardly extending to first degree of depth of first epitaxial layer, it sets up to go up doped region on the second epitaxial layer and run through the second epitaxial layer, go up doped region the bottom surface with the top surface contact of lower doped region, on the first epitaxial layer with it is in to go up the region that doped region corresponds down on the doped region, just it is less than to go up doped region at the cross sectional area of horizontal direction doped region is in down.
2. The sic junction barrier schottky diode of claim 1 wherein the first and second epitaxial layers have two doped regions, a first doped region and a second doped region; the first doped region comprises a first upper doped region and a first lower doped region, the first lower doped region is arranged in the middle of the first epitaxial layer, and the first upper doped region is arranged in the middle of the second epitaxial layer; the second doping region comprises a second upper doping region and a second lower doping region, the second lower doping region is arranged at the edge of the first epitaxial layer, and the second upper doping region is arranged at the edge of the second epitaxial layer.
3. The sic junction barrier schottky diode of claim 2 wherein the first upper and lower doped regions are cylindrical and the second upper and lower doped regions are annular.
4. The silicon carbide junction barrier schottky diode as claimed in any one of claims 1 to 3, wherein a first upper metal layer is formed on the top surface of the second epitaxial layer in the remaining region outside the upper doped region, a second upper metal layer is formed on the top surface of the upper doped region and the top surface of the first upper metal layer, and a first lower metal layer and a second lower metal layer are sequentially formed on the bottom surface of the silicon carbide substrate from top to bottom.
5. A method for manufacturing a silicon carbide junction barrier Schottky diode, which is used for manufacturing the silicon carbide junction barrier Schottky diode as claimed in any one of claims 1 to 4, and which comprises the following steps:
s1: extending a first epitaxial layer on the top surface of the silicon carbide substrate;
s2: implanting ions inwards on the top surface of the first epitaxial layer through an ion implantation process to form a lower doped region;
s3: extending a second epitaxial layer on the top surface of the first epitaxial layer;
s4: the top surface of the second epitaxial layer is implanted with ions inwards through an ion implantation process to form an upper doped region, the upper doped region penetrates through the second epitaxial layer, the bottom surface of the upper doped region is in contact with the top surface of the lower doped region, a region corresponding to the upper doped region on the first epitaxial layer is located on the lower doped region, and the cross-sectional area of the upper doped region in the horizontal direction is smaller than that of the lower doped region in the horizontal direction.
6. The method as claimed in claim 5, wherein the silicon carbide substrate is sequentially cleaned with acetone, isopropanol and deionized water before step S1 is performed, and the silicon carbide substrate is dried by blowing with nitrogen after the cleaning.
7. The method as claimed in claim 5, wherein the first and second lower doped regions are formed by implanting ions into the middle and edge of the top surface of the first epitaxial layer by ion implantation technique in step S2; in the step S4, ions are respectively implanted inwards in the middle and the edge of the top surface of the second epitaxial layer through an ion implantation technology to form a first upper doped region and a second upper doped region;
the first upper doped region penetrates through the second epitaxial layer, the bottom surface of the first upper doped region is in contact with the top surface of the first lower doped region, a region, corresponding to the first upper doped region, on the first lower doped region is arranged on the first epitaxial layer, and the cross-sectional area of the first upper doped region in the horizontal direction is smaller than that of the first lower doped region in the horizontal direction;
the second upper doping region penetrates through the second epitaxial layer, the bottom surface of the second upper doping region is in contact with the top surface of the second lower doping region, the region, corresponding to the second upper doping region, of the first epitaxial layer is located on the second lower doping region, and the cross-sectional area of the second upper doping region in the horizontal direction is smaller than that of the second lower doping region in the horizontal direction.
8. The method according to claim 7, wherein the first upper doped region and the first lower doped region are both cylindrical, the second upper doped region and the second lower doped region are both annular, and the depth of the first lower doped region is the same as the depth of the second lower doped region.
9. The method for manufacturing a silicon carbide junction barrier schottky diode as claimed in any one of claims 5 to 8, further comprising the step S5:
s5: and manufacturing an upper metal contact layer on the top surface of the second epitaxial layer, and manufacturing a lower metal contact layer on the bottom surface of the silicon carbide substrate.
10. The method as claimed in claim 9, wherein the step of forming the upper contact metal layer on the top surface of the second epitaxial layer in step S5 is as follows:
firstly, arranging a photoresist layer in the upper doped region on the top surface of the second epitaxial layer;
then, manufacturing a first upper metal layer in a region outside the upper doped region on the top surface of the second epitaxial layer to form a first intermediate device;
then removing the photoresist layer;
then annealing the first intermediate device;
then manufacturing a second upper metal layer on the top surface of the upper doped region and the top surface of the first upper metal layer;
finally, ohmic annealing is carried out on the first upper metal layer and the second upper metal layer;
the step of manufacturing a lower metal contact layer on the bottom surface of the silicon carbide substrate in the step S5 is as follows:
firstly, manufacturing a first lower metal layer on the bottom surface of the silicon carbide substrate;
then manufacturing a second lower metal layer on the bottom surface of the first lower metal layer;
and finally, carrying out ohmic annealing on the first lower metal layer and the second lower metal layer.
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|---|---|---|---|---|
| JPH10233515A (en) * | 1996-12-19 | 1998-09-02 | Toshiba Corp | Schottky barrier semiconductor device and its manufacturing method |
| JP2002314099A (en) * | 2001-04-09 | 2002-10-25 | Denso Corp | Schottky diode and its manufacturing method |
| JP2007324218A (en) * | 2006-05-30 | 2007-12-13 | Toshiba Corp | Semiconductor rectifying device |
| CN109994539A (en) * | 2019-03-29 | 2019-07-09 | 华中科技大学 | A kind of silicon carbide junction barrier schottky diodes and preparation method thereof |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10233515A (en) * | 1996-12-19 | 1998-09-02 | Toshiba Corp | Schottky barrier semiconductor device and its manufacturing method |
| JP2002314099A (en) * | 2001-04-09 | 2002-10-25 | Denso Corp | Schottky diode and its manufacturing method |
| JP2007324218A (en) * | 2006-05-30 | 2007-12-13 | Toshiba Corp | Semiconductor rectifying device |
| CN109994539A (en) * | 2019-03-29 | 2019-07-09 | 华中科技大学 | A kind of silicon carbide junction barrier schottky diodes and preparation method thereof |
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