CN115602638A - Electronic device and method for manufacturing the same - Google Patents

Electronic device and method for manufacturing the same Download PDF

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Publication number
CN115602638A
CN115602638A CN202210258940.5A CN202210258940A CN115602638A CN 115602638 A CN115602638 A CN 115602638A CN 202210258940 A CN202210258940 A CN 202210258940A CN 115602638 A CN115602638 A CN 115602638A
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CN
China
Prior art keywords
substrate
electronic device
underfill layer
electronic
layer
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CN202210258940.5A
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Chinese (zh)
Inventor
纪仁海
谢志勇
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Innolux Corp
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Innolux Display Corp
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Application filed by Innolux Display Corp filed Critical Innolux Display Corp
Priority to US17/845,929 priority Critical patent/US20230009495A1/en
Priority to EP22180360.4A priority patent/EP4117025A3/en
Publication of CN115602638A publication Critical patent/CN115602638A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/54—Providing fillings in containers, e.g. gas fillings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/56—Materials, e.g. epoxy or silicone resin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/005—Processes relating to semiconductor body packages relating to encapsulations

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Dispersion Chemistry (AREA)
  • Control Of Vending Devices And Auxiliary Devices For Vending Devices (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

The present disclosure provides an electronic device and a method for manufacturing the same. The electronic device comprises a substrate, an electronic element, an underfill layer and a protection structure. The electronic element is arranged on the substrate. At least a part of the underfill layer is disposed between the substrate and the electronic component. The thickness of the underfill layer is not greater than the height from the surface of the substrate to the upper surface of the electronic component. The protection structure is arranged on the substrate and is adjacent to the underfill adhesive layer. The electronic device and the manufacturing method thereof can effectively control the area of the underfill layer.

Description

Electronic device and method for manufacturing the same
Technical Field
The present disclosure relates to electronic devices and methods for manufacturing the same, and more particularly, to an electronic device capable of effectively controlling an area of an underfill layer and a method for manufacturing the same.
Background
Generally, after bonding, an underfill process is performed to inject (jetting) or dispense (dispensing) a liquid onto an outer side of a bonding portion between the electronic device and the substrate, so that the underfill layer enters a gap between the electronic device and the substrate through a siphon phenomenon to cover the bonding pad and the solder ball and fix a relative position between the electronic device and the substrate. However, the underfill layer is free flowing on the substrate, so that it is not easy to control its area, which causes material waste, and even generates a phenomenon of capacitance (capacitance)/inductance (inductance)/electromagnetic interference (electromagnetic interference).
Disclosure of Invention
The present disclosure is directed to an electronic device and a method for manufacturing the same, which can effectively control the area of an underfill layer.
According to an embodiment of the present disclosure, an electronic device includes a substrate, an electronic element, an underfill layer, and a protection structure. The electronic element is arranged on the substrate. At least a part of the underfill layer is disposed between the substrate and the electronic component. The thickness of the underfill layer is not greater than the height from the surface of the substrate to the upper surface of the electronic component. The protection structure is arranged on the substrate and is adjacent to the underfill adhesive layer.
According to an embodiment of the present disclosure, a method for manufacturing an electronic device includes the following steps. A substrate is provided. A confinement region of the substrate is defined. Bonding the electronic element on the substrate. And forming an underfill layer on the substrate.
Based on the above, in the embodiments of the present disclosure, the protection structure is disposed on the substrate and adjacent to the underfill layer, so that the range of the underfill layer can be limited, and the electronic device of the present disclosure can effectively control the area of the underfill layer, so that the amount and the shape of the underfill layer can be consistent.
In order to make the aforementioned and other features and advantages of the disclosure more comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
Fig. 1 is a schematic cross-sectional view of an electronic device according to an embodiment of the disclosure;
fig. 2A is a schematic top view of an electronic device according to an embodiment of the disclosure;
fig. 2B is a schematic top view of an electronic device according to another embodiment of the disclosure;
FIG. 3 is a top view of an electronic device according to another embodiment of the present disclosure;
fig. 4A to 4C are schematic cross-sectional views illustrating a method of manufacturing an electronic device according to an embodiment of the disclosure;
FIGS. 5A-5B are schematic cross-sectional views illustrating steps of a method of manufacturing an electronic device according to another embodiment of the disclosure;
fig. 6A to 6C are schematic cross-sectional views illustrating a method for manufacturing an electronic device according to another embodiment of the disclosure.
Description of the reference numerals
100a, 100b, 100c, 100d, 100e, 100f, 100g: an electronic device;
110. 110f: a substrate;
112: a first pad;
120: an electronic component;
121: an upper surface;
122: a second pad;
130a, 130b, 130d: filling a glue layer at the bottom;
140a, 140b, 140c, 140d, 140g: a protective structure;
142b, 142c: a retaining wall pattern;
145b, 145c: an opening;
150: a solder ball;
160: a metal layer;
a: a restricted area;
h: a height;
l: an energy beam;
p: a steel plate;
r: a rough surface structure;
s: a surface;
t: and (4) thickness.
Detailed Description
The present disclosure may be understood by reference to the following detailed description taken in conjunction with the accompanying drawings, in which it is noted that, for the sake of clarity and brevity, the various figures of the present disclosure depict only some of the electronic devices and are not necessarily drawn to scale. In addition, the number and size of the components in the drawings are merely illustrative and are not intended to limit the scope of the present disclosure.
Certain terms are used throughout the description and following claims to refer to particular elements. Those skilled in the art will appreciate that electronic device manufacturers may refer to the same components by different names. This document does not intend to distinguish between components that differ in function but not name.
In the following specification and claims, the words "comprise", "comprising", "includes" and "including" are open-ended words, and thus should be interpreted to mean "including, but not limited to, \8230;".
Furthermore, relative terms, such as "below" or "bottom" and "above" or "top," may be used in embodiments to describe one element's relative relationship to another element of the figures. It will be understood that if the device of the drawings is turned over, with the top and bottom reversed, elements described as being on the "lower" side will be elements on the "upper" side.
In some embodiments of the present disclosure, terms concerning attachment, connection, and the like, such as "connected," "interconnected," and the like, may mean that two structures are in direct contact or that two structures are not in direct (indirect) contact, unless otherwise specified, and wherein other structures are interposed between the two structures. And the terms coupled and connected should also be construed to include both structures being movable or both structures being fixed. Furthermore, the term "coupled" encompasses energy transfer between two structures either directly or indirectly through electrical connection or energy transfer between two separate structures through mutual induction.
It will be understood that when an element or layer is referred to as being "on" or "connected to" another element or layer, it can be directly on or connected to the other element or layer or intervening elements or layers may be present (not directly). In contrast, when an element is referred to as being "directly on" or "directly connected to" another element or film, there are no intervening elements or films present between the two.
The terms "about," "equal," or "the same," "substantially," or "approximately" are generally construed as being within 20% of a given value or range, or as being within 10%, 5%, 3%, 2%, 1%, or 0.5% of a given value or range.
As used herein, the terms "film" and/or "layer" may refer to any continuous or discontinuous structure and material, such as a material deposited by the methods disclosed herein. For example, the membrane and/or layer may comprise a two-dimensional material, a three-dimensional material, a nanoparticle, or even a partial or complete molecular layer, or a partial or complete atomic layer, or a cluster of atoms and/or molecules (clusters). The film or layer may comprise a material or layer having pinholes (pinholes), which may be at least partially continuous.
Although the terms first, second and third 8230can be used to describe various components, the components are not limited by these terms. This term is used only to distinguish a single component from other components within the specification. The same terms may not be used in the claims, but may be replaced by first, second, and third 823030in the order in which the elements of the claims are declared. Therefore, in the following description, a first constituent element may be a second constituent element in the claims.
Unless defined otherwise, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
It is to be understood that the following illustrative embodiments may be implemented by replacing, recombining, and mixing features of several different embodiments without departing from the spirit of the present disclosure.
The electronic device of the present disclosure may include, but is not limited to, a display device, an antenna device, a sensing device, a light-emitting device, and/or a splicing device. The electronic device may include a bendable or flexible electronic device. The electronic device may include an electronic component. The electronic components may include passive components and active components, such as capacitors, resistors, inductors, variable capacitors, filters, diodes (diodes), transistors (transistors), inductors, micro-electro-mechanical systems (MEMS), liquid crystal chips (liquid crystal chips), etc., but are not limited thereto. The diode may comprise a light emitting diode or a photodiode. The light emitting diode may include, for example, an Organic Light Emitting Diode (OLED), a sub-millimeter light emitting diode (mini LED), a micro LED (micro LED), a quantum dot LED (quantum dot LED), a fluorescent (fluorescent), a phosphorescent (phosphor), or other suitable materials, or a combination thereof, but is not limited thereto. The sensor may include, for example, a capacitive sensor (capacitive sensor), an optical sensor (optical sensor), an electromagnetic sensor (electromagnetic sensor), a fingerprint sensor (FPS), a touch sensor (touch sensor), an antenna (antenna), or a stylus (pen sensor), etc., but is not limited thereto. The disclosure will be described using a display device as an electronic device, but the disclosure is not limited thereto.
Reference will now be made in detail to the exemplary embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings and the description to refer to the same or like parts.
Fig. 1 is a schematic cross-sectional view of an electronic device according to an embodiment of the disclosure. Referring to fig. 1, in the present embodiment, an electronic device 100a includes a substrate 110, an electronic element 120, an underfill layer 130a, and a protection structure 140a. The electronic element 120 is disposed on the substrate 110. At least a portion of the underfill layer 130a is disposed between the substrate 110 and the electronic component 120. The thickness T of the underfill layer 130a is not greater than the height H from the surface S of the substrate 110 to the upper surface 121 of the electronic component 120. The protection structure 140a is disposed on the substrate 110 and adjacent to the underfill layer 130a.
In detail, in the present embodiment, the substrate 110 is, for example, a glass substrate, a glass fiber (FR 4) substrate, a flexible plastic substrate, a film substrate, a flexible substrate, or other suitable substrates, but is not limited thereto. Thin film transistors or other driving circuits may be disposed on the substrate. The substrate 110 includes a plurality of first pads 112 separated from each other, wherein the first pads 112 may be disposed on the surface S of the substrate 110, which is not limited herein. In another embodiment, the substrate surface has a recess, and the first pads 112 may also be disposed in the recess, which still falls within the scope of the present disclosure.
The electronic component 120 is, for example, a light emitting diode chip (LED die), which may be a chip made of silicon (Si), gallium arsenide (GaAs), gallium nitride (GaN), silicon carbide (SiC), sapphire (Sapphire), or a glass substrate, but is not limited thereto. In another embodiment, the electronic component 120 may also be a semiconductor Package component, such as a Ball Grid Array (BGA) Package component, a Chip Size Package (CSP) component, a flip Chip, or a 2.5-dimensional/3-dimensional (2.5D/3D) semiconductor Package component, but is not limited thereto. In another embodiment, the electronic component 120 may be any chip, such as, but not limited to, an Integrated Circuit (IC), a transistor (Transistors), a silicon controlled rectifier (scr), a valve (valves), a Thin Film transistor (Thin Film Transistors), a capacitor, an inductor, a variable capacitor, a filter, a resistor, a diode, a Micro Electro Mechanical System (MEMS), a liquid crystal chip (liquid crystal chip), and the like. The electronic device 120 includes a plurality of second pads 122 separated from each other, wherein the first pads 112 and the second pads 122 are structurally and electrically connected together by a plurality of solder balls 150. That is, the electronic element 120 of the present embodiment is, for example, flip-chip bonded to the substrate 110.
As shown in fig. 1, the underfill layer 130a is disposed between the substrate 110 and the electronic element 120, and covers the first pads 112, the second pads 122 and the solder balls 150. The underfill layer 130a can be used to increase the adhesion between the electronic device 120 and the substrate 110, and fix the relative positions of the first pads 112, the solder balls 150, and the second pads 122. In an embodiment, in the case that the electronic device 100a is an antenna device or a sensing device, when the thickness T of the underfill layer 130a is not greater than the height H from the surface S of the substrate 110 to the upper surface 121 of the electronic component 120, the high frequency signal may be allowed to pass through and the loss of the high frequency signal may be reduced. In another embodiment, not shown, the thickness of the underfill layer under the electronic component may be smaller than the height from the surface of the substrate to the lower surface of the electronic component to further reduce the signal loss. In another embodiment, not shown, the underfill layer may also completely encapsulate the electronic component, so that the electronic device has better light shape and light-gathering effect in the case of the electronic component such as a light emitting diode.
In addition, the protection structure 140a of the present embodiment may be disposed to define a limited region a on the substrate 110, wherein the protection structure 140a is, for example, a closed structure, such as a continuous mountain-shaped dam (dam) or a continuous dam (wall), and may surround the underfill layer 130a to limit the region of the underfill layer 130a. In other words, the underfill layer 130a is limited to the limiting area a. In an embodiment, the material of the protection structure 140a may be, for example, an organic material, but is not limited thereto. The top view shape of the protection structure 140a may be, for example, a hollow rectangle, and the thickness of the protection structure 140a may be, for example, 1 micrometer (μm) to 100 micrometers, but is not limited thereto.
In terms of manufacturing, referring to fig. 1 again, first, a substrate 110 is provided, wherein the substrate 110 includes a first pad 112 thereon. The material of the first pads 112 may be Electroless nickel gold (ENIG) or other conductive material. Next, a protection structure 140a is formed on the substrate 110 to define a confinement region a of the substrate 110. Then, the electronic device 120 is bonded on the substrate 110, wherein the electronic device 120 includes second pads 122, and the material of the second pads 122 may be Electroless nickel gold (ENIG) or other conductive material. The first pads 112 and the second pads 122 are structurally and electrically connected together by a plurality of solder balls 150. It should be noted that the present disclosure does not limit the sequence of forming the protection structure 140a on the substrate 110 and bonding the electronic component 120 on the substrate 110. That is, the protection structure 140a may be formed on the substrate 110 first, and then the electronic element 120 is bonded on the substrate 110; alternatively, the electronic element 120 is bonded to the substrate 110, and then the protection structure 140a is formed on the substrate 110. Finally, an underfill layer 130a is formed on the substrate 110, wherein the underfill layer 130a is disposed between the substrate 110 and the electronic component 120 and covers the first pads 112, the second pads 122 and the solder balls 150. Thus, the electronic device 100a is completed.
In short, the protection structure 140a of the present embodiment can limit the area of the underfill layer 130a, so that the amount and the shape of the underfill layer 130a have consistency. Considering the electronic device 100a applied to high frequency transmission, the material loss of the high frequency signal in the electronic device 100a needs to be consistent. That is, in the present embodiment, the amount of the underfill layer 130a is adjusted/limited by disposing the protection structure 140a, so that the electronic device 100a of the present embodiment can effectively control the area of the underfill layer 130a.
It should be noted that the following embodiments follow the reference numerals and parts of the contents of the foregoing embodiments, wherein the same reference numerals are used to indicate the same or similar elements, and the description of the same technical contents is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and the following embodiments will not be repeated.
Fig. 2A is a schematic top view of an electronic device according to an embodiment of the disclosure. Referring to fig. 1 and fig. 2A, an electronic device 100b is similar to the electronic device 100a of fig. 1, and the difference therebetween is: in the present embodiment, the protective structure 140b may be a non-closed structure in consideration of uniformity. In detail, the protection structure 140b of the present embodiment has a plurality of openings 145b (two openings 145b are schematically illustrated), and includes a plurality of barrier patterns 142b (two barrier patterns 142b are schematically illustrated) separated from each other. The dam patterns 142b may have the same size and may have a mirror structure, but not limited thereto. The openings 145b are located between the dam patterns 142b, wherein the openings 145b have a rectangular shape, for example, and a portion of the underfill layer 130b extends into the openings 145 b. The opening 145b is designed to accommodate flash, and also has a venting function to remove air in the underfill layer 130 b.
Fig. 2B is a schematic top view of an electronic device according to another embodiment of the disclosure. Referring to fig. 2A and fig. 2B, an electronic device 100c is similar to the electronic device 100B of fig. 2A, and the difference therebetween is: in the present embodiment, the protection structure 140c has four openings 145c and includes four barrier wall patterns 142c separated from each other. The wall patterns 142c may have the same size, wherein the four wall patterns 142c are arranged, for example, swastika, but not limited thereto. The openings 145c are located between the dam wall patterns 142c, wherein the aperture of the openings 145c is gradually enlarged from the adjacent underfill layer 130b to the direction away from the underfill layer 130b to form a trapezoid, for example, and a portion of the underfill layer 130b extends into the openings 145 c. The opening 145c is designed to accommodate flash, and also has a venting function to remove air in the underfill layer 130 b.
In another embodiment not shown, the retaining wall patterns of the protection structure may have different sizes or the retaining wall patterns may have different and asymmetric shapes in consideration of wetting conditions (wetting conditions), which still falls within the protection scope of the present disclosure.
Fig. 3 is a schematic top view of an electronic device according to another embodiment of the disclosure. Referring to fig. 1 and fig. 3, an electronic device 100d is similar to the electronic device 100a of fig. 1, and the difference therebetween is: in the embodiment, when the thickness of the protection structure 140d is insufficient, the electronic device 100d further includes a metal layer 160 disposed on the substrate 110 and between the protection structure 140d and the substrate 110 to prevent the underfill layer 130d from overflowing. In an embodiment, an orthogonal projection of the protection structure 140d on the substrate 110 completely overlaps an orthogonal projection of the metal layer 160 on the substrate 110, wherein the orthogonal projection of the metal layer 160 on the substrate 110 is smaller than the orthogonal projection of the protection structure 140d on the substrate 110, but not limited thereto.
Fig. 4A to 4C are schematic cross-sectional views illustrating a method for manufacturing an electronic device according to an embodiment of the disclosure. First, referring to fig. 4A, a substrate 110 is provided, wherein the substrate 110 includes a first pad 112 thereon. Then, the electronic device 120 is bonded on the substrate 110, wherein the electronic device 120 includes a second pad 122, and the first pad 112 and the second pad 122 are structurally and electrically connected together by a solder ball 150. Next, a steel plate P is disposed on a portion of the surface S of the substrate 110, wherein the steel plate P surrounds the electronic component 120. Next, the electronic device 120 and the substrate 110 exposed outside the steel plate P are irradiated with the energy beam L. Here, the energy beam L is, for example, extreme Ultraviolet (EUV) or Plasma (Plasma), which can effectively reduce the contact angle of the substrate 110 to increase the wettability of the subsequent underfill layer 130a (see fig. 4C). Referring to fig. 4B, the steel plate P is removed to define a limited region a on the substrate 110. That is, the step of defining the limiting region a of the substrate 110 in this embodiment is to process the surface S of the substrate 110 with the energy beam L to perform surface modification on a partial region (i.e., the limiting region a) of the substrate 110. Finally, referring to fig. 4B and fig. 4C, an underfill layer 130a is formed on the substrate 110, wherein the underfill layer 130a can easily flow to the limited region a by a siphon phenomenon to cover the first pads 112, the second pads 122 and the solder balls 150, and the underfill layer 130a does not flow to the region without surface modification (i.e., the region outside the limited region a). Thus, the electronic device 100e is completed.
Fig. 5A to 5B are schematic cross-sectional views of partial steps of a method for manufacturing an electronic device according to another embodiment of the disclosure. First, referring to fig. 5A, a substrate 110f is provided, wherein the substrate 110f includes a first pad 112 thereon. Next, a Photoresist (Photoresist) covers a portion of the substrate 110f. Next, the substrate 110f is subjected to a surface treatment by plasma, sandblasting (Sandblasting) or etching (etching) to form a surface roughness R in a region of the substrate 110f not covered by the photoresist, thereby defining a confinement region a of the substrate 110f. Then, the photoresist is removed, and the electronic device 120 is bonded to the substrate 110f, wherein the electronic device 120 includes a second pad 122, and the first pad 112 and the second pad 122 are structurally and electrically connected together by a solder ball 150. Finally, referring to fig. 5A and 5B, an underfill layer 130a is formed on the substrate 110f, wherein the underfill layer 130a can easily flow to the limited area a by a siphon phenomenon to cover the first pads 112, the second pads 122 and the solder balls 150 for curing, and the underfill layer 130a does not flow onto the surface roughness R. Thus, the electronic device 100f is completed.
Since the underfill layer 130a is not wetted when the roughness is high, the flow range of the underfill layer 130a can be limited by performing surface roughening on the areas where the underfill layer 130a is not needed, thereby controlling the area of the underfill layer 130a.
In another embodiment, not shown, the surface roughness R may also be represented by a plurality of microstructures separated from each other. In detail, first, a substrate is provided. Then, the photoresist is used to cover a part of the substrate, and the microstructure is manufactured through the steps of photoetching process and the like, so that the limit area of the substrate is defined. And finally, bonding the electronic element on the substrate. Finally, an underfill layer is formed on the substrate, wherein the underfill layer can easily flow to the confined area by siphonage and be cured without flowing onto the microstructures. Thus, the electronic device is completed.
Fig. 6A to 6C are schematic cross-sectional views illustrating a method for manufacturing an electronic device according to another embodiment of the disclosure. First, referring to fig. 6A, a substrate 110 is provided, wherein the substrate 110 includes a first pad 112 thereon. Next, a fluorine-containing substance is applied on the substrate 110 by a screen printing method (screen printing). Then, the fluorine-containing substance is dried to dehydrate the surface S of the substrate 110 and the fluorine-containing substance to generate Si — O bonds, thereby forming a protective structure 140g having hydrophobicity, and defining a confinement region a of the substrate 110 by the protective structure 140 g. Next, referring to fig. 6B, the electronic device 120 is bonded on the substrate 110, wherein the electronic device 120 includes a second pad 122, and the first pad 112 and the second pad 122 are structurally and electrically connected together by a solder ball 150. Finally, referring to fig. 6B and fig. 6C, an underfill layer 130a is formed on the substrate 110, wherein the underfill layer 130a can easily flow to the limited area a by a siphon phenomenon to cover the first pads 112, the second pads 122 and the solder balls 150 and be cured, and the underfill layer 130a does not flow onto the protection structure 140 g. Thus, the electronic device 100g is completed.
Since the fluorine-containing substance is coated on the surface S of the substrate 110, the protection structure 140g with hydrophobicity is formed, so that the underfill layer 130a is not wetted by the protection structure 140g, thereby limiting the flow range of the underfill layer 130a and achieving the purpose of controlling the area of the underfill layer 130a.
In another embodiment, not shown, the fluorine-containing substance may be replaced by a polymer (pollymer), such as a Fluorocarbon polymer. In detail, first, a substrate is provided. Then, octafluorocyclobutane (Octafluoro cyclobutane, C) 4 F 8 ) As a reaction gas, a fluorocarbon polymer film is formed on a substrate at room temperature by inductively coupled plasma chemical vapor deposition (ICP-CVD), wherein the fluorocarbon polymer film entirely covers the surface of the substrate. Then, the fluorocarbon polymer film is patterned by photolithography to form a hydrophobic protection structure and define the limited region of the substrate. That is, in addition to fluorocarbon chains that reduce surface energy, silanes can also be used to form hydrophobic surfaces. And finally, bonding the electronic element on the substrate. Finally, an underfill layer is formed on the substrate, wherein the underfill layer can easily flow into the confined area by siphonage and be cured, and the underfill layer does not flow onto the protection structure. Thus, the electronic device is completed.
In summary, in the embodiments of the disclosure, the protection structure is disposed on the substrate and adjacent to the underfill layer, so as to limit the range of the underfill layer, and the electronic device of the disclosure can effectively control the area of the underfill layer, so that the amount and the shape of the underfill layer can be consistent.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims (10)

1. An electronic device, comprising:
a substrate;
an electronic element disposed on the substrate;
at least one part of the underfill adhesive layer is arranged between the substrate and the electronic element, wherein the thickness of the underfill adhesive layer is not more than the height from the surface of the substrate to the upper surface of the electronic element; and
and the protection structure is arranged on the substrate and is adjacent to the underfill adhesive layer.
2. The electronic device of claim 1, wherein the protective structure surrounds the underfill layer.
3. The electronic device of claim 1, wherein the protective structure comprises a plurality of retaining wall patterns.
4. The electronic device of claim 1, wherein the protective structure comprises a fluorine-containing species.
5. The electronic device of claim 1, wherein the protective structure comprises a polymer.
6. The electronic device of claim 5, wherein the protective structure comprises a fluorocarbon polymer.
7. The electronic device of claim 1, further comprising:
and the metal layer is arranged on the substrate and is positioned between the protection structure and the substrate.
8. A method of manufacturing an electronic device, comprising:
providing a substrate;
defining a confinement region of the substrate;
bonding an electronic element on the substrate; and
and forming an underfill adhesive layer on the substrate, wherein the thickness of the underfill adhesive layer is not more than the height from the surface of the substrate to the upper surface of the electronic element.
9. The method of claim 8, wherein the step of defining the confinement region of the substrate is forming a protective structure on the substrate.
10. The method of manufacturing an electronic device according to claim 8, wherein the step of defining the limited region of the substrate is processing the surface of the substrate.
CN202210258940.5A 2021-07-09 2022-03-16 Electronic device and method for manufacturing the same Pending CN115602638A (en)

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