CN115588699A

CN115588699A - Photovoltaic cell, preparation method thereof and photovoltaic module

Info

Publication number: CN115588699A
Application number: CN202211104536.9A
Authority: CN
Inventors: 郭志球; 曹云成; 关迎利; 黄世亮; 杜江海
Original assignee: Zhejiang Jinko Solar Co Ltd; Jinko Solar Co Ltd
Current assignee: Zhejiang Jinko Solar Co Ltd; Jinko Solar Co Ltd
Priority date: 2022-09-09
Filing date: 2022-09-09
Publication date: 2023-01-10
Anticipated expiration: 2042-09-09
Also published as: CN117238982A; CN115588699B

Abstract

The invention discloses a photovoltaic cell, a preparation method thereof and a photovoltaic module, wherein the photovoltaic cell comprises a silicon substrate, a suede surface and a passivation layer, and a doping layer is arranged on the back surface of the silicon substrate; a main grid pit is formed in the silicon substrate, a first main grid line and a second main grid line are respectively arranged in the adjacent main grid pits along the second direction, and the first main grid line and the second main grid line are alternately arranged along the second direction and have opposite polarities; welding spots are arranged on the first main grid line and the second main grid line; the silicon substrate is also provided with a first thin grid line and a second thin grid line, the first thin grid line and the second thin grid line are alternately arranged, the first thin grid line is connected with the first main grid line, and the second thin grid line is connected with the second main grid line; the depth of the main grid pits is 30-50 μm; the ratio of the depth of the main grid pit to the height of the first main grid line and/or the second main grid line along the direction vertical to the silicon substrate is in a range of 10-6. The invention improves the open-circuit voltage of the back contact battery, thereby improving the efficiency of the IBC.

Description

Photovoltaic cell, preparation method thereof and photovoltaic module

Technical Field

The invention relates to the technical field of photovoltaics, in particular to a photovoltaic cell, a preparation method of the photovoltaic cell and a photovoltaic module.

Background

With the continuous innovation of solar cell technology, the technology of the related cell is also remarkably developed, wherein the back contact cell has been paid more and more attention as a novel solar cell structure.

The back contact battery (IBC) is characterized in that the front side of the battery does not have electrodes, and metal grid lines of positive and negative poles are arranged on the back side of the battery in a finger-shaped crossed manner. The back contact battery has the biggest characteristic that the PN junction and the metal contact are both positioned on the back surface of the battery, and the front surface of the battery is not influenced by the shielding of a metal electrode, so that the battery has higher short-circuit current Jsc, and meanwhile, the back surface can allow wider metal grid lines to reduce the series resistance Rs so as to improve the fill factor FF; the addition of the Front Surface Field (FSF) and the open-circuit voltage gain caused by good passivation makes the cell with the Front Surface free from shielding have high conversion efficiency and more beautiful appearance, and the assembly of the full back electrode is easier to assemble.

At present, in order to prevent short circuit, the back contact battery is coated with insulating glue around a main grid line, so that the welding tension of the back contact battery is poor.

Disclosure of Invention

In view of the above, the present invention provides a photovoltaic cell, which includes a silicon substrate, a textured surface on at least one surface of the silicon substrate, and a passivation layer on at least one surface of the textured surface, wherein doped layers with different polarities are disposed on a back surface of the silicon substrate;

the silicon substrate is provided with main grid pits which extend along a first direction and are arranged along a second direction, the first direction is intersected with the second direction, first main grid lines and second main grid lines which extend along the first direction are respectively arranged in the main grid pits which are adjacent to each other along the second direction, the first main grid lines and the second main grid lines are alternately arranged along the second direction, and the polarities of the first main grid lines and the second main grid lines are opposite;

welding spots are arranged on the first main grid line and the second main grid line at intervals along the first direction;

the silicon substrate is further provided with a first thin gate line and a second thin gate line which are arranged along the first direction and extend along the second direction, the first thin gate line and the second thin gate line are alternately arranged along the first direction, the first thin gate line is connected with the first main gate line, the second thin gate line is connected with the second main gate line, the first thin gate line and the first main gate line have the same polarity, and the second thin gate line and the second main gate line have the same polarity;

the depth of the main grid pit along the direction vertical to the silicon substrate is 30-50 μm;

in the direction perpendicular to the silicon substrate, the ratio of the depth of the main gate pit to the height of the first main gate line and/or the second main gate line ranges from 10 to 6.

The invention also provides a preparation method of the photovoltaic cell, which is characterized in that a pit is formed on the back surface of the N-type silicon substrate; texturing the surface of the N-type silicon substrate to form a textured surface; doping the N-type silicon substrate to form a back surface N + doped region and a back surface p + doped region which are alternately arranged; forming an antireflection film on the front surface of the N-type silicon substrate, and forming a passivation layer on the back surface of the N-type silicon substrate; preparing a metal electrode on the back surface of the silicon substrate, wherein the metal electrode comprises a main grid line, a thin grid line and a welding spot connected with the main grid line, the thin grid line is in ohmic contact with the n + doped area of the back surface and the p + doped area of the back surface, and the main grid line and/or the thin grid line are/is positioned in the pit.

The invention also provides a photovoltaic module which comprises glass, a first packaging adhesive film, a cell string, a second packaging adhesive film and a back plate which are sequentially arranged from top to bottom, wherein the cell string consists of a plurality of half cell pieces;

the half battery pieces adjacent to each other along a first direction comprise a first battery piece and a second battery piece which are arranged in a staggered mode, and the first direction is a direction from the first battery piece to the second battery piece;

the passivation layer is positioned on the back surfaces of the first battery piece and the second battery piece;

the first battery piece is provided with first main grid pits which extend along the first direction and are arranged along the second direction, the first direction is intersected with the second direction, first main grid lines and second main grid lines which extend along the first direction are respectively arranged in the first main grid pits which are adjacent to the second direction, the first main grid lines and the second main grid lines are alternately arranged along the second direction, and the polarities of the first main grid lines and the second main grid lines are opposite;

the first main grid line and the second main grid line are connected with a first welding spot along the first direction;

a second main grid pit extending along the first direction and arranged along the second direction is formed in the second battery piece, a third main grid line and a fourth main grid line extending along the first direction are respectively arranged in the second main grid pits adjacent to each other along the second direction, and the third main grid line and the fourth main grid line are alternately arranged and have opposite polarities;

the third main grid line and the fourth main grid line are connected with at least two second welding spots along the first direction;

along the first direction, the first main gate line and the third main gate line are on the same extension line, and the second main gate line and the fourth main gate line are on the same extension line, wherein the first main gate line and the third main gate line have opposite polarities, and the second main gate line and the fourth main gate line have opposite polarities;

the depth of each first main grid pit along the direction vertical to the first battery piece is 30-50 μm; in the direction perpendicular to the first battery piece, the ratio of the height of the first main grid pit to the height of the first main grid line and/or the second main grid line is in the range of 10-6;

the depth of the second main grid pits along the direction vertical to the second battery piece is 30-50 μm; in the direction perpendicular to the second cell piece, the ratio of the height of the second main grid pit to the height of the third main grid line and/or the height of the fourth main grid line ranges from 10 to 6;

and in the first direction, the adjacent battery pieces are connected through welding wires, and part of the welding wires are embedded in the first main grid pits and the second main grid pits.

Compared with the prior art, the photovoltaic cell, the preparation method thereof and the photovoltaic module provided by the invention at least realize the following beneficial effects:

the photovoltaic cell comprises a silicon substrate, a suede surface and a passivation layer, wherein doped layers with different polarities are arranged in the back surface of the silicon substrate; the silicon substrate is provided with main grid pits extending along a first direction and arranged along a second direction, the first direction is intersected with the second direction, first main grid lines and second main grid lines extending along the first direction are respectively arranged in the main grid pits adjacent to each other along the second direction, the first main grid lines and the second main grid lines are alternately arranged along the second direction, and the polarities of the first main grid lines and the second main grid lines are opposite; welding spots are arranged on the first main grid line and the second main grid line at intervals along the first direction; the depth of the main grid pit along the direction vertical to the silicon substrate is 30-50 μm; along the direction perpendicular to the silicon substrate, the ratio range of the depth of the main grid pit to the height of the first main grid line and/or the second main grid line is 10-6, which is not only beneficial to improving the welding tension of the battery piece and the welding wire, but also reduces the hidden crack risk of the battery piece, and simultaneously, because the distance from minority carriers (minority carriers) to the doping layer is reduced, the open-circuit voltage of the back contact battery is improved, and the efficiency of the back contact battery is improved.

Of course, it is not necessary for any product in which the present invention is practiced to achieve all of the above-described technical effects simultaneously.

Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.

FIG. 1 is a schematic diagram of a photovoltaic cell provided by the present invention;

FIG. 2 isbase:Sub>A schematic cross-sectional view A-A' of FIG. 1;

FIG. 3 is a schematic cross-sectional view of B-B' of FIG. 1;

FIG. 4 is a schematic flow diagram of a method of making a photovoltaic cell provided by the present invention;

FIG. 5 is a schematic structural view of a photovoltaic module provided by the present invention;

fig. 6 is a schematic structural diagram of a battery string provided in the present invention;

FIG. 7 is a schematic cross-sectional view of C-C' of FIG. 6;

FIG. 8 is a schematic cross-sectional view of E-E' of FIG. 6;

fig. 9 is a schematic structural view of another battery string provided in the present invention;

FIG. 10 is a schematic sectional view of H-H' in FIG. 9;

FIG. 11 is a schematic cross-sectional view of D-D' of FIG. 6;

fig. 12 is a schematic sectional view of F-F' in fig. 6.

Detailed Description

Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.

The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

Techniques, methods, and apparatus known to one of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.

In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be discussed further in subsequent figures.

FIG. 1 is a schematic diagram of a photovoltaic cell provided by the present invention; FIG. 2 isbase:Sub>A schematic cross-sectional view A-A' of FIG. 1; FIG. 3 is a schematic cross-sectional view of B-B' of FIG. 1; referring to fig. 1 to fig. 3, the present embodiment provides a photovoltaic cell 100, where the photovoltaic cell 100 includes a silicon substrate 1, a textured surface (not shown) on at least one surface of the silicon substrate 1, and a passivation layer 3 on at least one surface of the textured surface (not shown), and doped layers 4 with different polarities are disposed in the back surface of the silicon substrate 1;

the silicon substrate 1 is provided with main gate pits 11 extending along a first direction X and arranged along a second direction Y, the first direction X is intersected with the second direction Y, first main gate lines 110 and second main gate lines 120 extending along the first direction X are respectively arranged in the main gate pits 11 adjacent to each other along the second direction Y, and the first main gate lines 110 and the second main gate lines 120 are alternately arranged along the second direction Y and have opposite polarities;

the first main gate line 110 and the second main gate line 120 are provided with solder joints 130 at intervals along the first direction X;

the silicon substrate 1 is further provided with first thin gate lines 140 and second thin gate lines 150 which are arranged along a first direction X and extend along a second direction Y, the first thin gate lines 140 and the second thin gate lines 150 are alternately arranged along the first direction X, the first thin gate lines 140 are connected with the first main gate lines 110, the second thin gate lines 150 are connected with the second main gate lines 120, wherein the first thin gate lines 140 and the first main gate lines 110 have the same polarity, and the second thin gate lines 150 and the second main gate lines 120 have the same polarity;

the depth of the main grid pit 11 along the direction vertical to the silicon substrate 1 is 30-50 μm;

the ratio of the depth of the main gate pits 11 to the height of the first main gate line 110 and/or the second main gate line 120 in the direction perpendicular to the silicon substrate 1 is in the range of 10 to 6.

Specifically, the photovoltaic cell 100 may adopt a half photovoltaic cell 100, and the half photovoltaic cell 100 may reduce the cell resistance and reduce the resistance loss; the photovoltaic cell 100 comprises a silicon substrate 1, the thickness of the silicon substrate 1 may be 160 μm-200 μm, such as 160 μm, 170 μm, 180 μm, 190 μm or 200 μm; the silicon substrate 1 can be an N-type silicon substrate 1, a damage layer on the surface of the silicon substrate 1 is removed, the surface of the silicon substrate 1 is subjected to structured treatment, a textured surface is formed on the surface (the front surface and the back surface or the back surface) of the silicon substrate, the textured surface has a light trapping effect, the reflectivity of the surface of the silicon wafer can be reduced to be below 10%, therefore, the short-circuit current and the conversion efficiency of the photovoltaic cell 100 are improved, passivation treatment is performed on the textured surface (the front surface and the back surface or the back surface) to form a passivation layer 3, the passivation layer 3 has functions of light reflection reduction and surface passivation, doping layers 4 with different polarities are arranged on the back surface of the silicon substrate 1, and PN junctions are obtained by diffusing a boron source and a phosphorus source;

a plurality of main gate pits 11 are formed in the silicon substrate 1, the doping layer 4 can be located in the main gate pits 11, the main gate pits 11 extend along a first direction X and are arranged along a second direction Y, the first direction X is intersected with the second direction Y, and optionally, the cross section of the main gate pits 11 along the second direction Y is rectangular, semicircular, triangular, arc-shaped or trapezoidal, preferably semicircular;

along the second direction Y, a first main gate line 110 and a second main gate line 120 extending along the first direction X are respectively arranged in the adjacent main gate pits 11, and both the first main gate line 110 and the second main gate line 120 can collect carriers, so that the back contact efficiency is further improved;

the first main gate lines 110 and the second main gate lines 120 are alternately arranged along the second direction Y, and have opposite polarities, and if the first main gate line 110 is a positive electrode, the second main gate line 120 is a negative electrode; or, the first main gate line 110 is a cathode, the second main gate line 120 is an anode, and the first main gate line 110 and the second main gate line 120 do not penetrate through the passivation layer 3 and contact the silicon substrate, alternatively, the first main gate line 110 and the second main gate line 120 may penetrate through the passivation layer 3 and contact the silicon substrate 1;

the first main grid line 110 and the second main grid line 120 are respectively provided with welding points 130 at intervals along the first direction X, the number of the welding points 130 in a half photovoltaic cell 100 is not less than 3, for example, the number of the welding points 130 in the half photovoltaic cell 100 may be 4 or more, such as 5 or 6;

the silicon substrate 1 is further provided with first and second

thin gate lines

140 and 150 arranged along the first direction X and extending along the second direction Y, the silicon substrate 1 is further provided with first and second

thin gate lines

140 and 150, the first and second

thin gate lines

140 and 150 can be directly printed on the silicon substrate 1, if the first and second

thin gate lines

140 and 150 can penetrate through the passivation layer 3 and directly contact the doping layer 4, the first and second

thin gate lines

140 and 150 can collect carriers, and improve the back contact battery efficiency, the first and second

thin gate lines

140 and 150 are alternately arranged along the first direction X, the first thin gate line 140 is connected with the first main gate line 110, and the second thin gate line 150 is connected with the second main gate line 120, wherein the first thin gate line 140 has the same polarity as the first main gate line 110, the second thin gate line 150 has the same polarity as the second main gate line 120, and the gate line 140 does not contact the second main gate line 120, and the first thin gate line 140 does not contact the second main gate line 120, and thus the first thin gate line 140 does not need to enter a pit 120 in which the second main gate line is printed, and the first thin gate line 140 and the first thin gate line 110 can enter a pit 110, and the first thin gate line 110 can be connected; the second thin gate line 150 does not contact the first main gate line 110 having a different polarity, and does not need to enter the main gate pit on which the first main gate line 110 is printed, and since the second thin gate line 150 contacts the second main gate line 120 having the same polarity, the second thin gate line 150 can enter the main gate pit on which the second main gate line 120 is printed and be connected to the second main gate line 120; if the first main gate line 110 is an anode, the first thin gate line 140 is also an anode, and the second main gate line 120 is a cathode, the second thin gate line 150 is also a cathode, or if the first main gate line 110 is a cathode, the first thin gate line 140 is also a cathode, and the second main gate line 120 is an anode, the second thin gate line 150 is also an anode;

if the depth of the main grid pit 11 in the direction perpendicular to the silicon substrate 1 is lower than 30 μm, the welding tension between the battery piece and the welding wire is not facilitated, and if the depth of the main grid pit 11 in the direction perpendicular to the silicon substrate 1 is higher than 50 μm, the subfissure risk of the battery piece is increased, so that the depth range of the main grid pit 11 in the direction perpendicular to the silicon substrate 1 is 30 μm-50 μm, the subfissure risk of the battery piece can be reduced, the welding tension between the welding wire and the battery piece is facilitated to be improved, and particularly, the depth of the main grid pit 11 in the direction perpendicular to the silicon substrate 1 can be 30 μm, 35 μm, 40 μm, 45 μm or 50 μm;

the ratio of the depth of the main gate pits 11 to the height of the first main gate line 110 in the direction perpendicular to the silicon substrate 1 may be as large as 10:1 to 10:9, which may range from 5:2 to 5:3, preferably, the ratio of the depth of the main gate pit 11 to the height of the first main gate line 110 in the direction perpendicular to the silicon substrate 1 is in the range of 10; or,

the ratio of the depth of the main gate pits 11 to the height of the second main gate lines 120 in the direction perpendicular to the silicon substrate 1 may be in a wide range of 10:1 to 10:9, which may range from 5:2 to 5:3, preferably, the ratio of the depth of the main gate pit 11 to the height of the second main gate line 120 in the direction perpendicular to the silicon substrate 1 is in the range of 10; or,

the ratio of the depth of the main gate pits 11 to the height of the first and second

main gate lines

110 and 120 in the direction perpendicular to the silicon substrate 1 may be in a wide range of 10:1 to 10:9, which may range from 5:2 to 5:3, preferably, in the direction perpendicular to the silicon substrate 1, the ratio of the depth of the main gate pit 11 to the height of the first and second

main gate lines

110 and 120 ranges from 10 to 6, such as 10;

as can be seen from the foregoing embodiments, the photovoltaic cell 100 provided in the present embodiment at least achieves the following beneficial effects:

in the embodiment, the photovoltaic cell 100 comprises a silicon substrate 1, a textured surface and a passivation layer 3, wherein doped layers 4 with different polarities are arranged on the back surface of the silicon substrate 1; a silicon substrate 1 is provided with main gate pits 11 extending along a first direction X and arranged along a second direction Y, the first direction X intersects with the second direction Y, first main gate lines 110 and second main gate lines 120 extending along the first direction X are respectively arranged in the main gate pits 11 adjacent to each other along the second direction Y, and the first main gate lines 110 and the second main gate lines 120 are alternately arranged along the second direction Y and have opposite polarities; the first main gate line 110 and the second main gate line 120 are provided with solder joints 130 at intervals along the first direction X; the depth of the main grid pit 11 along the direction vertical to the silicon substrate 1 is 30-50 μm; along the direction perpendicular to the silicon substrate 1, the ratio range of the depth of the main gate pits 11 to the height of the first main gate line 110 and/or the height of the second main gate line 120 is 10 to 5, which is not only beneficial to improving the welding tension between the battery piece and the welding wire, but also reduces the hidden crack risk of the battery piece, and meanwhile, as the distance from minority carriers to the doping layer 4 is reduced, the open-circuit voltage of the back contact battery is improved, and the efficiency of the IBC is improved.

In an embodiment, as shown in fig. 1 and fig. 3, the silicon substrate 1 is further provided with fine grid pits 12 extending along the second direction Y and staggered along the first direction X, the first fine grid lines 140 and the second fine grid lines 150 are staggered in the fine grid pits 12, generally, no grid line exists on the front side of the back-contact battery, photo-generated electrons on the front side need to be collected by the grid lines on the back side (the first fine grid lines 140, the second fine grid lines 150, the first main grid lines 110 and/or the second main grid lines 120), and the photo-generated electron paths can be reduced within a certain range through the fine grid pits 12, so that recombination is reduced, and the efficiency of the battery piece is improved.

In an embodiment, as shown in fig. 2 and fig. 3, the depth of the main grid pits 11 is greater than the depth of the fine grid pits 12 along the direction perpendicular to the silicon substrate 1, so that a part of the welding wire is embedded in the main grid pits 11, and the welding tension is further increased.

In one embodiment, continuing with FIG. 3, the fine gate pits have a depth of 25 μm to 35 μm in a direction perpendicular to the silicon substrate 1.

Specifically, if the depth of the fine grid pits along the direction perpendicular to the silicon substrate 1 is less than 25 μm, the fine grid pits cannot be formed, and the efficiency of the cell cannot be improved; if the depth of the fine grid pit along the direction vertical to the silicon substrate 1 is larger than 35 μm, the subfissure rate of the cell is increased due to the fact that the cell is too thin, therefore, the depth range of the fine grid pit along the direction vertical to the silicon substrate 1 is designed to be 25 μm-35 μm, the subfissure rate of the cell can be reduced, and the fine grid pit is beneficial to forming, and specifically, the depth of the fine grid pit along the direction vertical to the silicon substrate 1 can be 25 μm, 28 μm, 31 μm or 35 μm.

In an embodiment, as shown with continued reference to fig. 2 and 3, the width of the main gate pits 11 in the second direction Y is larger than the width of the fine gate pits in the first direction X, and the width of the main gate pits 11 in the second direction Y is 40 μm to 70 μm; and/or the width of the fine grid pits along the first direction X is 25-35 μm.

Specifically, making the width of the main grid pits 11 in the second direction Y larger than the width of the fine grid pits in the first direction X more effectively increases the welding tension, that is, in order to enable a portion of the welding wire to be embedded in the main grid pits 11, both the width and the depth thereof are larger than those of the fine grid pits;

if the width of the main grid pit 11 along the second direction Y is less than 40 μm, the welding tension is not facilitated, and if the width of the main grid pit 11 along the second direction Y is greater than 70 μm, the hidden crack risk of the cell is increased, so that the width range of the main grid pit 11 along the second direction Y is designed to be 40 μm-70 μm, the welding tension is facilitated, and the hidden crack risk of the cell is reduced; specifically, the width of the main gate pits 11 along the second direction Y may be selected from 40 μm, 50 μm, 60 μm, or 70 μm;

if the width of the fine grid pits along the first direction X is less than 25 μm, the value for improving the efficiency of the battery piece cannot be obtained, and if the width of the fine grid pits along the first direction X is greater than 35 μm, the subfissure rate of the battery piece is increased, so that the width range of the fine grid pits along the first direction X is designed to be 25 μm-35 μm, the value for improving the efficiency of the battery piece can be improved, and the subfissure rate of the battery piece can be reduced, specifically, the width of the fine grid pits along the first direction X can be 25 μm, 28 μm, 31 μm or 35 μm.

Meanwhile, if the width of the main grid pit 11 along the second direction Y is less than 40 μm, the welding tension is not facilitated, if the width of the main grid pit 11 along the second direction Y is greater than 70 μm, the risk of the hidden crack of the cell is increased, therefore, the width range of the main grid pit 11 along the second direction Y is designed to be 40 μm-70 μm, the welding tension is facilitated, and the risk of the hidden crack of the cell is reduced; specifically, the width of the main gate pits 11 along the second direction Y may be selected from 40 μm, 50 μm, 60 μm, or 70 μm; the width range of the fine grid pits along the first direction X is designed to be 25-35 μm, so that the efficiency value of the cell can be improved, and the subfissure rate of the cell can be reduced, and specifically, if the width of the fine grid pits along the first direction X is 25 μm, 28 μm, 31 μm or 35 μm, the width of the fine grid pits along the first direction X can be selected.

In one embodiment, with continued reference to fig. 1, the first and/or

second bus bar

110, 120 has a height of 15-25 μm; and/or the height of the first thin gate lines 140 and/or the second thin gate lines 150 is 15-25 μm.

Specifically, if the height of the first main grid line 110 and/or the second main grid line 120 is less than 15 μm, the collecting of carriers is not facilitated, so that the back efficiency of the back contact battery is increased, and if the height of the first main grid line 110 and/or the second main grid line 120 exceeds 25 μm, the welding tension is affected, so that the height range of the first main grid line 110 and/or the second main grid line 120 is designed to be 15-25 μm, the carriers can be effectively collected, the back contact battery efficiency is improved, and the welding tension of a battery piece and a welding wire is facilitated, specifically, the height of the first main grid line 110 and/or the second main grid line 120 can be selected from 15 μm, 20 μm or 25 μm;

if the height of the first thin grid lines 140 and/or the second thin grid lines 150 is lower than 15 μm, the grid lines are not favorable for collecting carriers, and the improvement of the back surface efficiency of the back contact cell is influenced; if the height of the first thin gate line 140 and/or the second thin gate line 150 is higher than 25 μm, the usage amount of silver paste is increased, and the cost of the silver paste is increased, so that the height range of the first thin gate line 140 and/or the second thin gate line 150 is designed to be 15-25 μm, which not only can reduce the usage amount of silver paste and reduce the cost of the silver paste, but also can improve the back efficiency of a back contact battery, for example, the height of the first thin gate line 140 and/or the second thin gate line 150 can be 15 μm, 20 μm, or 25 μm;

meanwhile, if the height of the first main grid line 110 and/or the second main grid line 120 is lower than 15 μm, it is not beneficial to collect carriers, so that the efficiency of the back surface of the back contact battery is increased, if the height of the first main grid line 110 and/or the second main grid line 120 exceeds 25 μm, the welding tension is affected, and if the height of the first thin grid line 140 and/or the second thin grid line 150 is lower than 15 μm, it is not beneficial to collect carriers by the grid lines, so that the efficiency of the back surface of the back contact battery is increased; if the height of the first thin gate line 140 and/or the second thin gate line 150 is higher than 25 μm, the usage amount of silver paste is increased, and the cost is increased; therefore, the height range of the first main grid lines 110 and/or the second main grid lines 120 is designed to be 15-25 μm, so that carriers can be effectively collected, the back contact battery efficiency is improved, and the welding tension of a battery piece and a welding wire is facilitated, specifically, the height of the first main grid lines 110 and/or the second main grid lines 120 can be 15 μm, 20 μm or 25 μm; the height range of the first fine grid lines 140 and/or the second fine grid lines 150 is designed to be 15-25 μm, so that the usage amount of silver paste can be reduced, the cost of the silver paste can be reduced, and the back efficiency of a back contact battery can be improved, for example, the height of the first fine grid lines 140 and/or the height of the second fine grid lines 150 can be 15 μm, 20 μm or 25 μm.

The width range of the first main grid line 110 and/or the second main grid line 120 along the second direction Y can be selected from 30 micrometers to 60 micrometers, and the width range of the first fine grid line 140 and/or the second fine grid line 150 along the first direction X can be selected from 20 to 40.

FIG. 4 is a schematic flow diagram of a method of making a photovoltaic cell provided by the present invention; referring to fig. 4, this embodiment further provides a method for manufacturing a photovoltaic cell, where S1 forms a pit on the back surface of the N-type silicon substrate 1;

s2, texturing the surface of the N-type silicon substrate to form a textured surface;

s3, doping the N-type silicon substrate to form a back surface N + doped region and a back surface p + doped region which are alternately arranged;

s4, forming an antireflection film on the front surface of the N-type silicon substrate, and forming a passivation layer 3 on the back surface of the N-type silicon substrate;

s5, preparing a metal electrode on the back surface of the silicon substrate, wherein the metal electrode comprises a main grid line, a fine grid line and a welding spot connected with the main grid line, the fine grid line is in ohmic contact with the n + doped region and the p + doped region of the back surface, and the main grid line and/or the fine grid line are/is positioned in the concave pit.

Specifically, the preparation method of the photovoltaic cell specifically comprises the following steps: processing the back of the N-type silicon substrate by utilizing laser etching or mechanical etching to form pits, such as main grid pits, or the main grid pits and fine grid pits, and cleaning after the pits are formed, such as removing damaged silicon substrates; performing texturing on the back surface of the N-type silicon substrate, or performing texturing on the back surface or the front surface and the back surface of the N-type silicon substrate to form a textured surface (not shown in the figure); the texturing aims at forming a rugged structure on the surface of an originally bright silicon substrate through chemical reaction so as to prolong the propagation path of light on the surface of the silicon substrate, thereby improving the absorption of the silicon wafer to the light; carrying out doping treatment on pits of the N-type silicon substrate, and forming back surface N + doped regions and back surface p + doped regions which are alternately arranged after doping is finished, such as PN junctions are obtained by diffusing boron sources and phosphorus sources; then, a PECVD (plasma enhanced chemical vapor deposition) device is used for coating on the front surface of the N-type silicon substrate to form an antireflection film, and the antireflection film can reduce the reflection of light; depositing a layer of SiNx (silicon nitride) on the back surface of the N-type silicon substrate by using PECVD equipment to form a passivation layer, wherein the passivation layer has the functions of surface passivation and antireflection; preparing a metal electrode on the back surface of the silicon substrate, wherein the metal electrode comprises a main grid line, a fine grid line and a welding point connected with the main grid line, the prepared metal electrode can be specifically printed with silver-aluminum paste (such as the fine grid line) on a p + doping area on the back surface of the processed N-type silicon substrate by a screen printing method, and the prepared metal electrode is printed with silver paste (such as the fine grid line) on an N + doping area on the back surface, can be directly printed on a passivation layer on the back surface aiming at the main grid line and the welding point, does not penetrate through the N-type silicon substrate, and certainly can also penetrate through and be printed on a doping layer according to actual conditions; and then sintering treatment is carried out. By using the preparation method, the distance from minority carriers to the doping layer can be greatly reduced, and the open-circuit voltage of the back contact battery is improved;

in the embodiment, the formed pits (main gate pits, or main gate pits and fine gate pits) are utilized to realize the welding tension between the battery piece and the welding wire, and the distance from minority carriers to the doped layer can be greatly reduced, so that the open-circuit voltage of the back contact battery is improved, and the efficiency of the back contact battery is improved.

FIG. 5 is a schematic diagram of a photovoltaic module according to the present invention; fig. 6 is a schematic structural diagram of a battery string provided in the present invention; FIG. 7 is a schematic cross-sectional view of C-C' of FIG. 6; FIG. 8 is a schematic cross-sectional view of E-E' of FIG. 6; fig. 9 is a schematic structural view of another battery string provided in the present invention; FIG. 10 is a schematic sectional view of H-H' of FIG. 9; referring to fig. 5 to 10, this embodiment further provides a photovoltaic module 200, where the photovoltaic module 200 includes a glass 201, a first encapsulant film 202, a battery string 203, a second encapsulant film 204, and a back panel 205, which are sequentially arranged from top to bottom, where the battery string 203 is composed of a plurality of half-sheets of battery sheets 100, and both the first encapsulant film 202 and the second encapsulant film 204 may be POE films, where POE is an ethylene-octene copolymer and is composed of saturated fatty chains, and has the characteristics of good weather resistance, ultraviolet aging resistance, excellent heat resistance, excellent low temperature resistance, wide use temperature range, good light transmittance, excellent electrical insulation performance, high cost performance, and easy processing; or EVA adhesive films can be adopted, the EVA adhesive films are the most common adhesive films, the main components are ethylene-vinyl acetate copolymer (EVA), a small amount of cross-linking agent, auxiliary cross-linking agent, anti-aging agent and other functional auxiliary agents, the EVA is prepared by copolymerizing two monomers, and the ethylene chain fracture is relatively stable;

the half cell pieces adjacent to each other along a first direction X comprise first cell pieces 1 and second cell pieces 2 which are arranged in a staggered mode, the first cell pieces 1 and the second cell pieces 2 both adopt back contact cell pieces, and the first direction X is a direction from the first cell pieces 1 to the second cell pieces 2;

the solar cell further comprises a passivation layer 3 positioned on the back surfaces of the first cell slice 1 and the second cell slice 2, and the passivation layer 3 has the functions of reducing reflected light and passivating the surface;

the first cell piece 1 is provided with first main grid pits 11 extending along a first direction X and arranged along a second direction Y, the first direction X is intersected with the second direction Y, first main grid lines 110 and second main grid lines 120 extending along the first direction X are respectively arranged in the first main grid pits 11 adjacent to each other along the second direction Y, and the first main grid lines 110 and the second main grid lines 120 are alternately arranged along the second direction Y and have opposite polarities;

the first main gate line 110 and the second main gate line 120 are connected with a first welding spot 21 along the first direction X;

a second main grid pit 21 extending along the first direction X and arranged along the second direction Y is formed in the second cell 2, third main grid lines 210 and fourth main grid lines 211 extending along the first direction X are respectively arranged in the second main grid pits 21 adjacent to each other along the second direction Y, and the third main grid lines 210 and the fourth main grid lines 211 are alternately arranged and have opposite polarities;

the third and fourth

main gate lines

210 and 211 are connected to at least two second pads 22 along the first direction X;

in the first direction X, the first main gate line 110 and the third main gate line 210 are on the same extension line, and the second main gate line 120 and the fourth main gate line 211 are on the same extension line, wherein the first main gate line 110 and the third main gate line 210 have opposite polarities, and the second main gate line 120 and the fourth main gate line 211 have opposite polarities;

the depths of the first main grid pits 11 along the direction vertical to the first battery piece 1 are all 30-50 mu m; in the direction perpendicular to the first battery piece 1, the ratio of the height of the first main grid pit 11 to the height of the first main grid line 110 and/or the second main grid line 120 is in the range of 10 to 6;

the depth of the second main grid pits 21 along the direction vertical to the second battery piece 2 is 30-50 μm; in the direction perpendicular to the second cell piece 2, the ratio of the height of the second main grid pit 21 to the height of the third main grid line 210 and/or the height of the fourth main grid line 211 ranges from 10 to 5;

for the structure and polarity of the first main gate line 110 and the second main gate line 120 in the first cell 1 are the same as those of the first main gate line 110 and the second main gate line 120 in the photovoltaic cell 100, and for the structure and polarity of the third main gate line 210 and the fourth main gate line 211 in the second cell 2 are the same as those of the first main gate line 110 and the second main gate line 120 in the photovoltaic cell 100, but the polarities are different, and detailed description is omitted here;

in the first direction X, adjacent cells are connected by a welding wire 206, for example, the positive first main gate line 110 and the negative third main gate line 210, and the negative second main gate line 120 and the positive fourth main gate line 211 are directly connected by the welding wire 206, or the negative first main gate line 110 and the positive third main gate line 210, and the positive second main gate line 120 and the negative fourth main gate line 211 are directly connected by the welding wire 206, so that warping of the photovoltaic cell 100 is effectively improved, and the problem of hidden cracking caused by excessive stress is avoided; if the diameter of the welding wire 206 is less than 150 μm, the device cannot weld the welding wire 206 and the welding spot 130; if the diameter of the welding wire 206 is larger than 300 μm, the stress of the welding wire 206 is large, the back contact battery is prone to crack, and the cost of the welding wire 206 is increased, so that the diameter of the welding wire 206 is designed to be 150 μm-300 μm, the risk of crack of the back contact battery can be reduced, the cost of the welding wire 206 can be reduced, and the welding wire 206 and the welding point 130 can be conveniently connected.

A part of the welding wire 206 is clamped into the first main grid pit 11 and the second main grid pit 21, so that the welding tension is increased, and in addition, the distance from minority carriers in the first battery piece 1 and the second battery piece 2 to the metal electrodes (the first main grid line 110, the second main grid line 120, the third main grid line 210, the fourth main grid line 211, the first welding point 21 and/or the second welding point 22) is greatly reduced, so that the open-circuit voltage of the battery is increased, and the efficiency of the back contact battery is more effectively increased.

By the embodiment, the photovoltaic module 200 provided by the invention at least achieves the following beneficial effects:

on one hand, partial welding wire 206 is embedded in the first main grid pit 11 and the second main grid pit 21, so that the welding tension of the welding wire 206 and the battery piece can be effectively increased;

on the other hand, along the first direction X, the first main gate line 110 and the third main gate line 210 with opposite polarities can be directly connected through the welding wire 206, so that the warping of the photovoltaic cell 100 is effectively improved, and the problem of hidden cracking caused by excessive stress is avoided.

In one embodiment, and with continued reference to fig. 5-10, 15% -25% of the welding wire 206 is within the first and/or second main grid dimples 11, 21.

Specifically, if less than 15% of the welding wire 206 is in the first main grid pits 11 and/or the second main grid pits 21, the contact area of the welding wire 206 with the first main grid pits 11 and/or the second main grid pits 21 is too small, and the welding tension is not ideal; if the welding wire is more than 25% of the welding wire 206 in the first main grid pit 11 and/or the second main grid pit 21, the first battery piece 1 and the second battery piece 2 are easily subfissure, so that the welding wire 206 is 15% -25% in the first main grid pit 11 and/or the second main grid pit 21, the contact area between the welding wire 206 and the first main grid pit 11 and/or the second main grid pit 21 is prevented from being too small, the welding tension between the battery pieces and the welding wire 206 is favorably increased, and the subfissure rate of the first battery piece 1 and the second battery piece 2 is reduced.

In one embodiment, FIG. 11 is a schematic cross-sectional view D-D' of FIG. 6; FIG. 12 is a schematic cross-sectional view of F-F' in FIG. 6; as shown in fig. 11 to 12, in this embodiment, the first battery piece 1 is further provided with first fine grid pits 12 extending along the second direction Y and staggered along the first direction X, the first fine grid pits 12 adjacent to each other along the first direction X are respectively provided with first fine grid lines 140 and second fine grid lines 150 extending along the second direction Y, the first fine grid lines 140 and the second fine grid lines 150 are alternately arranged along the first direction X, the first fine grid lines 140 are connected to the first main grid lines 110, and the second fine grid lines 150 are connected to the second main grid lines 120, wherein the first fine grid lines 140 have the same polarity as the first main grid lines 110, and the second fine grid lines 150 have the same polarity as the second main grid lines 120;

the second cell piece 2 is further provided with second fine grid pits 22 extending along the second direction Y and staggered along the first direction X, third fine grid lines 220 and fourth fine grid lines 221 extending along the second direction Y are respectively arranged in the second fine grid pits 22 adjacent to each other along the first direction X, the third fine grid lines 220 and the fourth fine grid lines 221 are alternately arranged along the first direction X, the third fine grid lines 220 are connected with the third main grid lines 210, and the fourth fine grid lines 221 are connected with the fourth main grid lines 211, wherein the third fine grid lines 220 have the same polarity as the third main grid lines 210, and the fourth fine grid lines 221 have the same polarity as the fourth main grid lines 211.

It should be noted that: the first fine grid pits 12 on the first cell piece 1 and the second fine grid pits 22 on the second cell piece 2 have the same structure as the photovoltaic cell 100; the structures and polarities of the first thin gate line 140 and the second thin gate line 150 in the first cell 1 are the same as those of the first thin gate line 140 and the second thin gate line 150 in the photovoltaic cell 100, and the structures and polarities of the third thin gate line 220 and the fourth thin gate line 221 in the second cell 2 are the same as those of the first thin gate line 140 and the second thin gate line 150 in the photovoltaic cell 100, but the polarities are different, and details are not described herein again.

Although some specific embodiments of the present invention have been described in detail by way of example, it should be understood by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims

1. The photovoltaic cell is characterized by comprising a silicon substrate, a textured surface and a passivation layer, wherein the textured surface is positioned on at least one surface of the silicon substrate, the passivation layer is positioned on at least one surface of the textured surface, and doped layers with different polarities are arranged on the back surface of the silicon substrate;

the silicon substrate is provided with main grid pits extending along a first direction and arranged along a second direction, the first direction is intersected with the second direction, first main grid lines and second main grid lines extending along the first direction are respectively arranged in the main grid pits adjacent to the second direction, and the first main grid lines and the second main grid lines are alternately arranged along the second direction and have opposite polarities;

the silicon substrate is further provided with first thin gate lines and second thin gate lines which are arranged along the first direction and extend along the second direction, the first thin gate lines and the second thin gate lines are alternately arranged along the first direction, the first thin gate lines are connected with the first main gate lines, the second thin gate lines are connected with the second main gate lines, the first thin gate lines and the first main gate lines have the same polarity, and the second thin gate lines and the second main gate lines have the same polarity;

in the direction perpendicular to the silicon substrate, the ratio of the depth of the main gate pit to the height of the first main gate line and/or the second main gate line is within a range of 10-6.

2. The photovoltaic cell of claim 1, wherein a cross-sectional shape of the main grid pits along the second direction is rectangular, semicircular, triangular, arc-shaped, or trapezoidal.

3. The photovoltaic cell of claim 1, wherein the silicon substrate is further provided with fine grid pits extending along the second direction and staggered along the first direction, and the first fine grid lines and the second fine grid lines are staggered in the fine grid pits.

4. The photovoltaic cell of claim 3, wherein the depth of the primary gate pits is greater than the depth of the fine gate pits in a direction perpendicular to the silicon substrate.

5. The photovoltaic cell of claim 4, wherein the fine grid pits have a depth of 25 μm to 35 μm in a direction perpendicular to the silicon substrate.

6. The photovoltaic cell of claim 3, wherein the width of the main grid pits along the second direction is greater than the width of the fine grid pits along the first direction.

7. The photovoltaic cell of claim 6, wherein the width of the main grid pits along the second direction is 40-70 μ ι η; and/or

The width of the fine grid pits along the first direction is 25-35 mu m.

8. The photovoltaic cell of any one of claims 1-7, wherein the first and/or second bus bar has a height of 15-25 μm; and/or

The height of the first thin grid line and/or the second thin grid line is 15-25 μm.

9. A method for manufacturing a photovoltaic cell, characterized in that,

forming a pit on the back surface of the N-type silicon substrate;

texturing the surface of the N-type silicon substrate to form a textured surface;

doping the N-type silicon substrate to form a back surface N + doped region and a back surface p + doped region which are alternately arranged after doping;

forming an antireflection film on the front surface of the N-type silicon substrate, and forming a passivation layer on the back surface of the N-type silicon substrate;

preparing a metal electrode on the back surface of the silicon substrate, wherein the metal electrode comprises a main grid line, a fine grid line and a welding spot connected with the main grid line, the fine grid line is in ohmic contact with the n + doped region and the p + doped region of the back surface, and the main grid line and/or the fine grid line are/is positioned in the concave pit.

10. A photovoltaic module is characterized by comprising glass, a first packaging adhesive film, a cell string, a second packaging adhesive film and a back plate which are sequentially arranged from top to bottom, wherein the cell string is composed of a plurality of half cell pieces;

the half battery pieces adjacent to each other along the first direction comprise a first battery piece and a second battery piece which are arranged in a staggered mode, and the first direction is the direction from the first battery piece to the second battery piece;

the first battery piece is provided with first main grid pits extending along the first direction and arranged along the second direction, the first direction is intersected with the second direction, first main grid lines and second main grid lines extending along the first direction are respectively arranged in the first main grid pits adjacent to the second direction, and the first main grid lines and the second main grid lines are alternately arranged along the second direction and have opposite polarities;

the first main grid line and the second main grid line are connected with first welding spots along the first direction;

a second main grid pit extending along the first direction and arranged along the second direction is formed in the second battery piece, third main grid lines and fourth main grid lines extending along the first direction are respectively arranged in the second main grid pits adjacent to each other along the second direction, and the third main grid lines and the fourth main grid lines are alternately arranged and have opposite polarities;

the depth of each first main grid pit along the direction vertical to the first battery piece is 30-50 μm; in the direction perpendicular to the first cell piece, the ratio of the height of the first main grid pit to the height of the first main grid line and/or the second main grid line is within a range of 10-6;

11. The photovoltaic assembly of claim 10, wherein 15% to 25% of the welding wire is within the first and/or second main grid pits.

12. The photovoltaic module of claim 11, wherein the welding wire has a diameter in the range of 150-300 μ ι η.

13. The photovoltaic module according to any one of claims 10 to 12, wherein the first cell has first fine grid pits extending along the second direction and staggered along the first direction, first fine grid lines and second fine grid lines extending along the second direction are respectively disposed in the first fine grid pits adjacent to each other along the first direction, the first fine grid lines and the second fine grid lines are alternately disposed along the first direction, the first fine grid lines are connected to the first main grid lines, the second fine grid lines are connected to the second main grid lines, wherein the first fine grid lines and the first main grid lines have the same polarity, and the second fine grid lines and the second main grid lines have the same polarity;

the second battery piece is further provided with second fine grid pits extending along the second direction and staggered along the first direction, third fine grid lines and fourth fine grid lines extending along the second direction are arranged in the second fine grid pits adjacent to the first direction respectively, the third fine grid lines and the fourth fine grid lines are arranged alternately along the first direction, the third fine grid lines are connected with the third main grid lines, and the fourth fine grid lines are connected with the fourth main grid lines, wherein the third fine grid lines and the third main grid lines have the same polarity, and the fourth fine grid lines and the fourth main grid lines have the same polarity.