CN115586981A

CN115586981A - Method, system, computer and storage medium for preventing SIO signal loss

Info

Publication number: CN115586981A
Application number: CN202211486812.2A
Authority: CN
Inventors: 阮文科; 王井红; 马瑞
Original assignee: SHENZHEN NORCO INTELLIGENT TECHNOLOGY CO LTD
Current assignee: SHENZHEN NORCO INTELLIGENT TECHNOLOGY CO LTD
Priority date: 2022-11-25
Filing date: 2022-11-25
Publication date: 2023-01-10
Anticipated expiration: 2042-11-25
Also published as: CN115586981B

Abstract

The application relates to the field of SIO peripheral board cards, in particular to a method, a system, a computer and a storage medium for preventing loss of SIO signals. The method is applied to an input-output system and comprises the following steps: when entering the initialization phase, the decay period value of the SIO signal is read. And when the decay period value is larger than 0, reading the chip ID value of the extrapolation expansion board card. When reading the chip ID value fails, the first preset register value is increased by one. And when the first preset register value is larger than the decay period value, clearing the first preset register value. Initializing external equipment for externally plugging the expansion board card, and then entering the next stage until an operating system is entered. The purpose that the SIO signal can be prevented from losing is improved, and the stability and reliability of signal transmission between the extrapolation extension SIO integrated circuit board and the mainboard are improved.

Description

Method, system, computer and storage medium for preventing SIO signal loss

Technical Field

The application relates to the field of SIO peripheral board cards, in particular to a method, a system, a computer and a storage medium for preventing loss of SIO signals.

Background

In the fields of industrial control and the like, the number of SIO chips required on a mainboard is different due to different requirements of different clients on the number of serial ports. Because a SIO chip typically has only 2-8 serial ports, if 10 or 20 serial ports are required, 2 to 10 SIO chips are required on a motherboard. If all the chips are added to one mainboard, the product is single, and when the number of the required serial ports is small, the resource is wasted; when the number of the required serial ports is more, the requirements are not met, the requirements of various customers cannot be met simultaneously, and the maximum utilization rate of the chip is achieved. Therefore, the problem is solved by adding a function capable of externally connecting the chip. The method needs to be provided with a group of interfaces of the SIO chip to match with the peripheral expansion SIO board card, so that the method can be compatible with a plurality of extrapolation expansion SIO board cards with different serial port numbers to meet different customer requirements. However, in the using process, as the main board and the external-extension SIO board card need to be connected with each other by using the plug pins, the communication line is long, so that the SIO signal on the extension card is easy to attenuate and lose, and thus, the abnormal use of functions can occur after the SIO signal enters the system.

Disclosure of Invention

In view of the above, the present application proposes a method, system, computer and storage medium for preventing loss of an SIO signal.

The embodiment of the present application provides a method for preventing loss of an SIO signal, which is applied to an input/output system, and includes:

reading the attenuation period value of the SIO signal after entering an initialization stage;

when the attenuation period value is larger than 0, reading the chip ID value of the extrapolation expansion board card;

when reading the chip ID value fails, adding one to a first preset register value;

when the first preset register value is larger than the decay period value, clearing the first preset register value;

initializing external equipment of the extrapolation expansion board card, and then entering the next stage until entering an operating system.

Further, in the above method for preventing loss of an SIO signal, the method further includes:

and when the ID value of the chip is successfully read, clearing the first preset register value and initializing the external equipment of the extrapolation expansion board card.

and adding one to a second preset register value for accumulating the total lost times when reading the chip ID value fails.

and when the attenuation period value is not more than 0, clearing the first preset register value and the second preset register value, and initializing external equipment of the extrapolation expansion board card.

Further, in the method for preventing loss of the SIO signal, the method further includes:

and when the attenuation period value is not more than 0, clearing the first preset register value and initializing the external equipment of the extrapolation expansion board card.

and when the first preset register value is not larger than the decay period value, performing cold restart.

Further, in the above method for preventing loss of the SIO signal, the method includes:

the decay period value of the SIO signal is any one of 2-5.

Another embodiment of the present application further provides a system for preventing loss of an SIO signal, including:

the first reading unit is used for reading the attenuation period value of the SIO signal after entering the initialization stage;

the second reading unit is used for reading the chip ID value of the extrapolated expansion board card when the attenuation period value is larger than 0;

the computing unit is used for adding one to a first preset register value when reading the ID value of the chip fails;

a clearing unit, configured to clear the first preset register value when the first preset register value is greater than the decay period value;

and the initialization unit is used for initializing external equipment of the extrapolation expansion board card, and then entering the next stage until entering an operating system.

Another embodiment of the present application further provides a computer, which includes a storage unit and a processing unit, where the storage unit stores a computer program, and the processing unit executes the steps of the method for preventing loss of an SIO signal as described above by calling the computer program stored in the storage unit.

Another embodiment of the present application also provides a computer-readable storage medium, which stores a computer program, which is suitable for being loaded by a processor to execute the steps of the method for preventing SIO signal loss as described above.

The embodiment of the application has the following beneficial effects:

the embodiment of the application provides a method for preventing SIO signal loss, which performs cold restart on a BIOS and initializes an externally plugged expansion board card by accessing a signal attenuation cycle number for reading the SIO, a chip ID value for accessing the externally plugged expansion board card and a reading failure frequency, so as to achieve the purpose of preventing the SIO signal loss, thereby not only improving the stable reliability of signal transmission between the externally plugged expansion SIO board card and a mainboard, but also reducing the risk caused by signal loss when a client uses the externally plugged expansion SIO board card, and reducing the cost of mainboard production and upgrading. In addition, the method can be used for expanding the mainboard related to the SIO board card to achieve the same effect.

Drawings

In order to more clearly explain the technical solutions of the present application, the drawings needed to be used in the embodiments are briefly introduced below, and it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope of protection of the present application. Like components are numbered similarly in the various figures.

FIG. 1 illustrates a first flow diagram of a method of preventing loss of SIO signals according to some embodiments of the present application;

FIG. 2 illustrates a second flow diagram of a method of preventing loss of SIO signals according to some embodiments of the present application;

FIG. 3 illustrates a third flow diagram of a method of preventing loss of an SIO signal according to some embodiments of the present application;

FIG. 4 illustrates a fourth flowchart of a method of preventing loss of an SIO signal according to some embodiments of the present application;

FIG. 5 illustrates a fifth flowchart of a method of preventing loss of an SIO signal according to some embodiments of the present application;

fig. 6 illustrates a schematic diagram of a system for preventing SIO signal loss according to some embodiments of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments.

The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present application without making any creative effort, shall fall within the protection scope of the present application.

Hereinafter, the terms "including", "having", and their derivatives, which may be used in various embodiments of the present application, are intended to indicate only specific features, numerals, steps, operations, elements, components, or combinations of the foregoing, and should not be construed as first excluding the presence of or adding to one or more other features, numerals, steps, operations, elements, components, or combinations of the foregoing.

Furthermore, the terms "first," "second," "third," and the like are used solely to distinguish one from another and are not to be construed as indicating or implying relative importance.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the various embodiments of the present application belong. The terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning that is consistent with their contextual meaning in the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein in various embodiments.

Some embodiments of the present application will be described in detail below with reference to the accompanying drawings. The embodiments and features of the embodiments described below can be combined with each other without conflict.

Generally, a computer operates before a Basic Input/Output System (BIOS) is executed by turning on a power supply, that is, pressing a power switch on the computer. When the power switch is pressed, the CPU is activated, then searches the first instruction address of the BIOS, such as 0xFFFFFFF0, and then executes the corresponding operation of the BIOS. During the BIOS execution process, firstly, a work environment to be executed by BIOS codes is established, then, a memory, a chip (including a south bridge, a north bridge, an SIO chip and the like) on a mainboard and/or a chip with an external extension card are initialized, external equipment (including a mouse keyboard, a serial port parallel port, a network card, a hard disk, display equipment and the like) is initialized, and finally, the control right is handed to an operating system for the next operation. The BIOS is a bridge or interface between computer hardware and software, can provide a bottommost hardware control program for a computer, and has the functions of executing power-on self-test, system booting and the like. How much the performance of the motherboard depends greatly on the BIOS on the motherboard.

The Super Input/Output (SIO) chip provides control processing function for the quasi I/O interface on the mainboard. The term "super" as used herein means that it integrates processing functions such as a PS/2 (Personal System 2, PS/2) keyboard and mouse, a serial port, a parallel port, and a temperature control, and is generally mounted on a computer Bus such as an LPC Bus (LPC), and is very high in application to a plurality of SIO in the industrial control field.

In the BIOS, operations such as accessing the SIO are required, and in order to meet the requirements of various clients at the same time, the SIO is externally connected, and thus, a signal loss phenomenon is likely to occur in the signal transmission process due to a long line.

Therefore, the present application proposes a method for preventing loss of SIO signals.

Referring to fig. 1, a flowchart of a method for preventing SIO signal loss according to an embodiment of the present application is shown. The method for preventing loss of the SIO signal is exemplarily applied to the BIOS.

In some embodiments, as shown in fig. 1, the method for preventing loss of the SIO signal is applied to an input/output system, and the method may include:

s101, after entering the initialization stage, reading the decay period value of the SIO signal.

S201, when the attenuation period value is larger than 0, reading the chip ID value of the extrapolation expansion board card.

Specifically, first, the motherboard powers on and then enters the BIOS, and the BIOS enters a Security Phase (SEC) stage in which the BIOS performs four tasks.

And the task one receives and processes the system restart signal, the system power-on signal, the system restart signal and an abnormal signal in the system operation process.

And a second task, initializing a temporary storage area: when the system runs in the SEC phase, only the CPU and internal resources of the CPU are initialized, and various external devices and memories are not initialized. The system therefore requires a portion of temporary memory, commonly referred to as temporary RAM, which can only be located within the CPU, for the storage of code and data.

Task three, the SEC phase is the root of the trusted system: as a first part of the system startup, only SEC can be trusted by the system, and later stages have a trusted basis. Therefore, in most cases, the SEC re-transfers control to the Pre-EFI Initialization phase (Pre-EFI Initialization, PEI) before verifying that PEI is authentic.

And a fourth task, transmitting system parameters to the next stage: all work of the SEC phase is prepared for the PEI phase, the most important is to transfer the control right of the system to the PEI, and the operation information of the SEC phase is reported to the PEI. The SEC reports information to the PEI by passing the following information as parameters to the PEI's portal. The reporting signal comprises the current state of the system, and the PEI judges the current health condition of the system, the address and the size of a bootable Firmware Volume (the PEI judges the available hardware according to the address and the size of the bootable Firmware Volume), the address and the size of a temporary RAM area and the address and the size of a stack according to the state value.

And after the first stage is finished, entering a second-stage PEI initialization stage in advance, reading the attenuation period value of the SIO signal by the system in the stage, and if the attenuation period value of the SIO signal is read to be larger than 0, reading the chip ID value of the extrapolation expansion board card. The extrapolation expansion board card comprises at least one SIO, the number of the SIOs is not unique, and the number of the SIOs is determined according to the use condition and is not limited here.

Specifically, if the attenuation period value of the read SIO signal is 0, it indicates that the extrapolation expansion board card is neglected to be lost, and clears a first preset register value corresponding to a first preset register in a Complementary Metal Oxide Semiconductor (CMOS), and initializes an external device of the extrapolation expansion board card and allocates resources. The CMOS is a RAM chip capable of being read and written.

Further, if the programmed BIOS firmware has a resource for initializing the corresponding extrapolation expansion board card, but the extrapolation expansion SIO board card is not collocated on the motherboard, the attenuation period value of the SIO signal needs to be set to 0 for ignoring the extrapolation expansion SIO board card to avoid normal power up only after cold restart for many times, so the BIOS firmware generally defaults that the option value is 0, of course, the attenuation period value of the SIO signal is not unique, and can be modified arbitrarily as required, which is not limited herein.

In some embodiments, as shown in fig. 2, the method for preventing loss of the SIO signal further comprises:

s202, when the attenuation period value is not larger than 0, clearing the first preset register value, and initializing external equipment of the extrapolation expansion board card.

Specifically, whether a cold restart instruction needs to be executed is determined by judging the values of a first preset register value corresponding to a first preset register in the CMOS and the attenuation period value of the SIO signal, and if the first preset register value is not greater than the attenuation period value of the SIO signal, the cold restart instruction is executed to reacquire the chip ID value from the first step, and whether reacquisition fails is determined. If the attenuation period value is not greater than 0, which indicates that no signal is lost, clearing a first preset register value and a second preset register value for calculating the lost signal, and directly executing the last step, namely initializing external equipment of the extrapolation expansion board card, and then entering the next stage until entering an operating system.

In some embodiments, the method for preventing SIO signal loss further comprises:

s301, when reading the chip ID value fails, adding one to the first preset register value.

Specifically, whether the signal is lost or not is judged, and the BIOS may be used to read a chip ID value of the add-on expansion board. And if the reading of the chip ID value of the extrapolated extension board card fails, adding one to the first preset register value in the preset register, so as to perform judgment and subsequent operation again when the chip ID value fails to be acquired.

In some embodiments, as shown in fig. 3, the method for preventing loss of the SIO signal further comprises:

s302, when reading the chip ID value fails, adding one to the second preset register value for accumulating the total lost times.

Specifically, if reading the chip ID value of the external extension board card fails, the first preset register value in the preset register is incremented by one, and the second preset register value in the preset register is incremented by one, so as to accumulate the total times of signal loss, facilitate the BIOS developer or maintainer to obtain and determine the problem and perform subsequent maintenance and other operations according to the obtained total times.

When a second preset register is arranged in the CMOS to count the total times of signal loss, when the BIOS enters the PEI stage, if the read attenuation period value is not larger than 0, the first preset register value is cleared, meanwhile, the second preset register value is cleared, the external device of the external plug-in extension board card is initialized, and then the next stage is entered until the operating system is entered.

In some embodiments, as shown in fig. 4, the method for preventing loss of the SIO signal further includes:

and S303, when the chip ID value is successfully read, clearing the first preset register value, and initializing external equipment of the extrapolation expansion board card.

Specifically, if the chip ID value of the extrapolation expansion board card is successfully read, it indicates that the signal is not lost, and then the external device of the extrapolation expansion board card is initialized and the resource is allocated.

S401, when the first preset register value is larger than the decay period value, the first preset register value is cleared.

Specifically, if the first preset register value is greater than the attenuation period value of the SIO signal, the first preset register value corresponding to the first preset register in the CMSO is cleared, and the external device of the extrapolation expansion board card is initialized and resources are allocated. And then entering the next stage until the operating system is entered.

In some embodiments, as shown in fig. 5, the method for preventing loss of the SIO signal further includes:

s402, when the first preset register value is not larger than the decay period value, performing cold restart.

Specifically, when the first preset register value is not greater than the decay period value, it indicates that the signal may be reacquired again, so that a cold restart is required to restart acquiring the signal again to see whether the signal can be acquired.

S501, initializing external equipment of the extrapolation expansion board card, and then entering the next stage until entering an operating system.

Specifically, in practical use, the following situations may occur, which are described with the decay period value of the SIO signal set by the user being 1:

in the first situation, if the motherboard is not connected with the external extension board card, the BIOS firmware determines that the external extension board card fails to be read and executes a cold restart, and the external extension board card is lost after the BIOS reenters the determination, but the first preset register value corresponding to the first preset register in the CMOS is greater than the attenuation period value of the SIO signal after being added with 1 again, and the cold restart instruction is not executed again, but the system is smoothly entered, so that the situation that the system cannot be started without the external extension board card or the board card being damaged after the option is modified to the default value is avoided.

And in the second situation, if the main board has the external extension board card, after the external extension board card is failed to be captured and a cold restart instruction is executed once, the chip ID value of the external extension board card is read again, and when the external extension board card is successfully captured, the step is skipped and the external extension board card is successfully entered into the system.

And thirdly, if the mainboard has an external extension board card, but the chip ID value of the external extension board card is read again after the external extension board card is failed to be captured and a cold restart instruction is executed once, and if the external extension board card fails to enter the system, the attenuation period value of the SIO signal needs to be increased to improve the stability and reliability of the SIO signal. For example, when the decay period of the SIO signal is 1, the cold restart may fail again after the second time and directly proceed to the next stage, which may cause system errors. However, if the attenuation period value of the SIO signal is set to 2, after the cold restart for the second time, if the cold restart fails again, the chip ID value is obtained once, and if the cold restart fails for the third time, the above steps are skipped to directly enter the next stage, that is, there are many opportunities for the cold restart. When the decay period value of the SIO signal is larger, the chip ID value is allowed to be acquired more frequently, so that the system is more stable.

Further, after the external device of the external extension board card performs initialization allocation of resources, the BIOS enters a Driver Execution Environment (DXE) phase. Since memory is already in normal use during this phase, the DXE phase can perform a large amount of complex work. The DXE phase is similar from a programming perspective to the PEI phase. The DXE phase functions include performing most of the initialization work for the system, providing system tables, boot services, and runtime services.

When the DXE phase is completed, a Boot Device Selection (BDS) phase is performed. The functions of the BDS phase include executing a boot policy (primary function), initializing the console device, loading the necessary device drivers, and loading and executing boot items according to system settings.

After the DXE phase is executed, the BIOS passes control to the operating system.

Optionally, all the above CMOS chips may also be other memory chips, which is not limited herein.

Alternatively, in the above method for preventing loss of the SIO signal, the attenuation period value of the SIO signal is any one of 2 to 5. The decay period value is also related to the number of external boards, and is not limited herein, depending on the situation.

In another embodiment of the present application, a system 600 for preventing loss of an SIO signal is further provided, as shown in fig. 6, the system 600 includes:

the first reading unit 601 is used for reading the decay period value of the SIO signal after entering the initialization phase.

The second reading unit 602 is configured to read the chip ID value of the extrapolated expansion board card when the decay period value is greater than 0.

The calculating unit 603 is configured to increment the first preset register value by one when reading the chip ID value fails.

A clearing unit 604, configured to clear the first preset register value when the first preset register value is greater than the decay period value.

The initialization unit 605 is configured to initialize an external device of the add-in expansion board, and then enter the next stage until the operating system is entered.

Another embodiment of the present application further provides a computer, which includes a storage unit and a processing unit, where the storage unit stores a computer program, and the processing unit executes the steps of the method for preventing SIO signal loss as described above by calling the computer program stored in the storage unit.

Another embodiment of the present application further provides a computer-readable storage medium, which stores a computer program, and the computer program is suitable for being loaded by a processor to execute the steps of the method for preventing SIO signal loss as described above.

It is understood that the method steps of the present embodiment correspond to the method for preventing SIO signal loss in the above embodiment, wherein the alternatives of the above method for preventing SIO signal loss are also applicable to the present embodiment and will not be described repeatedly here.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method can be implemented in other ways. The apparatus embodiments described above are merely illustrative and, for example, the flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

In addition, each functional module or unit in each embodiment of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a smart phone, a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk, and various media capable of storing program codes.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application.

Claims

1. A method for preventing loss of SIO signal, applied to an input-output system, comprising:

2. The method of preventing SIO signal loss of claim 1, further comprising:

3. The method of preventing SIO signal loss of claim 1, further comprising:

4. The method of preventing loss of an SIO signal according to claim 3, further comprising:

5. The method of preventing loss of an SIO signal according to claim 1, further comprising:

6. The method of preventing SIO signal loss of claim 1, further comprising:

7. The method of preventing SIO signal loss of claim 1, comprising:

the decay period value of the SIO signal is any one of 2-5.

8. A system for preventing loss of a SIO signal, comprising:

9. A computer, comprising a storage unit in which a computer program is stored and a processing unit that executes the steps of the method for preventing SIO signal loss according to any one of claims 1 to 7 by calling the computer program stored in the storage unit.

10. A computer-readable storage medium, characterized in that the computer-readable storage medium stores a computer program adapted to be loaded by a processor for performing the steps of the method for preventing SIO signal loss according to any of claims 1 to 7.