CN115542133A - Fault self-diagnosis system and method for high-voltage interlocking loop and energy storage system - Google Patents
Fault self-diagnosis system and method for high-voltage interlocking loop and energy storage system Download PDFInfo
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- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/52—Testing for short-circuits, leakage current or ground faults
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
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Abstract
The invention provides a fault self-diagnosis system, a fault self-diagnosis method and an energy storage system of a high-voltage interlocking loop, wherein the fault self-diagnosis system comprises a control unit and a plurality of series-connected PACK units; each PACK unit comprises a fault diagnosis module and at least one detection point connected in parallel with the fault diagnosis module, and the fault diagnosis module in each PACK unit acquires the states of all the detection points connected in parallel with the fault diagnosis module; the detection points of all the PACK units are connected in series to form a high-voltage interlocking loop, and the high-voltage interlocking loop is electrically connected with the control unit; the fault diagnosis modules of all the PACK units are connected in parallel and are in communication connection with the control unit; the control unit sends diagnosis instructions to all fault diagnosis modules after judging that the high-voltage interlocking circuit has faults, and diagnoses all fault points in the high-voltage interlocking circuit according to the acquisition result of each fault diagnosis module. The invention can quickly and automatically detect all fault points in the high-voltage interlocking loop so as to quickly eliminate the faults and reduce the shutdown time of the energy storage system.
Description
Technical Field
The invention belongs to the electric power application technology, and particularly relates to a fault self-diagnosis system and method for a high-voltage interlocking loop and an energy storage system.
Background
At present, in the field of power batteries including vehicles and energy storage power stations, all high-voltage systems use a high-voltage interlocking (abbreviated as HVIL) technology to ensure that a high-voltage plug-in can be detected by a master control system in time after being loosened, and make a high-voltage down-voltage instruction to ensure the safety of equipment operation and personnel maintenance processes.
In the prior art, an HVIL loop interlocking function is mainly applied, namely when a certain high-voltage plug-in is loosened, the HVIL synchronously enters a circuit-breaking state, a master control system immediately makes a power-off command, and a vehicle or an energy storage system enters the circuit-breaking state. However, for the energy storage system, a large number of PACK units (PACK generally refers to a combined battery; specifically, a single battery PACK can also be a series-parallel combined battery) exist at the same time, each PACK unit is provided with one or more detection points, the detection points of all PACK units form detection points in an HVIL loop, and as the number of the detection points of the HVIL loop in the energy storage system is large, a large amount of time is consumed for troubleshooting and manually determining the fault position.
In addition, the patent application No. 201810137141, entitled a diagnostic system for loop interlock, discloses a diagnostic system that can achieve rapid positioning, but can only determine one fault location after fault detection is performed, and can continue to perform fault detection on detection points in subsequent HVIL loops of the loop after fault maintenance is eliminated, so that for an energy storage system with many detection points in the HVIL loops, it also needs to spend a lot of time when detecting fault points and determining faults by adopting the method.
It should be noted that the above background description is only for the convenience of clear and complete description of the technical solutions of the present application and for the understanding of those skilled in the art. Such solutions are not considered to be known to the person skilled in the art merely because they have been set forth in the background section of the present application.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a fault self-diagnosis system, method and energy storage system for a high voltage interlock loop, which solve the problem of long time consuming for completely diagnosing a fault in a system with many test points in a High Voltage Interlock (HVIL) loop in the prior art.
To achieve the above and other related objects, the present invention provides a fault self-diagnosis system of a high-voltage interlock circuit, including a control unit and a plurality of PACK units connected in series;
each PACK unit comprises a fault diagnosis module and at least one detection point connected with the fault diagnosis module in parallel, and the fault diagnosis module in each PACK unit acquires the states of all the detection points connected with the fault diagnosis module in parallel;
the detection points of all the PACK units are connected in series to form a high-voltage interlocking loop, and the high-voltage interlocking loop is electrically connected with the control unit; the fault diagnosis modules of all the PACK units are connected in parallel and are in communication connection with the control unit;
the control unit sends a diagnosis instruction to all fault diagnosis modules after judging that the high-voltage interlocking loop has a fault, and each fault diagnosis module realizes diagnosis of all fault points in the high-voltage interlocking loop by acquiring the states of all detection points connected with the fault diagnosis modules in parallel.
Preferably, the process of the control unit judging that the high-voltage interlock loop has a fault is as follows: and the control unit sends a test signal to the high-voltage interlocking loop for a period of time and then does not receive the test signal fed back by the high-voltage interlocking loop, and then judges that the high-voltage interlocking loop has a fault.
Preferably, the test signal is a PWM wave of a set frequency.
Preferably, each fault diagnosis module comprises at least one group of transmission ports, and the group of transmission ports are connected with two ends of one detection point in parallel; and the fault diagnosis module acquires the state of the corresponding detection point through a group of transmission ports connected in parallel at two ends of the detection point.
Preferably, a unidirectional conduction pipe is connected between two adjacent PACK units in series.
In order to achieve the above objects and other related objects, the present invention further provides a fault self-diagnosis method for a high-voltage interlock circuit, which is suitable for the fault self-diagnosis system for a high-voltage interlock circuit; the fault self-diagnosis method includes at least the steps of:
(1) The control unit sends a test signal to the high-voltage interlocking loop;
(2) The control unit judges whether the high-voltage interlocking loop breaks down or not according to the test signal;
(3) And if the high-voltage interlocking loop is judged to have a fault, the control unit controls the fault diagnosis module to carry out fault diagnosis on all detection points in the high-voltage interlocking loop in sequence.
Preferably, the control unit controls the fault diagnosis module to perform fault diagnosis on all detection points in the high-voltage interlock loop in sequence, and the fault diagnosis method includes:
1) The control unit controls the 1 st fault diagnosis module to input high-level signals to the ith PACK unit according to a set sequence so as to perform fault diagnosis on all detection points, wherein 1<i < = N is the number of PACK units;
2) If the control unit does not receive the high level signals sent by the Mth and subsequent fault diagnosis modules from the Mth fault diagnosis module, judging that a fault occurs at a detection point in a PACK unit corresponding to the Mth fault diagnosis module and recording, wherein M is more than or equal to 1 and less than or equal to N;
3) If M is not equal to N, the control unit controls the M +1 th fault diagnosis module to input high-level signals to the jth PACK unit according to a set sequence so as to carry out fault diagnosis on the M +1 th and detection points of the PACK unit after the M +1 th, wherein M < j < = N;
4) Determining and recording the fault position according to the mode of the step 2), and then sequentially carrying out fault diagnosis on the remaining detection points after the fault position in the high-voltage interlocking loop according to the mode of the step 3) until fault diagnosis is completed on all the detection points;
and the set sequence is the forward transmission direction of the test signals in the high-voltage interlocking loop.
In order to achieve the above objects and other related objects, the present invention further provides a fault self-diagnosis method for a high-voltage interlock circuit, which is suitable for the fault self-diagnosis system for a high-voltage interlock circuit; the fault self-diagnosis method includes at least the steps of:
(1) The control unit sends a test signal to the high-voltage interlocking loop;
(2) The control unit judges whether the high-voltage interlocking loop breaks down or not according to the test signal;
(3) And if the high-voltage interlocking loop is judged to have a fault, the control unit controls the fault diagnosis module to simultaneously carry out fault diagnosis on all detection points in the high-voltage interlocking loop.
In order to achieve the above objects and other related objects, the present invention further provides an energy storage system, which includes a monitoring management terminal and a plurality of site terminals;
after being connected in parallel, each field end of the plurality of field ends is in communication connection with the monitoring management terminal; each field end is a fault self-diagnosis system of the high-voltage interlocking loop;
and the monitoring management terminal receives the fault diagnosis results of all the site terminals and correspondingly manages the fault diagnosis results.
Preferably, the monitoring management terminal comprises a main control unit, an energy management system and a meter;
the main control unit is in communication connection with the field terminals, and receives and transmits the fault diagnosis result of each field terminal;
the main control unit is in communication connection with the energy management system, and the energy management system manages the fault diagnosis result and obtains a management result;
the meter is in communication connection with the energy management system, and the meter displays the management result of the energy management system.
As described above, the fault self-diagnosis system, method and energy storage system of the high-voltage interlock circuit of the present invention have the following beneficial effects:
the fault self-diagnosis system of the high-voltage interlocking loop can not only realize the safe operation of high-voltage interlocking, but also realize the fault diagnosis of all detection points through the fault diagnosis module which is connected with the detection points of the high-voltage interlocking loop in parallel; compared with the prior art that the fault position is manually detected, the difficulty of manual detection can be reduced; compared with the prior art that only one fault position can be determined after the fault position is manually detected or fault detection is carried out, and fault detection can be continuously carried out on subsequent detection points of the high-voltage interlocking circuit only after the fault is maintained and eliminated, the fault detection efficiency can be greatly improved, the problem that in the prior art, time is consumed for completely diagnosing a system with more detection points in the high-voltage interlocking circuit, so that the detection efficiency of all faults can be greatly improved, the faults can be quickly eliminated, and the downtime of an energy storage system is reduced. And the fault diagnosis module carries out communication diagnosis only after the high-voltage interlocking loop fails, so that the energy consumption of the fault self-diagnosis system and the occupation of communication network resources can be reduced.
Drawings
Fig. 1 is a schematic structural diagram of a fault self-diagnosis system of a medium-high voltage interlock circuit according to an embodiment of the present invention.
Fig. 2 is a simplified schematic diagram of a fault self-diagnosis system of a medium-high voltage interlock loop according to an embodiment of the present invention.
Fig. 3 is a schematic structural diagram of a fault self-diagnosis system of a high-voltage interlock circuit according to a second embodiment of the present invention.
Fig. 4 is a schematic structural diagram of an energy storage system according to an embodiment of the invention.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 1-3. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
Example one
An embodiment of the present invention provides a fault self-diagnosis system for a high-voltage interlock loop, as shown in fig. 1 and 2, including a control unit and a plurality of PACK units connected in series;
each PACK unit comprises a fault diagnosis module and at least one detection point connected with the fault diagnosis module in parallel, and the fault diagnosis module in each PACK unit collects the states of all the detection points connected with the fault diagnosis module in parallel;
the detection points of all the PACK units are connected in series to form a High Voltage Interlock (HVIL) loop, and the High Voltage Interlock (HVIL) loop is electrically connected with the control unit; the fault diagnosis modules of all the PACK units are connected in parallel and are in communication connection with the control unit;
the control unit sends a diagnosis instruction to all fault diagnosis modules after judging that the high-voltage interlocking loop has faults, and each fault diagnosis module realizes the diagnosis of all fault points in the high-voltage interlocking (HVIL) loop by acquiring the states of all detection points connected with the fault diagnosis modules in parallel.
It should be noted that the control unit sends a diagnosis instruction to all the fault diagnosis modules, and the diagnosis instruction is used for instructing at least some of the fault diagnosis modules to output a diagnosis signal, and each fault diagnosis module acquires the state of a detection point connected in parallel with the fault diagnosis module. When a fault occurs in a detection point which is connected with the fault diagnosis module in parallel, a diagnosis signal cannot normally pass through the detection point, and further cannot be collected by the fault diagnosis module.
The fault self-diagnosis system of the high-voltage interlocking circuit not only can realize the safe operation of the high-voltage interlocking, but also can realize the fault diagnosis of all detection points in the high-voltage interlocking (HVIL) circuit through the fault diagnosis module which is connected with the detection points of the high-voltage interlocking (HVIL) circuit in parallel. Compared with the prior art, the fault position is manually detected, or only one fault position can be determined once after fault detection is carried out, and fault detection can be continuously carried out on subsequent detection points of the high-voltage interlocking (HVIL) circuit only after the fault is maintained and eliminated, so that the fault detection efficiency can be greatly improved, and the problem that in the prior art, the time is long for completely diagnosing faults of a system with more detection points in the high-voltage interlocking (HVIL) circuit is solved. And, the fault diagnosis module carries on the communication diagnosis only after the High Voltage Interlocking (HVIL) loop breaks down, that is, when the High Voltage Interlocking (HVIL) loop has no fault, the fault diagnosis module is in the closed state; therefore, the fault diagnosis module can also reduce the energy consumption of the fault self-diagnosis system and the occupation of communication network resources.
The control unit judges that the High Voltage Interlock (HVIL) loop has the fault, namely: the control unit sends a test signal to the high-voltage interlocking (HVIL) loop for a period of time, and then the control unit does not receive the test signal fed back by the high-voltage interlocking (HVIL) loop, and then judges that the high-voltage interlocking (HVIL) loop has a fault.
The test signal is a PWM wave with a set frequency.
In other possible embodiments, the test signal may be a continuous current, the continuous current is sent to a High Voltage Interlock (HVIL) loop through a control unit, and when the continuous current fed back by the High Voltage Interlock (HVIL) loop is not received, it is determined that the High Voltage Interlock (HVIL) loop has a fault, but the scheme has a large energy consumption.
In the invention, each PACK unit comprises a fault diagnosis module and at least one detection point connected with the fault diagnosis module in parallel. The number of detection points in a PACK unit is not particularly limited in the embodiments of the present application, for example, a PACK unit includes one detection point and one failure diagnosis module; for another example, a PACK unit includes two or more detection points and a failure diagnosis module.
All fault diagnosis modules of the invention are in communication connection with the control unit through CAN lines; and matching resistors are respectively arranged at two ends of the CAN line. According to the invention, the matching resistors are arranged at the two ends of the CAN line, so that the anti-interference performance of the CAN line CAN be increased, and the accuracy of signal transmission is improved.
In the embodiment of the invention, the CAN wire adopts a shielded twisted pair; the two matching resistors are both 120 omega; in another embodiment, the matching resistance may be set to 100 Ω to 140 Ω.
The fault diagnosis module of the invention is marked that the HDS has a unique code (which can be 1, 2, 3, … … N-1, N), and the position of the PACK unit, namely the position of a fault point, can be identified through the code.
Each fault diagnosis module comprises at least one group of transmission ports, and the group of transmission ports are connected with two ends of a detection point in parallel; and the fault diagnosis module acquires the state of the corresponding detection point through a group of transmission ports connected in parallel at two ends of the detection point. It should be noted that, the specific circuit connection relationship of the fault diagnosis module is not limited in the present invention, and the fault diagnosis module only includes at least one group of transmission ports, and can acquire the state of the detection points connected in parallel and diagnose the state.
Wherein the set of transmission ports includes a digital output port (DO) and a digital input port (DI); therefore, the fault diagnosis module collects the state of the corresponding detection point through the digital output port (DO) and the digital input port (DI) which are connected in parallel at two ends of the detection point. As other embodiments, the transmission ports may further include an analog output port and an analog input port.
It should be noted here that, whether a PACK unit has one detection point or multiple detection points, the failure diagnosis module in the PACK unit may include multiple sets of transmission ports, that is, the number of sets of transmission ports in a PACK unit is greater than or equal to the number of detection points.
In the embodiment of the present invention, each PACK unit includes a detection point and a failure diagnosis module, and the structure of the failure self-diagnosis system of the corresponding High Voltage Interlock (HVIL) loop is as shown in fig. 1 and 2; comprising a control unit SBCU and a plurality of series-connected PACK units (PACK 1, PACK2, PACK3, … …, PACKN), where N is the number of PACK units.
Specifically, a detection point K1 of the PACK1 unit, a detection point K2 of the PACK2 unit, detection points K3 and … … of the PACKN 3 unit and a detection point KN of the PACKN unit are connected in series to form a High Voltage Interlock (HVIL) loop, and the High Voltage Interlock (HVIL) loop is electrically connected with the control unit SBCU through an HVIL + end and an HVIL-end.
Specifically, the failure diagnosis module HDS1 of the PACK1 unit is connected in parallel with the failure diagnosis module HDS2 of the PACK2 unit, the failure diagnosis modules HDS3, … … of the PACK3 unit and the failure diagnosis module HDSN of the PACKN unit, and all the parallel failure diagnosis modules are in communication connection with the control unit through CANH and CANL of the CAN line.
Specifically, a fault diagnosis module HDS1 of the PACK1 unit is connected in parallel at two ends of a detection point K1, and the fault diagnosis module HDS1 is used for detecting the state of the detection point K1 in the PACK1 unit; the fault diagnosis module HDS2 of the PACK2 unit is connected in parallel at two ends of the detection point K2, and the fault diagnosis module HDS2 is used for detecting the state of the detection point K2 in the PACK2 unit; … …, a fault diagnosis module HDSN of the PACKN unit is connected in parallel at two ends of the detection point KN, and the fault diagnosis module HDSN is used for detecting the state of the detection point KN in the PACKN unit.
In a normal state, namely in a High Voltage Interlock (HVIL) loop fault-free state, an HVIL + port of the control unit sends out PWM waves, and the PWM waves sequentially pass through detection points of the PACK units to reach the HVIL-port; when the PWM wave received by the control unit at the HVIL-port is the same frequency as the PWM wave sent out at the HVIL + port, the control unit judges that the high-voltage interlocking (HVIL) loop is in a normal operation state without alarming and maintaining.
When a detection point of a certain PACK unit is in an open circuit state or a High Voltage Interlock (HVIL) loop is interfered, an HVIL-port of a control unit does not receive PWM waves with the same frequency any more, the control unit judges that the High Voltage Interlock (HVIL) loop is in a fault state, and immediately, a fault diagnosis module is required to be started to control through the control unit to carry out fault diagnosis on all the detection points in the High Voltage Interlock (HVIL) loop in sequence, so that the detection of all the fault points in the High Voltage Interlock (HVIL) loop is realized.
In the embodiment of the invention, when the fault diagnosis module is started for the first time, the control unit controls the fault diagnosis module HDS1 to output a 5V + high-level signal, and digital input ports (DI) of all the fault diagnosis modules HDS are in a receiving state; assuming that a detection point Kt is open, wherein t is more than or equal to 1 and less than or equal to N; the maximum code of the digital input port (DI) of the 5V + high level signal received by the control unit is K (t-1), so that the disconnection at the detection point Kt can be judged; then, a high-level output DO port at the position of the fault diagnosis module HDS (t + 1) encoded as K (t + 1) outputs a high-level signal of 5V +, the control unit detects the high-level signal state of the digital input port (DI) uploaded by each fault diagnosis module again, determines whether the maximum number is N (known maximum PACK number) again, if not, reports fault information, and continues to circulate the above-mentioned flow. If yes, the diagnosis is finished, and the control unit summarizes the fault information to obtain all fault points.
Considering special conditions, when the system is started every time, a detection point K of a high-voltage interlocking (HVIL) loop connected in parallel at a fault diagnosis module where a digital output port (DO) responsible for outputting 5V + is located is broken, and if x (x is more than or equal to 1 and less than or equal to N) is coded at the moment, digital input ports (DI) of all fault diagnosis modules cannot detect a high-level signal at the moment, a control unit records that the fault code is x, and the broken circuit is judged to occur at the detection point (Kx); then, a digital output port (DO) at a fault diagnosis module (HDS (x + 1)) coded as K (x + 1) outputs a high-level signal of 5V +, and the control unit detects the high-level signal state of a digital input port (DI) uploaded by each fault diagnosis module again; until all the detection points of all the High Voltage Interlock (HVIL) loops are detected.
For example, assuming that a certain detection point of a High Voltage Interlock (HVIL) loop is broken, the control unit controls to start the fault diagnosis module, and first the control unit controls the digital output port (DO 1) of the fault diagnosis module HDS1 to output a 5V + high level signal, and if the control unit does not receive the 5V + high level signal fed back by the fault diagnosis module HDS1, it is determined that the detection point K1 is broken, and a fault is reported. After detecting the first (i.e. PACK1 unit) fault, continuing to detect subsequent (i.e. PACK2 unit and subsequent) detection points to ensure detection of the subsequent faults, specifically, the control unit continues to control the digital output port (DO 2) of the fault diagnosis module HDS2 to output a 5V + high level signal, and receives high level signals fed back by the fault diagnosis module HDS2 and the subsequent DI port of the HDS, assuming that the control unit receives the maximum code of the high level signal as DI8 again, i.e. the fault diagnosis module HDS8 feeds back to the control unit 5V high level signal, it is determined that an open circuit occurs at the detection point K9, and a fault is reported. And then, enabling a digital output port (DO 10) of the fault diagnosis module HDS10 to output 5V + high level signals, sequentially judging until a high level signal at a digital input port (DIN) of the fault diagnosis module HDSN is finally received or a 5V + high level signal at a digital input port (DI (N-1)) of the fault diagnosis module HDS (N-1) is received, reporting the broken circuit at a detection point KN when the finally received 5V + high level signal is at the digital input port (DI (N-1)) of the fault diagnosis module HDS (N-1), and finishing the whole detection process.
Example two
In order to achieve the technical purpose, the invention also provides a fault self-diagnosis system of the high-voltage interlocking loop.
The present embodiment is different from the first embodiment in that a unidirectional conduction tube is added to the fault self-diagnosis system of the high-voltage interlock circuit described in the first embodiment. Specifically, as shown in fig. 3, a diode is connected in series between the transmission ports of two adjacent PACK units, wherein the anode of the diode is connected to the digital input port of the High Voltage Interlock (HVIL) loop, and the cathode of the diode is connected to the digital output port of the High Voltage Interlock (HVIL) loop.
In this embodiment, a first fault diagnosis implementation manner is: the fault diagnosis method as described in the embodiment is that after the control unit determines that the High Voltage Interlock (HVIL) circuit has a fault, all fault points in the High Voltage Interlock (HVIL) circuit are detected by sequentially detecting one detection point.
In this embodiment, the second fault diagnosis is implemented as follows: after the control unit judges that a High Voltage Interlock (HVIL) loop has a fault, the control unit controls digital output ports (DO) of all fault diagnosis modules to simultaneously output 5V + high level signals, and all fault diagnosis modules report the high level signals of respective digital input ports (DI) to the control unit; the control unit may simultaneously detect the digital input port (DI) in a non-high level state and determine that a short circuit occurs at the detection points of the High Voltage Interlock (HVIL) loop to which all the fault diagnosis modules in the non-high level state are connected in parallel. This fault diagnosis implementation enables simultaneous detection of all fault points in a High Voltage Interlock (HVIL) loop at once.
Here, it should be noted that: in the second embodiment, the first and second failure diagnosis manners may be adopted, and the difference between the first and second failure diagnosis manners in the first embodiment is that, when no unidirectional conductive tube (diode) is provided in the failure self-diagnosis system of the high-voltage interlock loop in the first embodiment, if a middle failure diagnosis module directly controls to input a high-level signal to its corresponding PACK unit, the high-level signal will be transmitted in both directions, and when the high-level signal is transmitted to the digital output port (DO) of the adjacent previous PACK unit, even if a failure occurs at a detection point in the previous PACK unit, the high-level signal will be fed back and output by the failure diagnosis module of the previous PACK unit due to the high-level signal input by the next PACK unit, so that the previous PACK unit is misdiagnosed when there is a failure, and the failure diagnosis result is incorrect. When a unidirectional conducting tube (diode) exists in the fault self-diagnosis system of the high-voltage interlocking loop in the second embodiment, due to the unidirectional conducting property of the unidirectional conducting tube (diode), bidirectional transmission of signals can be effectively avoided, and each fault diagnosis module outputs and reports a high-level signal of a respective digital input port (DI), so that the accuracy of a fault diagnosis result is ensured.
In the embodiment of the invention, the implementation modes of fault diagnosis are increased by adding the unidirectional conducting tube (diode), and the flexibility of the implementation modes of fault diagnosis is improved.
EXAMPLE III
In order to achieve the above technical object, the present invention further provides a fault self-diagnosis method for a high-voltage interlock circuit, which is suitable for the fault self-diagnosis systems of the high-voltage interlock circuit in the first embodiment and the second embodiment, and the fault self-diagnosis method at least includes the following steps:
(1) The control unit sends a test signal to a High Voltage Interlock (HVIL) loop;
specifically, the control unit in the fault self-diagnosis system of the high-voltage interlocking circuit sends a test signal to the high-voltage interlocking (HVIL) circuit; the test signal is a PWM wave with a set frequency.
(2) The control unit judges whether the High Voltage Interlock (HVIL) loop has a fault according to the test signal;
one specific implementation manner is as follows: after the test signal is sent to the High Voltage Interlock (HVIL) loop for a period of time, the control unit does not receive the test signal fed back by the High Voltage Interlock (HVIL) loop, and then the control unit judges that the High Voltage Interlock (HVIL) loop has a fault.
(3) And after the fault occurs, sequentially carrying out fault diagnosis on all detection points in the High Voltage Interlock (HVIL) loop.
Specifically, after the control unit judges that the High Voltage Interlocking (HVIL) loop has a fault, the control unit controls and starts the fault diagnosis module to detect one detection point, so that the detection of all fault points in the High Voltage Interlocking (HVIL) loop is realized.
In the embodiment of the invention, the process that the control unit controls the fault module to sequentially carry out fault diagnosis on all detection points in the High Voltage Interlock (HVIL) loop comprises the following steps:
1) The control unit controls the 1 st fault diagnosis module to input high-level signals to the ith PACK unit according to a set sequence so as to carry out fault diagnosis on all detection points, wherein 1<i is less than or equal to N, and N is the number of PACK units;
wherein the set sequence is a forward direction of transmission of the test signal in a High Voltage Interlock (HVIL) loop. Where i =1, 2, 3 … … N.
2) If the control unit does not receive the high level signal fed back by the Mth and later fault diagnosis modules from the Mth fault diagnosis module, judging that the detection point of the PACK unit corresponding to the Mth fault diagnosis module has a fault and recording, wherein M is more than or equal to 1 and less than or equal to N;
illustratively, when M is equal to 1, the control unit does not receive any high-level signal fed back by the fault diagnosis module, and then judges that a detection point of the PACK unit corresponding to the 1 st fault diagnosis module has a fault and records the fault; and when M = N, if the control unit does not receive the high level signal fed back by the Nth fault diagnosis module, judging that the detection point of the PACK unit corresponding to the Nth fault diagnosis module has a fault and recording the fault. When M is equal to 5, the control unit does not receive the high level signal fed back by the 5 th and 6 … … N fault diagnosis modules, and then the detection point of the PACK unit corresponding to the 5 th fault diagnosis module is judged to have faults and recorded; the embodiments of the present application are described only by way of examples.
3) If M is not equal to N, the control unit controls the M +1 th fault diagnosis module to input high-level signals to the jth PACK unit according to a set sequence so as to carry out fault diagnosis on detection points of the (M + 1) th and the (M + 1) th PACK units, wherein M < j is less than or equal to N;
for example, when M is equal to 5 in step 2), the control unit controls the 6 th failure diagnosis module to input a high-level signal to the 6 th PACK unit, and sequentially detects detection points of the 6 th and subsequent PACK units.
4) Determining and recording the fault position according to the mode of the step 2), and then sequentially carrying out fault diagnosis on the remaining detection points after the fault position in the high-voltage interlocking loop according to the mode of the step 3) until fault diagnosis is carried out on all the detection points.
For example, when performing fault diagnosis on the remaining detection points, if the control unit does not receive the high level signal fed back by the 9 th … … N fault diagnosis modules, it determines that the detection point of the PACK unit corresponding to the 9 th fault diagnosis module has a fault and records the fault (determines and records the fault position according to the method of step 2); and detecting detection points of the PACK units corresponding to the 10 th and later fault diagnosis modules (sequentially performing fault diagnosis on the residual detection points after the fault position in the high-voltage interlocking loop according to the mode of the step 3) until all the detection points are subjected to fault diagnosis.
After a High Voltage Interlocking (HVIL) loop has a fault, according to the forward transmission sequence of a test signal in the High Voltage Interlocking (HVIL) loop, detecting and recording the fault position of a detection point, and then starting the detection of the next detection point, namely, inputting a high level signal again by the next adjacent fault diagnosis module in the forward transmission sequence of the test signal to continue fault diagnosis; cycling in sequence until all points of failure in the High Voltage Interlock (HVIL) loop are detected. In the embodiment of the invention, the fault diagnosis of all detection points in a High Voltage Interlock (HVIL) loop can be realized by controlling a part of fault diagnosis modules.
More specific examples are described as: assuming that a certain detection point of a High Voltage Interlock (HVIL) loop is broken, the control unit SBCU controls and starts the fault diagnosis module HDS, firstly, the control unit controls a digital output port (DO 1) of the fault diagnosis module HDS1 to output a +5V high level signal, if the control unit does not receive the +5V high level signal fed back by the fault diagnosis module HDS1, the situation that the detection point K1 is broken is judged, and a fault is reported. After detecting the first (i.e. PACK1 unit) fault, continuing to detect the subsequent (i.e. PACK2 unit and subsequent) detection points to ensure the detection of the subsequent fault, specifically, the control unit continues to control the digital output port (DO 2) of the fault diagnosis module HDS2 to output a 5V + high level signal, assuming that the control unit receives the maximum code of the high level signal again as DI8, i.e. the fault diagnosis module HDS8 feeds back to the control unit +5V high level signal, determining that an open circuit occurs at the detection point K9, and reporting the fault. And then, enabling a digital output port (DO 10) of the fault diagnosis module HDS10 to output 5V + high level signals, sequentially judging until a high level signal at a digital input port (DIN) of the fault diagnosis module HDSN is finally received or a 5V + high level signal at a digital input port (DI (N-1)) of the fault diagnosis module HDS (N-1) is received, reporting a broken circuit at a detection point (KN) when the finally received 5V + high level signal is at the digital input port (DI (N-1)) of the fault diagnosis module HDS (N-1), and finishing the whole detection process.
Example four
In order to achieve the above technical object, the present invention further provides a fault self-diagnosis method for a high-voltage interlock circuit, which is suitable for a fault self-diagnosis system for a high-voltage interlock circuit in the second embodiment, and the fault self-diagnosis method at least includes the following steps:
(1) The control unit sends a test signal to a High Voltage Interlock (HVIL) loop;
specifically, the invention sends a test signal to a High Voltage Interlock (HVIL) loop through a control unit in a fault self-diagnosis system of the HVIL loop; the test signal is a PWM wave with a set frequency.
(2) The control unit judges whether the High Voltage Interlock (HVIL) loop has a fault according to the test signal;
specifically, after the test signal is sent to the High Voltage Interlock (HVIL) loop for a period of time, the control unit does not receive the test signal fed back by the High Voltage Interlock (HVIL) loop, and then determines that the High Voltage Interlock (HVIL) loop has a fault.
(3) And if the High Voltage Interlocking (HVIL) loop is judged to have faults, the control unit controls the fault diagnosis module to simultaneously carry out fault diagnosis on all detection points in the High Voltage Interlocking (HVIL) loop.
After the high-voltage interlocking (HVIL) circuit has a fault, all fault diagnosis modules are controlled and started to carry out fault diagnosis on the detection points, correspondingly connected in parallel with each fault diagnosis module, in the high-voltage interlocking (HVIL) circuit.
Specifically, after the control unit judges that the High Voltage Interlocking (HVIL) loop has a fault, the control unit controls and starts the fault diagnosis module to detect one detection point, so that the detection of all fault points in the High Voltage Interlocking (HVIL) loop is realized.
More specific exemplary description: after a certain detection point of a High Voltage Interlocking (HVIL) loop is supposed to be broken, the control unit controls digital output ports (DO) of all fault diagnosis modules to simultaneously output 5V + high level signals, and all fault diagnosis modules report the high level signal states of respective digital input ports (DI) to the control unit; the control unit may simultaneously detect the digital input port (DI) in a non-high level state and determine that a short circuit occurs at the detection points of the High Voltage Interlock (HVIL) loop to which all the fault diagnosis modules in the non-high level state are connected in parallel. This fault diagnosis implementation enables simultaneous detection of all fault points in a High Voltage Interlock (HVIL) loop at once.
EXAMPLE five
In order to achieve the technical purpose, the invention also provides an energy storage system as shown in fig. 4, which comprises a monitoring management terminal and a plurality of field terminals;
after being connected in parallel, each field end of the plurality of field ends is in communication connection with the monitoring management terminal; each site end is a fault self-diagnosis system of the high-voltage interlock (HVIL) loop;
and the monitoring management terminal receives the fault diagnosis results of all the site terminals and correspondingly manages the fault diagnosis results.
The field terminal transmits the diagnosis result of the fault self-diagnosis system of the independent high-voltage interlocking loop to the monitoring management terminal through CAN bus communication.
The fault self-diagnosis system of the high-voltage interlock circuit is described in detail in the first embodiment and the second embodiment, and the specific fault self-diagnosis method is also described in detail in the third embodiment and the fourth embodiment, which are not repeated in detail in this embodiment.
The energy storage system can be used for energy storage power stations, hydroelectric energy storage, various electric fields for storing electric energy, enterprises and the like.
Preferably, the monitoring management terminal of the present invention includes a main control unit, an energy management system (EMS for short) and a meter;
the main control unit is in communication connection with the field terminals, and receives and transmits the fault diagnosis result of each field terminal;
the main control unit is in communication connection with an Energy Management System (EMS), and the energy management system manages the fault diagnosis result and obtains a management result;
the meter is in communication connection with the energy management system, and displays the management result of the energy management system.
The energy management system manages the fault diagnosis result and obtains a management result, which may include counting the total number of times of occurrence of the fault, specific locations of all faults, time of occurrence of the fault, time of duration of the fault, and the like.
In the embodiment of the invention, the main control unit is in communication connection with the field end through a CAN (controller area network) line; in other embodiments, the master control unit is connected to the energy management system in a wireless communication manner.
In the embodiment of the invention, the main control unit is in communication connection with the energy management system through optical fibers, and the energy management system and the instrument adopt an RS-485 communication mode to transmit management results.
In the embodiment of the invention, the main control unit comprises at least one reset switch, and after all fault points are manually repaired, the reset switch is controlled to enable the energy storage system to enter a normal operation state again.
In summary, the invention provides a fault self-diagnosis system, method and energy storage system for a high-voltage interlock loop, wherein the energy storage system comprises a monitoring management terminal and a plurality of site terminals; after being connected in parallel, each field end of the field ends is in communication connection with the monitoring management terminal; each field end is a fault self-diagnosis system of the high-voltage interlocking loop; and the monitoring management terminal receives the fault diagnosis results of all the site terminals and correspondingly manages the fault diagnosis results.
Wherein the fault self-diagnosis system of a High Voltage Interlock (HVIL) circuit includes a control unit and a plurality of series-connected PACK units; each PACK unit comprises a fault diagnosis module and at least one detection point connected with the fault diagnosis module in parallel, and the fault diagnosis module in each PACK unit collects the states of all the detection points connected with the fault diagnosis module in parallel; the detection points of all the PACK units are connected in series to form a High Voltage Interlock (HVIL) loop, and the High Voltage Interlock (HVIL) loop is electrically connected with the control unit; the fault diagnosis modules of all the PACK units are connected in parallel and are in communication connection with the control unit; the control unit sends a diagnosis instruction to all fault diagnosis modules after judging that the High Voltage Interlocking (HVIL) loop has faults, and each fault diagnosis module realizes the diagnosis of all fault points in the High Voltage Interlocking (HVIL) loop by acquiring the states of all detection points connected in parallel.
In the case where there is no serial diode between the transmission ports of the adjacent two PACK units in the fault self-diagnosis system of the High Voltage Interlock (HVIL) circuit: after the control unit judges that the High Voltage Interlocking (HVIL) loop has a fault, the detection of all fault points in the High Voltage Interlocking (HVIL) loop is realized by only detecting one detection point.
When a diode is connected in series between the transmission ports of two adjacent PACK units in the fault self-diagnosis system of the high-voltage interlock loop: after the control unit judges that the High Voltage Interlocking (HVIL) loop has a fault, the detection of all fault points in the High Voltage Interlocking (HVIL) loop can be realized by detecting one detection point; the control unit can also control the digital output ports (DO) of all the fault diagnosis modules to simultaneously output +5V high-level signals, and all the fault diagnosis modules report the high-level signal states of the respective digital input ports (DI) to the control unit; the control unit may simultaneously detect the digital input port (DI) in a non-high level state and determine that a short circuit occurs at the detection points of the High Voltage Interlock (HVIL) loop to which all the fault diagnosis modules in the non-high level state are connected in parallel. This fault diagnosis implementation enables simultaneous detection of all fault points in a High Voltage Interlock (HVIL) loop at once.
Therefore, based on the fault self-diagnosis system, the fault self-diagnosis method and the energy storage system of the high-voltage interlocking circuit, all fault points appearing in the HVIL of the high-voltage interlocking circuit can be quickly and automatically positioned; compared with the prior art that the fault position is manually detected, the difficulty of manual detection can be reduced; compared with the prior art, the fault detection method has the advantages that only one fault position can be determined once after the fault position is manually detected or fault detection is carried out, and fault detection can be carried out on subsequent detection points of a high-voltage interlocking (HVIL) circuit only after the fault is eliminated, so that the detection efficiency of all faults can be greatly improved, the faults can be eliminated quickly, and the shutdown time of the energy storage system is shortened. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Those skilled in the art can modify or change the above-described embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (10)
1. A fault self-diagnosis system of a high-voltage interlock circuit is characterized by comprising a control unit and a plurality of series-connected PACK units;
each PACK unit comprises a fault diagnosis module and at least one detection point connected with the fault diagnosis module in parallel, and the fault diagnosis module in each PACK unit collects the states of all the detection points connected with the fault diagnosis module in parallel;
the detection points of all the PACK units are connected in series to form a high-voltage interlocking loop, and the high-voltage interlocking loop is electrically connected with the control unit; the fault diagnosis modules of all the PACK units are connected in parallel and are in communication connection with the control unit;
the control unit sends a diagnosis instruction to all fault diagnosis modules after judging that the high-voltage interlocking loop has a fault, and each fault diagnosis module realizes diagnosis of all fault points in the high-voltage interlocking loop by acquiring the states of all detection points connected with the fault diagnosis modules in parallel.
2. The fault self-diagnosis system for a high-voltage interlock circuit according to claim 1, wherein the process of the control unit judging that the high-voltage interlock circuit is faulty is: and the control unit sends a test signal to the high-voltage interlocking loop for a period of time and then does not receive the test signal fed back by the high-voltage interlocking loop, and then judges that the high-voltage interlocking loop has a fault.
3. The fault self-diagnosis system for a high-voltage interlock loop according to claim 2, wherein the test signal is a PWM wave of a set frequency.
4. The fault self-diagnosis system of the high-voltage interlock circuit according to claim 2, wherein each fault diagnosis module comprises at least one set of transmission ports, and the set of transmission ports are connected in parallel with both ends of one detection point; and the fault diagnosis module acquires the state of the corresponding detection point through a group of transmission ports connected in parallel at two ends of the detection point.
5. The fault self-diagnosis system for a high-voltage interlock circuit according to any one of claims 1 to 4, wherein a unidirectional conduction tube is connected in series between two adjacent PACK units.
6. A fault self-diagnosis method of a high-voltage interlock circuit, characterized by being applied to a fault self-diagnosis system of a high-voltage interlock circuit according to any one of claims 1 to 4; the fault self-diagnosis method includes at least the steps of:
(1) The control unit sends a test signal to the high-voltage interlocking loop;
(2) The control unit judges whether the high-voltage interlocking loop breaks down or not according to the test signal;
(3) And if the high-voltage interlocking loop is judged to have a fault, the control unit controls the fault diagnosis module to carry out fault diagnosis on all detection points in the high-voltage interlocking loop in sequence.
7. The method for self-diagnosing the fault of the high-voltage interlocking circuit according to claim 6, wherein the step of controlling the fault diagnosis module to sequentially perform fault diagnosis on all the detection points in the high-voltage interlocking circuit by the control unit comprises the steps of:
1) The control unit controls the 1 st fault diagnosis module to input high-level signals to the ith PACK unit according to a set sequence so as to perform fault diagnosis on all detection points, wherein 1<i < = N is the number of PACK units;
2) If the control unit does not receive the high level signal fed back by the Mth and later fault diagnosis modules from the Mth fault diagnosis module, judging that a fault occurs at a detection point in a PACK unit corresponding to the Mth fault diagnosis module and recording, wherein M is more than or equal to 1 and less than or equal to N;
3) If M is not equal to N, the control unit controls the M +1 th fault diagnosis module to input high-level signals to the jth PACK unit according to a set sequence so as to carry out fault diagnosis on detection points of the M +1 th PACK unit and the PACK unit after the M +1 th PACK unit, wherein M < j is not more than N;
4) Determining and recording the fault position according to the mode of the step 2), and then sequentially carrying out fault diagnosis on the remaining detection points after the fault position in the high-voltage interlocking loop according to the mode of the step 3) until fault diagnosis is completed on all the detection points;
and the set sequence is the forward transmission direction of the test signals in the high-voltage interlocking loop.
8. A fault self-diagnosis method of a high-voltage interlock circuit, characterized by being applied to the fault self-diagnosis system of a high-voltage interlock circuit according to claim 5; the fault self-diagnosis method includes at least the steps of:
(1) The control unit sends a test signal to the high-voltage interlocking loop;
(2) The control unit judges whether the high-voltage interlocking loop breaks down or not according to the test signal;
(3) And if the high-voltage interlocking loop is judged to have a fault, the control unit controls the fault diagnosis module to simultaneously carry out fault diagnosis on all detection points in the high-voltage interlocking loop.
9. An energy storage system is characterized by comprising a monitoring management terminal and a plurality of site terminals;
after being connected in parallel, each field end of the plurality of field ends is in communication connection with the monitoring management terminal; each site end is a fault self-diagnosis system of the high-voltage interlock circuit according to any one of claims 1 to 5;
and the monitoring management terminal receives the fault diagnosis results of all the site terminals and correspondingly manages the fault diagnosis results.
10. The energy storage system of claim 9, wherein the monitoring management terminal comprises a master control unit, an energy management system and a meter;
the main control unit is in communication connection with the field terminals, and receives and transmits the fault diagnosis result of each field terminal;
the main control unit is in communication connection with the energy management system, and the energy management system manages the fault diagnosis result and obtains a management result;
the meter is in communication connection with the energy management system, and the meter displays a management result of the energy management system.
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