CN115514325A - A L-band Monolithic Integrated Power Amplifier - Google Patents

Abstract

The invention belongs to the technical field of semiconductors, and particularly relates to an L-band monolithic integrated power amplifier. The power amplifier includes: the input matching network unit, the transistor unit and the output matching network unit; through the specific circuit structures of the input matching network unit and the output matching network unit, the impedance matching of the input and the output of the transistor unit under the GAN process is realized, the matching of an off-chip inductor and an off-chip capacitor is not needed, and the problems of high cost, low efficiency, small bandwidth, large size and the like when the amplifier is applied to an L-band power amplifier in the prior art are solved.

Description

A L-band Monolithic Integrated Power Amplifier

technical field

The invention relates to a power amplifier integrated circuit, in particular to an L-band monolithic integrated power amplifier, which belongs to the field of semiconductor technology.

Background technique

With the continuous development of radar technology, the application of phased array radar is more and more extensive. There are many transceiver components integrated in the phased array radar, and each transceiver component contains several transceiver channels. The power amplifier is one of the core devices in the transceiver component. Miniaturization has a huge impact. Compared with hybrid integrated circuits, monolithic power amplifier circuits can provide smaller size and better chip consistency; power amplifiers consume most of the system's energy, and high-efficiency power amplifiers can reduce management requirements for heat dissipation systems while improving device performance. It is of great significance to improve its efficiency. Therefore, research on high-efficiency power amplifiers is very necessary.

In the current semiconductor process, CMOS process is not suitable for application in 5-10W power amplifiers due to its poor power density, efficiency and other limitations. Products with 5-10W power levels are based on GaAs process and GaN process. Many, but due to the power density limitation of the GaAs process itself (about 0.8W/mm), if a power amplifier above 5W is realized in the L-band, 8-cell or even 16-cell transistors are required for power synthesis. The inductance used in the chip tends to have a large inductance value, and the multiple synthesis network will also increase the loss, resulting in a very large chip size; compared with the GaAs process and CMOS process, the power density of the GaN process can reach more than 5W/mm, which is more convenient achieve monolithic integration. However, in practical applications, due to the influence of the transistor input and output impedance matching factors of the power amplifier, the bandwidth of the current industrial L-band high-efficiency power amplifier is often between 200 and 600MHz. 1.2-1.4GHz, the bandwidth is 200MHz; the monolithic integrated power amplifier product that can cover the 1-2GHz operating bandwidth has an efficiency lower than 50%, for example: WFDN008020-P48, the product of China Power 55 Institute, has an operating frequency of 0.8-2.0GHz and a bandwidth of 1.2GHz but the efficiency is only 45%; and many broadband products require off-chip inductors and off-chip capacitors for matching, which increases the size of the transceiver channel. %, but the drain and off-chip inductance can also work, which is not conducive to miniaturization design. At the same time, due to the additional factors introduced by assembly, the consistency between channels will deteriorate, making it unable to adapt to L-band wideband phased array radar transceiver components. .

Therefore, it is of positive significance to study an L-band high-efficiency monolithic integrated power amplifier covering the 1-2GHz frequency band based on GaN technology.

Contents of the invention

In view of the need for improvement in the above-mentioned prior art, the present invention proposes an L-band monolithic integrated power amplifier, whose operating frequency range is 1-2 GHz, covers the entire L-band and realizes the integration of all semiconductor devices in the chip, It has the advantages of low cost, high efficiency, wide bandwidth, and small size of the transmission channel, and is suitable for L-band broadband phased array radar transceiver components.

The technical scheme adopted in the present invention is:

An L-band monolithic integrated power amplifier, comprising: an input matching network unit, a transistor unit and an output matching network unit;

The input matching network unit includes a resistor R1, a resistor R2, a resistor R3, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, an inductor L1, an inductor L2, and an inductor L3; the first end of the resistor R1 is connected to the first end of the capacitor C4 After that, they are respectively connected to the first end of the inductor L2 and the first end of the inductor L3, and the second end of the resistor R1 is connected to the second end of the capacitor C4, and then used as the output of the input matching network unit to connect to the transistor unit, and the second end of the inductor L2 is connected to the capacitor C2. RF input signal RFin, the second end of the inductor L3 is connected to the first end of the resistor R3 and the capacitor C3 after passing through the resistor R2; the second end of the resistor R3 is connected to the external gate bias voltage signal VG, and the second end of the capacitor C3 is grounded ; The first end of the inductor L1 is connected to the radio frequency input signal RFin, and the second end is grounded; the first end of the capacitor C1 is respectively connected to the first end of the inductor L1 and one end of the capacitor C2 connected to the radio frequency input signal RFin, and the other end is grounded;

The crystal unit includes a transistor DM1 and a transistor DM2, the gate of the transistor DM1 and the gate of the transistor DM2 are both connected to the signal node N1 for receiving the radio frequency signal provided by the input stage matching unit; the source of the transistor DM1 is connected to the gate of the transistor DM2 The sources are all grounded, the drain of the transistor DM1 is connected to the first input port of the output matching network unit as the first output terminal of the crystal unit, and the drain of the transistor DM2 is connected to the second output terminal of the output matching network unit as the second output terminal of the crystal unit. input port;

The output matching network unit includes a transmission line T1, a transmission line T2, a transmission line T3, a transmission line T4, a capacitor C5, a capacitor C6, a capacitor C7, an inductor L6 and a resistor R4; the first end of the transmission line T1 is used as the first input port of the output matching network unit Connect the first output end of the crystal unit, the second end of the transmission line T1 is connected to the second end of the transmission line T2 and then connected to the first end of the transmission line T3, the first end of the transmission line T2 is used as the second input port of the output matching network unit to connect to the crystal The second output end of the unit, the second end of the transmission line T3 is respectively connected to the first end of the transmission line T4 and the first end of the capacitor C7, the second port of the transmission line T4 is respectively connected to the first end of the capacitor C5 and the first end of the inductor L6, and the first end of the capacitor C5 The second end of the inductor L6 is connected to the external drain bias VD of the chip and the first end of the capacitor C6, the second end of the capacitor C6 is grounded, and the second end of the capacitor C7 is the output of the output matching network unit port; the resistor R4 is used as a balancing resistor, one end of which is connected to the first end of the transmission line T1, and the other end is connected to the first end of the transmission line T2.

Further, the input matching network unit, the transistor unit and the output matching network unit adopt GaN-HEMT technology to achieve on-chip integration.

Further, each component in the input matching network unit and the output matching network unit is a passive semiconductor device, and the transistor DM1 and the transistor DM2 are both depletion-type high electron mobility transistors.

After adopting the technical scheme, the present invention has the following advantages:

1. Through the unique circuit structure of the input matching network unit and the output matching network unit, the present invention realizes the impedance matching of the input and output of the transistor unit under the GAN process, without the need for off-chip inductance and off-chip capacitance for matching, and solves the problems in the prior art. It is applied to the problems of high cost, low efficiency, small bandwidth, and large size of the L-band power amplifier.

2. In the output matching network unit, the extra inductance L6 can be used as a load terminal, and at the same time, the gain of the device can be further improved.

3. Under the synergistic effect of the unique input matching network unit, crystal unit and output matching network unit of the present invention, its working frequency covers 1-2 GHz, and its working bandwidth is 1 GHz. Typical linear gain in the case of only one-stage amplification structure It reaches 17dB, the saturated output power is greater than 6W (38dBm), and the typical value of the added efficiency of saturated output reaches 60%.

Description of drawings

Fig. 1 shows the schematic diagram of the circuit structure of a kind of L band monolithic integrated power amplifier proposed in the present invention;

Fig. 2 shows the linear gain curve diagram of a kind of L band monolithic integrated power amplifier proposed in the present invention;

Fig. 3 shows the input port return loss curve figure of a kind of L band monolithic integrated power amplifier proposed in the present invention;

Fig. 4 shows the saturated output power curve figure of a kind of L band monolithic integrated power amplifier proposed in the present invention;

Fig. 5 shows the saturated output additional efficiency curve figure of a kind of L band monolithic integrated power amplifier proposed in the present invention;

Reference signs:

1. Input matching network unit, 2. Transistor unit, 3. Output matching network unit.

detailed description

In order to express the advantages of the present invention more clearly, the present invention will be described in more detail below in conjunction with specific embodiments and accompanying drawings. Engineers and technicians in the field of integrated circuits should understand that the content covered by the present invention is general rather than specific, and the application field can also be expanded, and the scope of protection is not limited to the described circuit structure.

Fig. 1 shows the schematic diagram of the circuit structure of a kind of L band monolithic integrated power amplifier proposed by the present invention, as shown in Fig. 1, the circuit of this L band monolithic integrated power amplifier comprises input matching network unit, transistor unit and output matching network unit. The input of the input matching network unit is connected to the radio frequency input signal RFin, and the output is connected to the input of the transistor unit; the 50 ohm input matching of the radio frequency input signal Rfin is completed and the input radio frequency voltage signal is converted into a radio frequency current signal. The transistor unit is a signal amplifying unit, the output of which is connected to the input of the output matching network unit, and is used for amplifying the received radio frequency current signal and outputting it. The output matching network unit performs impedance matching on the amplified radio frequency current signal and outputs a radio frequency signal Rfout.

The input matching network unit includes a resistor R1, a resistor R2, a resistor R3, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, an inductor L1, an inductor L2, and an inductor L3; the first end of the resistor R1 is connected to the first end of the capacitor C4 After that, they are respectively connected to the first end of the inductor L2 and the first end of the inductor L3, and the second end of the resistor R1 is connected to the second end of the capacitor C4, and then used as the output of the input matching network unit to connect to the transistor unit, and the second end of the inductor L2 is connected to the capacitor C2. RF input signal RFin, the second end of the inductor L3 is connected to the first end of the resistor R3 and the capacitor C3 after passing through the resistor R2; the second end of the resistor R3 is connected to the external gate bias voltage signal VG, and the second end of the capacitor C3 is grounded The first end of the inductor L1 is connected to the radio frequency input signal RFin, and the second end is grounded; the first end of the capacitor C1 is respectively connected to the first end of the inductor L1 and one end of the capacitor C2 is connected to the radio frequency input signal RFin, and the other end is grounded.

The crystal unit includes a transistor DM1 and a transistor DM2, the gate of the transistor DM1 and the gate of the transistor DM2 are both connected to the signal node N1 for receiving the radio frequency signal provided by the input stage matching unit; the source of the transistor DM1 is connected to the gate of the transistor DM2 The sources are all grounded, the drain of the transistor DM1 is connected to the first input port of the output matching network unit as the first output terminal of the crystal unit, and the drain of the transistor DM2 is connected to the second output terminal of the output matching network unit as the second output terminal of the crystal unit. input port. The output matching network unit includes a transmission line T1, a transmission line T2, a transmission line T3, a transmission line T4, a capacitor C5, a capacitor C6, a capacitor C7, an inductor L6 and a resistor R4; the first end of the transmission line T1 is used as the first input port of the output matching network unit Connect the first output end of the crystal unit, the second end of the transmission line T1 is connected to the second end of the transmission line T2 and then connected to the first end of the transmission line T3, the first end of the transmission line T2 is used as the second input port of the output matching network unit to connect to the crystal The second output end of the unit, the second end of the transmission line T3 is respectively connected to the first end of the transmission line T4 and the first end of the capacitor C7, the second port of the transmission line T4 is respectively connected to the first end of the capacitor C5 and the first end of the inductor L6, and the first end of the capacitor C5 The second end of the inductor L6 is connected to the external drain bias VD of the chip and the first end of the capacitor C6, the second end of the capacitor C6 is grounded, and the second end of the capacitor C7 is the output of the output matching network unit port; resistor R4 is used as a balance resistor to prevent odd-mode oscillation of the power amplifier, one end of which is connected to the first end of the transmission line T1, and the other end is connected to the first end of the transmission line T2.

When in use, each unit cooperates with each other to convert the input radio frequency signal Rfin into a radio frequency signal Rfout for output. In the input matching network unit, capacitor C2 is used as the DC blocking capacitor of the input matching unit, and also participates in 50 ohm impedance matching; resistor R2 is used to reduce the Q value of the input matching network; capacitor C3 is used as the on-chip external gate bias port of the chip Filter capacitor; resistor R3 is connected to the external gate bias voltage signal VG with a value of -2V; through capacitor C2, resistor R2, capacitor C3, resistor R3 and resistor R1 and capacitor C4 set in parallel, the stability of the entire device is improved . In the crystal unit, the two transistors are both GaN-HEMTs with exactly the same size, and they are connected in parallel to achieve power amplification. In the output matching network unit, according to the microwave network matching principle, the value ranges of the transmission line T4, capacitor C5 and inductance L6 are set, and the impedance is tuned through the set value ranges of the transmission line T4, capacitor C5 and inductance L6. Improve the emission efficiency of the drain; the second port of the inductor L6 is connected to the first port of the capacitor C6, and at the same time connected to the external drain bias VD of the chip. Port filtering function, capacitor C7 is used as a DC blocking capacitor to enhance device stability at the output end.

2 Fig. 2 shows a linear gain curve of an L-band monolithic integrated power amplifier proposed in the present invention. It can be seen from FIG. 2 that the power amplifier of this embodiment has a linear gain of about 28 dB within the working frequency band and exhibits a positive slope gain characteristic.

Fig. 3 shows a curve diagram of the input port return loss of an L-band monolithic integrated power amplifier proposed in the present invention. It can be seen from Figure 3 that the VSWR of the input port is about 1.1 in the working frequency band, indicating that the input port is well matched.

Fig. 4 shows a saturated output power curve diagram of an L-band monolithic integrated power amplifier proposed in the present invention; It can be seen from Figure 4 that the saturated output power is greater than 27dBm in the operating frequency band and presents a positive slope power output characteristic.

FIG. 5 shows a saturated output-added efficiency curve of an L-band monolithic integrated power amplifier proposed in the present invention. It can be seen from Fig. 5 that the additional efficiency of saturated output in the working frequency band is greater than 45%, which is suitable for the application in most radar transmission channels.

In summary, the present invention solves the application problems of multiple core indicators such as bandwidth, efficiency, and size of the L-band power amplifier, and realizes low cost and miniaturization through the on-chip integrated inductor and single-stage amplification structure, and is suitable for use in L-band power amplifiers. It is used as the final power amplifier in wideband phased array radar transceiver components, and is also suitable for use as the last power drive stage in L-band wideband phased array radar transceiver components. Only the drain voltage bias and gate are required outside the chip Voltage bias, it is extremely simple and convenient to apply in the first component through monolithic integration.

The above-mentioned embodiments are only specific examples to illustrate the present invention more clearly, and are not intended to limit the embodiments of the present invention. For engineers and technicians in the field of semiconductors, other different forms of extensions can be made on the basis of the above descriptions. , it is not possible to list all the implementation methods here, and all obvious changes or changes derived from the technical solutions of the present invention fall within the protection scope of the present invention.

Claims (3)

1. An L-band monolithically integrated power amplifier comprising: input matching network unit, transistor cell and output matching network unit, its characterized in that:

the input matching network unit comprises a resistor R1, a resistor R2, a resistor R3, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, an inductor L1, an inductor L2 and an inductor L3; the first end of the resistor R1 is connected with the first end of the capacitor C4 and then respectively connected with the first ends of the inductor L2 and the inductor L3, the second end of the resistor R1 is connected with the second end of the capacitor C4 and then used as the output of the input matching network unit to be connected with the transistor unit, the second end of the inductor L2 is connected with a radio frequency input signal RFin through the capacitor C2, and the second end of the inductor L3 is respectively connected with the first ends of the resistor R3 and the capacitor C3 through the resistor R2; the second end of the resistor R3 is connected with an external grid bias voltage signal VG, and the second end of the capacitor C3 is grounded; the first end of the inductor L1 is connected with a radio frequency input signal RFin, and the second end is grounded; the first end of the capacitor C1 is respectively connected with the first end of the inductor L1 and one end of the capacitor C2 connected with the radio frequency input signal RFin, and the other end of the capacitor C1 is grounded;

the crystal unit comprises a transistor DM1 and a transistor DM2, and the grid electrode of the transistor DM1 and the grid electrode of the transistor DM2 are both connected to a signal node N1 and used for receiving the radio-frequency signal provided by the input stage matching unit; the source electrode of the transistor DM1 and the source electrode of the transistor DM2 are both grounded, the drain electrode of the transistor DM1 is used as a first output end of the crystal unit and is connected with a first input port of the output matching network unit, and the drain electrode of the transistor DM2 is used as a second output end of the crystal unit and is connected with a second input port of the output matching network unit;

the output matching network unit comprises a transmission line T1, a transmission line T2, a transmission line T3, a transmission line T4, a capacitor C5, a capacitor C6, a capacitor C7, an inductor L6 and a resistor R4; a first end of a transmission line T1 is used as a first input port of an output matching network unit and connected with a first output end of a crystal unit, a second end of the transmission line T1 is connected with a second end of a transmission line T2 and then connected with a first end of a transmission line T3, the first end of the transmission line T2 is used as a second input port of the output matching network unit and connected with a second output end of the crystal unit, the second end of the transmission line T3 is respectively connected with a first end of a transmission line T4 and a first end of a capacitor C7, a second port of the transmission line T4 is respectively connected with a first end of a capacitor C5 and a first end of an inductor L6, a second end of the capacitor C5 is grounded, a second end of the inductor L6 is respectively connected with an external leakage level offset VD of a chip and a first end of the capacitor C6, a second end of the capacitor C6 is grounded, and a second end of the capacitor C7 is used as an output port of the output matching network unit; the resistor R4 is a balance resistor, and has one end connected to the first end of the transmission line T1 and the other end connected to the first end of the transmission line T2.

2. The L-band monolithic integrated power amplifier of claim 1, wherein: the input matching network unit, the transistor unit and the output matching network unit adopt a GaN-HEMT technology to realize on-chip integration.

3. The L-band monolithically integrated power amplifier of claim 1, wherein: each part in the input matching network unit and the output matching network unit is a passive semiconductor device, and the transistor DM1 and the transistor DM2 are depletion type high electron mobility transistors.

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