CN115498025A - Vertical nano air channel triode with grid electrode protection layer and preparation method thereof - Google Patents

Vertical nano air channel triode with grid electrode protection layer and preparation method thereof Download PDF

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CN115498025A
CN115498025A CN202210871634.9A CN202210871634A CN115498025A CN 115498025 A CN115498025 A CN 115498025A CN 202210871634 A CN202210871634 A CN 202210871634A CN 115498025 A CN115498025 A CN 115498025A
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layer
grid
air channel
substrate
insulating
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李沫
赵键澎
陈飞良
魏亚洲
张健
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University of Electronic Science and Technology of China
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University of Electronic Science and Technology of China
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356Disposition, e.g. buried gate electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0665Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • H01L29/1029Channel region of field-effect devices of field-effect transistors
    • H01L29/1033Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate

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Abstract

The invention discloses a preparation method of a vertical nano air channel triode with a grid electrode protective layer, and belongs to the technical field of semiconductor devices. The structure of the invention comprises two grids arranged on a substrate, wherein a gap is arranged between the two grids; the two grids are composed of an insulating layer, a grid layer and a protective layer; the protective layer covers the outer surface of the gate layer and wraps the working area of the gate layer together with the insulating layer; the nano-air channel is formed by the gap between the opposite surfaces of the two gates. By the arrangement mode that the protective layer covers the outer surface of the grid layer and wraps the working area of the grid layer together with the insulating layer, the phenomenon that the exposed grid emits and captures electrons to cause adverse effects on device performance is avoided. In the preparation method, expensive nano processing equipment is not needed, the nm-level air channel can be realized only by common ultraviolet lithography, and the method is low in cost, simple, convenient and feasible, and has practicability.

Description

Vertical nano air channel triode with grid electrode protection layer and preparation method thereof
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to a vertical nano air channel triode with a grid electrode protection layer and a preparation method thereof.
Background
The nanometer air channel triode realizes ballistic transport of electrons in a nanometer air channel based on a micro-nano process technology, has the advantages of miniaturization and easy integration, and is a novel device with great prospect in the high-speed and high-frequency fields.
Fig. 1 is a structural diagram of a typical nanometer air channel triode, and as shown in fig. 1, the structure directly adopts a substrate as a bottom electrode, and because the bottom electrode is not subjected to patterning processing, the superposition area between the bottom electrode and a top electrode is large, so that the parasitic capacitance is too large, and the frequency characteristic of a device is restricted. In addition, the preparation of the nanometer air channel triode in the prior art usually depends on expensive nanometer processing equipment, such as a focused ion beam etching process, an electron beam lithography process and other precise nanometer preparation processes for preparing the grid electrode, so that the preparation cost is high, and the practical application is not facilitated; in the manufacturing process, effective protection is not formed on the grid electrode, and in the process of sacrificial layer corrosion, the grid electrode is exposed in an air channel and participates in the emission and capture of electrons, so that the performance of a device is adversely affected.
Disclosure of Invention
The invention aims to: aiming at the defects in the prior art, the vertical nano air channel triode with the grid electrode protective layer and the preparation method thereof are provided, and the preparation method of the vertical nano air channel triode with the grid electrode protective layer, small electrode coincidence area, no need of high nano processing equipment and batch preparation is provided.
In order to realize the purpose, the invention adopts the following technical scheme:
a vertical nanometer air channel triode with a grid electrode protection layer comprises a substrate, a bottom conducting layer used as an anode and a top conducting layer used as a cathode;
the bottom conducting layer is arranged on the substrate, two grid electrodes are arranged on the bottom conducting layer to form a double-grid structure, and a gap is formed between the two grid electrodes; the two grids are composed of an insulating layer, a grid layer and a protective layer; the protective layer covers the outer surface of the gate layer and wraps the working area of the gate layer together with the insulating layer; forming a nano air channel through a gap between the opposite surfaces of the two gates;
the top layer conducting layer is arranged right above the two grids and aligned to the nanometer air channel.
Further, the substrate material is an insulating material, a semiconductor material or a conductive material; if a semiconductor material or a conductive material is adopted, a bottom conductive layer does not need to be manufactured; if the insulator material is used, the shape of the bottom conductive layer is obtained by a patterning process such as photolithography, so that the overlapping area of the electrodes is sufficiently reduced, and the parasitic capacitance is reduced.
Furthermore, the insulating layer and the protective layer are made of BOE corrosion resistant insulating materials.
Furthermore, the substrate is made of a sapphire insulating substrate, and the insulating layer and the protective layer are made of Si 3 N 4 The sacrificial layer is made of SiO 2 (ii) a The anode, the cathode and the grid are made of gold.
A preparation method of a vertical nanometer air channel triode with a grid electrode protection layer comprises the following steps:
s1, preparing a substrate
S1.1, photoetching and depositing a metal layer on a provided substrate, and forming a bottom conducting layer serving as an anode through a stripping process;
s1.2, forming a first grid and a second grid on the bottom conducting layer through photoetching and deposition, wherein a gap is formed between the two grids, and the first grid and the second grid respectively comprise an insulating layer, a grid layer and a protective layer which are sequentially arranged from bottom to top, and the protective layer covers the outer surface of the grid layer and wraps the working area of the grid layer together with the insulating layer;
s2, depositing a sacrificial layer on the upper surface of the substrate, wherein the sacrificial layer completely covers the upper surface of the substrate;
s3, forming a top conducting layer serving as a cathode on the upper surface of the sacrificial layer by sequentially adopting photoetching, metal deposition and stripping processes;
and S4, removing the sacrificial layer material by adopting a wet etching process to form a nano air channel between the opposite surfaces of the two gates.
Further, when the wet etching process removes the material of the sacrificial layer in step S4, only a part of the sacrificial layer penetrated by the BOE solution is removed, and the rest remains.
Further, the thickness of the sacrificial layer is larger than that of the insulating layer, and the size of the vertical nano air channel is determined by the thickness of the sacrificial layer.
After the technical scheme is adopted, the invention has the following advantages:
1. the shapes of a grid electrode, an anode and a cathode of the nanometer air channel triode are prepared in a photoetching and deposition mode; by controlling the shapes of the grid, the anode and the cathode, the overlapping area of the electrodes is fully reduced, the parasitic capacitance is reduced, and the frequency characteristic of the device is improved.
2. The triode of the invention adopts a double-gate structure, shortens the gate spacing and effectively improves the performance of the device; in the preparation process, the protective layer covers the outer surface of the grid layer and wraps the grid layer together with the insulating layer to protect the grid, and the protective layer is matched with a material of an anti-corrosion insulating material, so that the grid is prevented from participating in emission and capture of electrons in an air channel, and the performance of the device is improved.
3. The triode of the invention can realize the nm-level air channel only by common ultraviolet lithography without depending on expensive nanometer processing equipment in the preparation process, has low cost, is simple and easy to operate, and has practicability.
Drawings
FIG. 1 is a diagram of a conventional typical nano air channel triode;
fig. 2 is a schematic diagram of a vertical nano air channel triode with a gate protection layer based on a lift-off process according to the present invention;
FIG. 3 is a schematic side view of a process flow of a method for fabricating a vertical nano air channel triode with a gate protection layer based on a lift-off process according to the present invention;
fig. 4 is a schematic top view of a process flow of a method for manufacturing a vertical nano air channel triode with a gate protection layer based on a lift-off process according to the present invention;
reference numerals are as follows:
wherein: 1. an insulating substrate; 2. a bottom conductive layer 2; 3. an insulating layer; 4. a gate layer; 5. a protective layer; 6. a sacrificial layer; 7. a top conductive layer; 8. a nano air channel.
Detailed Description
The technical solution of the present invention is further explained with reference to the drawings and the embodiments.
Example 1
As shown in fig. 2, the vertical nano air channel transistor with a gate protection layer according to the present embodiment includes a substrate 1, a bottom conductive layer 2 as an anode, and a top conductive layer 7 as a cathode.
A vertical nano air channel triode with a grid electrode protection layer comprises an insulating substrate 1, a bottom conducting layer 2 used as an anode and a top conducting layer 7 used as a cathode. The bottom layer conducting layer 7 is arranged on the insulating substrate 1, two grid electrodes are arranged on the bottom layer conducting layer to form a double-grid structure, and a gap is formed between the two grid electrodes; both the two gates are composed of an insulating layer 3, a gate layer 4 and a protective layer 5; the gate layer 4 is positioned on the insulating layer 3, the protective layer 5 covers the outer surface of the gate layer 4 and wraps the working area of the gate layer 4 together with the insulating layer 3; a nano-air channel 8 is formed by the gap between the opposing faces of the two gates. The top conductive layer is arranged above the two gates and aligned to the nano-air channel 8.
When the cathode is grounded, after the grid voltage is increased, the surface electric field of the cathode is increased, the potential barrier of the cathode is narrowed, and electrons of the cathode can be emitted into an air channel in an fn tunneling mode. The air channel is smaller than the mean free path of electrons in air, and the electrons are transported in the air channel in a ballistic transport mode. After the anode voltage is increased, electrons in the air channel are captured, and the electrons are received. Due to the existence of the grid electrode protection layer, when the anode voltage is larger than the grid electrode voltage, the grid electrode can not participate in the emission of electrons, and when the anode voltage is smaller than the grid electrode voltage, the grid electrode can not participate in electron capture.
In the present embodiment, the material of the gate insulating layer 3 and the gate protection layer 5 is Si 3 N 4 The material of the sacrificial layer 6 is SiO 2 After BOE corrosion, the sacrificial layer 3 is selectively removed, a nanoscale air channel is realized, and meanwhile, due to the existence of the gate insulating layer 3 and the gate protective layer 5, the gate cannot be exposed in the air channel, so that electron emission or electron capture of the gate is effectively avoided. In addition, the anode layer 2, the grid layer 4 and the cathode layer 7 are made of gold, and the shapes of the electrodes can be flexibly designed through a photoetching patterning process, so that the minimum overlapping area is achieved, parasitic capacitance is reduced, and the frequency performance of the device is improved.
A method for manufacturing a vertical nano air channel triode with a gate protection layer, as shown in fig. 3 and 4, comprises the following steps:
s1, preparing a substrate
S1.1, forming a bottom conducting layer 2 serving as an anode on a sapphire insulating substrate 1 through photoetching and depositing Au and through a stripping process.
S1.2, forming two grids on the bottom conducting layer 2 through photoetching and deposition to form a double-grid structure; the gaps between the two grids comprise an insulating layer 3, a grid layer 4 and a protective layer 5 which are sequentially arranged from bottom to top, and the protective layer 5 covers the outer surface of the grid layer 4 and wraps the working area of the grid layer 4 together with the insulating layer 3. Wherein the insulating layer 3 and the protective layer 5 are made of Si 3 N 4 The gate layer 4 is made of gold; the pattern is obtained by sequentially adopting photoetching, deposition and stripping processes.
S2, adopting PECVD carpet to deposit SiO on the upper surface of the substrate prepared in the step S1 2 As the sacrificial layer 6, and the sacrificial layer 6 completely covers the upper surface of the substrate.
S3, sequentially forming a top conducting layer 7 serving as a cathode on the upper surface of the sacrificial layer 6 by adopting photoetching, metal deposition and stripping processes; the top conductive layer 7 is located right above the two gates and is made of gold.
And S4, etching by adopting BOE solution to remove part of the sacrificial layer material. The parts herein refer to: the sacrificial layer which can not be penetrated by BOE solution is partially reserved, and the rest part is removed; after removal, the void portion between the gate faces forms a nano-air channel 8.
The above description is only an example of the present application and is not limited to the present application. Various modifications and alterations to this application will become apparent to those skilled in the art without departing from the scope of this invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

Claims (7)

1. The utility model provides a take perpendicular nanometer air channel triode of grid protection layer, includes the substrate, as the bottom conducting layer of positive pole and the top conducting layer as the negative pole, its characterized in that:
the bottom conducting layer is arranged on the substrate, two grid electrodes are arranged on the bottom conducting layer to form a double-grid structure, and a gap is formed between the two grid electrodes; the two grids are composed of an insulating layer, a grid layer and a protective layer; the protective layer covers the outer surface of the gate layer and wraps the working area of the gate layer together with the insulating layer; forming a nano air channel through a gap between the opposite surfaces of the two gates;
the top conductive layer is arranged right above the two grids and aligned to the nano air channel.
2. The vertical nano air channel triode with the gate protection layer according to claim 1, wherein: the substrate material is an insulating material, a semiconductor material or a conductive material; if a semiconductor material or a conductive material is adopted, a bottom conductive layer does not need to be manufactured; if the insulator material is used, the shape of the bottom conductive layer is obtained by a patterning process such as photolithography, so that the overlapping area of the electrodes is sufficiently reduced, and the parasitic capacitance is reduced.
3. The vertical nano air channel triode with a gate protection layer according to claim 1, wherein: and the insulating layer and the protective layer are made of BOE corrosion resistant insulating materials.
4. The vertical nano air channel triode with the gate protection layer according to claim 1, wherein: the substrate is made of sapphire insulating substrate, and the insulating layer and the protective layer are made of Si 3 N 4 The sacrificial layer is made of SiO 2 (ii) a The anode, the cathode and the grid are made of gold.
5. A preparation method of a vertical nanometer air channel triode with a grid electrode protection layer is characterized by comprising the following steps: the method comprises the following steps:
s1, preparing a substrate
S1.1, photoetching and depositing a metal layer on a provided substrate, and forming a bottom conducting layer serving as an anode through a stripping process;
s1.2, forming a first grid and a second grid on the bottom conducting layer through photoetching and deposition, wherein a gap is formed between the two grids, and the first grid and the second grid respectively comprise an insulating layer, a grid layer and a protective layer which are sequentially arranged from bottom to top, and the protective layer covers the outer surface of the grid layer and wraps the working area of the grid layer together with the insulating layer;
s2, depositing a sacrificial layer on the upper surface of the substrate, wherein the sacrificial layer completely covers the upper surface of the substrate;
s3, forming a top conducting layer serving as a cathode on the upper surface of the sacrificial layer by sequentially adopting photoetching, metal deposition and stripping processes;
and S4, removing the sacrificial layer material by adopting a wet etching process to form a nano air channel between the opposite surfaces of the two gates.
6. The method for preparing the vertical nano air channel triode with the grid electrode protection layer according to claim 5, wherein the method comprises the following steps: when the wet etching process removes the sacrificial layer material in the step S4, only a part of the sacrificial layer penetrated by the BOE solution is removed, and the rest remains.
7. The method for preparing the vertical nano air channel triode with the grid electrode protection layer according to claim 5, wherein the method comprises the following steps: the thickness of the sacrificial layer is larger than that of the insulating layer, and the size of the vertical nanometer air channel is determined by the thickness of the sacrificial layer.
CN202210871634.9A 2022-07-22 2022-07-22 Vertical nano air channel triode with grid electrode protection layer and preparation method thereof Pending CN115498025A (en)

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CN202210871634.9A CN115498025A (en) 2022-07-22 2022-07-22 Vertical nano air channel triode with grid electrode protection layer and preparation method thereof

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CN202210871634.9A CN115498025A (en) 2022-07-22 2022-07-22 Vertical nano air channel triode with grid electrode protection layer and preparation method thereof

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CN115498025A true CN115498025A (en) 2022-12-20

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