CN110797400B - Air gap transistor structure and manufacturing method thereof - Google Patents
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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Abstract
An air gap transistor structure and a method of manufacturing the same, the structure comprising a semiconductor substrate, an emitter, a first dielectric layer, a control electrode, an air gap, a second dielectric layer and a collector; the emitter comprises at least one emitter body and connecting parts at two sides of the emitter body, the emitter body is positioned on the upper surface of the semiconductor substrate, each emitter body is provided with at least one vertex angle with a preset curvature radius, and the connecting parts are connected with the emitter body and are arranged around the structural space of the emitter body; the first medium layer is positioned on the upper surface of the connecting part and isolates the connecting part from the side wall of the structural space of the emitting main body; the control electrode is positioned on the upper surface of the first dielectric layer and is isolated from the connecting part through the first dielectric layer; the air gap is positioned on the control electrode and surrounds the control electrode, and the projection position of the air gap is positioned in the projection position of the emission main body; the second dielectric layer covers the surface of the control electrode; the collector is positioned on the upper surfaces of the second dielectric layer and the air gap; and is isolated from the control electrode by a second dielectric layer.
Description
Technical Field
The present invention relates to the field of integrated circuit fabrication, and more particularly, to an air gap transistor structure compatible with complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor, CMOS) technology and a method for fabricating the same.
Background
As CMOS technology continues to evolve according to moore's law, scaling of conventional MOS devices encounters increasing technical and cost challenges, including, for example, how to increase channel carrier mobility, how to achieve sufficiently large on-current while scaling the voltage, and the like, and introducing stress engineering, fin Field-Effect Transistor (FinFET) and other technologies, while the device is scaled down, the performance of the device needs to be maintained.
However, the use of these techniques increases process complexity, process control difficulty, and cost. In addition, the conventional CMOS device has problems such as a change in device characteristics with temperature, an influence of external radiation on the device, and the like.
Therefore, how to meet the market demands and how to greatly improve the carrier mobility and the emission efficiency of the emitter electrons has become an important consideration for the design of the air gap transistor product in the industry.
Disclosure of Invention
The invention aims to provide an air gap transistor structure and a manufacturing method thereof, and in order to achieve the above purpose, one technical scheme is as follows:
an air gap transistor structure, comprising:
a semiconductor substrate;
the emitter comprises at least one emitter body and connecting parts at two sides of the emitter body, wherein the emitter body is positioned on the upper surface of the semiconductor substrate, and each emitter body is provided with at least one vertex angle with a preset curvature radius; the connecting part is connected with the emitter body; the connecting part is arranged around the structural space of the transmitting main body; wherein the material of the emitter is a metal material, an alloy material or a metal compound material;
a first dielectric layer located on the upper surface and the side surface of the connection portion;
a control electrode located on an upper surface of the first dielectric layer and isolating the control electrode from the emitter electrode by the first dielectric layer;
an air gap above the emitter, the projection position of the air gap being located within the projection position of the emitter body;
the second dielectric layer is covered on the surface of the control electrode;
a collector located on the second dielectric layer and the upper surface of the air gap; and isolated from the control electrode by the second dielectric layer; wherein field emission electrons are achieved by controlling the voltage between the emitter and collector;
when the air gap transistor structure works, the emitter electrode is connected with negative potential, and the control electrode and the collector electrode are connected with positive potential; the current from the emitter to the collector is controlled by the control electrode, and the polarity and the magnitude of the voltage are utilized to play a role in enhancing or weakening the current of the collector.
Further, the inside of the emitting main body locally comprises a tip, and the shape of the emitting main body comprises a trapezoid, a rectangle with embedded two sides, a square with concave or convex two sides, a triangle, an irregular tip graph and a pinnacle arc.
Further, the control electrode has a grid structure above the emitter body, and the grid structure is used for enhancing electron emission efficiency of the emitter after voltage is applied.
Further, the connection portion disposed around the air gap is isolated by the first dielectric layer.
Further, a first shielding metal trench is formed in the second dielectric layer, and the first shielding metal trench is isolated from the air gap by the second dielectric layer.
Further, a second shielding metal trench is included between the second dielectric layer and the air gap, surrounds the air gap, and is connected with the collector.
Further, the shape of the left and right side surfaces and the top of the air gap is a plane, an inclined plane, a concave or convex arc, a convex arc or a combination of the above shapes.
Further, the metal height of the at least one emission body is lower than the metal height of the both side connection portions thereof.
In order to achieve the above object, another technical solution is as follows:
a method of fabricating an air gap transistor structure comprising the steps of:
step S1: depositing an emitter material on a semiconductor substrate, and patterning to remove metal at the periphery of the emitter to form an emitter region; wherein the material of the emitter is a metal material, an alloy material or a metal compound material;
step S2: patterning the emitter region to form at least one emitter body and connecting parts at two sides of the emitter body, wherein the height of the at least one emitter body is lower than that of the connecting parts at two sides, and each emitter body is provided with at least one vertex angle with a preset curvature radius; wherein the connection part is connected with the emitter body and is arranged around the structural space of the emitter body;
step S3: depositing a first dielectric layer material, and removing the first dielectric layer material on the at least one emission main body in a patterning way, wherein the first dielectric layer material on the side wall, close to the air gap direction, of the connecting parts at the two sides of the emitter is reserved;
step S4: depositing a sacrificial layer, and then flattening, wherein the sacrificial layer is reserved only in the emitter region and the height of the sacrificial layer is flush with the upper surface of the first dielectric layer;
step S5: depositing a control electrode layer, and forming a grid structure of the control electrode layer in a patterning way; wherein the control electrode layer grid structure is positioned above the first medium isolation layer in the height direction;
step S6: depositing a second dielectric layer, then depositing a first shielding metal layer, and patterning the first shielding metal layer, wherein the first shielding metal of the air gap area above the emitter is completely removed;
step S7: continuously depositing a second dielectric layer and flattening;
step S8: etching grooves of a second shielding metal layer for absorbing secondary electrons on two sides of the device region; depositing a collector metal, and only retaining the collector material in the groove through back etching or CMP;
step S9: etching to remove the second dielectric layer in the air gap area, depositing a sacrificial layer, enabling the surface of the sacrificial layer to be flush with the surface of the second dielectric layer through CMP, and exposing the collector material in the groove;
step S10: depositing a collector metal layer such that the collector metal layer is connected to the collector metal in the recess and completely covers the air gap region;
step S11: and patterning the collector metal layer to form the collector.
Further, BOSCH etching is adopted for the top angle of the emitting main body, wherein the gas for BOSCH etching is HCl and/or HBr metal etching gas.
According to the technical scheme, the invention provides an air gap three-body tube structure compatible with a CMOS process, and three-terminal devices of an emitter, a control electrode and a collector are realized by introducing the nano structure. The three-terminal device has the following beneficial effects:
(1) the field emission electrons are realized through the voltage between the emitter and the collector, so that the ballistic emission of the electrons can be realized, and the carrier mobility of the electrons can be greatly improved;
(2) the emission efficiency of the emitter electrons is further enhanced by controlling the voltage between the electrode and the emitter;
(3) the three-terminal device structure is less influenced by external influences (such as radiation and the like), and provides a technical foundation for the development of devices in the later CMOS age.
Drawings
FIG. 1 is a schematic diagram of an air gap transistor structure according to an embodiment of the present invention
Detailed Description
The following describes the present invention in further detail with reference to fig. 1.
The invention provides an air gap 6 transistor structure, in particular to an air gap 6 transistor structure compatible with a CMOS process and a manufacturing method thereof. The air gap 6 transistor structure is a three-terminal device structure which comprises an emitter 1, a control electrode 2 and a collector 3 in a nanometer scale. According to the three-terminal device, field emission electrons are realized through the voltage between the emitter 1 and the collector 3, ballistic emission of electrons can be realized, carrier mobility of the three-terminal device can be greatly improved, emission efficiency of electrons of the emitter 1 is further enhanced through controlling the voltage between the emitter 1 and the electrode 2, and the three-terminal device structure is less influenced by external influences (such as radiation and the like), so that a technical foundation is provided for development of a later CMOS (complementary metal oxide semiconductor) time device.
Referring to fig. 1, fig. 1 is a schematic diagram illustrating a structure of a transistor with an air gap 6 according to an embodiment of the invention. The air gap 6 transistor structure is a novel device structure, and by introducing the novel device structure in a nanometer level, a high-performance three-terminal device can be realized. The three terminal device may include a semiconductor substrate, an air gap 6, an emitter 1, a first dielectric layer 4, a control electrode 2, and a collector 3.
As shown, the emitter 1 is located on a semiconductor substrate, and the emitter 1 may include one or more emitter bodies and a connection portion connected to the emitter bodies. The material of the emitter 1 is usually a metal material, an alloy material, a metal compound material, or the like. Each of the emitting bodies has at least one apex angle of a predetermined radius of curvature. That is, the number of the emission bodies may be plural, and the number of the emission bodies may be plural as well. The emission bodies may be uniformly distributed on the semiconductor substrate or may be concentrated on the semiconductor substrate, and the present invention is not limited thereto.
In the embodiment of the invention, the vertex angle of the emission main body can be etched (side etched) to form a tip structure with a smaller radius of curvature, the radius of curvature of the tip structure can be smaller than 10um, in addition, the shape of the emission main body can be trapezoid, rectangle with concave or convex sides, square, triangle with concave or convex sides, irregular tip graph, tip arc and the like, and the radius of curvature of the vertex angle is larger, so that electrons are easier to emit, and the electron emission is omitted.
The connection portion of the emitter 1 is typically arranged around the structural space of one or more emitter bodies; the first dielectric layer 4 is located on the upper surface and the side of the connection portion and isolates the control electrode from the emitter electrode. Preferably, the metal height of the one or more emission bodies is lower than the metal height of the both side connection portions thereof. When the metal height of the emission main body is lower than the metal height of the connection part, a structure with the periphery connection part higher than the emission electrode can be formed, at the moment, electrons emitted by the emission electrode have the probability of emitting towards the periphery direction, and the periphery connection part and the emission electrode have the same potential, so that the rejection effect can be achieved, the electrons are prevented from being incident on the metal or medium at the periphery of the air gap, and the emission and collection efficiency can be improved.
As shown in fig. 1, the control electrode 2 is located on the upper surface of the first dielectric layer 4 and is isolated from the connection portion by the first dielectric layer 4; an air gap 6 is positioned above the control electrode 2, and the projection position of the air gap is positioned in the projection position of the emission main body; a second dielectric layer 8 covers the surface of the control electrode 2; the collector 3 is positioned on the upper surfaces of the second dielectric layer 8 and the air gap 6; and is isolated from the control electrode 2 by a second dielectric layer 8; wherein, by controlling the voltage between the emitter 1 and the collector 3 to realize field emission electrons, ballistic emission of electrons can be realized, thereby greatly improving carrier mobility thereof.
In the embodiment of the present invention, the shape of the left and right sides and the top of the air gap 6 may be a plane, an inclined plane, a concave or convex arc, a convex arc or a combination of the above shapes, but may also be other irregular shapes or a combination of the above shapes (as shown in the figure).
When the three-terminal device works, the emitter 1 is connected with negative potential, and the control electrode 2 and the collector 3 are connected with positive potential; as the distance between the control electrode 2 and the emitter is closer, when the positive potential of the control electrode 2 is increased, the field emission efficiency of the emitter is enhanced, and the current of the collector 3 is improved, and vice versa; the control electrode 2 is similar to the grid electrode of a MOS transistor, and can effectively control the on current. The electron emission efficiency of the emitter 1 is further enhanced by controlling the voltage between the electrode 2 and the emitter. I.e. the positive potential of the control stage increases, the field emission efficiency of the emitter stage increases in proportion to the collector current.
Referring again to fig. 1, above the emitter body of the emitter 1 and within the air gap 6 cavity, the control electrode 2 may be present in a grid-like structure 21, the projection of which is located between the emitter 1 installation spaces and the pattern is sufficiently small. The grid-like structure 21 is like a sieve with holes on the side wall of the cavity of the air gap 6, and after voltage is applied, the control electrode 2 of the grid-like structure 21 is used for ensuring that electrons can smoothly pass through and reach the collector 3, so that the electron emission efficiency of the emitter 1 is enhanced.
In the exemplary embodiment of the invention, the connection of the emitter 1, which is arranged around the installation space of the emitter 1, is isolated by the first dielectric layer 4. Since the emitter 1 is generally connected with a negative voltage, the electrostatic effect can prevent field emission electrons from striking the first medium at the edge, strengthen the negative field and effectively prevent further absorption of electrons.
Further, a first shielding metal trench 7 may be provided in the second dielectric layer 8, which first shielding metal trench 7 is isolated from the emitter 1 installation space by the second dielectric layer 8. The first shielding metal trench 7 here is slightly below the emitter 1 voltage, effectively shielding the parasitic capacitance between the collector 3 and the control electrode.
And, a second shielding metal trench 5 may be further included between the second dielectric layer 8 and the air gap 6, and the second shielding metal trench 5 surrounds the air gap 6. The second shielding metal trench 5 is connected to the collector 3 for generating secondary electrons after the electrons bombard the collector 3, which secondary electrons can be absorbed by the second shielding metal trench 5. Meanwhile, since the space between the metal and the control electrode 2 is small here, the parasitic capacitance may be large, so that a small area is provided. Preferably, the second shielding metal is the same as the metal of the collector 3.
The method for manufacturing the air gap transistor structure of the present invention is briefly described below.
A method of fabricating an air gap transistor structure comprising the steps of:
step S1: depositing an emitter 1 metal on a semiconductor substrate, and patterning to remove the metal at the periphery of the emitter 1 to form an emitter 1 region; the material of the emitter 1 can be a metal material, an alloy material or a metal compound material;
step S2: patterning the emitter 1 region to form at least one emitter body and connecting parts at two sides of the emitter body, wherein the metal height of the at least one emitter body is lower than that of the connecting parts at two sides, and each emitter body is provided with at least one vertex angle with a preset curvature radius; the connecting part is connected with the emitter main body and is arranged around the structural space of the emitter main body;
step S3: depositing a first dielectric layer 4 material, and removing the first dielectric layer 4 material on the at least one emitter body in a patterning way, and reserving the first dielectric layer 4 material of the metal of the connecting parts at the two sides on the side wall of the emitter 1 region;
step S4: depositing a sacrificial layer, and then flattening, wherein the sacrificial layer is reserved only in the area of the emitter 1, and the height of the sacrificial layer is flush with the upper surface of the first dielectric layer 4;
step S5: depositing a control electrode layer and patterning to form a grid-like structure 21 of the control electrode layer; wherein the control electrode layer grid structure 21 and the first dielectric isolation layer are located above each other in the height direction;
step S6: depositing a second dielectric layer 8, then depositing a first shielding metal layer, and patterning the first shielding metal layer, wherein the first shielding metal of the air gap area above the emitter 1 is completely removed;
step S7: continuing to deposit the second dielectric layer 8 and flattening by CMP;
step S8: etching grooves of a second shielding metal layer for absorbing secondary electrons on two sides of the device region; depositing a collector material, and only retaining the collector material in the groove through back etching or CMP;
step S9: etching to remove the second dielectric layer 8 in the air gap 6 area, depositing a sacrificial layer, enabling the surface of the sacrificial layer to be flush with the surface of the second dielectric layer 8 through CMP, and exposing the collector metal in the groove;
step S10: depositing a collector metal layer such that the collector metal layer is connected to the collector metal in the recess and completely covers the air gap 6 area;
step S11: and patterning the collector metal layer to form a collector.
In the embodiment of the invention, the top angle of the emitting main body is etched by BOSCH, wherein the gas etched by BOSCH is HCl and/or HBr metal etching gas.
The foregoing description is only of the preferred embodiments of the present invention, and the embodiments are not intended to limit the scope of the invention, so that all changes made in the equivalent structures of the present invention described in the specification and the drawings are included in the scope of the invention.
Claims (10)
1. An air gap transistor structure comprising:
a semiconductor substrate;
the emitter comprises at least one emitter body and connecting parts at two sides of the emitter body, wherein the emitter body is positioned on the upper surface of the semiconductor substrate, each emitter body is provided with at least one vertex angle with a preset curvature radius, and the connecting parts are connected with the emitter body; the connection part is arranged around the structural space of the emission main body; wherein the material of the emitter comprises a metal material, an alloy material and a metal compound material;
a first dielectric layer located on the upper surface and the side surface of the connection portion;
the control electrode is positioned on the upper surface of the first dielectric layer, and the first dielectric layer isolates the control electrode from the emitter;
an air gap above the emitter, the projection position of the air gap being located within the projection position of the emitter body;
the second dielectric layer is covered on the surface of the control electrode;
a collector located on the upper surface of the second dielectric layer and the air gap and isolated from the control electrode by the second dielectric layer; wherein field emission electrons are achieved by controlling the voltage between the emitter and collector;
when the air gap transistor structure works, the emitter electrode is connected with negative potential, and the control electrode and the collector electrode are connected with positive potential; the magnitude of the current from the emitter to the collector is controlled by the control electrode, and the polarity and magnitude of the voltage are utilized to play a role in enhancing or weakening the current of the collector.
2. The air gap transistor structure of claim 1, wherein the emitter body comprises a tip partially therein, and the shape of the emitter body comprises a trapezoid, a rectangular shape with concave or convex sides, a square shape with concave or convex sides, a triangle shape, an irregular tip pattern, and a pinnacle arc shape.
3. The air gap transistor structure of claim 1, wherein the control electrode has a grid structure over the emitter body, the grid structure for enhancing electron emission efficiency of the emitter upon application of a voltage.
4. The air gap transistor structure of claim 1, wherein the connection portion disposed around the air gap is isolated by the first dielectric layer.
5. The air gap transistor structure of claim 1, wherein a first shield metal trench is provided in the second dielectric layer, the first shield metal trench being isolated from the air gap by the second dielectric layer.
6. The air gap transistor structure of claim 4, wherein a second shield metal trench is included between the second dielectric layer and the air gap, the second shield metal trench surrounding the air gap and being connected to the collector.
7. The air gap transistor structure of claim 1, wherein the shape of the left and right sides and the top of the air gap comprises a plane, a slope, a concave or convex arc, a convex arc, or a combination thereof.
8. The air gap transistor structure of claim 1, wherein the at least one emission body has a height lower than a height of the both side connection portions thereof.
9. A method of fabricating an air gap transistor structure comprising the steps of:
step S1: depositing an emitter material layer on a semiconductor substrate, and patterning to remove metal at the periphery of the emitter to form an emitter region; wherein the material of the emitter comprises a metal material, an alloy material and a metal compound material;
step S2: patterning the emitter material layer to form at least one emitter body and connecting parts at two sides of the emitter body, wherein the height of the at least one emitter body is lower than that of the connecting parts at two sides, each emitter body is provided with at least one vertex angle with a preset curvature radius, the connecting parts are connected with the emitter body, and the connecting parts are arranged around the structural space of the emitter body;
step S3: depositing a first dielectric layer, and removing the first dielectric layer on the at least one emission main body in a patterning way, and keeping the connection parts on two sides of the emitter close to the first dielectric layer on the side wall in the air gap direction;
step S4: depositing a sacrificial layer, and then flattening, wherein the sacrificial layer is reserved only in the emitter region and the height of the sacrificial layer is flush with the upper surface of the first dielectric layer;
step S5: depositing a control electrode material layer, and patterning to form a control electrode grid structure; wherein the control electrode grid structure is positioned above the first medium isolation layer in the height direction;
step S6: depositing a second dielectric layer, then depositing a first shielding metal layer, and patterning the first shielding metal layer, wherein the first shielding metal in the air gap area above the emitter is completely removed;
step S7: continuously depositing a second dielectric layer and flattening the second dielectric layer;
step S8: etching the second dielectric layer at two sides of the device region to form a groove of a second shielding metal layer for absorbing secondary electrons; depositing a collector material, and only retaining the collector material in the groove through back etching or CMP;
step S9: etching to remove the second dielectric layer in the air gap area, depositing a sacrificial layer, enabling the surface of the sacrificial layer to be flush with the surface of the second dielectric layer through CMP, and exposing the collector material in the groove;
step S10: depositing a collector metal layer such that the collector metal layer is connected to the collector metal in the recess and completely covers the air gap region;
step S11: and patterning the collector metal layer to form the collector.
10. The method of claim 9, wherein the top corners of the emitter body are etched using BOSCH, wherein the BOSCH etching gas is HCl and/or HBr metal etching gas.
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| CN109390402A (en) * | 2017-08-10 | 2019-02-26 | 长鑫存储技术有限公司 | Semiconductor transistor structure and preparation method thereof |
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| US20130011986A1 (en) * | 2011-07-08 | 2013-01-10 | Huajie Zhou | Method for Manufacturing Full Silicide Metal Gate Bulk Silicon Multi-Gate Fin Field Effect Transistors |
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| US5267884A (en) * | 1990-01-29 | 1993-12-07 | Mitsubishi Denki Kabushiki Kaisha | Microminiature vacuum tube and production method |
| US6626720B1 (en) * | 2000-09-07 | 2003-09-30 | Motorola, Inc. | Method of manufacturing vacuum gap dielectric field emission triode and apparatus |
| US9147755B1 (en) * | 2013-05-22 | 2015-09-29 | The United States of America as represented by the Administrator of the National Aeronautics & Space Administration (NASA) | Nanostructure-based vacuum channel transistor |
| CN109390402A (en) * | 2017-08-10 | 2019-02-26 | 长鑫存储技术有限公司 | Semiconductor transistor structure and preparation method thereof |
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