CN115472203B - Flash memory wear number prediction method, device and storage medium - Google Patents
Flash memory wear number prediction method, device and storage medium Download PDFInfo
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- 230000015654 memory Effects 0.000 title claims abstract description 120
- 238000000034 method Methods 0.000 title claims abstract description 29
- 238000005299 abrasion Methods 0.000 claims description 27
- 238000010586 diagram Methods 0.000 description 6
- 238000004590 computer program Methods 0.000 description 5
- 230000006870 function Effects 0.000 description 5
- 230000008859 change Effects 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 238000003491 array Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
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- 238000010168 coupling process Methods 0.000 description 1
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- 238000012986 modification Methods 0.000 description 1
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Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The embodiment of the application provides a flash memory wear frequency prediction method, a device and a storage medium, wherein the flash memory wear frequency prediction method comprises the following steps: sending an operation instruction to the flash memory to control the flash memory to execute a preset operation; acquiring the execution time of the flash memory for executing the preset operation; and determining the predicted wear times of the flash memory according to the execution time. According to the method and the device, the predicted wear frequency of the flash memory is determined according to the execution time of the flash memory for executing the preset operation, and the wear frequency of the flash memory can be obtained under the condition that the wear frequency is not recorded or cannot be read normally from the flash memory.
Description
Technical Field
The present application relates to the field of flash memory life prediction technologies, and in particular, to a flash memory wear number prediction method, device, and storage medium.
Background
Solid state drives (Solid State Drive, SSD) generally use Flash Memory (Flash Memory) as a storage medium. Flash memory has a certain wear life, and the more the number of wear times, the poorer the performance. The service life of the flash memory represents the number of operations that can be executed before the flash memory fails, and is an important parameter index of the flash memory. However, when the flash memory does not record the wear frequency or the wear frequency cannot be read normally, the wear frequency of the flash memory cannot be obtained.
Disclosure of Invention
In view of the foregoing, it is desirable to provide a method, apparatus, and storage medium for predicting the wear count of a flash memory, which can obtain the wear count of the flash memory without recording the wear count or the wear count cannot be read normally.
The first aspect of the present application provides a method for predicting the wear number of flash memories, the method comprising:
sending an operation instruction to the flash memory to control the flash memory to execute a preset operation;
acquiring the execution time of the flash memory for executing the preset operation; and
And determining the predicted wear times of the flash memory according to the execution time.
According to a specific embodiment of the first aspect of the present application, the preset operation is a programming operation.
According to a specific embodiment of the first aspect of the present application, the preset operation is an erase operation.
According to a specific embodiment of the first aspect of the present application, the preset operation includes a program operation and an erase operation; the obtaining the execution time of the flash memory to execute the preset operation includes: acquiring a first execution time of the flash memory for executing the programming operation; acquiring a second execution time of the flash memory for executing the erasing operation; the determining the wear frequency of the flash memory according to the execution time comprises the following steps: determining a first wear number of the flash memory according to the first execution time; determining a second wear number of the flash memory according to the second execution time; and determining the predicted wear number of the flash memory according to the first wear number and the second wear number.
According to a specific embodiment of the first aspect of the present application, the determining the predicted wear count of the flash memory according to the first wear count and the second wear count includes: and determining the average value of the first abrasion times and the second abrasion times as the predicted abrasion times.
According to a specific embodiment of the first aspect of the present application, the prediction method further comprises: executing a plurality of abrasion operations on the flash memory, and recording the operation time of the abrasion operations and the total abrasion times corresponding to the operation time; and obtaining the corresponding relation between the operation time and the total abrasion times; the determining the predicted wear-out times of the flash memory according to the execution time comprises: and determining the predicted wear times of the flash memory according to the corresponding relation between the execution time and the total wear times and the operation time.
According to a specific embodiment of the first aspect of the present application, the performing the wear operation on the flash memory several times includes: and performing a plurality of wear operations on the flash memory, wherein each wear operation comprises a programming operation and an erasing operation.
According to a specific embodiment of the first aspect of the present application, the prediction method further comprises: and respectively executing the abrasion operation on a plurality of flash memories, and taking the average value of the time for executing the abrasion operation of each flash memory as the operation time.
A second aspect of the present application provides a flash wear number prediction apparatus, the apparatus comprising: the method comprises a processor and a memory, wherein the memory is used for storing a plurality of program instructions, and when the processor calls the program instructions, the method for predicting the wear times of the flash memory is realized.
A third aspect of the present application provides a computer-readable storage medium storing a plurality of program instructions adapted to be loaded by a processor and to perform the flash wear count prediction method as described above.
Compared with the prior art, the application has at least the following beneficial effects:
the predicted wear times of the flash memory are determined according to the execution time of the flash memory for executing the preset operation, and the wear times of the flash memory can be obtained under the condition that the wear times are not recorded or cannot be read normally.
Drawings
Fig. 1 is a flowchart illustrating a method for predicting wear frequency of a flash memory according to an embodiment of the application.
FIG. 2 is a diagram illustrating the relationship between the erasing time and the total number of wear.
FIG. 3 is a schematic diagram showing the relationship between the programming time and the total wear time according to an embodiment of the present application.
Fig. 4 is a schematic flow chart of step S14 in fig. 1.
Fig. 5 is a schematic flow chart of step S15 in fig. 1.
Fig. 6 is a schematic block diagram of a flash wear number prediction apparatus according to an embodiment of the present application.
The application will be further described in the following detailed description in conjunction with the above-described figures.
Description of the main reference signs
Flash memory wear number prediction device 100
Processor 110
Memory 120
Computer program 121
Detailed Description
In order that the above-recited objects, features and advantages of the present application will be more clearly understood, a more particular description of the application will be rendered by reference to the appended drawings and appended detailed description. The embodiments of the present application and the features in the embodiments may be combined with each other without collision. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application, and the described embodiments are merely some, rather than all, embodiments of the present application.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and/or" as used herein includes all and any combination of one or more of the associated listed items.
In various embodiments of the present application, for convenience of description and not limitation, the term "coupled" as used in the specification and claims of the present application is not limited to physical or mechanical coupling, whether direct or indirect. "upper", "lower", "left", "right", etc. are used merely to indicate relative positional relationships, which change accordingly when the absolute position of the object to be described changes.
Referring to fig. 1, an embodiment of the present application provides a method for predicting the wear count of a flash memory, the method for predicting the wear count of the flash memory includes the following steps:
step S11, executing a plurality of abrasion operations on the flash memory, and recording the operation time of the abrasion operations and the corresponding total abrasion times.
In one possible implementation, the wear operation is performed on the flash memory several times, each including a program operation and an erase operation. I.e., one cycle of programming and erasing operations is performed as one wear on the flash memory.
In one possible implementation, the wear operation is performed on several flash memories separately, and the average of the time taken for each flash memory to perform the wear operation is taken as the final operation time. It can be appreciated that due to the variability between chips of different flash memories, by performing wear operations on as many chips as possible, the average of the time it takes for these chips to perform the wear operations is collected, which can improve the accuracy of the final data (i.e., the operation time). It will be appreciated that in this embodiment, the wear level of several flash memories should also be comparable, i.e. the flash memories have the same or similar total number of wear.
Step S12, obtaining the corresponding relation between the operation time and the total abrasion times.
In one possible implementation, according to the operation time and the total number of wearing times corresponding to the operation time recorded in step S11, a line graph can be drawn to reflect the correspondence between the operation time and the total number of wearing times.
Referring to fig. 2 and 3 together, fig. 2 is a schematic diagram showing a change relationship between the erasing time and the total number of wear. FIG. 3 shows a schematic diagram of the variation of programming time versus total wear. The horizontal axis represents the total number of wear and the vertical axis represents the erase time (see fig. 2) or the program time (see fig. 3).
It should be appreciated that the erase time or program time is exemplary herein and that there may be differences from the actual erase time or program time of the flash memory, such as differences from the actual time by one or more orders of magnitude. The values corresponding to the erase time or the program time are only used to reflect their changing relationship corresponding to the total number of wear. Taking the ordinate 110 in fig. 2 as an example, the actual erase time of the corresponding flash memory is about 10ms, and the actual program time of the corresponding flash memory is about 2.2ms. It will be appreciated that the present embodiment is not limited herein with respect to the proportional relationship between the erase time (or program time) and the actual erase (or program) time of the flash memory.
As can be seen from fig. 2, the erase time increases with the total number of wear. For example, when the total number of wearing times is 1, the erasing time corresponds to about 100, when the total number of wearing times is 800, the erasing time corresponds to about 102, when the total number of wearing times is 1600, the erasing time corresponds to about 104, when the total number of wearing times is 3000, the erasing time corresponds to about 105, when the total number of wearing times is 5000, the erasing time corresponds to about 110, and when the total number of wearing times is 7000, the erasing time corresponds to about 120.
As can be seen from fig. 3, the programming time decreases with increasing total wear. For example, when the total number of wearing times is 1, the erasing time corresponds to about 400, when the total number of wearing times is 800, the erasing time corresponds to about 396, when the total number of wearing times is 1600, the erasing time corresponds to about 390, when the total number of wearing times is 3000, the erasing time corresponds to about 380, when the total number of wearing times is 5000, the erasing time corresponds to about 370, and when the total number of wearing times is 7000, the erasing time corresponds to about 350.
It is understood that the point of the total number of wear can be adjusted as desired. The tapping may be performed at equal intervals, for example one every hundred times of wear, or at unequal intervals.
It will be appreciated that as the total number of wear increases, the flash memory generates more and more oxide traps and interface states, which results in more and more electrons remaining in the oxide, and that the flash memory additionally requires fewer electrons to reach the target voltage, so that the programming time becomes shorter as the number of wear increases. It is increasingly difficult to erase these electrons, and it takes longer to erase enough electrons to bring the voltage to the target state, so the erase time is longer and longer.
Step S13, an operation instruction is sent to the flash memory to control the flash memory to execute a preset operation.
In one possible implementation, the preset operation is one of a program operation or an erase operation. In another possible implementation, the preset operation may also include both a program operation and an erase operation.
Step S14, obtaining the execution time of the flash memory for executing the preset operation.
Specifically, when the preset operation in step 13 is one of the program operation or the erase operation, the execution time is only required to calculate the time taken for the corresponding operation. For example, when the preset operation is a program operation in step S13, the execution time is the time taken to execute one program operation. For another example, when the preset operation is the erase operation in step S13, the execution time is the time taken to execute one erase operation.
In one possible implementation, the preset operation in step S13 includes both a program operation and an erase operation. In this embodiment, in step S14, the execution time of the program operation and the execution time of the erase operation need to be acquired simultaneously.
Referring to fig. 4, a schematic sub-flow chart of step S14 in this implementation is shown.
In step S141, a first execution time of the flash memory to execute the programming operation is obtained.
In step S142, a second execution time of the flash memory for executing the erase operation is obtained.
Step S15, according to the execution time, the predicted wear number of the flash memory is determined.
Specifically, the predicted wear number of the flash memory is determined according to the execution time and the correspondence between the total number of wear obtained in step S12 and the operation time.
According to the existing corresponding relation of the operation time along with the total abrasion times, the current execution time (programming time or erasing time) is combined, and the corresponding total abrasion times can be obtained. This total number of wear can be used as the current predicted number of wear of the flash memory, i.e. the predicted number of wear. It will be appreciated that the predicted wear times can be used to predict the remaining useful life of the flash memory.
In one possible implementation, the preset operation in step S13 includes both a program operation and an erase operation, and the corresponding first operation time and second operation time can be obtained in step S14.
Referring to fig. 5, a schematic sub-flow chart of step S15 in this implementation is shown.
Step S151, determining a first wear number of the flash memory according to the first execution time.
Step S152, determining a second wear number of the flash memory according to the second execution time.
It is understood that in step S151 and step S152, the first wear count (or the second wear count) of the flash memory can be determined by the first execution time (or the second execution time) and the correspondence relationship between the total wear count obtained in step S12 and the operation time.
Step S153, according to the first abrasion times and the second abrasion times, the predicted abrasion times of the flash memory are determined.
In one possible implementation, an average of the first number of wears and the second number of wears is determined as the predicted number of wears. It can be appreciated that by calculating the first wear count and the second wear count simultaneously and taking the average of the two as the final predicted wear count, the accuracy of the final data (i.e., the predicted wear count) can be improved.
It will be appreciated that in an ideal case, the first wear count and the second wear count of the flash memory should be the same or similar. For example, when the obtained programming time is 110, the predicted wear number is 5K times according to the correspondence relationship between the programming time and the total wear number shown in fig. 2. When the obtained erase time is 370, the predicted wear count is also about 5K times according to the correspondence relationship between the erase time and the total wear count shown in fig. 3.
Referring to fig. 6, an embodiment of the present application further provides a flash wear count prediction apparatus 100, where the flash wear count prediction apparatus 100 includes a processor 110 and a memory 120, and a computer program 121 stored in the memory 120 and executable on the processor 110. The processor 110 and the memory 120 may be connected by a bus and communicate with each other. The steps in the above-described embodiment of the flash wear number prediction method are implemented when the processor 110 executes the computer program 121, for example, steps S11 to S15 shown in fig. 1, steps S141 to S142 shown in fig. 4, and steps S151 to S153 shown in fig. 5.
It will be appreciated by those skilled in the art that the schematic diagram is merely an example of the flash wear number prediction apparatus 100, and does not constitute a limitation of the flash wear number prediction apparatus 100, and may include more or fewer components than illustrated, or may combine certain components, or different components, e.g., the flash wear number prediction apparatus 100 may further include an input/output device, a network access device, a bus, etc.
The processor 110 may be a central processing module (Central Processing Unit, CPU), but may also be other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), field programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. The processor 110 may be a microprocessor or any conventional processor, etc., and the processor 110 is a control center of the flash wear number prediction device 100, and various interfaces and lines are used to connect various parts of the entire flash wear number prediction device 100.
The memory 120 may be used to store a computer program 121 and/or modules/units, and the processor 110 implements various functions of the flash wear number prediction device 100 by running or executing the computer program and/or modules/units stored in the memory 120, and invoking data stored in the memory 120. The memory 120 may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program (such as a sound playing function, an image playing function, etc.) required for at least one function, and the like; the storage data area may store data (such as audio data, phonebook, etc.) created according to the use of the flash wear number prediction apparatus 100, and the like. In addition, the memory 120 may include high-speed random access Flash memory, and may also include nonvolatile Flash memory, such as a hard disk, memory, plug-in hard disk, smart Media Card (SMC), secure Digital (SD) Card, flash Card (Flash Card), at least one disk Flash, flash device, or other volatile solid-state Flash device.
It should be understood that the embodiment of the flash wear count prediction apparatus 100 described above is merely illustrative, for example, the division of modules is merely a logical function division, and other division manners may be implemented in practice. In addition, each functional module in the embodiment of the present application may be integrated in the same processing module, or each module may exist alone physically, or two or more modules may be integrated in the same module. The integrated modules may be implemented in hardware or in hardware plus software functional modules.
The embodiment of the application also provides a computer readable storage medium. The computer readable storage medium stores program instructions that, when executed on a computing device, cause the computing device to perform the flash wear number prediction method provided in the foregoing embodiment.
Obviously, the method and the device determine the predicted wear times of the flash memory according to the execution time of the flash memory for executing the preset operation, and can obtain the wear times of the flash memory under the condition that the wear times are not recorded or cannot be read normally from the flash memory.
It will be appreciated by persons skilled in the art that the above embodiments have been provided for the purpose of illustration only and not for the purpose of limitation, and that the appropriate modifications and variations of the above embodiments should be within the spirit and scope of the application as claimed.
Claims (6)
1. A method for predicting the wear number of a flash memory, the method comprising:
sending an operation instruction to the flash memory to control the flash memory to execute a preset operation;
acquiring the execution time of the flash memory for executing the preset operation; and
Determining the predicted wear times of the flash memory according to the execution time;
the preset operation comprises programming operation and erasing operation;
the obtaining the execution time of the flash memory to execute the preset operation includes:
acquiring a first execution time of the flash memory for executing the programming operation; acquiring a second execution time of the flash memory for executing the erasing operation;
the determining the wear frequency of the flash memory according to the execution time comprises the following steps:
determining a first wear number of the flash memory according to the first execution time;
determining a second wear number of the flash memory according to the second execution time; and
And determining the average value of the first abrasion times and the second abrasion times as the predicted abrasion times.
2. The method of predicting the number of wear of a flash memory according to claim 1, wherein the predicting method further comprises:
executing a plurality of abrasion operations on the flash memory, and recording the operation time of the abrasion operations and the total abrasion times corresponding to the operation time; and
Acquiring a corresponding relation between the operation time and the total abrasion times;
the determining the predicted wear-out times of the flash memory according to the execution time comprises:
and determining the predicted wear times of the flash memory according to the corresponding relation between the execution time and the total wear times and the operation time.
3. The method of predicting a number of wear of a flash memory of claim 2, wherein performing a number of wear operations on the flash memory comprises: and performing a plurality of wear operations on the flash memory, wherein each wear operation comprises a programming operation and an erasing operation.
4. The method of predicting the number of wear of a flash memory according to claim 2, wherein the predicting method further comprises: and respectively executing the abrasion operation on a plurality of flash memories, and taking the average value of the time for executing the abrasion operation of each flash memory as the operation time.
5. A flash wear number prediction apparatus, characterized in that the flash wear number prediction apparatus includes: a processor and a memory for storing a plurality of program instructions, which when invoked by the processor, implement the flash wear count prediction method of any one of claims 1 to 4.
6. A computer readable storage medium storing a plurality of program instructions adapted to be loaded by a processor and to perform the flash wear count prediction method according to any one of claims 1 to 4.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9684463B1 (en) * | 2016-01-14 | 2017-06-20 | Lenovo Enterprise Solutions (Singapore) Pte. Ltd. | Predictive block allocation in a flash device |
| CN109637576A (en) * | 2018-12-17 | 2019-04-16 | 华中科技大学 | A kind of service life of flash memory prediction technique based on support vector regression |
| CN111078123A (en) * | 2018-10-19 | 2020-04-28 | 浙江宇视科技有限公司 | Method and device for evaluating wear degree of flash memory block |
| CN113793636A (en) * | 2021-09-10 | 2021-12-14 | 深圳大普微电子科技有限公司 | Flash memory block abrasion degree evaluation method and solid state disk |
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| US8806106B2 (en) * | 2010-11-12 | 2014-08-12 | Seagate Technology Llc | Estimating wear of non-volatile, solid state memory |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9684463B1 (en) * | 2016-01-14 | 2017-06-20 | Lenovo Enterprise Solutions (Singapore) Pte. Ltd. | Predictive block allocation in a flash device |
| CN111078123A (en) * | 2018-10-19 | 2020-04-28 | 浙江宇视科技有限公司 | Method and device for evaluating wear degree of flash memory block |
| CN109637576A (en) * | 2018-12-17 | 2019-04-16 | 华中科技大学 | A kind of service life of flash memory prediction technique based on support vector regression |
| CN113793636A (en) * | 2021-09-10 | 2021-12-14 | 深圳大普微电子科技有限公司 | Flash memory block abrasion degree evaluation method and solid state disk |
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