CN115442174A - CAN bus polarity automatic correction module and battery management system - Google Patents

CAN bus polarity automatic correction module and battery management system Download PDF

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Publication number
CN115442174A
CN115442174A CN202210857729.5A CN202210857729A CN115442174A CN 115442174 A CN115442174 A CN 115442174A CN 202210857729 A CN202210857729 A CN 202210857729A CN 115442174 A CN115442174 A CN 115442174A
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canh
canl
circuit
pull
polarity
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CN115442174B (en
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李立伟
刘含筱
李扬
张承慧
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Shandong University
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Shandong University
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
    • H01M2010/4271—Battery management systems including electronic circuits, e.g. control of current or voltage to keep battery in healthy state, cell balancing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
    • H01M2010/4278—Systems for data transfer from batteries, e.g. transfer of battery parameters to a controller, data transferred between battery controller and main controller
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L2012/40208—Bus networks characterized by the use of a particular bus standard
    • H04L2012/40215—Controller Area Network CAN
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Logic Circuits (AREA)
  • Dc Digital Transmission (AREA)

Abstract

The invention belongs to the technical field of CAN communication, and discloses a CAN bus polarity automatic correction module, which comprises: the system comprises a host bus differential voltage generating circuit and a slave polarity correction circuit; the host bus differential voltage generating circuit comprises a first power-on delay signal generating circuit, a pull-up resistor control circuit and a pull-down resistor control circuit; the slave polarity correction circuit comprises a second power-on delay signal generation circuit, a voltage comparison circuit and a polarity inversion circuit. The CAN bus polarity automatic correction module CAN automatically correct the CAN bus polarity without depending on software or only depending on hardware, and CAN quickly correct the CAN bus polarity after being electrified.

Description

CAN bus polarity automatic correction module and battery management system
Technical Field
The invention relates to the technical field of CAN communication, in particular to a CAN bus polarity automatic correction module and a battery management system.
Background
The electrochemical energy storage industry is developed rapidly at present, and the installed capacity is increased continuously, wherein the application of the lithium battery is the most extensive. As an important component of a lithium battery system, a battery management system is increasingly difficult to debug and costly to maintain. The battery management system usually adopts a master-slave scheme, one energy storage unit comprises a master machine and a plurality of slave machines, and a system topological diagram is shown in fig. 1. The host and the slave are usually communicated in real time by a CAN bus. The CAN bus consists of CANH and CANL, and a wiring error CAN cause communication failure.
A method for correcting the polarity of a CAN bus is disclosed in patent No. 200810201754.8, the CAN bus is provided with a signal transmitter for continuously transmitting data to the bus, and other CAN nodes overturn the CAN bus when the data cannot be received. In the patent No. 201710531828.3, a method for correcting the polarity of a CAN bus is disclosed, in which a CAN node performs polarity inversion on the CAN bus according to a switching time sequence determined by a unique identifier until CAN bus data are received. The methods for correcting the polarity of the CAN bus disclosed by the above patents all need software participation, and the completion speed is slow; meanwhile, the battery management system often has a plurality of sets of software such as BootLoader and application layer, and polarity correction needs to be performed again after software switching.
Therefore, how to provide a module capable of automatically correcting the polarity of the CAN bus without depending on software or only depending on hardware is a problem to be solved.
Disclosure of Invention
The embodiment of the invention provides a CAN bus polarity automatic correction module, which aims to solve the problems that methods for correcting the polarity of a CAN bus in the prior art need software participation and the completion speed is low. The following presents a simplified summary in order to provide a basic understanding of some aspects of the disclosed embodiments. This summary is not an extensive overview and is intended to neither identify key/critical elements nor delineate the scope of such embodiments. Its sole purpose is to present some concepts in a simplified form as a prelude to the more detailed description that is presented later.
According to a first aspect of the embodiments of the present invention, a CAN bus polarity automatic correction module is provided.
In one embodiment, a CAN bus polarity auto-correction module includes:
the system comprises a host bus differential voltage generating circuit and a slave polarity correcting circuit;
the host bus differential voltage generating circuit comprises a first power-on delay signal generating circuit, a pull-up resistor control circuit and a pull-down resistor control circuit; wherein the content of the first and second substances,
the pull-up resistor control circuit is used for controlling the access state of a pull-up resistor at a CANH end of the host;
the pull-down resistor control circuit is used for controlling the access state of a pull-down resistor at the CANL end of the host;
the first power-on delay signal generating circuit is used for generating a first delay signal after the module is powered on;
after the module is powered on, the pull-up resistor control circuit controls the pull-up resistor to be connected to a CANH end of the host, the pull-down resistor control circuit controls the pull-down resistor to be connected to a CANL end of the host, the delay time of the first delay signal is up, and the pull-up resistor control circuit and the pull-down resistor control circuit respectively control the pull-up resistor and the pull-down resistor to be disconnected from the CANH end and the CANL end of the host;
the slave polarity correction circuit comprises a second power-on delay signal generation circuit, a voltage comparison circuit and a polarity inversion circuit; wherein, the first and the second end of the pipe are connected with each other,
the second power-on delay signal generating circuit is used for generating a second delay signal after the module is powered on, and the delay time of the second delay signal is shorter than that of the first delay signal;
the voltage comparison circuit is used for comparing the voltage values of an INNER-CANH end and an INNER-CANL end in the slave, and the INNER-CANH end and the INNER-CANL end are respectively connected with a CAN physical layer transceiving chip of the slave;
the polarity reversing circuit is used for switching the connection relation between the INNER-CANH end and the INNER-CANL end in the slave machine and the CANH end and the CANL end of the master machine according to the output signal of the voltage comparison circuit.
Optionally, the first power-on delay signal generating circuit includes a first voltage comparator (U1), the non-inverting terminal of the first voltage comparator (U1) is connected to the rc charging circuit, the inverting terminal of the first voltage comparator (U1) is connected to the voltage stabilizing circuit, and the output terminal of the first voltage comparator (U1) is connected to the high level through a pull-up resistor.
Optionally, the pull-up resistance control circuit comprises: a first PMOS transistor (Q1);
the output signal of the first voltage comparator (U1) drives a first PMOS tube to control the access state of a CANH pull-up resistor.
Optionally, the pull-down resistance control circuit includes: a first NMOS transistor (Q2);
the output signal of the first voltage comparator (U1) drives a first NMOS tube (Q2) through an inverter circuit, and the access state of the CANL pull-down resistor is controlled.
Optionally, when the voltage comparison circuit detects that the INNER-CANH terminal level is higher than the INNER-CANL terminal level, the polarity inversion circuit maintains the connection relationship between the INNER-CANH terminal and the INNER-CANL terminal in the slave and the CANH terminal and the CANL terminal of the host at present;
when the voltage comparison circuit detects that the INNER-CANH end level is lower than the INNER-CANL end level, the polarity inversion circuit switches the connection relation between the INNER-CANH end and the INNER-CANL end in the slave machine and the host computer CANH end and the host computer CANL end.
Optionally, the polarity inversion circuit includes a T flip-flop and an analog switch; wherein the content of the first and second substances,
the analog switch is used for connecting an INNER-CANH end and an INNER-CANL end in the slave computer with a CANH end and a CANL end of the master computer, the switching of the analog switch is controlled by an output signal of the T trigger, and the output signal of the T trigger is controlled by an output signal of the voltage comparison circuit.
Optionally, the slave polarity correction circuit includes:
the voltage comparison circuit comprises a second voltage comparator, the second voltage comparator compares the voltage values of the INNER-CANH end and the INNER-CANL end in the slave, and if the level of the INNER-CANH end is higher than that of the INNER-CANL end, the second voltage comparator outputs a low level; if the level of the INNER-CANH end is lower than that of the INNER-CANL end, the second voltage comparator outputs a high level;
the T trigger is used for negating the Q end at the falling edge of the CP end when the T end is in a high level; when the T end is at low level, the Q end is kept unchanged; the state of the terminal T is determined by the comparison result of the second voltage comparator.
Optionally, the second power-on delay signal generating circuit includes a third voltage comparator, the non-inverting terminal of the third voltage comparator is connected to the rc charging circuit, the inverting terminal of the third voltage comparator is connected to the voltage stabilizing circuit, and the output terminal of the third voltage comparator is connected to the high level through a pull-up resistor; the output end of the third voltage comparator is connected with the CP end of the T trigger through an inverter.
Optionally, when the delay time of the second delay signal is up, a rising edge appears at the output end of the third voltage comparator, the rising edge is changed into a falling edge through the inverter, and the T trigger completes the correction of the CAN bus when the falling edge arrives; if the level of the INNER-CANH end is higher than that of the INNER-CANL end, the T end is low, the output of the T trigger is unchanged after the CP end falls, and the connection relations between the INNER-CANH end and the INNER-CANL end in the slave and the CANH end and the CANL end of the host are unchanged; if the INNER-CANH end level is lower than the INNER-CANL end level, the T end is high level, the output of the T trigger is reversed after the CP falls, and the connection relation between the INNER-CANH end and the INNER-CANL end in the slave machine and the CANH end and the CANL end of the host machine is reversed.
According to a second aspect of embodiments of the present invention, there is provided a battery management system.
In one embodiment, a battery management system includes the CAN bus polarity automatic correction module of any of the above embodiments.
The technical scheme provided by the embodiment of the invention has the following beneficial effects:
the module CAN automatically correct the polarity of the CAN bus without depending on software or hardware, and CAN quickly correct the polarity of the CAN bus after being electrified.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.
FIG. 1 is a schematic diagram of a CAN bus system shown in accordance with an exemplary embodiment;
FIG. 2 is a schematic diagram of a CAN bus polarity auto-correction module shown in accordance with an exemplary embodiment;
FIG. 3 is a schematic diagram of a host bus differential voltage generation circuit shown in accordance with an exemplary embodiment;
FIG. 4a is a schematic diagram illustrating a slave polarity correction circuit in accordance with an exemplary embodiment;
FIG. 4b is a schematic diagram of a slave polarity correction circuit shown in accordance with another exemplary embodiment.
Detailed Description
The following description and the drawings sufficiently illustrate specific embodiments herein to enable those skilled in the art to practice them. Portions and features of some embodiments may be included in or substituted for those of others. The scope of the embodiments herein includes the full ambit of the claims, as well as all available equivalents of the claims. The terms "first," "second," and the like, herein are used solely to distinguish one element from another without requiring or implying any actual such relationship or order between such elements. In practice, a first element can also be referred to as a second element, and vice versa. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a structure, apparatus, or device that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such structure, apparatus, or device. Without further limitation, an element defined by the phrases "comprising a," "8230," "8230," or "comprising" does not exclude the presence of other like elements in a structure, device, or apparatus that comprises the element. The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
The terms "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like herein, as used herein, are defined as orientations or positional relationships based on the orientation or positional relationship shown in the drawings, and are used for convenience in describing and simplifying the description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present invention. In the description herein, unless otherwise specified and limited, the terms "mounted," "connected," and "connected" are to be construed broadly, and may include, for example, mechanical or electrical connections, and communication between two elements, and may include direct connection and indirect connection through intervening media, where the meaning of the terms is to be understood by those skilled in the art as appropriate.
Herein, the term "plurality" means two or more, unless otherwise specified.
Herein, the character "/" indicates that the preceding and following objects are in an "or" relationship. For example, A/B represents: a or B.
Herein, the term "and/or" is an associative relation describing an object, and means that there may be three relations. E.g., a and/or B, represents: a or B, or A and B.
The embodiments and features of the embodiments of the present invention may be combined with each other without conflict.
Fig. 2 illustrates one embodiment of the CAN bus polarity auto-correction module of the present invention.
In this alternative embodiment, the CAN bus polarity auto-correction module includes: a master bus differential voltage generating circuit 100 and a slave polarity correction circuit 200; the host bus differential voltage generating circuit 100 comprises a first power-on delay signal generating circuit 101, a pull-up resistor control circuit 102 and a pull-down resistor control circuit 103; the pull-up resistor control circuit 102 is configured to control an access state of a pull-up resistor at a CANH end of the host; the pull-down resistor control circuit 103 is used for controlling the access state of a pull-down resistor at the CANL end of the host; the first power-on delay signal generating circuit 101 is used for generating a first delay signal after the CAN bus polarity automatic correction module is powered on; after the CAN bus polarity automatic correction module is powered on, the pull-up resistor control circuit 102 controls the pull-up resistor to be connected to a CANH end of the host, the pull-down resistor control circuit 103 controls the pull-down resistor to be connected to a CANL end of the host, the delay time of the first delay signal is up, and the pull-up resistor control circuit 102 and the pull-down resistor control circuit 103 respectively control the pull-up resistor and the pull-down resistor to be disconnected from the CANH end and the CANL end of the host.
The slave polarity correction circuit 200 comprises a second power-on delay signal generation circuit 201, a voltage comparison circuit 203 and a polarity inversion circuit 202; the second power-on delay signal generating circuit 201 is configured to generate a second delay signal after the CAN bus polarity auto-calibration module is powered on, where a delay time of the second delay signal is shorter than a delay time of the first delay signal; the voltage comparison circuit is used for comparing the voltage values of an INNER-CANH end and an INNER-CANL end inside the slave, and the INNER-CANH end and the INNER-CANL end are respectively connected with a CAN physical layer transceiving chip 204 of the slave; the polarity inverting circuit 202 is configured to switch connection relationships between an INNER-CANH terminal and INNER _ CANL terminals inside the slave and the CANH terminal and the CANL terminal of the master according to an output signal of the voltage comparing circuit 203.
When the voltage comparison circuit 203 detects that the INNER-CANH end level is higher than the INNER-CANL end level, it shows that the external polarity of the CAN bus is the same as the internal polarity of the slave, and the polarity inversion circuit maintains the connection relationship between the INNER-CANH end and the INNER-CANL end in the slave and the CANH end and the CANL end of the host; when the voltage comparison circuit 203 detects that the level of the INNER-CANH end is lower than that of the INNER-CANL end, which indicates that the external polarity of the CAN bus is different from the internal polarity of the slave, the polarity inversion circuit switches the connection relationship between the INNER-CANH end and the INNER-CANL end in the slave and the connection relationship between the CANH end and the CANL end of the host.
Fig. 3 illustrates one embodiment of a host bus differential voltage generation circuit.
In this embodiment, the first power-on delay signal generating circuit includes a first voltage comparator U1, the non-inverting terminal of the first voltage comparator U1 is connected to the rc charging circuit, the inverting terminal is connected to the voltage stabilizing circuit, and the output terminal is connected to the high level through a pull-up resistor.
The pull-up resistance control circuit includes: a first PMOS transistor Q1; the first voltage comparator U1 outputs a signal to drive a first PMOS tube, and the access state of a CANH pull-up resistor is controlled. The pull-down resistance control circuit includes: a first NMOS transistor Q2; the output signal of the first voltage comparator U1 passes through the inverter circuit and then drives the first NMOS tube Q2, and the access state of the CANL pull-down resistor is controlled.
Specifically, the first voltage comparator U1 is an LM311 chip, when the potential of the in-phase terminal is higher than the potential of the anti-phase terminal, a high resistance state is present between the collector and the emitter, and the EN-M node at the output terminal of the first voltage comparator U1 is connected to +5V through a pull-up resistor, and is at a high level; when the same-phase end potential is lower than the reverse-phase end potential, the collector and the emitter are in a low-resistance state, and the EN-M node is in a low level.
The non-inverting terminal of the first voltage comparator U1 is connected to a RC charging circuit consisting of R1 and C1, and the time constant of the RC charging circuit is 150ms. After the module is powered on, the voltage across the C1 starts from 0V, and slowly rises according to the rc charging curve with a time constant of 150ms, which is higher than 3.3V after 162 ms. The reverse phase end is connected with the R7 and the voltage stabilizing diode DZ1, and the voltage of the module is 3.3V after being electrified. Thus, EN-M is low upon power-up of the module and goes high 162ms later.
The EN-M drives a first PMOS (P-channel metal oxide semiconductor) tube Q1 and controls the access state of a CANH pull-up resistor R2; meanwhile, the first NMOS tube Q2 is driven through an inverter circuit consisting of the R11 and the second NMOS tube Q3, and the access state of the CANL pull-down resistor R6 is controlled. When the module is just powered on, EN-M is at a low level, Q1 and Q2 are conducted, CANH is connected into a pull-up resistor R2, and CANL is connected into a pull-down resistor R6; after the module is electrified for 162ms, EN-M is at a high level, Q1 and Q2 are cut off, and the pull-up resistor R2 and the pull-down resistor R6 are disconnected from CANH and CANL respectively.
The CAN bus requires that the two ends of the bus are respectively connected with 120 Ω matching resistors, so the equivalent resistance between CANH and CANL is 60 Ω. After a pull-up resistor R2 is connected to CANH and a pull-down resistor R6 is connected to CANL, the levels of CANH and CANL are 2.64V and 2.36V respectively, and the voltage difference is 0.28V.
Fig. 4a and 4b show a specific embodiment of the slave polarity correction circuit.
In this embodiment, the polarity inversion circuit includes a T flip-flop U5 and an analog switch U3; the analog switch U3 is used for connecting an INNER-CANH end and an INNER-CANL end in the slave computer with a CANH end and a CANL end of the host computer, the switching of the analog switch U3 is controlled by an output signal of the T trigger U5, and an output signal of the T trigger U5 is controlled by an output signal of the voltage comparison circuit.
The voltage comparison circuit comprises a second voltage comparator U4, the second voltage comparator U4 compares the voltage values of the INNER-CANH end and the INNER-CANL end in the slave, and if the level of the INNER-CANH end is higher than that of the INNER-CANL end, the second voltage comparator U4 outputs a low level; if the level of the INNER-CANH end is lower than that of the INNER-CANL end, the second voltage comparator U4 outputs high level, and the output end of the second voltage comparator U4 is connected with the T end of the T trigger.
In the T trigger U5, when the T end is in a high level, the Q end is negated when the CP end falls; when the T end is in low level, the Q end is kept unchanged; the state of the terminal T is determined by the comparison result of the second voltage comparator U4.
The second power-on delay signal generating circuit comprises a third voltage comparator U6, the non-inverting end of the third voltage comparator U6 is connected with the resistance-capacitance charging circuit, the inverting end of the third voltage comparator U6 is connected with the voltage stabilizing circuit, and the output end of the third voltage comparator U6 is connected with a high level through a pull-up resistor; the output end of the third voltage comparator U6 is connected with the end of the T trigger CP through an inverter.
When the delay time of the second delay signal is up, a rising edge appears at the output end of the third voltage comparator U6, the rising edge is changed into a falling edge through the phase inverter, and the T trigger U5 finishes the correction of the CAN bus when the falling edge arrives; if the level of the INNER-CANH end is higher than that of the INNER-CANL end, the T end is low, the output of the T trigger U5 is unchanged after the CP end falls, and the connection relations between the INNER-CANH end and the INNER-CANL end in the slave and the CANH end and the CANL end of the host are unchanged; and if the level of the INNER-CANH end is lower than that of the INNER-CANL end, the T end is high, the output of the T trigger U5 is inverted after the CP falls, and the connection relation between the INNER-CANH end and the INNER-CANL end in the slave machine and the host machine CANH end and the host machine CANL end is inverted.
Specifically, as shown in fig. 4a, the power-on delay signal time of the slave is short, and R9 is 12k, so the time constant of the rc circuit formed by R9 and C2 is 120ms. When the slave machine is electrified, the output end EN-S of the second electrifying delay signal generating circuit is at a low level; after 130ms the C2 voltage is higher than +3.3V and the EN-S signal goes high.
The analog switch U3 selects a two-way alternative analog switch to gate and correct the polarity of the CAN bus, and the gating of the analog switch U3 is controlled by the output Q of the T trigger U5. The CANH end and the CANL end are connected with a CAN bus outside the slave machine, the INNER-CANH end and the INNER _ CANL end are connected with a CAN physical layer transceiving chip in the slave machine, and the two groups of signals are connected through an analog switch and CAN switch the connection state. When Q is low level, the external polarity of the CAN is the same as the internal polarity; when Q is high, CAN external polarity is opposite to internal polarity.
The second voltage comparator U4 compares voltage values of an INNER-CANH end and an INNER-CANL end of the CAN bus in the slave, and if the level of the INNER-CANH end is higher than that of the INNER-CANL end, the second voltage comparator U4 outputs a low level; if the INNER-CANH terminal level is lower than the INNER-CANL terminal level, the second voltage comparator U4 outputs a high level.
The T flip-flop U5 may set a new state Q at the falling edge of the CP by Q × = Q xor T (xor is an exclusive-or operation), that is, when T is high, Q is inverted at the falling edge of the CP; when T is low, Q remains unchanged. The state of T is determined by the comparison result of the second voltage comparator U4. 130ms and EN-S appear after the slave is electrified, a rising edge passes through the phase inverter formed by the R12 and the third NMOS tube Q4 and becomes a falling edge, and the T trigger completes the correction function of the CAN bus when the falling edge arrives. If the INNER-CANH end level is higher than the INNER-CANL end level, T is low level, the output of the T trigger is unchanged after the CP falling edge, the polarity of the CAN bus is not changed, and the CAN bus still keeps a correct state; if the INNER-CANH end level is lower than the INNER-CANL end level, T is high level, the output of the T trigger is reversed after the CP falling edge, the polarity of the CAN bus is also reversed, and the CAN bus is changed into a correct state.
The embodiment of the invention provides a module which CAN automatically correct the polarity of a CAN bus without depending on software or hardware, and CAN quickly correct the polarity of the CAN bus after being electrified.
After the slave is powered on, the initial state of the output end Q of the T trigger is random, but the final correction result is not influenced, and the method specifically comprises the following steps:
as shown in fig. 4a, after power-on, the initial state of the T-flip-flop Q is low level, then the INNER-CANH terminal and the CANH terminal are turned on, the INNER-CANL terminal and the CANL terminal are turned on, the level of the inverting terminal of the second voltage comparator U4 is higher than the level of the non-inverting terminal of the U4, the second voltage comparator U4 outputs low level, the state of the output signal Q of the T-flip-flop is kept unchanged at low level, the analog switch is kept in the original on state, the polarity of the CAN bus is not changed, and the correct state is still kept.
As shown in fig. 4b, after power-on, the initial state of the T flip-flop Q is at a high level, then the INNER-CANH terminal and the CANL terminal are turned on, the INNER-CANL terminal and the CANH terminal are turned on, the level of the inverting terminal of the second voltage comparator U4 is lower than that of the non-inverting terminal, the second voltage comparator U4 outputs a high level, the state of the output signal Q of the T flip-flop is changed to a low level when the CP falling edge arrives, the X terminal and the X0 terminal of the analog switch are controlled to be turned on, the Y terminal and the Y0 terminal are turned on, the INNER-CANH terminal and the CANH terminal are turned on, and the polarity of the CAN bus is reversed and restored to a correct state.
In another embodiment, a battery management system is further provided, where the battery management system includes the CAN bus polarity automatic correction module described in any of the above embodiments.
The present invention is not limited to the structures that have been described above and shown in the drawings, and various modifications and changes can be made without departing from the scope thereof. The scope of the invention is limited only by the appended claims.

Claims (10)

1. A CAN bus polarity automatic correction module is characterized by comprising:
the system comprises a host bus differential voltage generating circuit and a slave polarity correcting circuit;
the host bus differential voltage generating circuit comprises a first power-on delay signal generating circuit, a pull-up resistor control circuit and a pull-down resistor control circuit; wherein the content of the first and second substances,
the pull-up resistor control circuit is used for controlling the access state of a pull-up resistor at a CANH end of the host;
the pull-down resistor control circuit is used for controlling the access state of a pull-down resistor at the CANL end of the host;
the first power-on delay signal generating circuit is used for generating a first delay signal after the module is powered on;
after the module is electrified, the pull-up resistor control circuit controls the pull-up resistor to be connected to a CANH end of the host, the pull-down resistor control circuit controls the pull-down resistor to be connected to a CANL end of the host, the delay time of the first delay signal is up, and the pull-up resistor control circuit and the pull-down resistor control circuit respectively control the pull-up resistor and the pull-down resistor to be disconnected from the CANH end and the CANL end of the host;
the slave polarity correction circuit comprises a second power-on delay signal generation circuit, a voltage comparison circuit and a polarity inversion circuit; wherein, the first and the second end of the pipe are connected with each other,
the second power-on delay signal generating circuit is used for generating a second delay signal after the module is powered on, and the delay time of the second delay signal is shorter than that of the first delay signal;
the voltage comparison circuit is used for comparing the voltage values of an INNER-CANH end and an INNER-CANL end in the slave, and the INNER-CANH end and the INNER-CANL end are respectively connected with a CAN physical layer transceiving chip of the slave;
the polarity reversing circuit is used for switching the connection relation between the INNER-CANH end and the INNER-CANL end in the slave machine and the CANH end and the CANL end of the master machine according to the output signal of the voltage comparison circuit.
2. The CAN bus polarity auto-calibration module of claim 1,
the first power-on time delay signal generating circuit comprises a first voltage comparator (U1), the in-phase end of the first voltage comparator (U1) is connected with the resistance-capacitance charging circuit, the anti-phase end of the first voltage comparator (U1) is connected with the voltage stabilizing circuit, and the output end of the first voltage comparator (U1) is connected with a high level through a pull-up resistor.
3. The CAN bus polarity automatic correction module of claim 2,
the pull-up resistance control circuit includes: a first PMOS transistor (Q1);
the output signal of the first voltage comparator (U1) drives a first PMOS tube to control the access state of a CANH pull-up resistor.
4. The CAN bus polarity auto-calibration module of claim 2,
the pull-down resistance control circuit includes: a first NMOS transistor (Q2);
the output signal of the first voltage comparator (U1) drives a first NMOS tube (Q2) through an inverter circuit, and the access state of the CANL pull-down resistor is controlled.
5. The CAN bus polarity auto-calibration module of claim 1,
when the voltage comparison circuit detects that the INNER-CANH end level is higher than the INNER-CANL end level, the polarity reversing circuit maintains the connection relation between the INNER-CANH end and the INNER-CANL end in the slave and the CANH end and the CANL end of the host at present;
when the voltage comparison circuit detects that the level of the INNER-CANH end is lower than that of the INNER-CANL end, the polarity inversion circuit switches the connection relation between the INNER-CANH end and the INNER-CANL end in the slave and the host CANH end and the host CANL end.
6. The CAN bus polarity auto-calibration module of claim 5,
the polarity reversing circuit comprises a T trigger and an analog switch; wherein, the first and the second end of the pipe are connected with each other,
the analog switch is used for connecting an INNER-CANH end and an INNER-CANL end in the slave machine with a CANH end and a CANL end of the master machine, the switching of the analog switch is controlled by an output signal of the T trigger, and the output signal of the T trigger is controlled by an output signal of the voltage comparison circuit.
7. The CAN bus polarity auto-calibration module of claim 6,
the slave polarity correction circuit includes:
the voltage comparison circuit comprises a second voltage comparator, the second voltage comparator compares the voltage values of the INNER-CANH end and the INNER-CANL end in the slave, and if the level of the INNER-CANH end is higher than that of the INNER-CANL end, the second voltage comparator outputs a low level; if the level of the INNER-CANH end is lower than that of the INNER-CANL end, the second voltage comparator outputs a high level;
the T trigger is used for negating the Q end at the falling edge of the CP end when the T end is in a high level; when the T end is at low level, the Q end is kept unchanged; the state of the terminal T is determined by the comparison result of the second voltage comparator.
8. The CAN bus polarity auto-calibration module of claim 7,
the second power-on time delay signal generating circuit comprises a third voltage comparator, the in-phase end of the third voltage comparator is connected with the resistance-capacitance charging circuit, the inverting end of the third voltage comparator is connected with the voltage stabilizing circuit, and the output end of the third voltage comparator is connected with a high level through a pull-up resistor; the output end of the third voltage comparator is connected with the CP end of the T trigger through an inverter.
9. The CAN bus polarity auto-calibration module of claim 8,
when the delay time of the second delay signal is up, a rising edge appears at the output end of the third voltage comparator, the rising edge is changed into a falling edge through the phase inverter, and the correction of the CAN bus is completed when the falling edge of the T trigger arrives; if the level of the INNER-CANH end is higher than that of the INNER-CANL end, the T end is low, the output of the T trigger is unchanged after the CP end falls, and the connection relations between the INNER-CANH end and the INNER-CANL end in the slave and the CANH end and the CANL end of the host are unchanged; and if the level of the INNER-CANH end is lower than that of the INNER-CANL end, the T end is high level, the output of the T trigger is turned over after the CP falls, and the connection relation between the INNER-CANH end and the INNER-CANL end in the slave machine and the CANH end and the CANL end of the host machine is turned over.
10. A battery management system comprising the CAN bus polarity auto-correction module of any of claims 1 to 9.
CN202210857729.5A 2022-07-20 2022-07-20 CAN bus polarity automatic correction module and battery management system Active CN115442174B (en)

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