CN116799917A

CN116799917A - Battery management device, battery pack, energy storage device and addressing method

Info

Publication number: CN116799917A
Application number: CN202310796465.1A
Authority: CN
Inventors: 连晓鹏
Original assignee: Xiamen Xinnengda Technology Co Ltd
Current assignee: Xiamen Xinnengda Technology Co Ltd
Priority date: 2023-06-30
Filing date: 2023-06-30
Publication date: 2023-09-22

Abstract

The application provides a battery management device, a battery pack, an energy storage device and an addressing method. The battery management device includes: the system comprises a controller, an addressing circuit and a power supply, wherein the addressing circuit comprises a transmitting circuit and a receiving circuit, and the power supply is electrically connected with the receiving circuit and the transmitting circuit respectively. The transmitting circuit includes a first switch and a second switch, a control end of the first switch is electrically connected with a first pin of the controller and is configured to be turned on or off in response to a level signal of the first pin, the second switch is electrically connected between a second pin of the controller and ground, the receiving circuit includes an isolation element, the isolation element is electrically connected between a power supply and ground and is electrically connected with a third pin of the controller, and the controller is configured to be addressed based on the level signal of the second pin and/or the level signal of the third pin.

Description

Battery management device, battery pack, energy storage device and addressing method

Technical Field

The application belongs to the technical field of energy storage, and particularly relates to battery management equipment, a battery pack, an energy storage device and a battery pack addressing method.

Background

In the energy storage project, more battery pack parallel operation scenes exist. At the time of parallel operation, each battery pack needs to be addressed for confirming the logical position of each battery pack to distinguish each other. The battery pack addressing scheme can realize coding through artificial operations such as PLUG or dial switch.

Disclosure of Invention

The application provides battery management equipment, a battery pack, an energy storage device and a battery pack addressing method, which are used for solving the problems of high development cost of hardware circuits, limited number of parallel operation equipment, high equipment installation and construction difficulty and the like.

In order to improve the technical problem described above, the present application provides, for this purpose, a battery management device comprising a controller, an addressing circuit and a power supply. The addressing circuit comprises a transmitting circuit and a receiving circuit, a power supply is respectively and electrically connected with the receiving circuit and the transmitting circuit, the transmitting circuit comprises a first switch and a second switch, a control end of the first switch is electrically connected with a first pin of the controller and is configured to be turned on or off in response to a level signal of the first pin, and the second switch is electrically connected between a second pin of the controller and the ground; the receiving circuit comprises an isolation element, wherein the isolation element is electrically connected between a power supply and the ground and is electrically connected with a third pin of the controller. Wherein the controller is configured to address based on the level signal of the second pin and/or the level signal of the third pin.

In some embodiments, the transmitting circuit further comprises a first resistor, the second switch, the second pin, and a first end of the first resistor are electrically connected to the first node, and a second end of the first resistor is connected to the power supply; the receiving circuit further comprises a second resistor and a third resistor, the second resistor, the isolation element and the third resistor are connected in series between the power supply and the ground, and the third pin, the isolation element and the third resistor are electrically connected to the second node. The transmitting circuit in one addressing circuit is configured to be electrically connected to the receiving circuit in the other addressing circuit.

In some embodiments, the receiving circuit further includes a fourth resistor and a first capacitor, the fourth resistor is electrically connected between the second node and the third pin, the first end of the first capacitor, the fourth resistor and the third pin are electrically connected to the third node, and the second end of the first capacitor is grounded.

In some embodiments, the spacer element includes a first end and a second end. The transmitting circuit in one addressing circuit being configured to electrically connect with the receiving circuit in the other addressing circuit comprises: the first switch, the second switch in one addressing circuit and the first end of the isolation element in the other addressing circuit are connected in series, and the second resistor, the second end of the isolation element and the third resistor are connected in series between the power supply and the ground.

In some embodiments, the first switch is one of a triode, FET, relay, or IGBT, the second switch is one of a triode, FET, relay, or IGBT, and the isolation element is a photo coupler or photo MOS relay.

In some embodiments, the battery management device further comprises a communication circuit electrically connected to the controller, the communication circuit configured to send and receive addressing messages; the controller is configured to address based on the level signal of the second pin and/or the level signal of the third pin and the received address message.

In some embodiments, the controller is configured to address the received address message based on a change state of the level signal of the second pin and/or a change state of the level signal of the third pin.

In a second aspect, the present application provides a battery pack including a battery module and a battery management device according to any one of the above embodiments.

In a third aspect, the present application provides an energy storage device comprising a plurality of battery packs according to the above embodiments.

In a fourth aspect, the present application provides a battery pack addressing method, which is applied to the energy storage device of the foregoing embodiment. The method comprises the following steps: connecting a plurality of battery packs in the energy storage device and waking up the plurality of battery packs; transmitting a control signal to the first switch, wherein at least one transmitting circuit is conducted, and at least one receiving circuit is conducted, and the control signal is used for driving the first switch to conduct; acquiring a level signal of the second pin and/or a level signal of the third pin; addressing is based on the level signal of the second pin and/or the level signal of the third pin.

The addressing circuit of the battery management equipment comprises the transmitting circuit and the receiving circuit, so that the receiving and transmitting of the electric signals can be realized, and further, a plurality of battery packs in the energy storage device are addressed by adopting the battery management equipment, and the condition that a plurality of hardware circuits are required to be designed is avoided. The power supply of the battery management equipment supplies power for the transmitting circuit and the receiving circuit, so that the arrangement quantity of battery packs in the energy storage device is not limited, and the expansibility of the energy storage device is improved. The isolation element is arranged in the receiving circuit, so that the problem that addressing cannot be completed due to the fact that the ground voltage is offset is solved.

Drawings

Features, advantages, and technical effects of exemplary embodiments of the present application will be described below with reference to the accompanying drawings.

Fig. 1 is a circuit topology of a battery management device according to an embodiment of the present application;

fig. 2 is a flowchart illustrating a battery pack addressing method according to an embodiment of the present application.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the embodiments of the technical solutions of the present application will be described in detail below with reference to the accompanying drawings. It will be apparent that the described embodiments are only some, but not all, embodiments of the application. The following examples are given by way of illustration of the technical solution of the present application, but are not intended to limit the scope of the application. Those skilled in the art will appreciate that the embodiments described below and features of the embodiments can be combined with one another without conflict.

The present inventors found that there are two schemes already existing when making a parallel operation scheme between battery packs:

scheme 1: the master battery pack (hereinafter referred to as a "master pack" for convenience of description) provides a voltage signal and outputs it to the next slave battery pack (hereinafter referred to as a "slave pack" for convenience of description), and the system is built up sequentially after passing through the diode of the slave pack to the next slave pack. Because the diode has the characteristic of fixed forward conduction voltage drop, the voltage of each slave packet is different, and the slave packet confirms the self position in the system by detecting the self voltage and addresses the self position.

Scheme 2: the master packet transmits the level signal to the slave packets, the first slave packet receives the signal and then addresses, then the master packet transmits the level signal to the second slave packet, the first slave packet receives the signal and then addresses, the process is sequentially carried out until the last slave packet finishes addressing and transmits the level signal to the master packet, and the addressing is finished.

However, in the above scheme, there are corresponding drawbacks. In scheme 1, the hardware circuits of the master packet and the slave packet are different, and two different hardware circuits need to be designed, so that the complexity of the parallel operation system circuit is increased. In addition, each time the voltage signal passes through a diode, the voltage signal has a voltage drop of 0.7V, the voltage signal can be output by a power module on a battery management system in a battery pack, and the voltage output by the power module is generally intersected, for example, 5V and 3.3V, so that the number of parallel machines is limited. As an example, for example, the voltage sent by the power module is 5V, and after seven slave packets pass, the voltage of the last slave packet is 0.1V, and the eighth access cannot be supported. It can be understood that, in the scheme 1, the battery management systems of the master packet and the slave packet are commonly used, addressing failure can be caused by voltage occurrence offset among circuits in practical application, and application scenarios are limited. In scheme 2, the battery management systems of the master packet and the slave packet share the same ground, so that addressing failure can be caused by voltage deviation among all circuits in practical application, and the application scene is limited. In addition, the hardware circuits of the master packet and the slave packet are different, and two different hardware circuits are required to be designed, so that the complexity of the parallel operation system circuit is increased. And the last slave packet needs to send a level signal to the master packet, and the last slave packet needs to be connected with the master packet through a wire harness, if the number of the slave packets is large or the size of the slave packets is large, the distance between the master packet and the slave packets can be long, and the problem that the wire harness is messy and the length is too long is caused.

In connection with fig. 1, an embodiment of the present application provides a battery management apparatus. The battery management device includes a controller (not shown), an addressing circuit, and a power supply (not shown). The addressing circuit includes a transmitting circuit and a receiving circuit, and a power supply is electrically connected to the transmitting circuit and the receiving circuit, respectively, to supply power to the transmitting circuit and the receiving circuit, respectively. The battery management device of the present application may be embodied in the form of a printed circuit board on which the controller, the addressing circuitry and the power supply are all disposed, and other electronic components such as a charge switch, a discharge switch, an analog front end, etc. may also be disposed on the battery management device.

As an example, the power supply may receive the output voltage of the battery pack and convert the output voltage, outputting a voltage of 5V and/or 3.3V at the output of the power supply. The power supply can respectively provide the required voltage for the transmitting circuit and the receiving circuit according to the actual requirements of the transmitting circuit and the receiving circuit.

In one particular embodiment, as shown in FIG. 1, the power supply outputs 3.3V and 5V voltages to power the transmit circuitry.

In some embodiments, the power supply outputs a 3.3V voltage to power the transmit circuitry.

In other embodiments, the power supply outputs a 3.3V voltage to both the receive circuit and the transmit circuit.

In other embodiments, the power supply may also output a 5V voltage to simultaneously power the receive circuit and the transmit circuit.

As shown in fig. 1, the transmitting circuit includes a first switch Q1 and a second switch Q2, where a control end of the first switch Q1 is electrically connected to a first pin mcu_a_con of the controller, and the second switch Q2 is electrically connected between a second pin mcu_a_det of the controller and ground. The first terminal of the first switch Q1 is electrically connected to a power supply, and the power supply outputs a voltage of 5V or 3.3V to the first switch Q1. The first end of the second switch Q2 is electrically connected to a power supply, and the power supply outputs a voltage of 5V or 3.3V to the second switch Q2.

In one embodiment of the present application, the power supply provides a voltage of 5V to the first switch Q1 and 3.3V to the second switch Q2.

The controller outputs a level signal through a first pin MCU_A_CON, the first switch Q1 receives the level signal output by the controller, and the first switch Q1 performs on or off actions.

As an example, the controller outputs a low level through the first pin mcu_a_con, the first switch Q1 is turned on, the controller outputs a high level through the first pin mcu_a_con, and the first switch Q1 is turned off. It will be appreciated that in other examples of the present application, the first switch Q1 may also be turned on in response to the first pin mcu_a_con outputting a high level, and the first switch Q1 may be turned off in response to the first pin mcu_a_con outputting a low level.

The first switch Q1 may be one of a transistor, a relay, a FET (Field Effect Transistor, i.e., a field effect transistor), or an IGBT (Insulated Gate Bipolar Transistor, i.e., an insulated gate bipolar transistor). The second switch Q2 may be one of a transistor, a relay, a FET (Field Effect Transistor, i.e., a field effect transistor), or an IGBT (Insulated Gate Bipolar Transistor, i.e., an insulated gate bipolar transistor).

The selection of the first switch Q1 and the second switch Q2 may be based on the power of the energy storage device applied, for example, a vehicle-mounted portable energy storage device with relatively low operating power, and the first switch Q1 and the second switch Q2 may correspond to a selection transistor, FET, etc.; the household energy storage device has relatively high operation power, and the first switch Q1 and the second switch Q2 can correspondingly select a relay.

In one embodiment, the transmitting circuit further includes a first resistor R1. The second switch Q2, the second pin mcu_a_det of the controller, and the first end of the first resistor R1 are electrically connected to the first node N1, and the second end of the first resistor R1 is connected to the power supply. The first resistor R1 is arranged between the power supply and the first node N1 to achieve the current limiting effect, and the second switch Q2 is prevented from being burnt out due to high current after the second switch Q2 is conducted.

As shown in fig. 1, the receiving circuit includes an isolation element U1, where the isolation element U1 is electrically connected between the power source and the ground, and the isolation element U1 is further electrically connected to a third pin mcu_b_det of the controller. The isolation element U1 may be a photo coupler or a photo MOS relay.

In some embodiments, as shown in fig. 1, the receiving circuit further includes a second resistor R2 and a third resistor R3, the second resistor R2, the isolation element U1 and the third resistor R3 are connected in series in sequence, and then connected between the power source and the ground, and the third pin mcu_b_det, the isolation element U1 and the third resistor R3 of the controller are electrically connected to the second node N2. The second node N2 is located between the third pin mcu_b_det of the controller and the isolation element U1.

In this embodiment, the second resistor R2 is connected in series between the power supply and the isolation element U1 to achieve the current limiting effect, so as to prevent the isolation element U1 from being burned out due to a large current after the first isolation element U1 is turned on. A third resistor R3 is added between the isolation element U1 and ground to prevent the direct grounding of the power supply after the isolation element U1 is turned on, resulting in the problem of power supply damage.

In an embodiment, as shown in fig. 1, the receiving circuit further includes a fourth resistor R4 and a first capacitor C, the fourth resistor R4 is electrically connected between the second node N2 and the third pin mcu_b_det of the controller, the first end of the first capacitor C, the fourth resistor R4 and the third pin mcu_b_det of the controller are electrically connected to the third node N3, and the second end of the first capacitor C is grounded. The third node N3 is located between the fourth resistor R4 and the third pin mcu_b_det of the controller.

In this embodiment, by disposing the fourth resistor R4 between the second node N2 and the third pin mcu_b_det of the controller, and adding the first capacitor C between the third node N3 and the fourth resistor R4 and the third pin mcu_b_det of the controller, an RC filter is added between the isolation element U1 and the controller, so as to filter the stray current transmitted to the controller, and avoid interference to the controller.

The controller is configured to address based on the level signal of the second pin MCU A DET and/or the level signal of the third pin MCU B DET.

Specifically, the controller, after detecting the level signal of its second pin mcu_a_det and/or third pin mcu_b_det, performs addressing based on the detected level signal and the pin to which the level signal corresponds. In an actual parallel operation, the transmitting circuit in one addressing circuit is configured to be electrically connected to the receiving circuit of the other addressing circuit. For example, a user needs to combine two battery packs, and the two battery packs can be connected by a wire harness to achieve communication connection and circuit connection of the two battery packs, and a transmitting circuit in one battery pack is electrically connected with a receiving circuit in the other battery pack.

In some embodiments, the isolation element U1 in the receive circuit of the addressing circuit includes a first end and a second end. The first switch Q1, the second switch Q2 in one addressing circuit and the first end of the isolation element U1 in the other addressing circuit are connected in series, and the second resistor R2, the second end of the isolation element U1 and the third resistor R3 are connected in series between the power supply and the ground.

In the actual parallel operation process, when the controller outputs a low-level signal to the first switch Q1 through the first pin mcu_a_con, the first switch Q1 is turned on, and after the first switch Q1 is turned on, the isolation element U1 of the other addressing circuit is turned on, and the second switch Q2 of the self addressing circuit is turned on, the level signal of the third pin mcu_b_det of the controller connected to the isolation element U1 is turned over, and the level signal of the second pin mcu_a_det of the controller connected to the second switch Q2 is turned over. Based on this principle, the controller can be addressed by the state of the level signal of the second pin mcu_a_det and/or the level signal of the third pin mcu_b_det of the controller.

In the actual parallel operation process, a plurality of battery packs are connected through a wire harness in sequence, a plurality of addressing circuits are electrically connected in sequence, a transmitting circuit in one battery pack is electrically connected with a receiving circuit of another battery pack, the receiving circuit of the first battery pack is not connected with the transmitting circuit, the transmitting circuit of the last battery pack is not electrically connected with the receiving circuit, and among other battery packs between the first battery pack and the last battery pack, the transmitting circuit of one battery pack is electrically connected with the receiving circuit of the adjacent battery pack.

The controller is configured to address based on the change of the level signal of the second pin mcu_a_det, when the controller of one battery pack outputs a low level to the first switch Q1 through the first pin mcu_a_con and the first switch Q1 is turned on, the second switch Q2 of the transmitting circuit of the battery pack and the isolation element U1 of the receiving circuit of the next battery pack are also turned on, at this time, the level signal of the second pin mcu_a_det of the controller of the battery pack is inverted, and if the level signal of the third pin mcu_b_det of the controller of the battery pack is not inverted, the battery pack is taken as a main pack, that is, a first battery pack.

The controller is configured to address based on a change in the level signal of the third pin mcu_b_det. When the isolation element U1 in the receiving circuit of one battery pack is turned on, the level signal of the third pin mcu_b_det of the controller of the battery pack is inverted, the controller of the battery pack outputs a low level to the first switch Q1 through the first pin mcu_a_con, and when it is detected that the level signal of the second pin of the controller of the battery pack is not inverted, the battery pack is regarded as the last one of the slave packs, that is, the last battery pack.

The controller is configured to address based on the change condition of the level signal of the second pin mcu_a_det and the level signal of the third pin mcu_b_det, and when the controller of one battery pack detects that the level signal of the second pin switch mcu_a_det is inverted and the level signal of the third pin mcu_b_det is inverted after a plurality of addressing circuits are sequentially electrically connected, the battery pack can be determined as a slave between the master pack and the last slave pack.

In one embodiment, the battery management device further includes a communication circuit electrically connected to the controller. The communication circuit is configured to transmit and receive addressing messages.

Specifically, when the battery pack is addressed, an addressing message can be obtained through the communication circuit, the addressing message comprises an addressed address, and after addressing is completed, the address is sent through the communication circuit, so that the later battery pack can obtain the addressing information of the later battery pack.

The controller is configured to address the address message received through the communication circuit based on the level signal of the second pin MCU_A_DET and/or the level signal of the third pin MCU_B_DET. In combination with the above, the present application can address the address message based on the change state of the level signal of the second pin mcu_a_det of the controller and/or the change state of the level signal of the third pin mcu_b_det of the controller.

As a specific example, when the level signal of the second pin mcu_a_det of the controller of one battery pack is inverted and the level signal of the third pin mcu_b_det is not inverted, it is determined that the battery pack is not the main pack, the controller addresses X at this time, and after addressing is completed, the addressing X is uploaded through the communication circuit.

When the level signal of the second pin MCU_A_DET of the controller of one battery pack is inverted and the level signal of the third pin MCU_B_DET is also inverted, determining that the battery pack is a slave machine, the slave machine receives an addressing message through a communication circuit, and obtaining the maximum addressing Y in the addressing message, wherein the controller of the battery pack is addressed to Y+1. After addressing is completed, the slave machine uploads addressing Y+1 through the communication circuit.

When the level signal of the third pin MCU_B_DET of the controller of one battery pack is inverted and the level signal of the second pin MCU_A_DET is not inverted, the battery pack is determined to be the last slave. And the last slave receives the addressing message through the communication circuit, acquires the maximum addressing Y in the addressing message, and the last slave controller addresses to Y+1. After addressing is completed, the last slave machine uploads addressing Y+1 through the communication circuit.

In the above embodiment, the address Y is greater than or equal to the address X.

The application provides a battery pack, which comprises a battery module and a battery management unit according to any embodiment.

The application provides an energy storage device, which comprises a plurality of battery packs of the embodiment. The plurality of battery packs in the energy storage device are connected in series and/or parallel to store electrical energy.

In some embodiments of the present application, a battery management device for a plurality of battery packs includes a communication circuit coupled to a communication bus to enable the battery management device to receive and transmit addressing messages.

The application also provides a battery pack addressing method which is applied to the energy storage device. The method comprises the following steps:

step S10, connecting a plurality of battery packs in the energy storage device and waking up the plurality of battery packs.

In this step, the battery modules in the plurality of battery packs of the energy storage device are connected by the wire harness in a parallel connection, a series connection or both of the series connection and the parallel connection, and the addressing circuits of the adjacent battery packs are electrically connected. Specifically, the transmitting circuit in the previous addressing circuit is connected to the receiving circuit of the next addressing circuit.

After the connection is completed, a plurality of battery packs are awakened. The wake-up mode can adopt modes of charge wake-up, key wake-up, communication wake-up and the like, and the application is not limited by the specific wake-up mode.

In step S20, a control signal is transmitted to the first switch, at least one transmitting circuit is turned on, and at least one receiving circuit is turned on, where the control signal is used to drive the first switch to perform conduction.

Specifically, after the battery packs are awakened, the controller in the battery management device of each battery pack sends a control signal to the first switch to control the first switch to be turned on, at this time, the transmitting circuit of the battery management device is turned on, and the receiving circuit of the next battery management device is turned on.

Step S30, the level signal of the second pin and/or the level signal of the third pin are obtained.

In this step, when the transmitting circuit of the battery management device is turned on, the level signal of the second pin of the controller changes, and when the receiving circuit is turned on, the level signal of the third pin of the controller changes. The controllers of the battery management devices of the plurality of battery packs respectively acquire the level signals of the second pins and the third pins of the battery management devices.

And step S40, addressing is performed based on the second pin level signal and/or the level signal of the third pin.

When the controller of one battery pack detects that the level signal of the second pin is overturned and the level signal of the third pin is not overturned, the battery pack is taken as a main pack, and the controller addresses the main pack as X.

When the controller of one battery pack detects that the level signal of the second pin is inverted and the level signal of the third pin is inverted, the battery pack is taken as a slave pack. And the slave packet receives an addressing message in the communication bus, acquires the maximum addressing Y in the addressing message, and the controller addresses the corresponding slave packet as Y+1.

When the controller of one battery pack detects that the level of the third pin is inverted and the level signal of the second pin is not inverted, the battery pack is taken as the last one of the slave packs. And the last slave packet receives an addressing message in the communication bus, the maximum addressing Y in the addressing message is obtained, and the controller addresses the last slave packet to be Y+1.

In some embodiments of the present application, the master and the last slave packet may be determined from the plurality of battery packets according to the second pin level signal and the third pin level signal, where other battery packets in the plurality of battery packets are slave packets.

Specifically, after the plurality of battery packs are awakened, the control of the plurality of battery management devices sends control signals to the first switch so as to drive the first switch to be conducted, and the controller of each battery pack obtains the level signals of the second pin and the third pin of each battery pack. When the controller only detects that the level signal of the second pin is overturned, the battery pack corresponding to the controller is the main pack; when the controller of the battery pack detects that the level signals of the second pin and the third pin are overturned, the battery pack corresponding to the controller is a slave pack; when the controller of the battery pack only detects that the level signal of the third pin is inverted, the battery pack corresponding to the controller is the last slave pack.

The battery management equipment is provided with the transmitting circuit and the receiving circuit, the transmitting circuit transmits the control signal, the addressing can be finished through the change condition of the level signal of the corresponding pin of the controller, the hardware circuits of the host computer and the slave computer are not required to be respectively designed, the complexity of the system is reduced, and meanwhile, the reliability of the system is improved. The isolation design is adopted among the battery management devices, so that the anti-interference capability of addressing can be effectively improved. Each battery management device is independently powered, so that the arrangement quantity of the battery management devices is not limited, and the battery management device has good expansibility. The battery management device has less external interfaces, and can be completed by fewer operations in the building process.

The present application is not limited to the above embodiments, but is capable of modification and variation in all aspects, including those of ordinary skill in the art, without departing from the spirit and scope of the present application.

Claims

1. A battery management apparatus comprising: a controller, an addressing circuit, and a power supply;

the addressing circuit comprises a transmitting circuit and a receiving circuit, and the power supply is respectively and electrically connected with the receiving circuit and the transmitting circuit;

the transmitting circuit comprises a first switch and a second switch, wherein the control end of the first switch is electrically connected with a first pin of the controller and is configured to be turned on or turned off in response to a level signal of the first pin, and the second switch is electrically connected between a second pin of the controller and ground;

the receiving circuit comprises an isolation element, wherein the isolation element is electrically connected between the power supply and the ground and is electrically connected with a third pin of the controller;

wherein the controller is configured to address based on the level signal of the second pin and/or the level signal of the third pin.

2. The battery management device of claim 1 wherein the transmit circuit further comprises a first resistor;

the second switch, the second pin and the first end of the first resistor are electrically connected to a first node, and the second end of the first resistor is connected to the power supply;

the receiving circuit further comprises a second resistor and a third resistor, the second resistor, the isolation element and the third resistor are connected in series between the power supply and the ground, and the third pin, the isolation element and the third resistor are electrically connected to a second node;

the transmitting circuit in one addressing circuit is configured to be electrically connected to the receiving circuit in the other addressing circuit.

3. The battery management device of claim 2 wherein the receive circuit further comprises a fourth resistor and a first capacitor;

the fourth resistor is electrically connected between the second node and the third pin, the first end of the first capacitor, the fourth resistor and the third pin are electrically connected to the third node, and the second end of the first capacitor is grounded.

4. A battery management device according to claim 2 or 3, wherein the isolation element comprises a first end and a second end;

the transmitting circuit in one addressing circuit being configured to electrically connect with the receiving circuit in another addressing circuit comprises: the first switch, the second switch in one addressing circuit and the first end of the isolation element in the other addressing circuit are connected in series;

the second resistor, the second end of the isolation element and the third resistor are connected in series between the power supply and ground.

5. The battery management device of claim 1 wherein the first switch is one of a transistor, FET, relay, or IGBT, the second switch is one of a transistor, FET, relay, or IGBT, and the isolation element is a photo coupler or photo MOS relay.

6. The battery management device of claim 1, wherein the device further comprises a communication circuit electrically connected to the controller;

the communication circuit is configured to send and receive addressing messages;

the controller is configured to address based on the level signal of the second pin and/or the level signal of the third pin and the received address message.

7. The battery management device of claim 6, wherein the controller is configured to address the received address message based on a change state of the level signal of the second pin and/or a change state of the level signal of the third pin.

8. A battery pack comprising a battery module and the battery management apparatus according to any one of claims 1 to 7.

9. An energy storage device comprising a plurality of battery packs as claimed in claim 8.

10. A battery pack addressing method for the energy storage device of claim 9, comprising:

connecting a plurality of battery packs in the energy storage device and waking up the plurality of battery packs;

transmitting a control signal to the first switch, wherein at least one transmitting circuit is conducted, and at least one receiving circuit is conducted, and the control signal is used for driving the first switch to conduct;

acquiring a level signal of the second pin and/or a level signal of the third pin;

addressing is based on the level signal of the second pin and/or the level signal of the third pin.