CN115441839A - Multi-band low noise amplifier, integrated circuit chip and electronic device - Google Patents
Multi-band low noise amplifier, integrated circuit chip and electronic device Download PDFInfo
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- CN115441839A CN115441839A CN202211134242.0A CN202211134242A CN115441839A CN 115441839 A CN115441839 A CN 115441839A CN 202211134242 A CN202211134242 A CN 202211134242A CN 115441839 A CN115441839 A CN 115441839A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
- H03F1/565—Modifications of input or output impedances, not otherwise provided for using inductive elements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/294—Indexing scheme relating to amplifiers the amplifier being a low noise amplifier [LNA]
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
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Abstract
The embodiment of the invention discloses a multi-band low-noise amplifier, an integrated circuit chip and electronic equipment, wherein a plurality of switch switching units are arranged in the multi-band low-noise amplifier and are respectively connected with a plurality of signal input ends in a one-to-one correspondence manner, each switch switching unit comprises a first switch and a second switch, and the first switch and the second switch are respectively connected to a bypass matching network and a common-source amplification unit, so that signals can be output from the bypass matching network or output after being amplified by the common-source amplification unit by controlling the connection and disconnection of the first switch and the second switch, a plurality of signal input ends can be used for inputting signals of a plurality of different frequency bands, and the switching of different signal input ends can be realized by the plurality of switch switching units, therefore, the multi-input multi-band function can be realized by the invention, and the plurality of signal input ends share one common-source amplification unit, and the occupied area can be greatly reduced.
Description
Technical Field
The invention relates to the technical field of electronics, in particular to a multi-band low-noise amplifier, an integrated circuit chip and electronic equipment.
Background
With the development of wireless communication technology, the current rf power amplifier usually operates in different frequency states, so that the wireless communication device supports multiple frequency bands. In order to adapt to different frequency bands, an independent power amplifier is generally designed for each frequency band in the conventional method, so that a plurality of power amplifiers are included in multi-band wireless communication equipment to support a plurality of frequency bands, and the chip area and the cost of the device are greatly increased in such a way; in addition, an input impedance matching network is designed in the conventional power amplifier, and is usually realized by adopting an inductance element, and the inductance element occupies a larger area, so that the chip area is further increased.
Disclosure of Invention
The embodiment of the invention provides a multi-band low-noise amplifier, an integrated circuit chip and electronic equipment, which can realize multi-band, reduce the chip area of a device and reduce the cost.
In order to solve the above technical problem, in a first aspect, the present invention provides a multiband low noise amplifier, including a plurality of signal input terminals, a plurality of input matching networks connected to the plurality of signal input terminals in a one-to-one correspondence, a plurality of switch switching units connected to the plurality of input matching networks in a one-to-one correspondence, a bypass matching network, a common-source stage amplifying unit, an output matching network, a resistance attenuation network, a bypass output switch, an amplification output switch, and a signal output terminal;
each switch switching unit comprises a first switch and a second switch, the common-source amplification unit comprises a first transistor, a second transistor, a first inductor, a voltage stabilizing capacitor, a choke inductor and a feedback inductor, the bypass matching network comprises a first capacitor bank, the first capacitor bank comprises a plurality of first capacitor branches connected in parallel, and each first capacitor branch comprises a first capacitor and a first capacitor switching switch which are connected;
wherein at least one of the input matching networks comprises at least one of a resistor and a capacitor; the input end of each input matching network is connected to a corresponding signal input end, the first end of the first switch and the first end of the second switch of each switch switching unit are connected to the output end of the corresponding input matching network, the second end of the first switch of each switch switching unit is connected to the first ends of the plurality of first capacitor branches connected in parallel, the second end of the second switch of each switch switching unit is connected to the first end of the first inductor, the second end of the first inductor is connected to the gate of the first transistor, the source of the first transistor is grounded through the feedback inductor, the drain of the first transistor is connected to the source of the second transistor, the gate of the second transistor is grounded through the voltage stabilizing capacitor, the drain of the second transistor is connected to the supply voltage VDD through the inductor, the input end of the output matching network is connected to the drain of the second transistor, the output end of the output matching network is connected to the input end of the resistor attenuation network through the amplifying output switch, the second ends of the plurality of first capacitor branches connected in parallel are connected to the input end of the resistor attenuation network through the bypass output switch, and the output end of the resistor attenuation network is connected to the output end of the signal attenuation network.
Further, each of the switch switching units further includes a third switch, a first end of each of the third switches is connected to the output end of the corresponding input matching network, and a second end of each of the third switches is grounded.
Further, the output matching network includes a variable capacitor;
and the first end of the variable capacitor is the input end of the output matching network and is connected with the drain electrode of the second transistor, and the second end of the variable capacitor is the output end of the output matching network and is connected with the amplification output switch.
Further, the variable capacitor includes a second capacitance group, a third capacitance group, and a fourth capacitance group;
the second capacitor bank comprises one or a plurality of second capacitor branches connected in parallel, each second capacitor branch comprises a second capacitor and a second capacitor change-over switch which are connected, the third capacitor bank comprises one or a plurality of third capacitor branches connected in parallel, each third capacitor branch comprises a third capacitor and a third capacitor change-over switch which are connected, the fourth capacitor bank comprises one or a plurality of fourth capacitor branches connected in parallel, and each fourth capacitor branch comprises a fourth capacitor and a fourth capacitor change-over switch which are connected;
the first end of the second capacitance branch is connected with the first end of the third capacitance branch to serve as the first end of the variable capacitor, the second end of the second capacitance branch is connected with the first end of the fourth capacitance branch to serve as the second end of the variable capacitor, and the second ends of the third and fourth capacitance branches are both grounded.
Further, the resistance attenuation network includes a fourth switch and a variable resistor;
the first end of the fourth switch and the first end of the variable resistor are connected to serve as the input end of the resistance attenuation network and are connected with the bypass output switch and the amplification output switch, and the second end of the fourth switch and the second end of the variable resistor are connected to serve as the output end of the resistance attenuation network and are connected with the signal output end.
Further, the variable resistor includes a first resistor group, a second resistor group, and a third resistor group;
the first resistor group comprises one or a plurality of first resistor branches connected in parallel, each first resistor branch comprises a first resistor and a first resistor change-over switch which are connected, the second resistor group comprises one or a plurality of second resistor branches connected in parallel, each second resistor branch comprises a second resistor and a second resistor change-over switch which are connected, the third resistor group comprises one or a plurality of third resistor branches connected in parallel, and each third resistor branch comprises a third resistor and a third resistor change-over switch which are connected;
the first end of the first resistance branch is connected with the first end of the second resistance branch to serve as the first end of the variable resistor, the second end of the first resistance branch is connected with the first end of the third resistance branch to serve as the second end of the variable resistor, and the second end of the second resistance branch and the second end of the third resistance branch are both grounded.
Further, the common-source stage amplifying unit further comprises a first bias resistor and a second bias resistor;
a first end of the first bias resistor is connected with a grid electrode of the first transistor, and a second end of the first bias resistor is connected with a first bias signal; the first end of the second bias resistor is connected with the grid electrode of the second transistor, and the second end of the second bias resistor is connected with a second bias signal.
In a second aspect, the invention further provides an integrated circuit chip comprising a multiband low noise amplifier as described in any of the above.
In a third aspect, the present invention further provides an electronic device including any of the multiband low noise amplifiers described above.
Has the beneficial effects that: in the multi-band low noise amplifier of the invention, a plurality of switch switching units are respectively connected with a plurality of signal input ends in a one-to-one correspondence manner, wherein each switch switching unit comprises a first switch and a second switch, the first switch and the second switch are respectively connected with a bypass matching network and a common source amplification unit, so that signals can be output from the bypass matching network or output after being amplified by the common source amplification unit by controlling the connection and disconnection of the first switch and the second switch; in addition, in the scheme, at least one input matching network comprises at least one of a resistor and a capacitor, namely the input matching network is realized by adopting a resistor or a capacitor element, and compared with an inductance mode, the area occupied by the resistor or the capacitor is smaller, thereby being beneficial to further reducing the chip area.
Drawings
The technical solution and the advantages of the present invention will be apparent from the following detailed description of the embodiments of the present invention with reference to the accompanying drawings.
FIG. 1 is a schematic structural diagram of a multiband low noise amplifier provided by an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a bypass matching network provided by an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of an output matching network according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a resistance attenuation network according to an embodiment of the present invention;
FIG. 5 is a specific circuit diagram of the multiband low noise amplifier according to the embodiment of the present invention.
Detailed Description
Referring to the drawings, wherein like reference numbers refer to like elements, the principles of the present invention are illustrated as being implemented in a suitable computing environment. The following description is based on illustrated embodiments of the invention and should not be taken as limiting the invention with regard to other embodiments that are not detailed herein.
Referring to fig. 1 and 2, in the multiband low noise amplifier 100 according to the embodiment of the present invention, the low noise amplifier 100 includes a plurality of signal input terminals RFin1 to RFinn, a plurality of input matching networks 1011 to 101n connected to the plurality of signal input terminals RFin1 to RFinn in a one-to-one correspondence, a plurality of switch switching units S1 to Sn connected to the plurality of input matching networks 1011 to 101n in a one-to-one correspondence, a bypass matching network 102, a common source amplification unit, an output matching network 103, a resistance attenuation network 104, a bypass output switch SB1, an amplification output switch SB2, and a signal output terminal RFout.
Each of the switch switching units Sn includes a first switch SA1 and a second switch SA2, and the common-source stage amplifying unit includes a first transistor M1, a second transistor M2, a first inductor LG, a voltage stabilizing capacitor CCG, a choke inductor LD, and a feedback inductor LS. The bypass matching network 102 includes a first capacitor bank including a plurality of first capacitor branches connected in parallel, and each of the first capacitor branches includes a first capacitor C11 and a first capacitor switch S11 connected to each other.
Wherein at least one of the input matching networks comprises at least one of a resistor and a capacitor. An input end of each of the input matching networks 101n is connected to a corresponding signal input end RFinn, a first end of a first switch SA1 and a first end of a second switch SA2 of each of the switch switching units Sn are connected to an output end of the corresponding input matching network 101n, a second end of the first switch SA1 of each of the switch switching units Sn is connected to a first end of the plurality of first capacitor branches in parallel, a second end of a second switch SA2 of each of the switch switching units Sn is connected to a first end of the first inductor LG, a second end of the first inductor LG is connected to a gate of the first transistor M1, a source of the first transistor M1 is connected to ground through the feedback inductor LS, a drain of the first transistor M1 is connected to a source of the second transistor M2, a gate of the second transistor M2 is connected to ground through the voltage stabilizing capacitor CCG, a drain of the second transistor M2 is connected to a supply voltage through the inductor LD, an input end of the output matching network 103 is connected to a drain of the second transistor M2, a drain of the output matching network 103 is connected to a drain of the output matching network SB2, an output end of the plurality of the output matching network SB is connected to an output end of the switch SB1, and an output attenuation resistor SB 104, and an output end of the plurality of the switch switching network SB is connected to the shunt attenuation network 104, and the output attenuation network SB2, and the attenuation network SB, and the attenuation network SB output end of the attenuation network 104 are connected to the output end of the shunt switch SB 1.
It can be understood that, in the embodiment of the present invention, the plurality of input matching networks 1011 to 101n are respectively used as input matching of the plurality of signal input terminals RFin1 to RFinn, and are used for providing matching of input impedance, each input matching network may be different from each other, and in practical application, the impedance of each input matching network may be set according to frequency bands of different input signals, so that the input impedance of the whole low noise amplifier 100 may operate in a plurality of frequency bands.
In the low noise amplifier 100 of this embodiment, by controlling the on/off of the first switch SA1 and the second switch SA2, a signal can be output from the bypass matching network 102 or output after being amplified by the common source amplification unit, and a plurality of signal input terminals RFin1 to RFinn can be input with signals of different frequency bands, and a plurality of switch switching units S1 to Sn can be used to switch different signal input terminals, for example, when a signal input terminal is required, the first switch or the second switch in the switch switching unit connected to the signal input terminal can be turned on, and the first switch and the second switch in the switch switching units connected to other signal input terminals are turned off, so that the low noise amplifier 100 can receive a signal input by one signal input terminal and perform bypass output or amplification output. In addition, in the embodiment of the present invention, at least one of the input matching networks includes at least one of a resistor and a capacitor, that is, the input matching network is implemented by using a resistor or a capacitor, and compared with an inductor, an area occupied by the resistor or the capacitor is smaller, which is beneficial to further reducing a chip area.
As shown in fig. 1, the first switch SA1 in the switch switching unit S1 corresponding to the signal input terminal RFin1 is in an open state, the second switch SA2 is in a closed state, and the first switch and the second switch in the switch switching units S2 to Sn corresponding to the other signal input terminals RFin2 to RFinn are both in an open state, and the bypass output switch SB1 is in an open state, and the amplification output switch SB2 is in a closed state, at this time, the low noise amplifier 100 is in an amplification mode, and after passing through the input matching network 1011, the signal input by the signal input terminal RFin1 is transmitted to the first inductor LG through the second switch SA2 in the switch switching unit S1, so that the signal is amplified by the common-source amplification unit and then output to the output matching network 103, and then output to the signal output terminal RFout through the resistance attenuation network 104. The input matching network, the first inductor LG and the feedback inductor LS jointly form an input-matched inductive impedance of a cascode, and the input-matched inductive impedance resonates with a gate-source parasitic capacitor of the first transistor M1.
When the first switch SA1 in the switch switching unit S1 corresponding to the signal input terminal RFin1 is in a closed state, the second switch SA2 is in an open state, the first switches and the second switches in the switch switching units S2 to Sn corresponding to the other signal input terminals RFin2 to RFinn are both in an open state, the bypass output switch SB1 is in a closed state, and the amplification output switch SB2 is in an open state, at this time, the low noise amplifier 100 is in a bypass mode, and after a signal input by the signal input terminal RFin1 passes through the input matching network 1011, the signal is transmitted to the bypass matching network 102 through the first switch SA1 in the switch switching unit S1, then is directly output to the resistance attenuation network 104, and then is output through the signal output terminal RFout.
It can be understood that, in the embodiment of the present invention, impedances of the input matching networks may be different, and in practical applications, the impedances of the input matching networks may be set according to frequency bands of different input signals, so that the input impedance of the entire low noise amplifier 100 can operate in multiple frequency bands.
Further, in the low noise amplifier 100 according to the embodiment of the present invention, each of the switch switching units Sn further includes a third switch SH, a first end of each of the third switches SH is connected to an output end of the corresponding input matching network 101n, and a second end of each of the third switches SH is grounded. When a signal input by one of the signal input terminals needs to be accessed, for example, a signal input by the signal input terminal RFin1 needs to be accessed, the third switch SH in the switch switching unit S1 is turned off, and the third switches SH in the other switch switching units S2 to Sn are turned on, so that the other signal input terminals RFin2 to RFinn are grounded through the corresponding third switches, and signal interference of the other signal input terminals RFin2 to RFinn can be further avoided.
In the embodiment of the present invention, the output matching network 103 includes a variable capacitor. A first terminal of the variable capacitor is an input terminal of the output matching network 103 and is connected to the drain of the second transistor M2, and a second terminal of the variable capacitor is an output terminal of the output matching network 103 and is connected to the amplification output switch SB 2. By providing a variable capacitor in the output matching network 103, the output impedance of the output matching network 103 can be adjusted according to the frequency band of the input signal, so that the output matching network 103 can match the input signal of different frequency bands.
Further, referring to fig. 3, the variable capacitor includes a second capacitance group 22, a third capacitance group 23, and a fourth capacitance group 24;
the second capacitor bank 22 includes one or a plurality of second capacitor branches connected in parallel, each of the second capacitor branches includes a second capacitor C22 and a second capacitor switch S22 connected to each other, the third capacitor bank 23 includes one or a plurality of third capacitor branches connected in parallel, each of the third capacitor branches includes a third capacitor C23 and a third capacitor switch S23 connected to each other, the fourth capacitor bank includes one or a plurality of fourth capacitor branches connected in parallel, and each of the fourth capacitor branches includes a fourth capacitor C24 and a fourth capacitor switch S24 connected to each other. The first end of the second capacitance branch is connected with the first end of the third capacitance branch to serve as the first end of the variable capacitor, the second end of the second capacitance branch is connected with the first end of the fourth capacitance branch to serve as the second end of the variable capacitor, and the second ends of the third and fourth capacitance branches are both grounded.
More specifically, when the second capacitor group 22 has a plurality of second capacitor branches connected in parallel, the third capacitor group 23 has a plurality of third capacitor branches connected in parallel, and the fourth capacitor group 24 has a plurality of fourth capacitor branches connected in parallel, first ends of the plurality of second capacitor branches connected in parallel are connected to first ends of the plurality of third capacitor branches connected in parallel, and the connection node serves as a first end of the variable capacitor to be connected to the drain of the second transistor M2, second ends of the plurality of second capacitor branches connected in parallel are connected to first ends of the plurality of fourth capacitor branches connected in parallel, and the connection node serves as a second end of the variable capacitor to be connected to the amplification output switch SB 2. The second ends of the plurality of third capacitor branches connected in parallel and the second ends of the plurality of fourth capacitor branches connected in parallel are both grounded.
Therefore, by controlling the on/off of the capacitance selector switch in each capacitance branch, the capacitance value of the variable capacitor can be changed, and the output impedance of the output matching network 103 can be changed. Therefore, the output impedance of the output matching network 103 can be adjusted according to the required operating frequency band.
Referring to fig. 4, in the low noise amplifier 100 according to the embodiment of the present invention, the resistance attenuation network 104 includes a fourth switch S30 and a variable resistor.
A first terminal of the fourth switch S30 and a first terminal of the variable resistor are connected to serve as an input terminal of the resistance attenuation network 104, and are connected to the bypass output switch SB1 and the amplification output switch SB2, and a second terminal of the fourth switch S30 and a second terminal of the variable resistor are connected to serve as an output terminal of the resistance attenuation network 104, and are connected to the signal output terminal RFout.
Further, the variable resistor includes a first resistor group 31, a second resistor group 32, and a third resistor group 33. The first resistor group 31 includes one or a plurality of first resistor branches connected in parallel, each of the first resistor branches includes a first resistor R31 and a first resistor switch S31 connected to each other, the second resistor group 32 includes one or a plurality of second resistor branches connected in parallel, each of the second resistor branches includes a second resistor R32 and a second resistor switch S32 connected to each other, the third resistor group 33 includes one or a plurality of third resistor branches connected in parallel, and each of the third resistor branches includes a third resistor R33 and a third resistor switch S33 connected to each other.
The first end of the first resistance branch is connected with the first end of the second resistance branch to serve as the first end of the variable resistor, the second end of the first resistance branch is connected with the first end of the third resistance branch to serve as the second end of the variable resistor, and the second end of the second resistance branch and the second end of the third resistance branch are both grounded.
More specifically, when the first resistor group 31 has a plurality of first resistor branches connected in parallel, the second resistor group 32 has a plurality of second resistor branches connected in parallel, and the third resistor group 33 has a plurality of third resistor branches connected in parallel, first ends of the plurality of first resistor branches connected in parallel are connected to first ends of the plurality of second resistor branches connected in parallel, and the connection node serves as a first end of the variable resistor to be connected to the bypass output switch SB1 and the amplification output switch SB2, second ends of the plurality of first resistor branches connected in parallel are connected to first ends of the plurality of third resistor branches connected in parallel, and the connection node serves as a second end of the variable resistor to be connected to the signal output terminal RFout. The second ends of the plurality of second resistance branches connected in parallel and the second ends of the plurality of third resistance branches connected in parallel are both grounded. Therefore, the resistance value of the variable resistor can be changed by controlling the on or off of the resistance change-over switches in the resistance branches, and different insertion losses can be obtained.
In the embodiment of the present invention, the common-source amplifier unit further includes a first bias resistor R1 and a second bias resistor R2. A first end of the first BIAS resistor R1 is connected to the gate of the first transistor M1, and a second end of the first BIAS resistor R1 is connected to a first BIAS signal BIAS1; a first end of the second BIAS resistor R2 is connected to the gate of the second transistor M2, and a second end of the second BIAS resistor R2 is connected to a second BIAS signal BIAS2.
The operation principle of the multiband low noise amplifier of the present invention will be further described with reference to the specific embodiments.
Referring to fig. 5, as shown in fig. 5, three signal input terminals RFin1 to RFin3 are taken as an example, and accordingly, there are three input matching networks and three switch switching units, wherein the three input matching networks are respectively an inductor L1, a capacitor C1 and a resistor R0, and the three switch switching units are respectively switch switching units S1 to S3. In addition, in the variable capacitor of the output matching network 103, two capacitance branches in the first capacitance group, the second capacitance group and the third capacitance group are taken as an example, that is, there are two second capacitance branches, two third capacitance branches and two fourth capacitance branches, each second capacitance branch includes a second capacitance C22 and a second capacitance switch S22 that are connected, each third capacitance branch includes a third capacitance C23 and a third capacitance switch S23 that are connected, and each fourth capacitance branch includes a fourth capacitance C24 and a fourth capacitance switch S24 that are connected. In the variable resistors of the resistance attenuation network 104, one resistance branch in each of the first resistance group, the second resistance group, and the third resistance group is taken as an example, that is, there is one resistance branch in each of the first resistance group, the second resistance group, and the third resistance group, the first resistance branch includes a first resistance R31 and a first resistance switch S31 connected to each other, the second resistance branch includes a second resistance R32 and a second resistance switch S32 connected to each other, and the third resistance branch includes a third resistance R33 and a third resistance switch S33 connected to each other. The first capacitance branches in the bypass matching network 102 are exemplified by three, and each first capacitance branch includes a first capacitance switch S11 and a first capacitance C11 connected to each other.
With continued reference to fig. 5, the inductor L1, the capacitor C1, and the resistor R0 may be used as input matching networks for different frequency bands. The three first capacitive branches collectively form a shearable capacitor, thereby forming a shearable bypass matching network 102. According to the difference of frequency bands, under the bypass mode, the input matching network and the bypass matching network 102 work together to enable the input impedance to resonate in the target working frequency band, so that the return loss is prevented from being too large. In the amplification mode, the input matching network, the feedback inductor LS, the gate-source parasitic capacitance of the first transistor M1, and the first inductor LG jointly determine the resonant frequency of the input impedance, the output resonant frequency is jointly determined by the choke inductor LD and the output matching network 103, the output resonant frequency can be made to be the same as the input resonant frequency by adjusting the capacitance switch in the output matching network 103, and at this time, the gain of the low noise amplifier 100 is the highest. The S31, S32, S33, R31, R32, and R33 form two resistive attenuation networks 104 with different insertion loss steps, so that the amplified or bypassed signal can be further attenuated or directly output.
As shown in fig. 5, the signal input by one of the signal input terminals may be selected by the switch switching unit to be output after being processed by the low noise amplifier, taking the signal input by the signal input terminal RFin1 as an example, the third switch SH of the switch switching unit S1 corresponding to the signal input terminal RFin1 is opened, and the third switches SH of the switch switching units S2 and S3 corresponding to the other signal input terminals are closed, so that the signal input terminal RFin2 and the signal input terminal RFin3 are connected to ground, thereby preventing the signals of the two signal input terminals from interfering with the signal of the signal input terminal RFin 1. In addition, the first switch SA1 and the second switch SA2 in the switch switching units S2 and S3 are both in an off state, so as to block signals of the signal input terminals RFin2 and RFin3 from entering the circuit. By controlling the on/off of the first switch SA1 and the second switch SA2 in the switch switching unit S1, the low noise amplifier 100 can operate in a bypass mode or an amplification mode, that is, the signal can be controlled to be output from the bypass matching network 102 in a through manner or output after being amplified by the common-source stage amplification unit. For example, in the amplification mode, the first switch SA1 in the switch switching unit S1 is opened, the second switch SA2 is closed, the bypass output switch SB2 is opened, the amplification output switch SB1 is closed, and the signal is amplified by the common-source amplification unit and then output to the resistance attenuation network 104 through the output matching network 103, wherein whether the amplified signal is attenuated or not can be controlled by controlling on or off of the fourth switch S30, when the fourth switch S30 of the resistance attenuation network 104 is closed, the amplified signal is not attenuated but directly transmitted to the signal output terminal RFout for output, and when the fourth switch S30 of the resistance attenuation network 104 is opened, the amplified signal is further attenuated by the variable resistor of the resistance attenuation network 104 and then output through the signal output terminal RFout.
By controlling the on/off of the first resistance switch S31, the second resistance switch S32, and the third resistance switch S33, the resistance value of the variable resistor can be changed, and the degree of signal attenuation can be changed. For example, the switches S31 and S32 may be controlled to be on and the switch S33 may be controlled to be off, or the switches S31 and S33 may be controlled to be on and the switch S32 may be controlled to be off, whereby the resistance values of two shift positions may be obtained.
It is understood that the number of the capacitive branches in the bypass matching network 102 and the output matching network 103 and the number of the resistive branches in the resistive attenuation network 104 may be set according to actual needs, which is not particularly limited.
The embodiment of the invention also provides an integrated circuit chip which comprises the multiband low-noise amplifier described in any one of the embodiments.
The embodiment of the invention also provides electronic equipment which comprises the multiband low-noise amplifier disclosed by any embodiment.
The principle and the embodiment of the present invention are explained by applying specific examples, and the above description of the embodiments is only used to help understanding the method and the core idea of the present invention; meanwhile, for those skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (9)
1. A multi-band low noise amplifier is characterized by comprising a plurality of signal input ends, a plurality of input matching networks connected with the signal input ends in a one-to-one correspondence manner, a plurality of switch switching units connected with the input matching networks in a one-to-one correspondence manner, a bypass matching network, a common source stage amplifying unit, an output matching network, a resistance attenuation network, a bypass output switch, an amplifying output switch and a signal output end;
each switch switching unit comprises a first switch and a second switch, the common-source amplification unit comprises a first transistor, a second transistor, a first inductor, a voltage-stabilizing capacitor, a choke inductor and a feedback inductor, the bypass matching network comprises a first capacitor bank, the first capacitor bank comprises a plurality of first capacitor branches connected in parallel, and each first capacitor branch comprises a first capacitor and a first capacitor switching switch which are connected;
wherein at least one of the input matching networks comprises at least one of a resistor and a capacitor; the input end of each input matching network is connected to a corresponding signal input end, the first end of the first switch and the first end of the second switch of each switch switching unit are connected to the output end of a corresponding input matching network, the second end of the first switch of each switch switching unit is connected to the first ends of the plurality of first capacitor branches in parallel, the second end of the second switch of each switch switching unit is connected to the first end of the first inductor, the second end of the first inductor is connected to the gate of the first transistor, the source of the first transistor is grounded through the feedback inductor, the drain of the first transistor is connected to the source of the second transistor, the gate of the second transistor is grounded through the voltage stabilizing capacitor, the drain of the second transistor is connected to the supply voltage VDD through the inductor, the input end of the output matching network is connected to the drain of the second transistor, the output end of the output matching network is connected to the input end of the resistor attenuation network through the amplifying output switch, the second ends of the plurality of first capacitor branches in parallel are connected to the input end of the resistor attenuation network through the bypass output switch, and the output end of the resistor attenuation network is connected to the output end of the signal attenuation network.
2. The multiband low noise amplifier of claim 1, wherein each of said switch switching units further comprises a third switch, a first terminal of each of said third switches being connected to an output terminal of a corresponding input matching network, and a second terminal of each of said third switches being grounded.
3. The multiband low noise amplifier of claim 1, wherein said output matching network comprises a variable capacitor;
the first end of the variable capacitor is the input end of the output matching network and is connected with the drain electrode of the second transistor, and the second end of the variable capacitor is the output end of the output matching network and is connected with the amplification output switch.
4. The multiband low noise amplifier of claim 3, wherein the variable capacitor comprises a second capacitor bank, a third capacitor bank, and a fourth capacitor bank;
the second capacitor bank comprises one or a plurality of second capacitor branches connected in parallel, each second capacitor branch comprises a second capacitor and a second capacitor change-over switch which are connected, the third capacitor bank comprises one or a plurality of third capacitor branches connected in parallel, each third capacitor branch comprises a third capacitor and a third capacitor change-over switch which are connected, the fourth capacitor bank comprises one or a plurality of fourth capacitor branches connected in parallel, and each fourth capacitor branch comprises a fourth capacitor and a fourth capacitor change-over switch which are connected;
the first end of the second capacitance branch is connected with the first end of the third capacitance branch to serve as the first end of the variable capacitor, the second end of the second capacitance branch is connected with the first end of the fourth capacitance branch to serve as the second end of the variable capacitor, and the second ends of the third and fourth capacitance branches are both grounded.
5. The multiband low noise amplifier of claim 1, wherein said resistive attenuation network comprises a fourth switch and a variable resistor;
the first end of the fourth switch and the first end of the variable resistor are connected to serve as the input end of the resistance attenuation network and are connected with the bypass output switch and the amplification output switch, and the second end of the fourth switch and the second end of the variable resistor are connected to serve as the output end of the resistance attenuation network and are connected with the signal output end.
6. The multiband low noise amplifier of claim 5, wherein said variable resistor comprises a first resistor group, a second resistor group, and a third resistor group;
the first resistor group comprises one or a plurality of first resistor branches connected in parallel, each first resistor branch comprises a first resistor and a first resistor change-over switch which are connected, the second resistor group comprises one or a plurality of second resistor branches connected in parallel, each second resistor branch comprises a second resistor and a second resistor change-over switch which are connected, the third resistor group comprises one or a plurality of third resistor branches connected in parallel, and each third resistor branch comprises a third resistor and a third resistor change-over switch which are connected;
the first end of the first resistance branch is connected with the first end of the second resistance branch to serve as the first end of the variable resistor, the second end of the first resistance branch is connected with the first end of the third resistance branch to serve as the second end of the variable resistor, and the second end of the second resistance branch and the second end of the third resistance branch are both grounded.
7. The multiband low noise amplifier of claim 1, wherein said common-source stage amplification unit further comprises a first bias resistor and a second bias resistor;
a first end of the first bias resistor is connected with a grid electrode of the first transistor, and a second end of the first bias resistor is connected with a first bias signal; the first end of the second bias resistor is connected with the grid electrode of the second transistor, and the second end of the second bias resistor is connected with a second bias signal.
8. An integrated circuit chip comprising the multiband low noise amplifier of any one of claims 1 to 7.
9. An electronic device comprising the multiband low noise amplifier according to any one of claims 1 to 7.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211134242.0A CN115441839A (en) | 2022-09-16 | 2022-09-16 | Multi-band low noise amplifier, integrated circuit chip and electronic device |
| PCT/CN2023/109830 WO2024055760A1 (en) | 2022-09-16 | 2023-07-28 | Multi-band low-noise amplifier, integrated circuit chip and electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211134242.0A CN115441839A (en) | 2022-09-16 | 2022-09-16 | Multi-band low noise amplifier, integrated circuit chip and electronic device |
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| Publication Number | Publication Date |
|---|---|
| CN115441839A true CN115441839A (en) | 2022-12-06 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211134242.0A Pending CN115441839A (en) | 2022-09-16 | 2022-09-16 | Multi-band low noise amplifier, integrated circuit chip and electronic device |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN115441839A (en) |
| WO (1) | WO2024055760A1 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117220639A (en) * | 2023-11-07 | 2023-12-12 | 成都明夷电子科技有限公司 | Input broadband matching circuit architecture and electronic chip applicable to wireless receiver |
| WO2024055761A1 (en) * | 2022-09-16 | 2024-03-21 | 深圳飞骧科技股份有限公司 | Multi-band low-noise amplifier and communication device |
| WO2024055760A1 (en) * | 2022-09-16 | 2024-03-21 | 深圳飞骧科技股份有限公司 | Multi-band low-noise amplifier, integrated circuit chip and electronic device |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN202617072U (en) * | 2012-05-24 | 2012-12-19 | 江南大学 | Multi-standard and multi frequency range low noise amplifier |
| GB2605112B (en) * | 2016-08-30 | 2023-01-11 | Skyworks Solutions Inc | Multi-input amplifier with programmable embedded attenuators |
| JP6968172B2 (en) * | 2016-08-31 | 2021-11-17 | スカイワークス ソリューションズ, インコーポレイテッドSkyworks Solutions, Inc. | Variable gain signal amplifier, front-end architecture and wireless devices |
| CN107332528A (en) * | 2017-08-11 | 2017-11-07 | 华中科技大学 | A kind of tunable multiple frequency section power amplifier |
| KR20190124448A (en) * | 2018-04-26 | 2019-11-05 | 삼성전기주식회사 | Low noise amplifier circuit with multi-input and output structure capable of supporting carrier aggregation |
| CN115441839A (en) * | 2022-09-16 | 2022-12-06 | 深圳飞骧科技股份有限公司 | Multi-band low noise amplifier, integrated circuit chip and electronic device |
-
2022
- 2022-09-16 CN CN202211134242.0A patent/CN115441839A/en active Pending
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2023
- 2023-07-28 WO PCT/CN2023/109830 patent/WO2024055760A1/en unknown
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024055761A1 (en) * | 2022-09-16 | 2024-03-21 | 深圳飞骧科技股份有限公司 | Multi-band low-noise amplifier and communication device |
| WO2024055760A1 (en) * | 2022-09-16 | 2024-03-21 | 深圳飞骧科技股份有限公司 | Multi-band low-noise amplifier, integrated circuit chip and electronic device |
| CN117220639A (en) * | 2023-11-07 | 2023-12-12 | 成都明夷电子科技有限公司 | Input broadband matching circuit architecture and electronic chip applicable to wireless receiver |
| CN117220639B (en) * | 2023-11-07 | 2024-03-12 | 成都明夷电子科技股份有限公司 | Input broadband matching circuit architecture and electronic chip applicable to wireless receiver |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2024055760A1 (en) | 2024-03-21 |
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