CN115440556A - Semiconductor etching device and preparation method thereof - Google Patents

Semiconductor etching device and preparation method thereof Download PDF

Info

Publication number
CN115440556A
CN115440556A CN202110608108.9A CN202110608108A CN115440556A CN 115440556 A CN115440556 A CN 115440556A CN 202110608108 A CN202110608108 A CN 202110608108A CN 115440556 A CN115440556 A CN 115440556A
Authority
CN
China
Prior art keywords
protective layer
etching
reaction chamber
wafer
chamber
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202110608108.9A
Other languages
Chinese (zh)
Inventor
杨抗
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Changxin Memory Technologies Inc
Original Assignee
Changxin Memory Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Changxin Memory Technologies Inc filed Critical Changxin Memory Technologies Inc
Priority to CN202110608108.9A priority Critical patent/CN115440556A/en
Publication of CN115440556A publication Critical patent/CN115440556A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32458Vessel
    • H01J37/32477Vessel characterised by the means for protecting vessels or internal parts, e.g. coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • H01L21/67069Apparatus for fluid treatment for etching for drying etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor etching device and a preparation method thereof. The semiconductor etching device includes: the system comprises a reaction chamber, a substrate and an etching agent, wherein the reaction chamber is used for accommodating a wafer, and the wafer is etched in the reaction chamber by the etching agent; and the protective layer covers the inner wall of the reaction chamber, the material of the protective layer comprises etching elements, and the etching elements are chemical elements used for reacting with the wafer in the etching agent. According to the invention, the probability of particle splashing of the protective layer material on the inner wall of the reaction chamber under the plasma bombardment is avoided, the particle splashing damage to the wafer is avoided, and the yield of the wafer product is improved.

Description

Semiconductor etching device and preparation method thereof
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor etching device and a preparation method thereof.
Background
In a manufacturing process of a semiconductor device such as a Dynamic Random Access Memory (DRAM), etching is a crucial step. The existing Etching process mainly comprises a Wet Etching method (Wet Etching) and a Dry Etching method (Dry Etching). Dry etching generally refers to an etching technique for performing Pattern Transfer (Pattern Transfer) by generating plasma containing charged particles such as ions and electrons, and neutral atoms, molecules, and radicals having high chemical activity by Glow Discharge (Glow Discharge) method.
However, the inner wall material of the reaction chamber for accommodating the wafer in the conventional semiconductor etching device has a weak anti-bombardment performance, and under the bombardment of plasma in the dry etching process, particles of the inner wall material of the reaction chamber are bombed out to cause splashing of the particles in the reaction chamber, so that the quality of semiconductor products is affected, the yield of the semiconductor products is reduced, and even the semiconductor products are scrapped in severe cases.
Therefore, how to reduce the splashing of the material particles on the inner wall of the reaction chamber in the dry etching process and ensure the quality and yield of the semiconductor product is a technical problem to be solved at present.
Disclosure of Invention
The invention provides a semiconductor etching device and a preparation method thereof, which are used for solving the problem that material particles on the inner wall of a reaction chamber are easy to splash in a dry etching process in the prior art so as to ensure the quality and yield of semiconductor products.
In order to solve the above problems, the present invention provides a semiconductor etching apparatus comprising:
the system comprises a reaction chamber, a wafer, an etching agent and a control unit, wherein the reaction chamber is used for accommodating the wafer, and the wafer is etched in the reaction chamber by the etching agent;
and the protective layer covers the inner wall of the reaction chamber, the material of the protective layer comprises etching elements, and the etching elements are chemical elements used for reacting with the wafer in the etching agent.
Optionally, the etchant includes fluorocarbon, and the etching element is fluorine.
Optionally, the etchant further comprises oxygen.
Optionally, the material of the protective layer further includes oxygen, and the mole percentage of the oxygen is smaller than that of the fluorine.
Optionally, the material of the protective layer comprises yttrium oxyfluoride and yttrium fluoride.
Optionally, the molar ratio of yttrium oxyfluoride to yttrium fluoride in the protective layer is 1.
Optionally, the yttrium oxyfluoride and the yttrium fluoride in the protective layer are uniformly mixed.
Optionally, the thickness of the protective layer is 3mm to 5mm.
In order to solve the above problems, the present invention further provides a method for manufacturing a semiconductor etching apparatus, comprising the steps of:
providing a plurality of chamber components;
forming a protective layer on the surface of the chamber component, wherein the material of the protective layer comprises etching elements;
and forming a reaction chamber by a plurality of chamber parts with the protective layers, so that the protective layers are positioned on the inner walls of the reaction chamber, wherein the reaction chamber is used for etching the wafer positioned in the reaction chamber through an etchant, and the etching elements are chemical elements in the etchant for reacting with the wafer.
Optionally, before forming the protective layer on the surface of the chamber component, the method further includes the following steps:
planarizing the chamber component surface;
cleaning and drying the chamber components.
Optionally, the etchant includes fluorocarbon, and the etching element is fluorine.
Optionally, the etchant further comprises oxygen.
Optionally, the material of the protective layer further includes oxygen, and the mole percentage of the oxygen is smaller than that of the fluorine.
Optionally, the material of the protective layer comprises yttrium oxyfluoride and yttrium fluoride.
Optionally, the specific step of forming the protective layer on the surface of the chamber component includes:
melting yttrium oxyfluoride and yttrium fluoride to form a spray material;
and spraying the spraying material to the surface of the chamber component to form the protective layer.
Optionally, the specific steps of melting yttrium oxyfluoride and yttrium fluoride include:
said yttrium oxyfluoride and yttrium fluoride in a melt molar ratio of 1.
Optionally, the specific step of forming the protective layer includes:
spraying the spraying material to the surface of the chamber component to form a protective layer;
and cleaning the protective layer.
Optionally, the thickness of the protective layer is 3mm to 5mm.
According to the semiconductor etching device and the preparation method thereof, the protective layer is formed on the inner wall of the reaction chamber, the material of the protective layer comprises the etching element, and the etching element is an element which is chemically reacted with the wafer in the reaction chamber in the etching agent, so that a product generated after the etching agent is reacted with the material of the protective layer in the etching process can be stably attached to the surface of the inner wall of the reaction chamber, the bombardment resistance of the protective layer is improved, the probability of particle splashing of the material of the protective layer under plasma bombardment is reduced, the damage of the wafer caused by the particle splashing is avoided, and the yield of wafer products is improved.
Drawings
FIG. 1 is a schematic structural diagram of a semiconductor etching apparatus according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of the reaction of an etchant with a protective layer in an embodiment of the invention;
FIGS. 3A-3B are schematic diagrams illustrating changes in the protective layer during the etching process according to embodiments of the present invention;
FIG. 4 is a flow chart of a method for manufacturing a semiconductor etching apparatus according to an embodiment of the present invention;
figure 5 is a schematic view of a chamber component being painted according to an embodiment of the present invention.
Detailed Description
The following describes in detail a semiconductor etching apparatus and a method for manufacturing the same according to embodiments of the present invention with reference to the accompanying drawings.
The present embodiment provides a semiconductor etching apparatus, and fig. 1 is a schematic structural diagram of the semiconductor etching apparatus according to the present embodiment. As shown in fig. 1, the semiconductor etching apparatus according to the present embodiment includes:
the wafer etching device comprises a reaction chamber 10 for accommodating a wafer 11, wherein an etchant etches the wafer 11 in the reaction chamber 10;
and the protective layer 12 covers the inner wall of the reaction chamber 10, and the material of the protective layer 12 includes an etching element, which is a chemical element in the etchant for reacting with the wafer 11.
Specifically, the reaction chamber 10 is a chamber for performing a dry etching process on the wafer 11. In the dry etching process, the etchant from the outside reacts with the wafer 11 after being converted into plasma, so as to form a semiconductor pattern on the wafer 11.
The reaction chamber 10 is formed by being surrounded by a housing of the semiconductor etching apparatus. The protective layer 12 is disposed on an inner wall of the reaction chamber 10, and is used for preventing plasma in a dry etching process from damaging a housing of the semiconductor etching apparatus, so as to improve the service life of the semiconductor etching apparatus. In the embodiment, the material of the protection layer 12 is set to include an etching element, where the etching element is a chemical element in the etchant, which is used for reacting with the wafer 11, so that a product of the reaction between the plasma-formed etchant and the protection layer 12 is close to the material of the protection layer 12, and thus the surface of the protection layer 12 can be stably adsorbed. The strong adsorption force makes the surface texture of the composition formed by the protective layer 12 and the product hard and flat, improves the resistance to plasma bombardment, reduces particles sputtered in situ from the surface of the protective layer 12, avoids the damage of particles to the wafer 11, and improves the yield of the wafer 11.
Optionally, the etchant includes fluorocarbon, and the etching element is fluorine.
Wherein the fluorocarbon may be but is not limited to CF 4 . For example, CF 4 When the silicon dioxide dielectric layer in the wafer 11 is etched, CF 4 Generating fluorine free radicals under the action of radio frequency power, and realizing the etching of the silicon dioxide dielectric layer through the reaction of the fluorine free radicals and silicon dioxide. Thus, CF 4 The etching element in (1) is fluorine element.
Optionally, the etchant further comprises oxygen.
With the etchant comprising CF 4 And oxygen (O) 2 ) For example. Oxygen for adjusting CF 4 And etching the etching rate of the silicon dioxide dielectric layer.
Optionally, the material of the protective layer 12 further includes oxygen, and the mole percentage of the oxygen is smaller than that of the fluorine.
Optionally, the material of the protective layer 12 includes yttrium oxyfluoride and yttrium fluoride.
Hereinafter, the material of the protective layer 12 includes Yttrium Oxyfluoride (YOF) and Yttrium Fluoride (YF), and the etchant includes CF 4 And O 2 The precursor gas comprises CH 4 The description is given for the sake of example. Fig. 2 is a schematic diagram of the reaction of the etchant and the protective layer in the embodiment of the present invention, and fig. 3A-3B are schematic diagrams of the changes in the etching process of the protective layer in the embodiment of the present invention. The protective layer 12 comprising yttrium oxyfluoride and yttrium fluoride in this embodiment is light gray. CF in the etchant 4 Generating fluorine free radicals under the action of radio frequency power, and carrying out fluorination reaction on the protective layer 12 and the fluorine free radicals to generate yttrium fluoride. The generated yttrium fluoride is the same as the original yttrium fluoride material in the protective layer 12, and thus can be stably adsorbed on the surface of the protective layer 12. Precursor gas CH 4 Hydrogen radicals are generated under the action of radio frequency power. Yttrium fluoride produced by the fluorination reaction of fluorine radicals produces a large amount of yttrium oxyfluoride by the reduction of hydrogen radicals and the oxidation of oxygen. The yttrium oxyfluoride produced is the same as the original yttrium oxyfluoride material in the protective layer 12, and therefore, the protective layer 12 has extremely strong adsorbability to the yttrium oxyfluoride produced by hydrogen radical reduction and oxygen oxidation, so that a composition comprising the yttrium oxyfluoride produced by hydrogen radical reduction and oxygen oxidation and the protective layer 12 has hardness and flatnessThe surface of the metal, and the resistance to plasma bombardment is enhanced, as shown in FIG. 3A. Uneven portions where sputtering may occur are indicated within the dotted circle in fig. 3A. Under the plasma bombardment of the dry etching process, only a small amount of particles, or no particles at all, are sputtered from the surface of the composition, as shown in fig. 3B. The dashed circles in FIG. 2 indicate particles sputtered from the surface of the composition, which may be yttrium fluoride or yttrium oxyfluoride.
In the embodiment, the material of the protective layer 12 includes etching elements, so that the adsorptive capacity of the protective layer 12 to a product generated by a reaction between an etchant and the protective layer 12 in a dry etching process can be enhanced, the density of a composition formed by the protective layer 12 and the product can be enhanced, the overall thickness of the composition can be reduced on the premise that the total amount of the product is not changed, and the influence on the etching of the wafer 11 can be further reduced.
Optionally, the molar ratio of yttrium oxyfluoride to yttrium fluoride in the protective layer 12 is 1.
Optionally, the yttrium oxyfluoride and the yttrium fluoride in the protective layer 12 are uniformly mixed.
Specifically, the yttrium oxyfluoride and the yttrium fluoride in the protective layer 12 are uniformly mixed, so that the yttrium oxyfluoride and the yttrium fluoride are uniformly exposed on the surface of the protective layer 12, and the adsorption force of the protective layer 12 on a product generated by a reaction of an etchant and the protective layer 12 in a dry etching process and the overall distribution uniformity of a composition consisting of the protective layer 12 and the product are further improved, and the flatness of the surface of the composition is further improved.
Optionally, the thickness of the protective layer 12 is 3mm to 5mm.
Moreover, the present embodiment further provides a method for manufacturing a semiconductor etching apparatus. Fig. 4 is a flow chart of a method for manufacturing a semiconductor etching apparatus according to an embodiment of the present invention, and fig. 5 is a schematic view of a chamber component being sprayed according to an embodiment of the present invention. The structure of the semiconductor etching apparatus manufactured in this embodiment may be as shown in fig. 1 to 2 and fig. 3A to 3B. As shown in fig. 1-2, 3A-3B, and 4-5, the method for manufacturing a semiconductor etching apparatus includes the following steps:
step S41, providing a plurality of chamber parts 53;
step S42, forming a protective layer 12 on the surface of the chamber component 53, wherein the material of the protective layer 12 comprises etching elements;
step S43, forming the reaction chamber 10 by a plurality of chamber components 53 having the protection layer 12, so that the protection layer 12 is located on an inner wall of the reaction chamber 10, where the reaction chamber 10 is used to etch the wafer 11 located in the reaction chamber 10 by an etchant, and the etching element is a chemical element in the etchant, which is used to react with the wafer 11.
Optionally, before forming the protective layer 12 on the surface of the chamber component 53, the method further includes the following steps:
planarizing the surface of the chamber member 53;
the chamber part 53 is cleaned and dried.
Specifically, the chamber members 53 are used to form the reaction chamber 10 around the reaction chamber 10, and the reaction chamber 10 is used to accommodate the wafer 11. The reaction chamber 10 is a chamber for performing a dry etching process on the wafer 11. In the dry etching process, the etchant from the outside reacts with the wafer 11 after being converted into plasma, and a semiconductor pattern is formed on the wafer 11. Before the protective layer 12 is formed on the chamber component 53, the chamber component after grinding and polishing may be subjected to ultrasonic cleaning and pure nitrogen drying to remove impurities and moisture on the surface of the chamber component 53, so as to avoid introducing impurities into the protective layer 12 formed subsequently.
Thereafter, the chamber part 53 after being cleaned and dried is vertically fixed on a fixing base in a spray chamber of the vacuum thermal spray apparatus by a jig. The fixed base can drive the chamber component 53 to rotate 360 degrees on a vertical plane under the driving of the servo motor. The fixed base and the clamp may be made of a flexible semiconductor material to avoid scratching the chamber part 53. As shown in fig. 5, the spray chamber of the vacuum thermal spray apparatus includes a thermal spray material generating chamber 50 (including a high temperature and high voltage arc generating structure and a high pressure pure nitrogen gas introducing structure), a spray material transporting deflector 51, and a spray chamber 52, and the chamber member 53 is placed inside the spray chamber 52.
Optionally, the etchant includes fluorocarbon, and the etching element is fluorine.
Optionally, the etchant further comprises oxygen.
Optionally, the material of the protective layer 12 further includes oxygen, and the mole percentage of the oxygen is smaller than that of the fluorine.
Optionally, the material of the protective layer 12 includes yttrium oxyfluoride and yttrium fluoride.
Optionally, the specific step of forming the protective layer 12 on the surface of the chamber component 53 includes:
melting yttrium oxyfluoride and yttrium fluoride to form a spray material;
and spraying the spraying material on the surface of the chamber component 53 to form the protective layer 12.
Optionally, the specific steps of melting yttrium oxyfluoride and yttrium fluoride include:
said yttrium oxyfluoride and yttrium fluoride in a melt molar ratio of 1.
Optionally, the specific step of forming the protective layer 12 includes:
spraying the spraying material to the surface of the chamber component 53 to form a protective layer 12;
the protective layer 12 is cleaned.
The following description will be given taking as an example that the material of the protective layer 12 includes Yttrium Oxyfluoride (YOF) and Yttrium Fluoride (YF). Industrial high-purity yttrium oxyfluoride and yttrium fluoride at a molar ratio of 1 -4 The vacuum degree is above, and the temperature is preheated to 500 ℃. Then, a high-temperature high-voltage arc (temperature should be in the range of 50 deg.C) is started in the thermal spray material generation chamber 50Above 1000 deg.c) to fully and thoroughly mix and melt industrial high-purity yttrium oxyfluoride and yttrium fluoride to form a thermal spraying material. After, open simultaneously spray material transport divertor 51 with in the spray booth 52 unable adjustment base makes unable adjustment base evenly rotates in the vertical plane, and to the hot spraying material generates 50 letting in pressure and is 50Pa, the pure nitrogen gas that the velocity of flow is 500sccm of room, makes under the molten condition the even spraying deposition of hot spraying material is in chamber part 53 surface forms protective layer 12. After the predetermined spraying time and/or deposition thickness is reached, the high-temperature high-voltage arc is stopped, the introduction of pure nitrogen gas is stopped, and the spray material conveyor 51 is closed. And after the spraying chamber is cooled to normal temperature, starting a pickling device, cleaning and improving the thickness and the flatness of the protective layer 12 deposited on the surface of the chamber component 53, and calibrating the thickness of the protective layer 12 to the required thickness. The steps of melt spraying and acid washing can be repeated as many times as necessary by those skilled in the art to achieve the desired thickness of the protective layer 12.
Optionally, the thickness of the protective layer 12 is 3mm to 5mm.
According to the semiconductor etching device and the preparation method thereof provided by the specific embodiment, the protective layer is formed on the inner wall of the reaction chamber, the material of the protective layer comprises the etching element, and the etching element is an element in the etching agent which chemically reacts with the wafer in the reaction chamber, so that a product generated after the etching agent reacts with the material of the protective layer in the etching process can be stably attached to the surface of the inner wall of the reaction chamber, the bombardment resistance of the protective layer is improved, the probability of particle splashing of the material of the protective layer under plasma bombardment is reduced, the particle splashing damage to the wafer is avoided, and the yield of wafer products is improved.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.

Claims (18)

1. A semiconductor etching apparatus, comprising:
the system comprises a reaction chamber, a wafer, an etching agent and a control unit, wherein the reaction chamber is used for accommodating the wafer, and the wafer is etched in the reaction chamber by the etching agent; and the protective layer covers the inner wall of the reaction chamber, the material of the protective layer comprises etching elements, and the etching elements are chemical elements used for reacting with the wafer in the etching agent.
2. The semiconductor etching apparatus according to claim 1, wherein the etchant includes a fluorocarbon, and the etching element is fluorine.
3. The semiconductor etching apparatus according to claim 2, wherein the etchant further comprises oxygen.
4. The semiconductor etching apparatus according to claim 3, wherein a material of the protective layer further includes an oxygen element, and a mole percentage of the oxygen element is smaller than a mole percentage of the fluorine element.
5. The semiconductor etching apparatus according to claim 4, wherein a material of the protective layer comprises yttrium oxyfluoride and yttrium fluoride.
6. The semiconductor etching apparatus according to claim 5, wherein the molar ratio of yttrium oxyfluoride to yttrium fluoride in the protective layer is 1.
7. The semiconductor etching apparatus according to claim 5, wherein the yttrium oxyfluoride and the yttrium fluoride in the protective layer are uniformly mixed.
8. The semiconductor etching apparatus according to claim 1, wherein the protective layer has a thickness of 3mm to 5mm.
9. A preparation method of a semiconductor etching device is characterized by comprising the following steps:
providing a plurality of chamber components;
forming a protective layer on the surface of the chamber component, wherein the material of the protective layer comprises etching elements;
forming a reaction chamber by a plurality of chamber components with the protective layer, enabling the protective layer to be located on the inner wall of the reaction chamber, etching the wafer located in the reaction chamber through an etchant by the reaction chamber, wherein the etching element is a chemical element used for reacting with the wafer in the etchant.
10. The method of claim 9, wherein before forming the protective layer on the surface of the chamber component, the method further comprises:
planarizing the chamber component surface;
cleaning and drying the chamber components.
11. The method of manufacturing a semiconductor etching apparatus according to claim 9, wherein the etchant includes a fluorocarbon, and the etching element is fluorine.
12. The method of manufacturing a semiconductor etching apparatus according to claim 11, wherein the etchant further includes oxygen.
13. The method of manufacturing a semiconductor etching apparatus according to claim 12, wherein a material of the protective layer further includes an oxygen element, and a mole percentage of the oxygen element is smaller than a mole percentage of the fluorine element.
14. The method of manufacturing a semiconductor etching apparatus according to claim 13, wherein a material of the protective layer includes yttrium oxyfluoride and yttrium fluoride.
15. The method of claim 14, wherein the step of forming a protective layer on the surface of the chamber component comprises:
melting yttrium oxyfluoride and yttrium fluoride to form a spray material;
and spraying the spraying material to the surface of the chamber component to form the protective layer.
16. The method of claim 15, wherein the step of melting yttrium oxyfluoride and yttrium fluoride comprises:
the yttrium oxyfluoride and yttrium fluoride are melted in a molar ratio of 1.
17. The method for manufacturing a semiconductor etching apparatus according to claim 15, wherein the step of forming the protective layer comprises:
spraying the spraying material to the surface of the chamber component to form a protective layer;
and cleaning the protective layer.
18. The manufacturing method of a semiconductor etching device according to claim 9, wherein the thickness of the protective layer is 3mm to 5mm.
CN202110608108.9A 2021-06-01 2021-06-01 Semiconductor etching device and preparation method thereof Pending CN115440556A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110608108.9A CN115440556A (en) 2021-06-01 2021-06-01 Semiconductor etching device and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110608108.9A CN115440556A (en) 2021-06-01 2021-06-01 Semiconductor etching device and preparation method thereof

Publications (1)

Publication Number Publication Date
CN115440556A true CN115440556A (en) 2022-12-06

Family

ID=84240205

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110608108.9A Pending CN115440556A (en) 2021-06-01 2021-06-01 Semiconductor etching device and preparation method thereof

Country Status (1)

Country Link
CN (1) CN115440556A (en)

Similar Documents

Publication Publication Date Title
JP6737899B2 (en) Plasma processing process for improving in-situ chamber cleaning efficiency in plasma processing chamber
KR101083148B1 (en) Plasma etching method, plasma etching apparatus, and storage medium
US5494713A (en) Method for treating surface of aluminum material and plasma treating apparatus
CN104882360B (en) Cleaning method of plasma processing apparatus
US10217643B2 (en) Method of processing target object
JP2013258408A (en) Method and apparatus for trench and via profile modification
JPH0653193A (en) Removal of carbon-based polymer residue by using ozone useful for cleaning of plasma reaction container
US20050155625A1 (en) Chamber cleaning method
JP5181085B2 (en) Processing apparatus and processing method
KR20070081749A (en) Method for cleaning substrate processing chamber, storage medium and substrate processing chamber
JP2005303255A (en) Low-reflectance processing method of silicon substrate for solar cells
JP2016086046A (en) Plasma processing method
JP5704192B2 (en) Plasma etching method, plasma etching apparatus, and storage medium
JP2004172333A (en) Plasma treatment method and device thereof
CN115440556A (en) Semiconductor etching device and preparation method thereof
JPH07147273A (en) Etching treatment
CN117813670A (en) Advanced barrier nickel oxide (BNiO) coating formation for process chamber components
JP4299638B2 (en) Substrate processing apparatus and substrate processing method
US9721766B2 (en) Method for processing target object
US11613808B2 (en) Clean processes for boron carbon film deposition
US6626187B2 (en) Method of reconditioning reaction chamber
CN117936351A (en) Semiconductor process method and device
KR20010097410A (en) Method of treating solid surface, substrate and semiconductor manufacturing apparatus, and manufacturing method of semiconductor device using the same
WO2023172362A1 (en) Advanced barrier nickel oxide (bnio) coating development for process chamber components via ozone treatment
KR101397413B1 (en) Method of etching a wafer using a plasma etching equipment

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination