CN115436824A

CN115436824A - Super capacitor test method and device, electronic equipment and storage medium

Info

Publication number: CN115436824A
Application number: CN202211388636.9A
Authority: CN
Inventors: 张松涛
Original assignee: Suzhou Inspur Intelligent Technology Co Ltd
Current assignee: Suzhou Inspur Intelligent Technology Co Ltd
Priority date: 2022-11-08
Filing date: 2022-11-08
Publication date: 2022-12-06
Anticipated expiration: 2042-11-08
Also published as: CN115436824B

Abstract

The application discloses a super capacitor testing method and device, electronic equipment and a storage medium, and relates to the technical field of automatic testing. The method comprises the following steps: identifying a super capacitor battery pack through a detection circuit, wherein the super capacitor battery pack comprises a first super capacitor and a second super capacitor, and the first super capacitor is connected with the second super capacitor in series; setting charging parameters corresponding to the super capacitor battery pack through a charging circuit, charging the super capacitor battery pack and starting timing; stopping timing of the end of charging in response to the detection that the voltage of the super capacitor battery pack exceeds a first preset threshold value, and judging whether the timing of charging exceeds a second preset threshold value or not; and if the charging timing exceeds a second preset threshold, performing voltage balance function test on the first super capacitor and the second super capacitor, and outputting a test result. The test efficiency and the test accuracy of the performance test of the super-capacitor battery pack can be improved.

Description

Super capacitor test method and device, electronic equipment and storage medium

Technical Field

The present disclosure relates to the field of automated testing technologies, and in particular, to a method and an apparatus for testing a super capacitor, an electronic device, and a storage medium.

Background

At present, with the explosive increase of the number of mobile terminals, electric bicycles, electric automobiles and other devices, the demand of batteries is also increasing. The super capacitor can be used for removing the existing lithium battery with fire heat, and still occupies a place in certain specific scenes by virtue of the advantages of good low-temperature performance, quick charge and discharge and the like. In practical application, the server often adopts a super capacitor to deal with the situation of sudden power failure, and important data can be stored to avoid loss. At present, a super capacitor is often used as a standby power supply of a RAID (Redundant Arrays of Independent Disks) card, when a server is abnormally powered off, the standby power supply supports the RAID card to store read and write data, and when the server is powered on next time, the RAID card can be restored, so that loss of important data is avoided.

In the production process of the super capacitor battery pack, the performance test of the battery pack is the key for ensuring the quality of the capacitor. In the prior art, a test of a battery pack for producing a super capacitor is carried out according to an actual use scene, the super capacitor is installed in a server whole system, after the server is started and powered on, the super capacitor is charged, a data reading and writing program of service is operated for a certain time, the whole system simulates abnormal power failure and cuts off an alternating current power supply, and the discharge of the super capacitor supports an RAID card to store important data. And after the power is electrified again, whether the data are normal or not is determined, and whether the super capacitor works normally or not in the process is determined.

The prior art scheme is applied to practical application scenes and has the following defects:

1. when the server is powered on, data is read and written, and power is powered on again after power failure to confirm that the super capacitor battery pack normally completes a single cycle, the power consumption time in the whole process is long due to factors such as long starting time of a server system, and the situations that the whole capacity of the battery pack does not reach the standard and the like caused by low capacity of a single capacitor or insufficient welding of individual capacitors cannot be identified;

2. the performance of the capacitor battery pack has no clear index indication, for example, the risk that the voltage drop of the battery is over 1.5V due to single discharge can cause that the voltage is too low and the data can not be kept, the voltage drop of a new battery is generally 0.5V, and the voltage drop of the battery can reach 1.5V due to the reduction of internal parameters after 5 years. When the whole machine is tested, the battery can not be guaranteed to reach the index of a new battery, and the requirement of the battery can not be met within 5 years of service life;

3. for example, the plurality of capacitors are connected in series due to resistor discharge and the like in the capacitors, the voltage between the capacitors is unbalanced, the resistance of the resistor is generally large, the discharge speed is slow, the imbalance condition can occur in a complete machine system within several days or even dozens of days, the problems in the complete machine system are not easy to recur, the problems are not suitable for recurrence of related problems during mass production of the capacitors, and the test efficiency is low.

Therefore, how to improve the test efficiency and the test accuracy of the performance test of the super capacitor battery pack is a problem to be solved urgently at present.

Disclosure of Invention

In order to solve at least one of the problems mentioned in the background art, the application provides a method and a device for testing a super capacitor, an electronic device and a storage medium, which can improve the test efficiency and the test accuracy of the performance test of a super capacitor battery pack.

The embodiment of the application provides the following specific technical scheme:

in a first aspect, a super capacitor testing method is provided, including:

identifying a super capacitor battery pack through a detection circuit, wherein the super capacitor battery pack comprises a first super capacitor and a second super capacitor, the first super capacitor is connected with the second super capacitor in series, the positive electrode of the first super capacitor is used as the positive electrode of the super capacitor battery pack to be output, and the negative electrode of the second super capacitor is used as the negative electrode of the super capacitor battery pack to be output;

setting charging parameters corresponding to the super capacitor battery pack through a charging circuit, charging the super capacitor battery pack and starting timing;

stopping timing of ending charging in response to the fact that the voltage of the super capacitor battery pack exceeds a first preset threshold value, and judging whether the timing of charging exceeds a second preset threshold value or not;

and if the charging timing exceeds the second preset threshold, performing a voltage balance function test on the first super capacitor and the second super capacitor, and outputting a test result.

Further, the detection circuit includes an in-place resistor and a thermistor, the in-place resistor is used for detecting an in-place signal of the super capacitor, the thermistor is used for detecting the internal temperature of the super capacitor battery pack, and the super capacitor battery pack is identified by the detection circuit, including:

applying voltage to the on-site resistor and the thermistor through a detection circuit, detecting the voltage of the on-site resistor and the thermistor, and judging whether the resistance values of the on-site resistor and the thermistor are normal or not to obtain a first judgment result;

and identifying the super capacitor battery pack according to the first judgment result.

Further, if the voltages of the in-place resistor and the thermistor deviate, the first judgment result is that the super-capacitor battery pack is abnormal.

Further, the charging parameter includes at least one of a charging voltage and a charging current, the charging parameter corresponding to the super capacitor battery pack is set by the charging circuit, the super capacitor battery pack is charged and timing is started, and the method includes:

setting charging voltage and charging current corresponding to the super capacitor battery pack through a charging circuit, charging the super capacitor battery pack and starting timing;

if the charging time does not exceed the second preset threshold, the method further includes:

and judging that the super-capacitor battery pack is abnormal, and judging that the current test fails.

Further, the voltage balance function test of the first super capacitor and the second super capacitor specifically includes:

forcibly discharging the second super capacitor through a first discharge circuit based on first discharge time and standing, and judging whether a second voltage of the second super capacitor is within a preset range of the real-time total voltage of the super capacitor battery pack after standing to obtain a second judgment result;

and forcibly discharging the first super capacitor through a second discharge circuit based on second discharge time and standing, and judging whether the first voltage of the first super capacitor is within a preset range of the real-time total voltage of the super capacitor battery pack after standing to obtain a third judgment result.

Further, the forcibly discharging the second supercapacitor through the first discharge circuit based on the first discharge time and standing, and after standing, determining whether the second voltage of the second supercapacitor is within a preset range of the real-time total voltage of the supercapacitor battery pack to obtain a second determination result, where the second determination result includes:

forcibly discharging the second supercapacitor through a first discharge circuit based on a first discharge time;

after the first discharging time, standing the second super capacitor, and automatically balancing the voltage between the second super capacitor and the first super capacitor through a voltage balancing circuit inside the super capacitor battery pack;

and after the first standing time, re-measuring the second voltage of the second super capacitor and the real-time total voltage of the super capacitor battery pack, and judging whether the second voltage is within a preset range of the real-time total voltage to obtain a second judgment result.

Further, the first super capacitor is forcibly discharged and kept still through a second discharge circuit based on a second discharge time, and after the first super capacitor is kept still, whether the first voltage of the first super capacitor is within a preset range of the real-time total voltage of the super capacitor battery pack is judged to obtain a third judgment result, including:

forcibly discharging the first supercapacitor through a second discharge circuit based on a second discharge time;

after the second discharge time, the first super capacitor is placed statically, and the voltage between the first super capacitor and the second super capacitor is automatically balanced through a voltage balancing circuit inside the super capacitor battery pack;

and after the second standing time, measuring the first voltage of the first super capacitor and the real-time total voltage of the super capacitor battery pack again, and judging whether the first voltage is within a preset range of the real-time total voltage to obtain a third judgment result.

Further, the preset range includes a first preset proportion and a second preset proportion, and the first preset proportion is not greater than the second preset proportion;

the first discharging time is obtained by calculation according to the discharging current of the first discharging circuit, so that the discharging time of the second super capacitor is smaller than a first preset proportion of the total voltage of the super capacitor battery pack;

the second discharging time is obtained by calculation according to the discharging current of the second discharging circuit, so that the discharged first super capacitor is smaller than a first preset ratio of the total voltage of the super capacitor battery pack.

Further, after the voltage balancing function test is performed on the first super capacitor and the second super capacitor, the method further includes:

discharging the super capacitor battery pack through a constant current discharge circuit according to the discharge current of the constant current discharge circuit and the discharge duration, and recording a third voltage of the super capacitor battery pack before discharging and a fourth voltage of the super capacitor battery pack after discharging;

calculating to obtain a difference value of the third voltage and the fourth voltage;

and judging whether the difference value is smaller than a difference value threshold value or not to obtain a fourth judgment result.

Further, if the difference value is greater than a difference threshold value, the fourth judgment result is that the super-capacitor battery pack is abnormal;

if the difference is smaller than a difference threshold, the fourth determination result is that the super-capacitor battery pack is normally discharged, and after the fourth determination result is obtained, the method further includes:

and discharging the super capacitor battery pack until the total voltage of the super capacitor battery pack is less than a fifth voltage, wherein the output test result is that the test is passed.

Further, before the super capacitor battery pack is identified by the detection circuit, the method further comprises:

initializing the test times to zero;

if the test result is that the test is passed, after the test result is output, the method further comprises:

increasing the counting number of the test times by one, and judging whether the test times reach a set number;

and if the test frequency does not reach the set frequency, setting the charging parameters corresponding to the super capacitor battery pack through the charging circuit again, charging the super capacitor battery pack, starting timing, and executing the test again until the test frequency reaches the set frequency.

Further, the super capacitor battery pack further comprises an intermediate node, the intermediate node is located between the first super capacitor and the second super capacitor, and the intermediate node is a negative output of the first super capacitor and a positive output of the second super capacitor;

the voltage of the middle node is used for describing a second voltage of the second super capacitor, the voltage at two ends of the first super capacitor is the first voltage, and the value of the first voltage is the same as the value obtained by subtracting the second voltage from the real-time total voltage.

In a second aspect, there is provided a supercapacitor test device, the device comprising:

the detection module is used for identifying a super capacitor battery pack through a detection circuit, the super capacitor battery pack comprises a first super capacitor and a second super capacitor, the first super capacitor is connected with the second super capacitor in series, the positive electrode of the first super capacitor is used as the positive electrode of the super capacitor battery pack to output, and the negative electrode of the second super capacitor is used as the negative electrode of the super capacitor battery pack to output;

the charging module is used for setting charging parameters corresponding to the super capacitor battery pack through a charging circuit, charging the super capacitor battery pack and starting timing;

the management module is used for stopping timing of charging completion in response to the fact that the voltage of the super capacitor battery pack exceeds a first preset threshold value, and judging whether the charging timing exceeds a second preset threshold value or not;

and the voltage balance test module is used for carrying out voltage balance function test on the first super capacitor and the second super capacitor if the charging timing exceeds the second preset threshold value, and outputting a test result.

In a third aspect, an electronic device is provided, which includes a memory, a processor, and a computer program stored on the memory and executable on the processor, and the processor implements the supercapacitor test method when executing the computer program.

In a fourth aspect, a computer-readable storage medium is provided, storing computer-executable instructions for performing the supercapacitor test method.

The embodiment of the application has the following beneficial effects:

according to the super capacitor testing method, the super capacitor testing device, the electronic equipment and the storage medium, the accessed super capacitor battery pack can be identified through the detection circuit, the super capacitor battery pack is charged in a matching mode through the charging circuit according to the type of the identified super capacitor battery pack, the charging voltage and the charging time are monitored in real time, the voltage balance function test can be performed on the first super capacitor and the second super capacitor, the voltage balance function of the super capacitor battery pack is detected in a simulation mode, the function and quality monitoring in the production process of the super capacitor battery pack can be simulated, the function test of a whole server is not needed, the test time can be greatly shortened, and the test efficiency and the test accuracy are improved; the constant-current discharge circuit can simulate a normal use scene to ensure that the super-capacitor battery pack can meet the design requirement, and after a single test is finished, the discharge circuit discharges the voltage of the super-capacitor battery pack to a minimum value so as to avoid negative effects possibly caused by electric insertion and extraction of the battery pack belt; and the cycle test times can be set, and the cycle test can be performed for multiple times, so that the stability of the performance of the super-capacitor battery pack can be effectively verified.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

FIG. 1 shows a general flowchart of a super capacitor test method provided by an embodiment of the present application;

FIG. 2 shows a schematic diagram of an internal structure of a super capacitor battery pack according to an embodiment of the present application;

FIG. 3 shows a detailed flow diagram of a method for testing a super capacitor according to an embodiment of the present application;

FIG. 4 shows a circuit diagram of a detection circuit according to one embodiment of the present application;

FIG. 5 shows a circuit diagram of a charging circuit according to one embodiment of the present application;

FIG. 6 shows a circuit diagram of a first discharge circuit according to one embodiment of the present application;

FIG. 7 shows a circuit diagram of a second discharge circuit according to one embodiment of the present application;

FIG. 8 shows a circuit diagram of a constant current discharge circuit according to one embodiment of the present application;

FIG. 9 is a schematic structural diagram of a super capacitor testing device provided in an embodiment of the present application;

FIG. 10 illustrates an exemplary system that can be used to implement the various embodiments described in this application.

Detailed Description

In order to make the purpose, technical solutions and advantages of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

It should be understood that throughout the description of this application, unless the context clearly requires otherwise, the words "comprise", "comprising", and the like, in the specification and claims are to be interpreted in an inclusive sense rather than in an exclusive or exhaustive sense; that is, what is meant is "including, but not limited to".

It will be further understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. In addition, in the description of the present application, the meaning of "a plurality" is two or more unless otherwise specified.

Example one

The application provides a super capacitor test method, referring to fig. 1, including:

s1, identifying a super-capacitor battery pack through a detection circuit, wherein the super-capacitor battery pack comprises a first super-capacitor and a second super-capacitor, the first super-capacitor is connected with the second super-capacitor in series, the positive electrode of the first super-capacitor is used as the positive electrode of the super-capacitor battery pack to be output, and the negative electrode of the second super-capacitor is used as the negative electrode of the super-capacitor battery pack to be output;

s2, setting charging parameters corresponding to the super capacitor battery pack through a charging circuit, charging the super capacitor battery pack and starting timing;

s3, stopping timing of ending charging in response to the fact that the voltage of the super capacitor battery pack exceeds a first preset threshold value, and judging whether the timing of charging exceeds a second preset threshold value or not;

and S4, if the charging timing exceeds a second preset threshold, performing voltage balance function test on the first super capacitor and the second super capacitor, and outputting a test result.

Specifically, referring to fig. 2, taking two strings of super capacitor battery packs as an example, the first super capacitor and the second super capacitor are both 2.7V and are connected in series to form a super capacitor battery pack with the highest withstand voltage of 5.4V and the largest actual output of 5V, and the total output voltage of +5V is connected to the positive electrode of the first super capacitor C1 and is used as the positive electrode output voltage of the super capacitor battery pack. The first super capacitor is connected in series with the second super capacitor, an intermediate node CC1P exists between the first super capacitor C1 and the second super capacitor C2, and the intermediate node CC1P is the negative output of the first super capacitor C1 and is also the positive output of the second super capacitor C2. The cathode of the second super capacitor C2 is the cathode output of the whole super capacitor battery pack, and is also the GND output. The voltage of the middle node CC1P is used to describe the second voltage across the second super capacitor C2, the voltage across the first super capacitor C1 is the first voltage CC2P, and the value of the first voltage CC2P is the same as the value obtained by subtracting the second voltage from the real-time total voltage (+ 5V actual voltage). The CC _ TS is that a thermistor is connected inside the super-capacitor battery pack and used for sensing the internal temperature of the battery; SC _ ON is a battery ON-position signal and is connected with GND through a resistor inside the super capacitor battery pack. The method comprises the steps of firstly identifying a super capacitor battery pack through an in-place resistor in a detection circuit, then setting and identifying charging voltage and charging current corresponding to a capacitor of the super capacitor battery pack through a charging circuit, starting to charge the super capacitor in the super capacitor battery pack and start timing, simultaneously detecting whether the voltage of the super capacitor battery pack exceeds a first preset threshold value, stopping charging and ending timing when the voltage of the super capacitor battery pack exceeds the first preset threshold value, and judging whether the charging timing exceeds a second preset threshold value. If the charging time does not exceed the second preset threshold, the charging time is short, the capacity of the capacitor is insufficient or the individual capacitor is empty welded, and the super capacitor battery pack is judged to be abnormal; if the charging timing exceeds a second preset threshold, continuing to perform the next test, namely performing a voltage balance function test on the first super capacitor and the second super capacitor, and if the voltage balance function test is passed, outputting a test result to pass; if the voltage balance function test fails, the current test fails.

This embodiment will be further described with reference to fig. 3:

in some embodiments, the detection circuit includes an in-situ resistor and a thermistor, the in-situ resistor is used for detecting an in-situ signal of the super capacitor, and the thermistor is used for detecting an internal temperature of the super capacitor battery pack, based on which S1 includes:

s11, applying voltage to the on-site resistor and the thermistor through a detection circuit, detecting the voltage of the on-site resistor and the thermistor, and judging whether the resistance values of the on-site resistor and the thermistor are normal or not to obtain a first judgment result;

and S12, identifying the super-capacitor battery pack according to the first judgment result.

In some embodiments, if the voltages of the on-bit resistor and the thermistor deviate, the first determination result is that the super capacitor battery pack is abnormal.

Specifically, the mode that the voltage is applied to the on-site resistor and the thermistor for temperature sensing through the detection circuit and the voltage is detected can determine whether the resistance values of the on-site resistor and the thermistor are normal or not, and if the voltage deviates due to insufficient soldering or resistor damage, the abnormality of the super capacitor battery pack can be directly judged; if the resistances of the on-site resistor and the thermistor are normal, the first judgment result is that the on-site resistor and the thermistor pass the test, and the next test can be executed. The super capacitor battery pack can be identified according to the in-place resistor, and the test system is compatible with the test of other batteries at the same time, so that the details are not repeated here. For example, fig. 4 shows a circuit diagram of the detection circuit, where J3 is the connector of the super capacitor battery pack, 400 is the power node of the super capacitor battery pack +5V (output voltage), and is also the positive output of the whole super capacitor battery pack. 200 is a middle node of the super capacitor battery pack, in which a first super capacitor and a second super capacitor are connected in series, and is also the voltage of the CC1P capacitor; 100 is the negative pole of super capacitor battery package and is also GND. Before the test of the detection circuit begins, the super capacitor battery pack is inserted into the J3 connector. Reference numeral 101 denotes an on-site check signal of the supercapacitor pack (300 ohm ground inside the supercapacitor pack), and a signal 103 (equivalent to 101 signal) input to the P3V3 power supply through R86 resistor pull-up is output to an MCU (Microcontroller Unit). The MCU determines 101 whether the resistance inside the signal is normal according to the voltage value. 104 is a temperature detection signal, which is identical to 102, and whether the thermistor is normal is checked through R114 and the thermistor inside the super capacitor battery pack. The voltage of the on-site resistor and the voltage of the thermistor can be detected through the detection circuit, and whether the resistance values of the on-site resistor and the thermistor are normal or not is judged.

In some embodiments, the charging parameter includes at least one of a charging voltage and a charging current, based on which S2 includes:

s21, setting charging voltage and charging current corresponding to the super capacitor battery pack through a charging circuit, charging the super capacitor battery pack and starting timing;

if the charging timing does not exceed the second preset threshold, the method further comprises:

and judging that the super-capacitor battery pack is abnormal and judging that the current test fails.

Specifically, according to the super capacitor battery pack identified in the above steps, the charging circuit sets the charging voltage and the charging current corresponding to the identified super capacitor battery pack, starts charging the super capacitor battery pack and starts timing, and simultaneously detects whether the voltage of the super capacitor battery pack exceeds a first preset threshold, and when the voltage of the super capacitor battery pack exceeds the first preset threshold, stops charging and ends timing. If the charging timing does not exceed the second preset threshold, it is indicated that the charging time is short, and it may be that the capacity of the capacitor is insufficient or that the individual capacitor is empty-welded, and it is determined that the battery pack is abnormal; and if the charging timing exceeds a second preset threshold value, continuing to perform the next test.

Illustratively, fig. 5 shows a circuit diagram of the charging circuit. Referring to fig. 5, node 1200 is the input power supply for the test system, and for example, a P12V power supply may be used as the main power input to the system. The charging circuit is a charging control circuit which comprises a charging management chip U2, MOS tubes Q1 and Q2, an inductor L1 and a precision resistor R6, and 401 is an output power supply node. Q15 and Q16 are control switches for preventing leakage current on both sides formed by two P-type MOS transistors, and are used for controlling the switches of

nodes

401 and 400, respectively, and node 116 is a control signal which turns on Q15 and Q16 when the signal is low level and turns off Q15 and Q16 when the signal is high level. When the charging loop is started, the node 116 is set to be at a high level, and the super capacitor battery pack is charged; when the charging loop is closed, node 116 remains low. The

nodes

111 and 112 are signals for controlling the output voltage of the charging circuit, when the 103 signal is low level, the 111 signal is set to high level, the MOS transistor Q30 is turned on, R13 and R117 are connected in parallel and then connected in series with R12, the output voltage of the 401 signal is controlled not to exceed 5V, and the 115 signal is a Feedback signal of the charging chip. When another capacitor is detected to be in place, 112 goes high, Q31 turns on, R116 and R117 are connected in parallel followed by R12 in series, and the voltage at the output 401 node is up to 9V. Node 113 is a charging voltage detection signal that is formed by dividing the voltage across the circuits R109, R111, R112, R110, and U4B, and turns off the charging chip of U2 when the voltage 401 exceeds a predetermined value. The charging process is timed, charging is stopped from the beginning until the node 401 voltage exceeds a first preset threshold, and the timing is ended. If the charging timing exceeds a second preset threshold, the charging test is passed, and the next test is continued; if the charging timing does not exceed the second preset threshold, the charging test fails, and the whole test fails.

In some embodiments, S4 specifically comprises:

s41, forcibly discharging the second super capacitor through the first discharge circuit based on the first discharge time and standing, and judging whether the second voltage of the second super capacitor is within a preset range of the real-time total voltage of the super capacitor battery pack after standing to obtain a second judgment result;

and S42, forcibly discharging the first super capacitor through the second discharging circuit based on the second discharging time, standing, and then judging whether the first voltage of the first super capacitor is within a preset range of the real-time total voltage of the super capacitor battery pack to obtain a third judgment result.

Specifically, the second super capacitor can be forcibly discharged for a period of time (first discharge time) through the first discharge circuit, at this time, it is ensured that the voltage of the discharged CC1P is lower than a first preset proportion of the total voltage of the super capacitor battery pack, then the discharge is stopped and the super capacitor battery pack starts to stand, at this time, the voltage balance circuit inside the super capacitor battery pack can be automatically started and balance the voltage between the CC1P and the CC2P, after the super capacitor battery pack stands for a specified time, the real-time voltages of the CC1P and the 5V are measured again, it is ensured that the voltage of the CC1P is recovered to the preset range of the total voltage, and if the voltage exceeds the range, it is determined that the internal function of the super capacitor battery pack is abnormal. Similarly, the first super capacitor can be forcibly discharged for a period of time (second discharge time) through the second discharge circuit, at this time, it is ensured that the voltage of the discharged CC2P is lower than the first preset proportion of the total voltage of the super capacitor battery pack, then the discharge is stopped and the super capacitor battery pack starts to stand, at this time, the voltage balance circuit inside the super capacitor battery pack can automatically start and balance the voltage between the CC1P and the CC2P, after the super capacitor battery pack stands for a specified time, the real-time voltages of the CC2P and the 5V are measured again, it is ensured that the voltage of the CC2P is recovered to be within the preset range of the total voltage, and if the voltage exceeds the range, it is determined that the function inside the super capacitor battery pack is abnormal. It should be noted that there is no mandatory sequence between the first discharging circuit and the second discharging circuit, and the first discharging circuit and the second discharging circuit can be used to discharge the second super capacitor forcibly, or the second discharging circuit can be used to discharge the first super capacitor forcibly. If the second voltage CC1P of the second super capacitor is within the preset range of the real-time total voltage of the super capacitor battery pack, the inner part of the super capacitor battery pack is normal, the second judgment result is that the voltage balance test of the second super capacitor passes, and otherwise, the second judgment result is that the test fails; if the first voltage CC2P of the first super capacitor is within the preset range of the real-time total voltage of the super capacitor battery pack, it is indicated that the interior of the super capacitor battery pack is normal, the third judgment result is that the voltage balance test of the first super capacitor is passed, and otherwise, the third judgment result is that the test is failed.

In some embodiments, S41 comprises:

s411, forcibly discharging the second super capacitor through the first discharging circuit based on first discharging time;

s412, after the first discharging time, standing the second super capacitor, and automatically balancing the voltage between the second super capacitor and the first super capacitor through a voltage balancing circuit in the super capacitor battery pack;

s413, after the first standing time, re-measuring the second voltage of the second super-capacitor and the real-time total voltage of the super-capacitor battery pack, and determining whether the second voltage is within a preset range of the real-time total voltage to obtain a second determination result.

Illustratively, referring to fig. 6, node 200 is CC1P, node 100 is the cathode (i.e., GND) of the super capacitor battery pack, inductor L2, power chip U6 and power diode D6 form a boost circuit, 122 is the output voltage of the boost circuit, R17 is the power discharge resistor, and node 121 is the control signal. When the voltage 121 is high, the N-type MOS transistor Q5 is turned on, the discharge loop starts to operate, discharge is performed through the power resistor of R17, the discharge current is the ratio of the voltage 122 to the resistance of R17, and then the CC1P is forcibly discharged. When 121 is low, Q5 is turned off, the discharge circuit is closed, and forced discharge to CC1P is stopped. The high level time of the signal 121 is controlled, so that the first discharge time of the CC1P is controlled, and the discharge current is adjusted by adjusting the resistance value of the R17 resistor. After the completion is discharged, need place standstill to super capacitor battery package, the internal balancing circuit of battery package can be balanced CC 1P's voltage automatically, after the first stationary time of stewing, through the magnitude of voltage that snatchs node 200 and node 400, judge whether the voltage ratio of these two nodes is in predetermineeing the ratio within range to judge whether the second voltage is within the predetermined range of real-time total voltage, if in the scope, then the second judgement result is for passing, otherwise, the test fails.

In some embodiments, S42 comprises:

s421, forcibly discharging the first super capacitor through a second discharging circuit based on second discharging time;

s422, after the second discharging time, standing the first super capacitor, and automatically balancing the voltage between the first super capacitor and the second super capacitor through a voltage balancing circuit in the super capacitor battery pack;

and S423, after the second standing time, re-measuring the first voltage of the first super capacitor and the real-time total voltage of the super capacitor battery pack, and judging whether the first voltage is within a preset range of the real-time total voltage to obtain a third judgment result.

Illustratively, referring to fig. 7, cc2p is a super capacitor between node 400 and node 200, and has a boost circuit composed of inductor L3, power diode D8 and power chip U3, boosting the voltage of CC2P to a fixed output voltage, and node 132 is the output voltage of the boost circuit. Node 131 is a control signal that controls the switching of the CC2P discharge circuit. When the node 131 is low, the MOS transistor Q18 is turned off, the transistor Q6 is turned on, the discharging booster circuit starts to operate, and the output voltage 132 is discharged through the high-power resistor R28. When the control signal 131 goes high, Q18 is turned on, Q6 is turned off, and the forced discharge circuit is turned off. After discharging the CC2P for the second discharging time, standing the super-capacitor battery pack for the second standing time, judging whether the voltage ratio of the two nodes is within a preset ratio range by grabbing the voltage values of the node 200 and the node 400, so as to judge whether the first voltage is within the preset range of the real-time total voltage, if so, judging that the third judgment result is pass, otherwise, the test fails.

In some embodiments, the preset range includes a first preset fraction and a second preset fraction, the first preset fraction being not greater than the second preset fraction; the first discharging time is obtained by calculation according to the discharging current of the first discharging circuit, so that the discharging time of the second super capacitor is smaller than a first preset proportion of the total voltage of the super capacitor battery pack; the second discharge time is obtained by calculation according to the discharge current of the second discharge circuit, so that the discharge time of the first super capacitor is smaller than the first preset ratio of the total voltage of the super capacitor battery pack.

Specifically, during normal operation, the capacitor voltages of CC1P and CC2P are substantially equal, for example, the voltages of CC1P and CC2P are set to be between a first preset ratio and a second preset ratio of the real-time total voltage. The first preset proportion can be 48.5%, the second preset proportion is 51.5%, and then the preset range is 48.5% -51.5%; similarly, the first preset proportion can be 49%, the second preset proportion is 51%, the preset range is 49% -51%, the preset range can be adjusted according to actual test requirements, and test accuracy can be adjusted. The method comprises the steps of forcibly discharging a capacitor of the CC1P for a period of time through a first discharging circuit, calculating first discharging time according to discharging current, ensuring that the voltage of the discharged CC1P is lower than a first preset proportion (for example, 48.5%) of total voltage +5V (real-time measured value), stopping discharging and starting to stand, automatically starting a voltage balancing circuit inside the super capacitor battery pack at the moment and balancing the voltage between the CC1P and the CC2P, measuring the real-time voltages of the CC1P and the 5V again after standing for a specified time (first standing time), ensuring that the voltage of the CC1P is recovered to be between the first preset proportion and a second preset proportion (for example, between 48.5% and 51.5%) of the total voltage, judging that the function inside the battery pack is abnormal if the voltage exceeds the range, and executing next test if the voltage is within the preset range. And performing a voltage balance test on the CC2P in the same way, forcibly discharging the capacitor of the CC2P for a period of time, calculating a second discharge time according to the discharge current, ensuring that the voltage of the discharged CC2P is lower than a first preset ratio (for example, 48.5%) of the total voltage plus 5V (a real-time measured value), stopping discharging and starting to stand, automatically starting a voltage balance circuit inside the super capacitor battery pack at the moment and balancing the voltage between the CC1P and the CC2P, after standing for a specified time (second standing time), measuring the real-time voltages of the CC2P and the 5V again, ensuring that the voltage of the CC2P is recovered to be between the first preset ratio and the second preset ratio (for example, between 48.5% and 51.5%) of the total voltage, if the voltage exceeds the range, judging that the internal function of the battery pack is abnormal, and if the voltage is within the preset range, performing the next step of test. It should be noted that there is no mandatory precedence order between performing the voltage balance test on CC1P and performing the voltage balance test on CC 2P.

In some embodiments, after performing the voltage balancing function test on the first supercapacitor and the second supercapacitor, the method further comprises:

s51, discharging the super capacitor battery pack through the constant current discharge circuit according to the discharge current and the discharge duration of the constant current discharge circuit, and recording a third voltage of the super capacitor battery pack before discharging and a fourth voltage of the super capacitor battery pack after discharging;

s52, calculating to obtain a difference value of the third voltage and the fourth voltage;

and S53, judging whether the difference value is smaller than the difference value threshold value or not to obtain a fourth judgment result.

Specifically, the constant current discharge test is used for simulating the test condition of the super capacitor battery pack in a power failure scene of the server when the super capacitor battery pack works in the server. The method comprises the steps that firstly, a constant current discharging circuit is started, the discharging current and the discharging duration time of the constant current discharging circuit can be set according to the circuit and time of a power failure scene when a super capacitor battery pack works in a server, the voltage values of +5V before discharging is started and after discharging is completed, the third voltage V1 and the fourth voltage V2 are recorded, the difference value between the V1 and the V2 is calculated, and if the difference value is smaller than a difference threshold value, it is indicated that the super capacitor battery pack discharges normally; otherwise, the discharge of the super capacitor battery pack is abnormal, and the fourth judgment result is test failure.

Illustratively, referring to fig. 8, the resistor R35, the control chip U5, the power transistor Q12 and the power resistor R41 constitute a constant current discharge circuit, which is configured to turn on the N-type MOS transistor Q17 and start the discharge circuit when the signal 141 is at a high level through a control signal at the node 141, and the magnitude of the constant current discharge current value can be adjusted by adjusting the resistance value of R41. And recording the voltage V1 of the 400 node before constant current discharge, measuring the voltage V2 of the 400 node again after the constant current discharge for specified time, wherein the voltage difference value between the V1 and the V2 is required to be smaller than the difference threshold value, and the fourth judgment result is that the test is passed.

In some embodiments, if the difference is greater than the difference threshold, the fourth determination result is that the super capacitor battery pack is abnormal;

if the difference is smaller than the difference threshold, the fourth judgment result indicates that the super capacitor battery pack is normally discharged, and based on this, after the fourth judgment result is obtained, the method further includes:

and discharging the super capacitor battery pack until the total voltage of the super capacitor battery pack is less than the fifth voltage, and outputting a test result that the test is passed.

Specifically, when the fourth determination result is that the constant current discharge test is passed, the constant current discharge circuit is started and the voltage of the 400 node is monitored, and when the voltage of the 400 node is less than the fifth voltage (which may be set to 0.3V), all the tests of the single charge and discharge of the super capacitor battery pack are completed.

In some embodiments, prior to S1, the method further comprises:

s0, initializing the test times to zero;

if the test result is that the test is passed, after outputting the test result, the method further comprises:

s6, increasing the counting number of the testing times by one, and judging whether the testing times reach the set times or not;

and if the test times do not reach the set times, setting the charging parameters of the corresponding super capacitor battery pack again through the charging circuit, charging the super capacitor battery pack, starting timing, and executing the test again until the test times reach the set times.

Specifically, after the constant current discharge test is passed, the constant current discharge circuit is started to discharge until the total voltage of the super capacitor battery pack is less than the fifth voltage, at this time, all tests are completed in a single charge-discharge operation, and the test times are increased by one. Particularly, if the cycle test is needed, the cycle test frequency is set, the test system automatically starts the cycle test from the step S2, if the test fails in the test process, the test is executed all the time until the test frequency reaches the set frequency, and then the whole test is finished.

In the embodiment, the accessed super capacitor battery pack can be identified through the detection circuit, the super capacitor battery pack is charged in a matching manner through the charging circuit according to the identified type of the super capacitor battery pack, the charging voltage and the charging time are monitored in real time, the voltage balance function of the super capacitor battery pack can be simulated and detected by performing a voltage balance function test on the first super capacitor and the second super capacitor, the function and quality monitoring in the production process of the super capacitor battery pack can be simulated, the function test of a whole server is not required, the test time can be greatly shortened, and the test efficiency and the test accuracy are improved; the constant-current discharge circuit can simulate a normal use scene to ensure that the super-capacitor battery pack can meet design requirements, and after a single test is finished, the discharge circuit discharges the voltage of the super-capacitor battery pack to a minimum value so as to avoid negative effects possibly caused by electric plug-in of the battery pack; and the cycle test times can be set, and the cycle test can be carried out for multiple times, so that the stability of the performance of the super-capacitor battery pack can be effectively verified.

It should be noted that the terms "S1", "S2", etc. are used for descriptive purposes only, are not intended to refer specifically to an order or sequential meaning, nor are they intended to limit the present application, but are merely used for convenience in describing the method of the present application and are not to be construed as indicating the order of the steps. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present application.

Example two

Corresponding to the above embodiment, the present application further provides a super capacitor testing apparatus, referring to fig. 9, the apparatus includes a detecting module, a charging module, a management module, and a voltage balance testing module.

The detection module is used for identifying a super-capacitor battery pack through a detection circuit, the super-capacitor battery pack comprises a first super-capacitor and a second super-capacitor, the first super-capacitor is connected with the second super-capacitor in series, the positive electrode of the first super-capacitor is used as the positive electrode of the super-capacitor battery pack to output, and the negative electrode of the second super-capacitor is used as the negative electrode of the super-capacitor battery pack to output; the charging module is used for setting charging parameters corresponding to the super capacitor battery pack through a charging circuit, charging the super capacitor battery pack and starting timing; the management module is used for stopping timing of charging completion in response to the fact that the voltage of the super capacitor battery pack exceeds a first preset threshold value, and judging whether the charging timing exceeds a second preset threshold value or not; and the voltage balance test module is used for carrying out voltage balance function test on the first super capacitor and the second super capacitor if the charging timing exceeds the second preset threshold value, and outputting a test result.

Further, the detection circuit comprises an in-place resistor and a thermistor, the in-place resistor is used for detecting an in-place signal of the super capacitor, and the thermistor is used for detecting the internal temperature of the super capacitor battery pack; and the super capacitor battery pack is identified according to the first judgment result.

Further, the charging parameters include at least one of charging voltage and charging current, and the charging module is further configured to set the charging voltage and the charging current corresponding to the super capacitor battery pack through a charging circuit, charge the super capacitor battery pack, and start timing; and if the charging time does not exceed the second preset threshold, the management module is further used for judging that the super-capacitor battery pack is abnormal and judging that the current test fails.

Further, the voltage balance test module is further configured to perform forced discharge on the second super capacitor through the first discharge circuit based on the first discharge time and to stand, and after standing, determine whether a second voltage of the second super capacitor is within a preset range of a real-time total voltage of the super capacitor battery pack, so as to obtain a second determination result; and the first super capacitor is forcibly discharged based on the second discharge time through the second discharge circuit and is kept stand, and after the first super capacitor is kept stand, whether the first voltage of the first super capacitor is within a preset range of the real-time total voltage of the super capacitor battery pack is judged to obtain a third judgment result.

Further, the voltage balance test module is also used for forcibly discharging the second super capacitor through the first discharge circuit based on the first discharge time; the second super capacitor is placed statically after the first discharge time, and the voltage between the second super capacitor and the first super capacitor is automatically balanced through a voltage balancing circuit inside the super capacitor battery pack; and after the first standing time, re-measuring a second voltage of the second super capacitor and a real-time total voltage of the super capacitor battery pack, and judging whether the second voltage is within a preset range of the real-time total voltage to obtain a second judgment result.

Further, the voltage balance test module is also used for carrying out forced discharging on the first super capacitor through a second discharging circuit based on second discharging time; and the voltage balancing circuit is used for standing the first super capacitor after the second discharge time, and automatically balancing the voltage between the first super capacitor and the second super capacitor through the voltage balancing circuit in the super capacitor battery pack; and after the second standing time, re-measuring the first voltage of the first super capacitor and the real-time total voltage of the super capacitor battery pack, and judging whether the first voltage is within a preset range of the real-time total voltage to obtain a third judgment result.

Further, the preset range includes a first preset proportion and a second preset proportion, and the first preset proportion is not greater than the second preset proportion; the first discharging time is obtained by calculation according to the discharging current of the first discharging circuit, so that the discharged second super capacitor is smaller than a first preset proportion of the total voltage of the super capacitor battery pack; the second discharge time is calculated according to the discharge current of the second discharge circuit, so that the discharge time of the first super capacitor is smaller than a first preset ratio of the total voltage of the super capacitor battery pack after the first super capacitor is discharged.

Further, the super capacitor testing device further comprises a constant current discharging module, wherein the constant current discharging module is used for discharging the super capacitor battery pack through a constant current discharging circuit according to the discharging current of the constant current discharging circuit and the discharging duration time, and recording a third voltage of the super capacitor battery pack before discharging and a fourth voltage of the super capacitor battery pack after discharging; and the difference value of the third voltage and the fourth voltage is obtained through calculation; and the judgment module is also used for judging whether the difference value is smaller than the difference value threshold value or not to obtain a fourth judgment result.

Further, if the difference value is greater than a difference threshold value, the fourth judgment result indicates that the super capacitor battery pack is abnormal; if the difference value is smaller than the difference value threshold value, the fourth judgment result indicates that the super capacitor battery pack is normally discharged, based on this, the constant current discharge module is further used for discharging the super capacitor battery pack until the total voltage of the super capacitor battery pack is smaller than the fifth voltage, and the output test result indicates that the test is passed.

Further, the super capacitor testing device also comprises a test counting module used for initializing the test times to zero; the device is also used for counting the test times by one after the test result is output and judging whether the test times reach the set times or not if the test result is that the test passes; and if the test frequency does not reach the set frequency, setting the charging parameters corresponding to the super capacitor battery pack through the charging circuit again, charging the super capacitor battery pack, starting timing, and re-executing the test until the test frequency reaches the set frequency.

Further, the super capacitor battery pack further comprises an intermediate node, the intermediate node is located between the first super capacitor and the second super capacitor, and the intermediate node is a negative output of the first super capacitor and a positive output of the second super capacitor; the voltage of the middle node is used for describing a second voltage of the second super capacitor, the voltage at two ends of the first super capacitor is the first voltage, and the value of the first voltage is the same as the value obtained by subtracting the second voltage from the real-time total voltage.

For specific limitations of the super capacitor testing apparatus, reference may be made to the above related limitations of the super capacitor testing method embodiment, and therefore, details are not repeated herein. All or part of each module in the super capacitor testing device can be realized by software, hardware and a combination thereof. The modules can be embedded in a hardware form or independent of a processor in the computer device, and can also be stored in a memory in the computer device in a software form, so that the processor can call and execute operations corresponding to the modules.

EXAMPLE III

Corresponding to the above embodiment, the present application further provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory and capable of running on the processor, and when the processor executes the program, the supercapacitor test method may be implemented.

As shown in fig. 10, in some embodiments, the system can be used as the electronic device for the supercapacitor test method in any one of the embodiments. In some embodiments, a system may include one or more computer-readable media (e.g., system memory or NVM/storage) having instructions and one or more processor(s) (e.g., processor (s)) coupled with the one or more computer-readable media and configured to execute the instructions to implement modules to perform actions described herein.

For one embodiment, the system control module may include any suitable interface controller to provide any suitable interface to at least one of the processor(s) and/or to any suitable device or component in communication with the system control module.

The system control module may include a memory controller module to provide an interface to the system memory. The memory controller module may be a hardware module, a software module, and/or a firmware module.

System memory may be used, for example, to load and store data and/or instructions for the system. For one embodiment, the system memory may comprise any suitable volatile memory, such as suitable DRAM. In some embodiments, the system memory may comprise double data rate type four synchronous dynamic random access memory (DDR 4 SDRAM).

For one embodiment, the system control module may include one or more input/output (I/O) controllers to provide an interface to the NVM/storage and communication interface(s).

For example, the NVM/storage may be used to store data and/or instructions. The NVM/storage may include any suitable non-volatile memory (e.g., flash memory) and/or may include any suitable non-volatile storage device(s) (e.g., one or more hard disk drive(s) (HDD (s)), one or more Compact Disc (CD) drive(s), and/or one or more Digital Versatile Disc (DVD) drive (s)).

The NVM/storage may include storage resources that are physically part of the device on which the system is installed, or it may be accessible by the device and not necessarily part of the device. For example, the NVM/storage may be accessible over a network via the communication interface(s).

The communication interface(s) may provide an interface for the system to communicate over one or more networks and/or with any other suitable device. The system may wirelessly communicate with one or more components of the wireless network according to any of one or more wireless network standards and/or protocols.

For one embodiment, at least one of the processor(s) may be packaged together with logic for one or more controllers (e.g., memory controller modules) of the system control module. For one embodiment, at least one of the processor(s) may be packaged together with logic for one or more controllers of the system control module to form a System In Package (SiP). For one embodiment, at least one of the processor(s) may be integrated on the same die with logic for one or more controllers of the system control module. For one embodiment, at least one of the processor(s) may be integrated on the same die with logic of one or more controllers of a system control module to form a system on a chip (SoC).

In various embodiments, the system may be, but is not limited to being: a server, a workstation, a desktop computing device, or a mobile computing device (e.g., a laptop computing device, a handheld computing device, a tablet, a netbook, etc.). In various embodiments, the system may have more or fewer components and/or different architectures. For example, in some embodiments, a system includes one or more cameras, a keyboard, a Liquid Crystal Display (LCD) screen (including touch screen displays), a non-volatile memory port, multiple antennas, a graphics chip, an Application Specific Integrated Circuit (ASIC), and speakers.

It should be noted that the present application may be implemented in software and/or a combination of software and hardware, for example, implemented using Application Specific Integrated Circuits (ASICs), general purpose computers or any other similar hardware devices. In one embodiment, the software programs of the present application may be executed by a processor to implement the steps or functions described above. As such, the software programs (including associated data structures) of the present application can be stored in a computer readable recording medium, such as RAM memory, magnetic or optical drive or diskette and the like. Additionally, some of the steps or functions of the present application may be implemented in hardware, for example, as circuitry that cooperates with the processor to perform various steps or functions.

In addition, some of the present application may be implemented as a computer program product, such as computer program instructions, which when executed by a computer, may invoke or provide methods and/or techniques in accordance with the present application through the operation of the computer. Those skilled in the art will appreciate that the form in which the computer program instructions reside on a computer-readable medium includes, but is not limited to, source files, executable files, installation package files, and the like, and that the manner in which the computer program instructions are executed by a computer includes, but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. In this regard, computer readable media can be any available computer readable storage media or communication media that can be accessed by a computer.

Communication media includes media whereby communication signals, including, for example, computer readable instructions, data structures, program modules, or other data, are transmitted from one system to another. Communication media may include conductive transmission media such as cables and wires (e.g., fiber optics, coaxial, etc.) and wireless (non-conductive transmission) media capable of propagating energy waves such as acoustic, electromagnetic, RF, microwave, and infrared. Computer readable instructions, data structures, program modules, or other data may be embodied in a modulated data signal, for example, in a wireless medium such as a carrier wave or similar mechanism such as is embodied as part of spread spectrum techniques. The term "modulated data signal" means a signal that has one or more of its characteristics set or changed in such a manner as to encode information in the signal. The modulation may be analog, digital or hybrid modulation techniques.

An embodiment according to the present application comprises an apparatus comprising a memory for storing computer program instructions and a processor for executing the program instructions, wherein the computer program instructions, when executed by the processor, trigger the apparatus to perform a method and/or a solution according to the aforementioned embodiments of the present application.

Example four

Corresponding to the above embodiments, the present application further provides a computer-readable storage medium storing computer-executable instructions for executing the super capacitor testing method.

In the present embodiment, computer-readable storage media may include volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information, such as computer-readable instructions, data structures, program modules, or other data. For example, computer-readable storage media include, but are not limited to, volatile memory such as random access memory (RAM, DRAM, SRAM); and non-volatile memory such as flash memory, various read-only memories (ROM, PROM, EPROM, EEPROM), magnetic and ferromagnetic/ferroelectric memories (MRAM, feRAM); and magnetic and optical storage devices (hard disk, tape, CD, DVD); or other now known media or later developed that can store computer-readable information/data for use by a computer system.

While preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including the preferred embodiment and all changes and modifications that fall within the scope of the embodiments of the present application.

It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims

1. A super capacitor test method is characterized by comprising the following steps:

setting charging parameters corresponding to the super-capacitor battery pack through a charging circuit, charging the super-capacitor battery pack and starting timing;

stopping timing when the charging is finished in response to the detection that the voltage of the super capacitor battery pack exceeds a first preset threshold, and judging whether the charging timing exceeds a second preset threshold or not;

2. The method as claimed in claim 1, wherein the detection circuit comprises an in-situ resistor and a thermistor, the in-situ resistor is used for detecting in-situ signals of the super capacitor, the thermistor is used for detecting the internal temperature of the super capacitor battery pack, and the super capacitor battery pack is identified by the detection circuit, the method comprises:

3. The method for testing the super-capacitor according to claim 2, wherein if the voltages of the on-site resistor and the thermistor deviate, the first judgment result is that the super-capacitor battery pack is abnormal.

4. The method for testing the super capacitor according to claim 1, wherein the charging parameters include at least one of a charging voltage and a charging current, and the setting, by the charging circuit, the charging parameters corresponding to the super capacitor battery pack, charging the super capacitor battery pack and starting timing comprises:

5. The method for testing the super capacitor according to claim 1, wherein the step of performing a voltage balance function test on the first super capacitor and the second super capacitor specifically comprises:

forcibly discharging the second super capacitor through a first discharge circuit based on first discharge time, standing, and then judging whether a second voltage of the second super capacitor is within a preset range of the real-time total voltage of the super capacitor battery pack to obtain a second judgment result;

6. The method for testing the super capacitor according to claim 5, wherein the step of forcibly discharging the second super capacitor through the first discharging circuit based on the first discharging time and standing the second super capacitor, and after the second super capacitor is allowed to stand, judging whether the second voltage of the second super capacitor is within a preset range of the real-time total voltage of the super capacitor battery pack to obtain a second judgment result comprises the steps of:

forcibly discharging the second super capacitor through a first discharge circuit based on a first discharge time;

after the first discharge time, the second super capacitor is placed statically, and the voltage between the second super capacitor and the first super capacitor is automatically balanced through a voltage balancing circuit inside the super capacitor battery pack;

7. The method for testing the super capacitor according to claim 5, wherein the step of forcibly discharging the first super capacitor through the second discharging circuit based on the second discharging time and standing the super capacitor, and after the step of standing the super capacitor, judging whether the first voltage of the first super capacitor is within a preset range of the real-time total voltage of the super capacitor battery pack to obtain a third judgment result comprises the steps of:

after the second discharge time, standing the first super capacitor, and automatically balancing the voltage between the first super capacitor and the second super capacitor through a voltage balancing circuit inside the super capacitor battery pack;

8. The super capacitor test method according to any one of claims 5 to 7, wherein the preset range comprises a first preset proportion and a second preset proportion, and the first preset proportion is not greater than the second preset proportion;

the second discharge time is calculated according to the discharge current of the second discharge circuit, so that the discharge time of the first super capacitor is smaller than a first preset ratio of the total voltage of the super capacitor battery pack after the first super capacitor is discharged.

9. The method of claim 1, wherein after said testing the voltage balancing function of the first supercapacitor and the second supercapacitor, the method further comprises:

10. The method according to claim 9, wherein if the difference is greater than a difference threshold, the fourth determination result is that the super capacitor battery pack is abnormal;

and discharging the super capacitor battery pack until the total voltage of the super capacitor battery pack is less than a fifth voltage, and outputting the test result that the test is passed.

11. The supercapacitor test method according to any one of claims 1 to 7, 9 and 10, wherein before the identifying of the supercapacitor cell pack by the detection circuit, the method further comprises:

initializing the test times to zero;

if the test result is a test pass, after the test result is output, the method further includes:

increasing the counting number of the test times by one, and judging whether the test times reach a set time or not;

and if the test times do not reach the set times, setting the charging parameters corresponding to the super-capacitor battery pack through the charging circuit again, charging the super-capacitor battery pack, starting timing, and re-executing the test until the test times reach the set times.

12. The supercapacitor test method according to claim 5, wherein the supercapacitor pack further comprises an intermediate node between the first supercapacitor and the second supercapacitor, the intermediate node being a negative output of the first supercapacitor and a positive output of the second supercapacitor;

13. An ultracapacitor testing device, wherein the device comprises:

the charging module is used for setting charging parameters corresponding to the super-capacitor battery pack through a charging circuit, charging the super-capacitor battery pack and starting timing;

and the voltage balance testing module is used for testing the voltage balance function of the first super capacitor and the second super capacitor and outputting a testing result if the charging timing exceeds the second preset threshold value.

14. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the supercapacitor test method according to any one of claims 1 to 12 when executing the computer program.

15. A computer-readable storage medium storing computer-executable instructions for performing the method of any one of claims 1-12.