CN115425042A - Method for preparing monolithic integrated light receiving chip - Google Patents
Method for preparing monolithic integrated light receiving chip Download PDFInfo
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- CN115425042A CN115425042A CN202211189284.4A CN202211189284A CN115425042A CN 115425042 A CN115425042 A CN 115425042A CN 202211189284 A CN202211189284 A CN 202211189284A CN 115425042 A CN115425042 A CN 115425042A
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
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- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
- H01L27/14614—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor having a special gate structure
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Abstract
The invention discloses a preparation method of a monolithic integrated light receiving chip, belonging to the technical field of basic electrical elements. The preparation method mainly comprises the following steps: manufacturing a trans-impedance amplifier on an InP HBT epitaxial wafer; growing an epitaxial layer of an InP PIN photoelectric detector on an InP semi-insulating substrate; stripping an epitaxial layer of the InP PIN photoelectric detector from an original substrate; transferring an epitaxial layer of the InP PIN detector to a transimpedance amplifier chip; completing the manufacture of the InP PIN photoelectric detector; and the electrical interconnection between the detector and the trans-impedance amplifier is completed through on-chip wiring. The method not only can realize the monolithic integration of the photoelectric detector and the transimpedance amplifier, but also supports the independent design of the epitaxial layer structures of the detector and the transimpedance amplifier, so that the performance of the integrated light receiving chip reaches the optimal value.
Description
Technical Field
The invention relates to the field of semiconductor devices, in particular discloses a preparation method of a monolithic integrated light receiving chip, and belongs to the technical field of basic electrical elements.
Background
The light receiving front end mainly comprises a photoelectric detector and a trans-impedance amplifier, and is used for converting an optical signal into an electric signal and amplifying the electric signal. The photoelectric detector and the trans-impedance amplifier are monolithically integrated on the same substrate, so that the size of the whole device can be reduced, the influence of gold wire lead interconnection on the performance can be reduced, and the light receiving front end has larger bandwidth and higher gain.
The conventional method for realizing monolithic integration of the photodetector and the transimpedance amplifier is an epitaxial layer sharing method, that is, the same epitaxial layer is used for the photodetector and a Heterojunction Transistor (HBT) of a core device in the transimpedance amplifier. Although the epitaxial layer sharing method simplifies the preparation process of the integrated chip, the performance of the two devices is difficult to achieve the optimum simultaneously because the epitaxial layer structures of the detector and the HBT cannot be independently designed.
The secondary epitaxial method can meet the requirement of independently designing a device structure, but the difficulty of realizing a high-quality secondary epitaxial layer is very high. The epitaxial layer transfer technology which is established in recent years is expected to replace a secondary epitaxial method, and becomes an effective technical approach for realizing a high-performance monolithic integrated light receiving chip. However, the conventional epitaxial layer transfer technique has a problem in that the surface of the epitaxial layer is easily damaged during the transfer. Since the performance of optoelectronic devices is very sensitive to the quality of the epitaxial layer surface, it is imperative to develop new material transfer techniques to achieve a perfect transfer of the epitaxial layer material.
In summary, the present invention is directed to a method for manufacturing a monolithic integrated light receiving chip, so as to overcome the defects of the conventional monolithic integrated light receiving chip manufacturing process.
Disclosure of Invention
The invention aims to provide a preparation method of a monolithic integrated light receiving chip aiming at the defects of the background technology, so that the overall performance of the light receiving chip is improved, the technical problems that the probe and HBT epitaxial layer structure cannot be independently designed by an epitaxial layer sharing method and the performance requirements of the monolithic integrated light receiving chip cannot be met by the existing epitaxial layer transfer technology are solved, and the purpose of perfectly transferring the performance of the probe epitaxial layer, the probe and the HBT is achieved at the same time.
The invention adopts the following technical scheme for realizing the aim of the invention:
a method for preparing a monolithic integrated light receiving chip comprises the following steps:
step 1: manufacturing a trans-impedance amplifier based on an InP HBT epitaxial wafer;
step 2: growing an epitaxial layer of an InP PIN photoelectric detector on an InP semi-insulating substrate;
and step 3: stripping an epitaxial layer of the InP PIN photoelectric detector from the original substrate by using a temporary slide;
and 4, step 4: transferring an epitaxial layer of the InP PIN photoelectric detector to a transimpedance amplifier chip;
and 5: preparing an InP PIN waveguide type photoelectric detector;
step 6: and completing the electric signal communication between the detector and the trans-impedance amplifier through vertical electric interconnection.
Further, the specific method for manufacturing the transimpedance amplifier based on the indium phosphide heterojunction transistor epitaxial wafer in the step 1 comprises the following steps: preparing three table surfaces of an emitter region, a base region and a collector region of the indium phosphide heterojunction transistor on an epitaxial substrate outside the indium phosphide heterojunction transistor by adopting a wet etching process, and then finishing the manufacture of emitter metal, base metal and collector metal; spin-coating benzocyclobutene on the transimpedance amplifier chip formed in the step 1-1, performing high-temperature curing, exposing emitter metal, base metal and collector metal of the indium phosphide heterojunction transistor by a dry etching process, and finishing the manufacture of first metal wiring; depositing a silicon nitride medium on metal formed after the first metal wiring of the collector region, and manufacturing the MIM capacitor by using the silicon nitride medium; and spin-coating benzocyclobutene on the transimpedance amplifier chip after the MIM capacitor is manufactured, and performing high-temperature curing to finish the manufacture of the second wiring metal.
Further, step 2 specifically comprises: an InP buffer layer, a first InGaAsP corrosion stop layer, a second InP corrosion stop layer, a third InGaAsP corrosion stop layer, a fourth InP corrosion stop layer, an N-InGaAsP waveguide layer, an i-InGaAs absorption layer, a P-InGaAsP energy band smoothing layer, a P-InP barrier layer and a P-InGaAs contact layer are sequentially grown on an InP semi-insulating substrate.
Further, the thicknesses of the first InGaAsP corrosion stop layer, the second InP corrosion stop layer, the third InGaAsP corrosion stop layer and the fourth InP corrosion stop layer of the epitaxial layer structure of the InP PIN photodetector grown in the step 2 are sequentially decreased, and the thicknesses are respectively 2 μm, 0.5 μm, 0.1 μm and 0.01 μm. The central wavelength of the N-InGaAsP waveguide layer and the central wavelength of the P-InGaAsP energy band smoothing layer are both 1.2 mu m, the thickness of the N-InGaAsP waveguide layer is 2.8 mu m, the thickness of the i-InGaAs absorption layer is 0.4 mu m, and the thickness of the P-InGaAsP energy band smoothing layer is 0.5 mu m.
Further, the specific method for stripping the epitaxial layer of the InP PIN photodetector from the original substrate by using the temporary carrier in step 3 is as follows: the temporary slide and the epitaxial wafer of the InP PIN photoelectric detector are bonded together through high-temperature wax; and removing most of the InP semi-insulating substrate by mechanical thinning, and removing the rest of the InP semi-insulating substrate, the InP buffer layer and each etch stop layer by wet etching, wherein the solution for wet etching InP is concentrated hydrochloric acid, and the solution for etching InGaAsP is a mixed solution of phosphoric acid, hydrogen peroxide and water.
Further, the specific method for transferring the epitaxial layer of the InP PIN photodetector to the transimpedance amplifier chip in step 4 is as follows: respectively spin-coating BCB solution on the transimpedance amplifier chip and the InP PIN epitaxial layer, and pre-curing BCB by pre-baking at 180 ℃ for 60min; bonding the transimpedance amplifier chip and the temporary slide together through BCB; heating at 250 ℃ to melt the high-temperature wax to remove the temporary slide, and cleaning the residual high-temperature wax by using a toluene solution; and (3) heating the transimpedance amplifier chip transferred with the InP PIN epitaxial layer in an oven to realize the complete solidification of the BCB, wherein the temperature in the oven is set to be 280 ℃ and the time is 120min.
Further, the specific method for preparing the InP PIN waveguide photodetector in step 5 is as follows: and manufacturing P-type contact metal, corroding to form a PD table top, preparing N-type contact metal, annealing the N-type contact metal, and etching the ridge waveguide and the isolation table top.
Further, the specific method for completing the electrical signal communication between the detector and the transimpedance amplifier through the vertical electrical interconnection in the step 6 is as follows: spin-coating a BCB solution on the transimpedance amplifier chip to planarize the whole chip; etching BCB at the corresponding positions of the second metal wiring of the trans-impedance amplifier and the electrode of the photoelectric detector to form a medium hole; and the dielectric hole is filled by electroplating metal Au, and the photoelectric detector and the transimpedance amplifier are electrically interconnected.
By adopting the technical scheme, the invention has the following beneficial effects:
(1) The invention is based on the epitaxial layer transfer technology, transfers the epitaxial layer of the InP PIN detector to the chip of the transimpedance amplifier, and realizes the monolithic integration of the detector and the transimpedance amplifier through the subsequent micromachining process.
(2) In the aspect of epitaxial layer transfer of the InP PIN detector, the invention adopts a multilayer corrosion stop layer structure with gradually reduced thickness, thereby effectively preventing InP corrosion liquid from corroding and damaging the surface of the InGaAsP waveguide layer for a long time, reducing the optical transmission loss of the InGaAsP waveguide and improving the responsivity of the detector.
(3) The preparation scheme of the monolithic integrated light receiving chip allows the epitaxial structures of the InP detector and the InP HBT to be flexibly and independently designed, so that the detector and the transimpedance amplifier can achieve respective optimal performances, and the overall performance of the integrated light receiving chip is further improved.
Drawings
FIG. 1 is a flow chart of the present invention for preparing a monolithically integrated light receiving chip.
Fig. 2 is a schematic cross-sectional diagram of an InP HBT transimpedance amplifier completed in step 1 of the present invention.
Fig. 3 is a structural view of an epitaxial layer of the InP PIN photodetector grown in step 2 of the present invention.
FIG. 4 is a schematic view of a specific process flow of step 3 of the present invention.
Fig. 5 is a schematic cross-sectional view of the sapphire substrate bonded with the transimpedance amplifier chip in step 4 of the present invention.
Fig. 6 is a schematic cross-sectional view of an InP PIN waveguide type photodetector completed in step 5 of the present invention.
Fig. 7 is a schematic cross-sectional view of a monolithically integrated light receiving chip completed in step 6 of the present invention.
The reference numbers in the figures illustrate: 1. an InP HBT epitaxial substrate; 2. an InP HBT emitting region; 3. an InP HBT base region; 4. an InP HBT collector region; 5. a first BCB membrane; 6. a first-time wiring metal; 7. a SiN medium; 8. an MIM capacitor; 9. a second BCB film; 10. second routing metal; 11. a third BCB film, 12, an epitaxial layer of an InP PIN photoelectric detector; 13. high temperature wax; 14. a sapphire slide; 15. a P-type contact metal; 16. a PD table-board; 17. an N-type contact metal; 18. isolating the table top; 19. a fourth BCB film; 20. the metal is wired for the third time.
Detailed Description
The technical solutions in the embodiments of the present invention will be described in detail below with reference to the accompanying drawings in the embodiments of the present invention.
The present embodiment provides a method for manufacturing a monolithic integrated light receiving chip, and a flowchart of the manufacturing method is shown in fig. 1, which specifically includes the following 6 steps.
Step 1: the method for manufacturing the transimpedance amplifier based on the InP HBT epitaxial wafer comprises the following steps: corroding an InP HBT epitaxial wafer by adopting a wet etching process, completing the manufacture of three table tops of an InP HBT emitting region 2, an InP HBT base region 3 and an InP HBT collector region 4 on an InP HBT epitaxial substrate 1, and simultaneously completing the manufacture of emitter metal, base metal and collector metal; spin-coating benzocyclobutene and carrying out high-temperature curing to realize BCB planarization, forming a first BCB film 5, then exposing three electrodes of the InP HBT device through a dry etching process, and then finishing the manufacture of a first-time wiring metal 6; and depositing a SiN medium 7, manufacturing an MIM capacitor 8 by using the SiN medium, spin-coating BCB and performing high-temperature curing to realize BCB planarization, forming a second BCB film 9, and finally finishing the manufacturing of a second-time wiring metal 10, wherein the finished InP HBT trans-impedance amplifier is shown in FIG. 2.
Step 2: growing an epitaxial layer of an InP PIN photoelectric detector on an InP semi-insulating substrate to form an InP PIN epitaxial wafer, wherein the grown epitaxial layer has a material structure as shown in FIG. 3, and the material structure sequentially comprises the following components from bottom to top: the structure of the optical waveguide comprises a 0.5 mu m InP buffer layer (namely an InP buffer layer), a 2 mu m InGaAsP corrosion stop layer (namely a first corrosion stop layer InGaAsP corrosion stop layer), a 0.5 mu m InP corrosion stop layer (namely a second corrosion stop layer InP corrosion stop layer), a 0.1 mu m InGaAsP corrosion stop layer (namely a third corrosion stop layer InGaAsP corrosion stop layer), a 0.01 mu m InP corrosion stop layer (namely a fourth corrosion stop layer InP corrosion stop layer), a 2.8 mu m N-InGaAsP waveguide layer (namely an N-type InGaAsP waveguide layer), a 0.4 mu m i-InGaAs absorption layer (namely an intrinsic InGaAs absorption layer), a 0.5 mu m P-InGaAsP energy band smoothing layer (namely a P-type InGaAsP energy band smoothing layer), a 0.5 mu m P-InP blocking layer (namely a P-type InGaAs blocking layer) and a 0.1 mu m P-InGaAs contact layer (namely a P contact layer), wherein the wavelength of the InAs and the InGaAs contact layer are both of N-InGaAsP type InGaAs contact layer.
And step 3: an epitaxial layer of the InP PIN photodetector is peeled off from the original substrate by using a temporary carrier, in this embodiment, sapphire is used as the temporary carrier, and the specific process flow is as shown in fig. 4: respectively spin-coating high-temperature wax on a sapphire slide and an InP PIN epitaxial wafer, and bonding the sapphire slide and the InP PIN epitaxial wafer together through the high-temperature wax, wherein the bonding temperature is 200 ℃, and the bonding pressure is 2bar; thinning the InP semi-insulating substrate to about 20 mu m by mechanical grinding; and removing the rest InP semi-insulating substrate, the InP buffer layer and each etch stop layer by wet etching, wherein the solution for wet etching InP is concentrated hydrochloric acid, and the solution for etching InGaAsP is a mixed solution of phosphoric acid, hydrogen peroxide and water.
And 4, step 4: the method for transferring the epitaxial layer of the InP PIN photoelectric detector to the transimpedance amplifier chip comprises the following steps: respectively spin-coating BCB solution on the transimpedance amplifier chip and the epitaxial layer 12 of the InP PIN photoelectric detector, and realizing the precuring of the BCB by pre-baking at 180 ℃ for 60min; bonding the transimpedance amplifier chip and the sapphire slide together through a third BCB film 11, as shown in fig. 5; heating at 250 ℃ to melt the high-temperature wax to remove the temporary slide, and cleaning the high-temperature wax remained on the transimpedance amplifier chip by using a toluene solution; and (3) heating the transimpedance amplifier chip transferred with the epitaxial layer of the InP PIN photoelectric detector in an oven to realize the complete solidification of the BCB, wherein the temperature in the oven is set to be 280 ℃ and the time is 120min.
And 5: the specific method for preparing the InP PIN waveguide type photoelectric detector comprises the following steps: preparing P-type contact metal 15 on the P-InGaAs contact layer, wherein the P-type contact metal is Ti/Pt/Au; sequentially etching a P-InP barrier layer, a P-InGaAsP energy band smoothing layer and an i-InGaAs absorption layer by taking the P-type contact metal 15 as a mask to form a PD table 16, wherein the InP etching solution is concentrated hydrochloric acid, and the InGaAsP and InGaAs etching solutions are mixed solution of phosphoric acid, hydrogen peroxide and water; preparing N-type contact metal 17 on the N-InGaAsP waveguide layer, wherein the N-type contact metal is AuGeNi/Au; annealing the N-type contact metal at 300 ℃ for 50s; preparing a ridge waveguide on the N-InGaAsP waveguide layer by photoetching and dry etching processes; finally, the isolation mesa 18 is fabricated by photolithography and etching. Figure 6 shows a schematic cross-sectional view of an InP PIN waveguide photodetector.
Step 6: the electrical signal communication between the detector and the trans-impedance amplifier is completed through vertical electrical interconnection, and the specific method comprises the following steps: spin-coating a BCB solution on an InP HBT chip, flattening the BCB to form a fourth BCB film 19, and curing the BCB at 280 ℃ for 120min; etching the BCB film in the vertical space where the second wiring metal 10 of the transimpedance amplifier and the electrode metal of the photoelectric detector are located to form a dielectric hole; the third-time wiring metal 20 is manufactured by filling the dielectric hole with plated metal Au, so that the photoelectric detector and the transimpedance amplifier are electrically interconnected. Fig. 7 is a schematic cross-sectional view of the completed monolithically integrated light-receiving chip.
The above embodiments are merely illustrative of the present invention, and do not limit the protection scope thereof, and those skilled in the art may also partially change the above embodiments, for example, more etch stop layers with gradually decreasing thickness may be prepared on the InP buffer layer, so as to better achieve perfect transferring of the epitaxial layer of the photodetector and further improve the responsivity of the photodetector.
Claims (10)
1. A method for preparing a monolithic integrated light receiving chip is characterized by comprising the following steps:
step 1: manufacturing a trans-impedance amplifier based on an indium phosphide heterojunction transistor epitaxial wafer;
step 2: growing an epitaxial layer of the indium phosphide PIN photoelectric detector on an indium phosphide semi-insulating substrate to form an epitaxial wafer of the indium phosphide PIN photoelectric detector;
and step 3: stripping the epitaxial layer of the indium phosphide PIN photoelectric detector from the original substrate by using a temporary slide glass;
and 4, step 4: transferring an epitaxial layer of the indium phosphide PIN photoelectric detector to a transimpedance amplifier chip;
and 5: preparing an indium phosphide PIN waveguide type photoelectric detector;
step 6: and completing the electric signal communication between the indium phosphide PIN waveguide type photoelectric detector and the transimpedance amplifier through vertical electric interconnection.
2. The method for preparing the monolithic integrated light receiving chip according to claim 1, wherein the step 2 of growing the epitaxial layer of the indium phosphide PIN photodetector on the indium phosphide semi-insulating substrate comprises the following specific steps: the method comprises the steps of growing an indium phosphide buffer layer, a first corrosion stop layer, a second corrosion stop layer, a third corrosion stop layer, a fourth corrosion stop layer, an N-type indium gallium arsenic phosphorus waveguide layer, an intrinsic indium gallium arsenic absorption layer, a P-type indium gallium arsenic phosphorus energy band smoothing layer, a P-type indium phosphide barrier layer and a P-type indium gallium arsenic contact layer on an indium phosphide semi-insulating substrate in sequence, wherein the first corrosion stop layer and the third corrosion stop layer are indium gallium arsenic phosphorus corrosion stop layers, and the second corrosion stop layer and the fourth corrosion stop layer are indium phosphide corrosion stop layers.
3. The method of claim 2, wherein the first, second, third and fourth etch stop layers have decreasing thicknesses.
4. The method for preparing the monolithic integrated light receiving chip according to claim 3, wherein the step 3 of stripping the epitaxial layer of the indium phosphide PIN photodetector from the original substrate by using the temporary carrier comprises the following specific steps:
step 3-1: bonding the temporary slide glass and an epitaxial wafer of the indium phosphide PIN photoelectric detector through high-temperature wax;
step 3-2: removing the indium phosphide semi-insulating substrate by adopting a mechanical thinning mode;
step 3-3: and removing the residual indium phosphide semi-insulating substrate, the indium phosphide buffer layer and each etching stop layer by adopting wet etching.
5. The method according to claim 4, wherein the solution for removing the remaining InP semi-insulating substrate, inP buffer layer, second etch stop layer, and fourth etch stop layer by wet etching is concentrated hydrochloric acid.
6. The method of claim 4, wherein the solution for removing the first and third etch stop layers by wet etching is a mixture of phosphoric acid, hydrogen peroxide, and water.
7. The method for preparing the monolithic integrated light receiving chip according to claim 1, wherein the step 4 of transferring the epitaxial layer of the indium phosphide PIN photodetector onto the transimpedance amplifier chip comprises the following specific steps:
step 4-1: respectively spin-coating benzocyclobutene on the temporary slide glass and the transimpedance amplifier chip, and pre-curing the benzocyclobutene through pre-baking;
step 4-2: taking the pre-cured benzocyclobutene as a bonding medium, and bonding the transimpedance amplifier chip and the temporary slide glass together;
step 4-3: heating and melting the high-temperature wax in the bonding sheet, removing the temporary slide, and cleaning the high-temperature wax remained on the transimpedance amplifier chip by using a toluene solution;
step 4-4: and baking the trans-impedance amplifier chip with the indium phosphide photoelectric detector epitaxial layer until the benzocyclobutene is completely cured.
8. The method for preparing a monolithic integrated light receiving chip according to claim 1, wherein the specific method for preparing the indium phosphide PIN waveguide type photodetector in the step 5 comprises:
step 5-1: preparing a P-type contact metal on the P-type contact layer;
step 5-2: sequentially corroding the P-type indium phosphide barrier layer, the P-type indium gallium arsenic phosphorus energy band smoothing layer and the intrinsic indium gallium arsenic absorption layer by taking the P-type contact metal as a mask to form a PD table top;
step 5-3: preparing N-type contact metal on the N-type InGaAsP waveguide layer, and annealing the N-type contact metal;
step 5-4: preparing a ridge waveguide on the N-type InGaAsP waveguide layer by photoetching and dry etching processes;
step 5-5: the isolation mesa is fabricated by photolithography and etching.
9. The method for manufacturing a monolithically integrated light-receiving chip according to any one of claims 1 to 8, wherein the step 1 is a specific method for manufacturing a transimpedance amplifier based on an indium phosphide heterojunction transistor epitaxial wafer, and comprises the following steps:
step 1-1: preparing three table surfaces of an emitter region, a base region and a collector region of the indium phosphide heterojunction transistor on an epitaxial substrate outside the indium phosphide heterojunction transistor by adopting a wet etching process, and then finishing the manufacture of emitter metal, base metal and collector metal;
step 1-2: spin-coating benzocyclobutene on the transimpedance amplifier chip formed in the step 1-1, performing high-temperature curing, exposing emitter metal, base metal and collector metal of the indium phosphide heterojunction transistor by a dry etching process, and finishing the manufacture of first metal wiring;
step 1-3: depositing a silicon nitride medium on metal formed after the first metal wiring of the collector region, and manufacturing an MIM capacitor by using the silicon nitride medium;
step 1-4: and spin-coating benzocyclobutene on the transimpedance amplifier chip after the MIM capacitor is manufactured, and performing high-temperature curing to finish the manufacture of the second wiring metal.
10. The method for preparing the monolithic integrated light receiving chip according to claim 9, wherein the step 6 of completing the electrical signal communication between the indium phosphide PIN waveguide type photodetector and the transimpedance amplifier through vertical electrical interconnection comprises the following specific steps:
step 6-1: spin-coating benzocyclobutene solution on the epitaxial wafer of the indium phosphide heterojunction transistor, baking the epitaxial wafer of the indium phosphide heterojunction transistor coated with the benzocyclobutene solution until the benzocyclobutene solution is completely solidified,
step 6-2: etching solidified benzocyclobutene in a vertical space where the secondary wiring metal of the transimpedance amplifier and the indium phosphide PIN waveguide type photoelectric detector electrode are located to form a medium hole;
step 6-3: and the medium hole is filled with electroplated metal to complete the vertical electrical interconnection of the indium phosphide PIN waveguide type photoelectric detector and the transimpedance amplifier.
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