CN115423814B - Chip origin positioning method and device, readable storage medium and electronic equipment - Google Patents
Chip origin positioning method and device, readable storage medium and electronic equipment Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T7/00—Image analysis
- G06T7/0002—Inspection of images, e.g. flaw detection
- G06T7/0004—Industrial image inspection
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T7/00—Image analysis
- G06T7/10—Segmentation; Edge detection
- G06T7/13—Edge detection
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T7/00—Image analysis
- G06T7/70—Determining position or orientation of objects or cameras
- G06T7/73—Determining position or orientation of objects or cameras using feature-based methods
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2207/00—Indexing scheme for image analysis or image enhancement
- G06T2207/30—Subject of image; Context of image processing
- G06T2207/30108—Industrial image inspection
- G06T2207/30148—Semiconductor; IC; Wafer
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2207/00—Indexing scheme for image analysis or image enhancement
- G06T2207/30—Subject of image; Context of image processing
- G06T2207/30204—Marker
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- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
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Abstract
The invention discloses a chip origin positioning method, a chip origin positioning device, a readable storage medium and electronic equipment, wherein the method comprises the following steps: acquiring a photomask coordinate file of a chip to be positioned, wherein the photomask coordinate file stores coordinates of a plurality of standard mark positions of the chip to be positioned; acquiring a scanned chip image of the chip to be positioned, and acquiring coordinates of a plurality of original point to-be-arranged areas in the chip image; judging whether the coordinates of the standard mark bits are matched with the coordinates of the areas to be arranged at the original points one by one; if so, determining the origin of the chip to be positioned from the multiple origin to-be-arranged areas according to a first preset rule. The invention solves the problem of low accuracy in chip origin positioning in the prior art.
Description
Technical Field
The invention relates to the technical field of chip manufacturing, in particular to a chip origin positioning method and device, a readable storage medium and electronic equipment.
Background
In the field of LED chip manufacturing, in two test operation links of back end point measurement, in order to ensure that all subsequent processes can normally close the picture, the point measurement needs to find and define the original point, aiming at the prior art of complete film sources, fixed patterns are found to be positioned to the original point position, but the original point position is influenced by the previous process, the pattern color fluctuation is large, and the same Mark point on the same film is more than one, and a machine table easily finds the wrong position, thereby causing the problem of low chip original point positioning accuracy.
Disclosure of Invention
In view of the above, the present invention provides a method and an apparatus for positioning a chip origin, a readable storage medium, and an electronic device, and aims to solve the problem of low accuracy in positioning a chip origin in the prior art.
The embodiment of the invention is realized as follows:
a method of chip origin location, the method comprising:
acquiring a photomask coordinate file of a chip to be positioned, wherein the photomask coordinate file stores coordinates of a plurality of standard mark positions of the chip to be positioned;
acquiring a scanned chip image of the chip to be positioned, and acquiring coordinates of a plurality of original point to-be-arranged areas in the chip image;
judging whether the coordinates of the standard mark bits are matched with the coordinates of the areas to be arranged at the original points one by one;
if so, determining the origin of the chip to be positioned from the multiple origin to-be-arranged areas according to a first preset rule.
Further, the chip origin positioning method described above, wherein the step of determining whether the coordinates of the plurality of standard mark bits match the coordinates of the plurality of areas where the origins are to be arranged one by one further includes:
when the coordinates of the standard mark positions are judged to be not matched with the coordinates of the areas to be arranged at the original points, acquiring the distribution profile of the chip to be positioned according to the chip image to determine the radian trend of an outer ring arc of the chip to be positioned;
filling the chip images according to the outer ring arc radian trend of the chip to be positioned to obtain a target chip image;
and determining the origin of the chip to be positioned from the multiple origin to-be-arranged areas according to the target chip image and a second preset rule.
Further, in the chip origin positioning method, the step of determining the origin of the chip to be positioned from the multiple areas where the origins are to be arranged according to a first preset rule includes:
determining an original point arrangement area from the areas to be arranged with the original points according to the first preset rule, and taking a first crystal grain at a preset position in the original point arrangement area as the original point;
the first preset rule is to search an arrangement area in the middle of a chip to be positioned, and the preset position is the upper right corner of the original point arrangement area.
Further, in the chip origin positioning method, the step of determining the origin of the chip to be positioned from the plurality of origin to-be-arranged regions according to the target chip image and a second preset rule includes:
matching the coordinates of a plurality of origin point to-be-arranged areas in the target chip image with the coordinates of a plurality of standard mark bits one by one to obtain position information of a preset origin point arrangement area in the target chip image;
and determining the origin of the chip to be positioned according to the position information of the preset origin arrangement area in the target chip image in the origin arrangement areas.
Further, in the chip origin positioning method, the step of determining the origin of the chip to be positioned according to the position information of the preset origin arrangement region in the target chip image in the multiple origin arrangement regions includes:
when the preset original point arrangement area is positioned on the original chip image, taking a first crystal grain at a preset position in the original point arrangement area as an original point;
when the preset original point arrangement area is located on the supplemented chip image, determining a target original point arrangement area from the original chip image according to the second preset rule, and taking a first crystal grain at a preset position in the target original point arrangement area as an original point;
the second preset rule is that a first arrangement area found from left to right and from top to bottom in the areas where the origins are to be arranged is a target origin arrangement area, and the preset position is the upper right corner of the target origin arrangement area.
Further, the chip origin positioning method includes the following steps of supplementing the chip image according to the trend of the outer circle arc radian of the chip to be positioned to obtain a target chip image:
randomly taking three positioning points from the outer circular arc, and respectively making two straight lines according to the positioning points;
and acquiring the perpendicular bisectors of the two straight lines, determining the intersection point of the perpendicular bisectors as a circle center, and completing the chip image according to the circle center and the outer circular arc.
Further, the chip origin positioning method includes:
and storing the position of the origin point and the chip to be positioned in a one-to-one correspondence manner, acquiring the identification characteristic of the chip to be positioned at present when the chip origin point positioning is detected to be required, and determining the position of the origin point of the chip to be positioned at present according to the identification characteristic.
Another object of the present invention is to provide an apparatus for locating a chip origin, the apparatus comprising:
the device comprises an acquisition module, a positioning module and a control module, wherein the acquisition module is used for acquiring a photomask coordinate file of a chip to be positioned, and the photomask coordinate file stores the coordinates of a plurality of standard mark positions of the chip to be positioned;
the acquisition module is used for acquiring the scanned chip image of the chip to be positioned and acquiring the coordinates of a plurality of original point to-be-arranged areas in the chip image;
the judging module is used for judging whether the coordinates of the standard mark bits are matched with the coordinates of the areas to be arranged of the original points one by one;
and the first positioning module is used for determining the origin of the chip to be positioned from the areas to be arranged at the origins according to a first preset rule when the coordinates of the standard mark positions are judged to be matched with the coordinates of the areas to be arranged at the origins one by one.
It is a further object of the invention to provide a readable storage medium, on which a computer program is stored, which program, when being executed by a processor, carries out the steps of the method of any of the above.
It is a further object of the invention to provide an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of the method as described above when executing the program.
According to the method, the photomask coordinate file which is arranged on the machine table in advance and corresponds to the chip to be positioned is obtained and matched with the scanned chip image of the chip to be positioned, the original point of the chip to be positioned is determined from the multiple original point areas to be arranged according to the first preset rule after the current chip is judged to be complete according to the matching result of the original point areas to be arranged in the chip image of the chip to be positioned and the photomask coordinate file, the interferences such as chromatic aberration and the like are solved in a mode of finding the round points through the photomask coordinate position, and the positioning accuracy is higher compared with an image identification method. The problem of among the prior art, the accuracy is low when carrying out origin location is solved.
In addition, the chip origin positioning method provided by the invention at least has the following beneficial effects:
1. the consistency problem of APC (next procedure) sampling test and full test dots (previous procedure) is realized by a loading (original point chip corresponding storage) and mapping (chip matching) technology, and the error rate of dot inconsistency is reduced;
2. the automatic original point finding of the full-measurement of the broken piece is realized by a circle drawing method of the residual edge radian form, and the problems that the original point finding of the broken piece is easy to be wrong and the front and the back are different by personnel are solved;
3. through the automatic origin point finding, the personnel operation steps are saved, and the risks of personnel contact pollution and the like are reduced.
Drawings
FIG. 1 is a flowchart illustrating a chip origin positioning method according to a first embodiment of the present invention;
FIG. 2 is a schematic diagram illustrating a matching process between a mask coordinate file and a chip image in the chip origin positioning method according to an embodiment of the invention;
FIG. 3 is a schematic diagram illustrating a process of determining origins in a plurality of areas where the origins are to be arranged in the chip origin positioning method according to an embodiment of the present invention;
FIG. 4 is a schematic diagram illustrating a process of performing origin positioning on a defective chip image in the chip origin positioning method according to an embodiment of the present invention;
fig. 5 is a block diagram of a chip origin positioning device according to a third embodiment of the present invention.
The following detailed description will further illustrate the invention in conjunction with the above-described figures.
Detailed Description
To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Several embodiments of the invention are presented in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "secured to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for purposes of illustration only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
How to improve the accuracy of the chip origin positioning will be described in detail below with reference to specific embodiments and the accompanying drawings.
Example one
Referring to fig. 1, a chip origin positioning method according to a first embodiment of the present invention is shown, and the method includes steps S10 to S13.
And S10, acquiring a photomask coordinate file of the chip to be positioned, wherein the photomask coordinate file stores coordinates of a plurality of standard mark positions of the chip to be positioned.
The method comprises the steps of setting a photomask coordinate file of a chip to be positioned on a detection machine, wherein the coordinates of each standard mark position of the chip to be positioned stored in the photomask coordinate file are set under the condition that an original point is correct, specifically, the detection machine is a point measurement machine, and each different type of chip corresponds to different photomask coordinate files.
And S11, acquiring the scanned chip image of the chip to be positioned, and acquiring coordinates of a plurality of original point to-be-arranged areas in the chip image.
The chip to be positioned can be scanned through the machine table so as to obtain a chip image of the chip to be positioned, specifically, a blank area for marking can be arranged on the chip, correspondingly, the chip image can contain a plurality of blank areas for marking positioning, namely, an original point is to be arranged in an area, and one of the areas to be arranged from the original points can be selected as the original point arrangement area.
And S12, judging whether the coordinates of the standard mark bits are matched with the coordinates of the areas to be arranged of the original points one by one, and if so, executing the step S13.
Specifically, the coordinates of the area where the origin is to be arranged may be obtained and matched with the coordinates of the plurality of standard mark bits, and it is determined whether the chip is a complete chip or a incomplete chip, and the corresponding origin determining method is determined according to the integrity of the chip determined by the matching result, where in this embodiment, the matching process may be as shown in fig. 2.
And S13, determining the origin of the chip to be positioned from the areas to be arranged with the origins according to a first preset rule.
When the chip to be positioned is judged to be a complete chip, the original point of the chip to be positioned can be directly determined in the area to be arranged from the multiple original points, specifically, one area can be selected from the area to be arranged from the multiple original points as the original point arrangement area according to actual requirements, and therefore the original point of the chip to be positioned can be determined.
Specifically, in some optional embodiments of the present invention, the step of determining the origin of the chip to be positioned from the multiple origin to-be-arranged regions according to a first preset rule includes:
determining an original point arrangement area from the areas to be arranged with the original points according to the first preset rule, and taking a first crystal grain at a preset position in the original point arrangement area as the original point;
the first preset rule is to search an arrangement area in the middle of a chip to be positioned, and the preset position is the upper right corner of the original point arrangement area.
In this embodiment, as shown in fig. 3, the number of the regions to be arranged at the origin may be set to 8, and the 8 regions to be arranged at the origin are respectively arranged along the chip transverse direction and the longitudinal direction, wherein, preferably, the region No. 6 may be selected as the region to be arranged at the origin, and the position of the first crystal grain located at the upper right corner of the region to be arranged at the origin is used as the origin of the chip to be positioned.
In addition, in some optional embodiments of the present invention, in order to improve convenience in the whole wafer spot measurement process, since several spot measurement processes are required during the spot measurement process, wherein an origin needs to be searched and located, after the location of each chip is determined, the obtained data may be stored, specifically, the location of the origin and the chip to be located are stored in a one-to-one correspondence manner, and when it is detected that the chip origin needs to be located, an identification feature of the chip to be currently located is obtained, and the location of the origin of the chip to be currently located is determined according to the identification feature.
After the chip is loaded, the machine platform firstly carries out full scanning to scan out the characteristics of the chip, such as the number, the outline, the blank area coordinate and the like, the corresponding and unique chip can be determined according to the respective characteristics or the combined characteristics of the number, the outline and the blank area coordinate, the original point of the chip can be directly determined according to the original point data stored in advance, and then the subsequent test is carried out, so that the repeated positioning is avoided, and the accuracy of the original point positioning is further improved.
In summary, in the chip origin positioning method in the above embodiment of the present invention, the mask coordinate file corresponding to the chip to be positioned, which is preset on the machine, is obtained and matched with the scanned chip image of the chip to be positioned, after the current chip is judged to be complete according to the matching result of the origin to-be-arranged area in the chip image of the chip to be positioned and the mask coordinate file, the origin of the chip to be positioned is determined from the multiple origin to-be-arranged areas according to the first preset rule, and by means of the way of finding the dots at the mask coordinate position, the interferences such as chromatic aberration are solved, and the positioning accuracy is higher compared with that of the image recognition method. The problem of among the prior art, the accuracy is low when carrying out origin location is solved.
Example two
The present embodiment also provides a chip origin positioning method, where the chip origin positioning method in the present embodiment is different from the chip origin positioning method in the first embodiment in that:
step S12 is followed by:
when the coordinates of the standard mark positions are judged to be not matched with the coordinates of the areas to be arranged at the original points, acquiring the distribution profile of the chip to be positioned according to the chip image to determine the radian trend of an outer ring arc of the chip to be positioned;
filling the chip images according to the outer ring arc radian trend of the chip to be positioned to obtain a target chip image;
and determining the origin of the chip to be positioned from the multiple origin to-be-arranged areas according to the target chip image and a second preset rule.
When the coordinates of the standard mark positions are not matched with the coordinates of the areas to be arranged at the multiple original points, it is indicated that the chip to be positioned is possibly damaged, and therefore the original point of the chip to be positioned needs to be confirmed in another mode.
For example, the matching and confirming process of the origin may be as shown in fig. 4, specifically, coordinates of a plurality of areas to be arranged at the origin in the target chip image are matched with coordinates of a plurality of standard mark bits one by one, so as to obtain position information of a preset area to be arranged at the origin in the target chip image;
and determining the origin of the chip to be positioned according to the position information of the preset origin arrangement area in the target chip image in the origin arrangement areas.
It can be understood that after the damaged chip image is supplemented, because a preset original point arrangement region in the original point to-be-arranged region is on the original damaged chip image or on the supplemented chip image, two cases need to be considered separately, specifically, when the preset original point arrangement region is on the original chip image, a first crystal grain at a preset position in the original point arrangement region is used as an original point;
and when the preset original point arrangement area is positioned on the supplemented chip image, determining a target original point arrangement area from the original chip image according to the second preset rule, and taking the first crystal grain at the preset position in the target original point arrangement area as an original point.
Specifically, the second preset rule is that a first original point waiting area is determined to be a preset original point arrangement area according to rules from left to right and from top to bottom, and then a first crystal grain at the upper right corner in the original point arrangement area is determined to be an original point.
In addition, in some optional embodiments of the present invention, the step of performing padding on the chip image according to the outer circle arc radian trend of the chip to be positioned to obtain the target chip image includes: randomly taking three positioning points from the outer circular arc, and respectively making two straight lines according to the positioning points;
and acquiring the perpendicular bisectors of the two straight lines, determining the intersection point of the perpendicular bisectors as a circle center, and completing the chip image according to the circle center and the outer circular arc.
It can be understood that, generally, the chip is set to be circular, three points are taken on the circular arc, two straight lines are made, the perpendicular bisector of the two straight lines is made, the intersection point is the center of a circle, and then a full circle can be drawn, so that the effect of filling the chip image is achieved.
In summary, in the chip origin positioning method in the above embodiment of the present invention, the mask coordinate file corresponding to the chip to be positioned, which is preset on the machine, is obtained and matched with the scanned chip image of the chip to be positioned, after the current chip is judged to be complete according to the matching result of the origin to-be-arranged area in the chip image of the chip to be positioned and the mask coordinate file, the origin of the chip to be positioned is determined from the multiple origin to-be-arranged areas according to the first preset rule, and by means of the way of finding the dots at the mask coordinate position, the interferences such as chromatic aberration are solved, and the positioning accuracy is higher compared with that of the image recognition method. In addition, the method achieves the purpose of finding the original point by the aid of a residual edge radian form circling method, and solves the problem that in the prior art, the original point is found by the aid of fragmentation while the accuracy is low during original point positioning.
EXAMPLE III
Referring to fig. 5, a chip origin positioning apparatus according to a third embodiment of the present invention is shown, the apparatus including:
the system comprises an acquisition module 100, a storage module and a processing module, wherein the acquisition module 100 is used for acquiring a photomask coordinate file of a chip to be positioned, and the photomask coordinate file stores coordinates of a plurality of standard mark positions of the chip to be positioned;
the acquisition module 200 is configured to acquire a scanned chip image of the chip to be positioned and acquire coordinates of a plurality of areas to be arranged at an origin in the chip image;
the judging module 300 is configured to judge whether the coordinates of the plurality of standard mark bits are matched with the coordinates of the plurality of origin to-be-arranged areas one by one;
and the first positioning module 400 is configured to determine, according to a first preset rule, an origin of the chip to be positioned from the multiple origin to-be-arranged regions when it is determined that the coordinates of the multiple standard mark bits match the coordinates of the multiple origin to-be-arranged regions one by one.
Further, in some optional embodiments of the present invention, wherein the apparatus further comprises:
the trend determining module is used for acquiring the distribution outline of the chip to be positioned according to the chip image to determine the outer ring arc radian trend of the chip to be positioned when the coordinate of the plurality of standard mark positions is judged to be not matched with the coordinate of the plurality of original point areas to be arranged;
the filling module is used for filling the chip images according to the radian trend of the outer ring arc of the chip to be positioned so as to obtain a target chip image;
and the second origin positioning module is used for determining the origin of the chip to be positioned from the multiple origin to-be-arranged areas according to the target chip image and a second preset rule.
Further, in some optional embodiments of the present invention, the first origin locating module is specifically configured to:
determining an original point arrangement area from the areas to be arranged with the original points according to the first preset rule, and taking a first crystal grain at a preset position in the original point arrangement area as the original point;
the first preset rule is to search an arrangement area in the middle of a chip to be positioned, and the preset position is the upper right corner of the original point arrangement area.
Further, in some optional embodiments of the present invention, wherein the second origin location module comprises:
the position determining unit is used for matching the coordinates of the multiple origin to-be-arranged areas in the target chip image with the coordinates of the multiple standard mark positions one by one so as to acquire position information of preset origin arranged areas in the target chip image;
and the origin point determining unit is used for determining the origin point of the chip to be positioned according to the position information of the preset origin point arrangement area in the target chip image in the plurality of origin point areas to be arranged.
Further, in some optional embodiments of the present invention, the origin determining unit is specifically configured to:
when the preset original point arrangement area is positioned on the original chip image, taking a first crystal grain at a preset position in the original point arrangement area as an original point;
when the preset original point arrangement region is located on the supplemented chip image, determining a target original point arrangement region from the original chip image according to the second preset rule, and taking a first grain at a preset position in the target original point arrangement region as an original point;
the second preset rule is that a first arrangement area found from left to right and from top to bottom in the areas where the origins are to be arranged is a target origin arrangement area, and the preset position is the upper right corner of the target origin arrangement area.
Further, in some optional embodiments of the present invention, wherein the completion module has a function of:
randomly taking three positioning points from the outer circular arc, and respectively making two straight lines according to the positioning points;
and acquiring the perpendicular bisectors of the two straight lines, determining the intersection point of the perpendicular bisectors as a circle center, and completing the chip image according to the circle center and the outer circle arc.
Further, in some optional embodiments of the present invention, wherein the apparatus further comprises:
and the storage module is used for storing the position of the origin point and the chip to be positioned in a one-to-one correspondence manner, acquiring the identification characteristic of the chip to be positioned at present when the chip origin point positioning is detected to be required, and determining the position of the origin point of the chip to be positioned at present according to the identification characteristic.
The functions or operation steps of the above modules when executed are substantially the same as those of the above method embodiments, and are not described herein again.
Example four
In another aspect, the present invention further provides a readable storage medium, on which a computer program is stored, which when executed by a processor implements the steps of the method according to any one of the first to second embodiments.
EXAMPLE five
In another aspect, the present invention further provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, and when the processor executes the computer program, the processor implements the steps of the method according to any one of the first to second embodiments.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
Those of skill in the art will understand that the logic and/or steps represented in the flowcharts or otherwise described herein, e.g., an ordered listing of executable instructions that can be viewed as implementing logical functions, can be embodied in any computer-readable storage medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable storage medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device.
More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable storage medium may even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
It should be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is specific and detailed, but not to be understood as limiting the scope of the present invention. It should be noted that various changes and modifications can be made by those skilled in the art without departing from the spirit of the invention, and these changes and modifications are all within the scope of the invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (9)
1. A chip origin positioning method is characterized by comprising the following steps:
acquiring a photomask coordinate file of a chip to be positioned, wherein the photomask coordinate file stores coordinates of a plurality of standard mark positions of the chip to be positioned;
acquiring a scanned chip image of the chip to be positioned, and acquiring coordinates of a plurality of original point to-be-arranged areas in the chip image;
judging whether the coordinates of the standard mark bits are matched with the coordinates of the areas to be arranged at the original points one by one;
if so, determining the origin of the chip to be positioned from the multiple origin to-be-arranged areas according to a first preset rule;
when the coordinates of the standard mark positions are judged to be not matched with the coordinates of the areas to be arranged at the original points, acquiring the distribution profile of the chip to be positioned according to the chip image to determine the radian trend of an outer ring arc of the chip to be positioned;
filling the chip images according to the outer ring arc radian trend of the chip to be positioned to obtain a target chip image;
and determining the origin of the chip to be positioned from the multiple origin to-be-arranged areas according to the target chip image and a second preset rule.
2. The method for positioning the origin of the chip according to claim 1, wherein the step of determining the origin of the chip to be positioned from the plurality of areas where the origin is to be arranged according to a first preset rule comprises:
determining an original point arrangement region from the multiple original point to-be-arranged regions according to the first preset rule, and taking a first crystal grain at a preset position in the original point arrangement region as an original point;
the first preset rule is to search for an arrangement area in the middle of a chip to be positioned, and the preset position is the upper right corner of the original point arrangement area.
3. The chip origin positioning method according to claim 1, wherein the step of determining the origin of the chip to be positioned from the plurality of origin to-be-arranged regions according to the target chip image and a second preset rule comprises:
matching the coordinates of a plurality of origin to-be-arranged areas in the target chip image with the coordinates of a plurality of standard mark positions one by one to acquire position information of preset origin arranged areas in the target chip image;
and determining the origin of the chip to be positioned according to the position information of the preset origin arrangement area in the target chip image in the origin arrangement areas.
4. The chip origin positioning method according to claim 3, wherein the step of determining the origin of the chip to be positioned according to the position information that a preset origin arrangement area among a plurality of origin to-be-arranged areas is in the target chip image comprises:
when the preset original point arrangement area is positioned on the original chip image, taking a first crystal grain at a preset position in the original point arrangement area as an original point;
when the preset original point arrangement area is located on the supplemented chip image, determining a target original point arrangement area from the original chip image according to the second preset rule, and taking a first crystal grain at a preset position in the target original point arrangement area as an original point;
the second preset rule is that a first arrangement area found from left to right and from top to bottom in the areas where the origins are to be arranged is a target origin arrangement area, and the preset position is the upper right corner of the target origin arrangement area.
5. The chip origin positioning method according to claim 1, wherein the step of filling the chip images according to the outer circle arc radian trend of the chip to be positioned to obtain the target chip image comprises:
randomly taking three positioning points from the outer circular arc, and respectively making two straight lines according to the positioning points;
and acquiring the perpendicular bisectors of the two straight lines, determining the intersection point of the perpendicular bisectors as a circle center, and completing the chip image according to the circle center and the outer circle arc.
6. The chip origin positioning method according to any one of claims 1 to 5, characterized in that the method further comprises:
and storing the position of the origin point and the chip to be positioned in a one-to-one correspondence manner, acquiring the identification characteristic of the chip to be positioned at present when the chip origin point positioning is detected to be required, and determining the position of the origin point of the chip to be positioned at present according to the identification characteristic.
7. A chip origin positioning apparatus, comprising:
the device comprises an acquisition module, a positioning module and a positioning module, wherein the acquisition module is used for acquiring a photomask coordinate file of a chip to be positioned, and the photomask coordinate file stores coordinates of a plurality of standard mark positions of the chip to be positioned;
the acquisition module is used for acquiring the scanned chip image of the chip to be positioned and acquiring the coordinates of a plurality of original point areas to be arranged in the chip image;
the judging module is used for judging whether the coordinates of the standard mark bits are matched with the coordinates of the areas to be arranged of the original points one by one;
the first positioning module is used for determining the original points of the chips to be positioned from the areas to be arranged at the original points according to a first preset rule when the coordinates of the standard mark positions are judged to be matched with the coordinates of the areas to be arranged at the original points one by one;
the trend determining module is used for acquiring the distribution outline of the chip to be positioned according to the chip image to determine the outer ring arc radian trend of the chip to be positioned when the coordinate of the plurality of standard mark positions is judged to be not matched with the coordinate of the plurality of original point areas to be arranged;
the filling module is used for filling the chip images according to the radian trend of the outer ring arc of the chip to be positioned so as to obtain a target chip image;
and the second origin positioning module is used for determining the origin of the chip to be positioned from the multiple origin to-be-arranged areas according to the target chip image and a second preset rule.
8. A readable storage medium, on which a computer program is stored, which program, when being executed by a processor, is adapted to carry out the steps of the method according to any one of claims 1 to 6.
9. An electronic device, comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of the method according to any one of claims 1 to 6 when the program is executed by the processor.
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112082480A (en) * | 2020-09-08 | 2020-12-15 | 浙江清华柔性电子技术研究院 | Method and system for measuring spatial orientation of chip, electronic device and storage medium |
| CN112881407A (en) * | 2021-01-14 | 2021-06-01 | 广州大学 | Method, system, device and medium for detecting welding quality of LED chip |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100488543B1 (en) * | 2002-11-05 | 2005-05-11 | 삼성전자주식회사 | reticle manufacturing method of photo-lithography fabricating |
| CN101459102B (en) * | 2007-12-13 | 2010-08-11 | 中芯国际集成电路制造(上海)有限公司 | Wafer positioning method |
| JP5040643B2 (en) * | 2007-12-28 | 2012-10-03 | 日本電産リード株式会社 | Alignment method |
| CN101813636B (en) * | 2010-04-08 | 2012-10-10 | 广东志成华科光电设备有限公司 | LED chip panoramic scanning matching method |
| JP2012150065A (en) * | 2011-01-21 | 2012-08-09 | Hitachi High-Technologies Corp | Circuit pattern inspection device and inspection method thereof |
| CN103531500A (en) * | 2013-10-21 | 2014-01-22 | 上海华力微电子有限公司 | Calibration method of wafer defect detection equipment |
| CN104700085B (en) * | 2015-03-10 | 2018-02-27 | 华中科技大学 | A kind of chip positioning method based on template matches |
| CN109785316B (en) * | 2019-01-22 | 2022-12-02 | 湖南大学 | Method for detecting apparent defects of chip |
| CN110967350B (en) * | 2019-11-05 | 2023-04-11 | 北京地平线机器人技术研发有限公司 | Chip testing method and device based on image recognition and electronic equipment |
| CN111275674A (en) * | 2020-01-17 | 2020-06-12 | 佛山普瑞威尔科技有限公司 | Chip burning detection method and system and computer readable storage medium |
| CN112233994B (en) * | 2020-10-13 | 2021-08-24 | 珠海市科迪电子科技有限公司 | Chip gold wire detection method |
| CN112308919B (en) * | 2020-10-28 | 2024-04-09 | 北京半导体专用设备研究所（中国电子科技集团公司第四十五研究所） | Correction method and device for clamping position of chip in clamp |
| CN112859256B (en) * | 2021-01-07 | 2022-07-08 | 天津大学 | Grating coupler positioning measurement method based on image recognition |
| CN112864037A (en) * | 2021-01-14 | 2021-05-28 | 长鑫存储技术有限公司 | Wafer measuring method, device, medium and electronic equipment |
-
2022
- 2022-11-07 CN CN202211381697.2A patent/CN115423814B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112082480A (en) * | 2020-09-08 | 2020-12-15 | 浙江清华柔性电子技术研究院 | Method and system for measuring spatial orientation of chip, electronic device and storage medium |
| CN112881407A (en) * | 2021-01-14 | 2021-06-01 | 广州大学 | Method, system, device and medium for detecting welding quality of LED chip |
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