CN115411163A - 发光元件 - Google Patents

发光元件 Download PDF

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Publication number
CN115411163A
CN115411163A CN202210594547.3A CN202210594547A CN115411163A CN 115411163 A CN115411163 A CN 115411163A CN 202210594547 A CN202210594547 A CN 202210594547A CN 115411163 A CN115411163 A CN 115411163A
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China
Prior art keywords
layer
electrode
light
insulating layer
emitting device
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CN202210594547.3A
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English (en)
Inventor
陈昭兴
林羿宏
洪国庆
许启祥
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Epistar Corp
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Epistar Corp
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Publication of CN115411163A publication Critical patent/CN115411163A/zh
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Abstract

本发明公开一种发光元件，包含一半导体叠层包含一第一半导体层及一第二半导体层，其中于一俯视图下，半导体叠层包含一外周部及一内侧区域，外周部露出第一半导体层，且第二半导体层设置于外周部以外的内侧区域；一绝缘层包含多个第一绝缘层外侧开口及一第二绝缘层开口；一第一电极覆盖多个第一绝缘层外侧开口，且通过多个第一绝缘层外侧开口接触第一半导体层；一第二电极覆盖第二绝缘层开口；以及一保护层覆盖绝缘层，其中绝缘层及保护层于外周部相接触的部分包含一总厚度自外周部向内侧区域渐减。

Description

发光元件
技术领域
本发明涉及一种发光元件，且特别是涉及一种包含多个电极接触区的倒装式发光元件。
背景技术
发光二极管(Light-Emitting Diode,LED)为固态半导体发光元件，其优点为功耗低，产生的热能低，工作寿命长，防震，体积小，反应速度快和具有良好的光电特性，例如稳定的发光波长。因此发光二极管被广泛应用于家用电器，设备指示灯，及光电产品等。
发明内容
一发光元件，包含一半导体叠层包含一第一半导体层及一第二半导体层，其中于一俯视图下，半导体叠层包含一外周部及一内侧区域，外周部露出第一半导体层，且第二半导体层设置于外周部以外的内侧区域；一绝缘层包含多个第一绝缘层外侧开口及一第二绝缘层开口；一第一电极覆盖多个第一绝缘层外侧开口，且通过多个第一绝缘层外侧开口接触第一半导体层；一第二电极覆盖第二绝缘层开口；以及一保护层覆盖绝缘层，其中绝缘层及保护层于外周部相接触的部分包含一总厚度自外周部向内侧区域渐减。
附图说明
图1为本发明一实施例所揭示的一发光元件1的结构俯视图；
图2为沿着图1的切线X-X’的结构剖面图；
图3A为本发明一实施例所揭示的发光元件1的局部剖面图，并且是在图2用虚线表示的区域P的放大图；
图3B为本发明另一实施例所揭示的发光元件1的局部剖面图，并且是在图2用虚线表示的区域P的放大图；
图4为图1用虚线表示的区域I的放大图；
图5为图4的切线I-I’的结构剖面图；
图6为图1用虚线表示的区域II的放大图；
图7为图6的切线II-II’的结构剖面图；
图8为图1用虚线表示的区域III的放大图；
图9为图8的切线III-III’的结构剖面图；
图10为图1用虚线表示的区域IV的放大图；
图11为图10的切线IV-IV’的结构剖面图；
图12为本发明一实施例的发光装置2的示意图；
图13为本发明一实施例的发光装置3的示意图。
符号说明
1：发光元件
10：基板
10d：切割道
10S；侧边
100；凸部
1001；第一层
1002；第二层
101；上表面
11；第一边
12；第二边
13；第三边
2；发光装置
20；半导体叠层
20m；半导体台面
20S；侧边
201；第一半导体层
202；第二半导体层
203；活性层
2000；孔穴
2006；凹陷部
2007；凸出部
2010；内侧区域
2011；外周部
21；侧壁
21S；侧边
22；侧壁
23；侧壁
24；侧壁
3；发光装置
30；钝化层
301；第一钝化层开口
302；第二钝化层开口
31；第一钝化层部分
32；第二钝化层部分
40；接触电极
40a；第一接触部分
40b；第二接触部分
401；透明导电层
402；反射层
403；阻障层
50；绝缘层
50a；绝缘凹部
502；第二绝缘层开口
500；绝缘层平台
5011；第一绝缘层外侧开口
5012；第一绝缘层内侧开口
51；封装基板
511；第一垫片
512；第二垫片
53；绝缘部
54；反射结构
60；顶针区
600；发光模块
602；灯罩
604；反射镜
606；承载部
608；发光单元
61；第一电极
610；灯座
611；第一电极第一接触区
611S；第一电极第一侧表面
612；第一电极第二接触区
612S；第一电极第二侧表面
613S；第一电极第三侧表面
614S；第一电极第四侧表面
614；散热片
616；连接部
618；电连接元件
62；第二电极
70；第二电极
701；第一保护层开口
702；第二保护层开口
81；第一电极垫
82；第二电极垫
C1；第一角落
C2；第二角落
C3；第三角落
C4；第四角落
D1；第一宽度
D2；第二宽度
D3；第三宽度
D4；第四宽度
G；间距
L1；第一长度
L2；第二长度
L3；第三长度
L4；第四长度
S；间距
T1；第一厚度
T2；第二厚度
T3；第三厚度
T4；第四厚度
W1；第一开口宽度
W2；第二开口宽度
具体实施方式
为了使本发明的叙述更加详尽与完备，请参照下列实施例的描述并配合相关的附图。但是，以下所示的实施例是用于例示本发明的发光元件，并非将本发明限定于以下的实施例。又，本说明书记载于实施例中的构成零件的尺寸、材质、形状、相对配置等在没有限定的记载下，本发明的范围并非限定于此，而仅是单纯的说明而已。且各附图所示构件的大小或位置关系等，会由于为了明确说明有加以夸大的情形。更且，于以下的描述中，为了适切省略详细说明，对于同一或同性质的构件用同一名称、符号显示。
图1是本发明一实施例所揭示的一发光元件1的结构俯视图。图2是沿着图1的切线X-X’的结构剖面图。
如图1及图2所示，发光元件1，包含一基板10；以及一半导体叠层20位于基板10上，其包含一第一半导体层201，一第二半导体层202，及一活性层203位于第一半导体层201及第二半导体层202之间。在发光元件1的一俯视图及一侧视图下，半导体叠层20包含一外周部2011及一内侧区域2010。第一半导体层201于外周部2011露出，第二半导体层202及活性层203则设置于为外周部2011所环绕的内侧区域2010。一绝缘层50包含多个第一绝缘层外侧开口5011位于外周部2011，一第一绝缘层内侧开口5012位于内侧区域2010，及一第二绝缘层开口502位于内侧区域2010。一第一电极61覆盖多个第一绝缘层外侧开口5011，且通过多个第一绝缘层外侧开口5011于外周部2011接触第一半导体层201并形成多个第一电极第一接触区611。第一电极61覆盖第一绝缘层内侧开口5012，且通过第一绝缘层内侧开口5012于内侧区域2010接触第一半导体层201并形成第一电极第二接触区612。一第二电极62覆盖第二绝缘层开口502，且通过第二绝缘层开口502电连接至第二半导体层202。一保护层70覆盖绝缘层50，第一电极61，以及第二电极62，其中绝缘层50及保护层70于外周部2011相接触的部分包含一总厚度自外周部2011向内侧区域2010渐减。
基板10可以为一成长基板以外延成长半导体叠层20。基板10包括用以外延成长磷化铝镓铟(AlGaInP)的砷化镓(GaAs)晶片，或用以成长氮化镓(GaN)、氮化铟镓(InGaN)、或氮化铝镓(AlGaN)的蓝宝石(Al2O3)晶片、氮化镓(GaN)晶片、碳化硅(SiC)晶片、或氮化铝(AlN)晶片。
图3A是依据本发明一实施例所揭示的发光元件1的局部剖面图，并且是在图2用虚线表示的区域P的放大图。基板10与半导体叠层20相接的一面可以为粗糙化的表面。粗糙化的表面可以为具有不规则形态的表面或具有规则形态的表面。例如，相对于基板10的上表面101，基板10包含一或多个凸部100凸出于上表面101，或是包含一或多个凹部(图未示)凹陷于上表面101。在一剖面图下，凸部100或凹部(图未示)可以为半球形状或者多边锥形状。
多个凸部100包含一第一层1001及一第二层1002，第一层1001包含与基板10相同的材料，例如砷化镓(GaAs)、蓝宝石(Al2O3)、氮化镓(GaN)、碳化硅(SiC)、或氮化铝(AlN)。第二层1002包含与构成第一层1001、基板10不同的材料。第二层1002的材料包含绝缘材料，例如氧化硅、氮化硅、或氮氧化硅。自发光元件1的侧面观之，凸部100包含半球形状、炮弹形状或锥形状。凸部100的最顶端可以是曲面或尖点。在本发明的一实施例中，凸部100仅包含第二层1002，缺少第一层1001，其中第二层1002的一底面与基板10的上表面101齐平。
在本发明的一实施例中，通过金属有机化学气相沉积法(MOCVD)、分子束外延(MBE)、氢化物气相沉积法(HVPE)、物理气相沉积法(PVD)、或离子电镀方法以于基板10上形成具有光电特性的半导体叠层20，例如发光(light-emitting)叠层，其中物理气象沉积法包含溅镀(Sputtering)或蒸镀(Evaporation)法。
半导体叠层20包含第一半导体层201，第二半导体层202，以及形成在第一半导体层201和第二半导体层202之间的活性层203。通过改变半导体叠层20中一层或多层的物理及化学组成以调整发光元件1发出光线的波长。半导体叠层20的材料包含Ⅲ-Ⅴ族半导体材料，例如AlxInyGa(1-x-y)N或AlxInyGa(1-x-y)P，其中0≤x，y≤1；(x+y)≤1。当半导体叠层20的材料为AlInGaP系列材料时，可发出波长介于610nm及650nm之间的红光。当半导体叠层20的材料为InGaN系列材料时，可发出波长介于400nm及490nm之间的蓝光，或波长介于530nm及570nm之间的绿光。当半导体叠层20的材料为AlGaN系列或AlInGaN系列材料时，可发出波长介于250nm及400nm之间的紫外光。
第一半导体层201和第二半导体层202可为包覆层(cladding layer)或局限层(confinement layer)，两者具有不同的导电型态、电性、极性，或依掺杂的元素以提供电子或空穴，例如第一半导体层201为n型电性的半导体，第二半导体层202为p型电性的半导体。活性层203形成在第一半导体层201和第二半导体层202之间，电子与空穴于一电流驱动下在活性层203复合，将电能转换成光能，以发出一光线。活性层203可为单异质结构(singleheterostructure,SH)，双异质结构(double heterostructure,DH)，双侧双异质结构(double-side double heterostructure,DDH)，或是多层量子阱结构(multi-quantumwell,MQW)。活性层203的材料可为中性、p型或n型电性的半导体。第一半导体层201、第二半导体层202、或活性层203可为一单层或包含多子层的结构。
在本发明的一实施例中，半导体叠层20还可包含一缓冲层(图未示)位于第一半导体层201和基板10之间，用以释放基板10和半导体叠层20之间因材料晶格不匹配而产生的应力，以减少差排及晶格缺陷，进而提升外延品质。缓冲层可为一单层或包含多子层的结构。在一实施例中，可选用PVD氮化铝(AlN)作为缓冲层，形成于半导体叠层20及基板10之间，用以改善半导体叠层20的外延品质。在一实施例中，用以形成PVD氮化铝(AlN)的靶材是由氮化铝所组成。在另一实施例中，可使用由铝组成的靶材，在氮源的环境下与铝靶材反应性地形成氮化铝。
在本发明的一实施例中，如图1及图2所示，发光元件1包含一第一电极垫81及一第二电极垫82形成于半导体叠层20的同一侧，形成为倒装芯片(flip chip)结构或是正装的水平芯片(lateral chip)结构。
如图1所示，自发光元件1的俯视图观之，半导体叠层20在俯视时大致为矩形，包含四个角落及四个侧壁。四个侧壁包含直线，方波纹，波浪纹或前述任两种的组合。半导体叠层20的四个侧壁包含一第一侧壁21，一与第一侧壁21相对的第二侧壁22，一第三侧壁23，以及一与第三侧壁23相对的第四侧壁24。四个角落包含弧形或直线形。半导体叠层20的四个角落包含一第一角落C1，一第二角落C2，一第三角落C3，以及一第四角落C4。
在本实施例中，通过蚀刻制作工艺对半导体叠层20进行图案化，移除部分的第二半导体层202及活性层203并露出第一半导体层201，形成外周部2011以及为外周部2011所包围的内侧区域2010。内侧区域2010包含一或多个半导体台面20m，及一或多个孔穴2000。自发光元件1的俯视图观之，如图1所示，外周部2011包含多个凹陷部2006，且两相邻的凹陷部2006为一凸出部2007所分隔。凹陷部2006未设有第二半导体层202及活性层203，凹陷部2006露出第一半导体层201。凸出部2007则具有第一半导体层201，第二半导体层202，及活性层203。相较于凹陷部2006，凸出部2007的一俯视图形包含弧形或矩形。在本实施例中，在发光叠层20的各侧壁21～24上形成有多个具有半圆形的第一绝缘层外侧开口5011，且大小相同。第一绝缘层外侧开口5011的俯视形状可以为半圆形，三角形，梯形或矩形。第一绝缘层外侧开口5011的大小、形状不限于此。另外，也可以包含大小或形状不同的第一绝缘层外侧开口5011。
邻近第一侧壁21的多个第一绝缘层外侧开口5011之间的第一间距与邻近第二侧壁22的多个第一绝缘层外侧开口5011之间的第二间距相同。但，邻近第一侧壁21的多个第一绝缘层外侧开口5011之间的第一间距与邻近第三侧壁23的多个第一绝缘层外侧开口5011之间的第三间距不同。
据此，第二半导体层202及活性层203各具有小于第一半导体层201的上表面积。半导体台面20m位于第一半导体层201上，并包含第二半导体层202及活性层203。凹陷部2006及孔穴2000露出第一半导体层201。多个孔穴2000形成于内侧区域2010，并以一固定的距离彼此间隔排列成一直线或一阵列。
在发光元件1的俯视图或侧视图下，孔穴2000包含一宽度介于5μm～20μm之间，更佳介于8μm～15μm之间。孔穴2000的俯视图形包含圆形、椭圆形、半圆形、矩形、或长条形。
多个孔穴2000的一个与发光元件1的一第一边11以一第一最短距离相间隔，多个孔穴2000的一个与发光元件1的一第二边12以一第二最短距离相间隔，第一边与第二边为相对边，且第一最短距离大于或等于第二最短距离。多个孔穴2000的一个与发光元件1的一第三边13以一第三最短距离相间隔，第三边正交于第一边，且第一最短距离及/或第二最短距离大于第三最短距离。
多个孔穴2000及外周部2011通过移除部分的第二半导体层202及活性层203以露出第一半导体层201而形成。被蚀刻而露出的第二半导体层202及活性层203的侧边20S相对于露出的第一半导体层201是倾斜面，其中倾斜面可以包含覆数个斜率的面。
第一电极61通过位于内侧区域2010的多个孔穴2000及位于外周部2011的凹陷部2006以接触第一半导体层201，并和第一半导体层201形成电连接。第二电极62形成于第二半导体层202上，通过一接触电极40和第二半导体层202形成电连接。
图3A是依据本发明一实施例所揭示的发光元件1的局部剖面图，并且是在图2用虚线表示的区域P的放大图。图3B是依据本发明另一实施例所揭示的发光元件1的局部剖面图，并且是在图2用虚线表示的区域P的放大图。
一钝化层30覆盖半导体台面20m，包含一或多个第一钝化层开口301以及一或多个第二钝化层开口302。自发光元件1的俯视图观之，第一钝化层开口301设置于孔穴2000及凹陷部2006上并露出第一半导体层201。第二钝化层开口302设置于半导体台面20m上并露出第二半导体层202。如图3A及图3B所示，钝化层30包含一第一钝化层部分31接触第一半导体层201，以及一第二钝化层部分32接触第二半导体层202。第一钝化层部分31包含一第一长度L1介于5μm～10μm之间。第二钝化层部分32包含一第二长度L2介于13μm～16μm之间。
接触电极40设置于第二钝化层开口302中并接触第二半导体层202。接触电极40大致覆盖半导体台面20m的上表面。例如，接触电极40可以覆盖半导体台面20m的80％以上，更佳的为覆盖90％以上。在本发明的一实施例中，接触电极40可以包含一透明导电层401，一反射层402，及一阻障层403中的任一层或是多层。
透明导电层401可以设置在反射层402及第二半导体层202之间。为了减少接触电阻并提高电流扩散的效率，透明导电层401的材料包含对于活性层203所发出的光线为透明的材料，例如透明导电氧化物。透明导电氧化物包含氧化铟锡(ITO)或氧化铟锌(IZO)。在本发明的一实施例，透明导电层401可为具有厚度小于500埃的金属层。
反射层402的材料包含具有反射性的金属，例如铝(Al)、银(Ag)、铑(Rh)、或铂(Pt)等金属或上述材料的合金。反射层402是用来反射活性层203所发出的光线，且使经反射的光线朝向基板10而向外射出。
如图3B所示，阻障层403可包覆反射层402的一侧边以避免反射层402氧化而劣化其反射率。阻障层403的材料包含金属材料，例如钛(Ti)、钨(W)、铝(Al)、铟(In)、锡(Sn)、镍(Ni)、铬(Cr)、铂(Pt)等金属或上述材料的合金。在一实施例中，如图3A所示，阻障层403不包覆反射层402，阻障层403的一侧边可与反射层402的一侧边齐平或露出反射层402的部分上表面。
接触电极40能够使经由第二电极62供给的电流向第二半导体层202扩散。另外，接触电极40具有良好的光反射性，可以作为使发光元件1所发出的光向光输出面(即，基板10的一侧)反射的层来使用。
如图3A所示，接触电极40未接触钝化层30，一间距S位于钝化层30及接触电极40之间。部分绝缘层50位于接触电极40及钝化层30之间的间距S内，使得绝缘层50包含一绝缘凹部50a对应于间距S。
如图3B所示，接触电极40包含一第一接触部分40a覆盖钝化层30及一第二接触部分40b直接接触第二半导体层202。接触电极40的第一接触部分40a包含一厚度小于第二接触部分40b的厚度，并且第一接触部分40a的厚度自半导体台面20m的内侧往外侧渐减。所述厚度对应于在垂直于第二半导体层202的上表面的方向上测量的厚度。第一接触部分40a的边缘与半导体台面20m的侧边20S之间的第三长度L3可小于第一接触部分40a覆盖钝化层30的第四长度L4以增加电极的附着力并增加反射面积。在考虑制作工艺变异的情况下，第一接触部分40a的边缘与半导体台面20m的侧边20S之间的第三长度L3可大于第一接触部分40a覆盖钝化层30的第四长度L4。在本实施例中，第三长度L3可介于0μm～8μm之间，更佳介于0μm～3μm之间。第四长度L4可介于5μm～18μm之间，更佳介于10μm～13μm之间。
绝缘层50覆盖半导体台面20m，包含一或覆数个第一绝缘层外侧开口5011，第一绝缘层内侧开口5012，以及一第二绝缘层开口502。自发光元件1的俯视图观之，第一绝缘层外侧开口5011设置于凹陷部2006上，并露出第一半导体层201。第一绝缘层内侧开口5012设置于孔穴2000上以对应孔穴2000的位置，并露出第一半导体层201。第二绝缘层开口502设置于接触电极40上，并露出接触电极40的透明导电层401、反射层402及/或阻障层403中的任一层或是多层。位于外周部2011的多个第一绝缘层外侧开口5011沿着发光元件1的四个边的方向依序排列，发光元件1的绝缘层50覆盖半导体叠层20的四个角落。
在发明的一实施例中，如图2所示，绝缘层50包含一绝缘层平台500位于第二电极62及第二电极垫82下方。在发光元件1的俯视图中，如图1所示，绝缘层平台500为第二绝缘层开口502所环绕。绝缘层平台500可以形成于第二电极垫82的一投影面积以内或是以外。在发光元件1的侧视图中，绝缘层平台500为第二电极62所包覆。
第一电极61覆盖绝缘层50的多个第一绝缘层外侧开口5011及第一绝缘层内侧开口5012，并接触第一半导体层201。第二电极62覆盖绝缘层50的第二绝缘层开口502，并接触第二半导体层202及/或接触电极40。在发光元件1的俯视图中，第二电极62与第二绝缘层开口502具有相同的形状，在一实施例中，第二电极62与第二绝缘层开口502同样地大致为矩形。在一实施例中，第二电极62可以形成得比第二绝缘层开口502大。第一电极61与第二电极62通过绝缘层50而相间隔。第一电极61与第二电极62之间具有一间距G位于半导体台面20m上并露出绝缘层50，间距G介于3μm～30μm之间，较佳介于5μm～25μm之间，更佳介于18μm～22μm之间。
如图1及图2所示，第一电极61覆盖多个第一绝缘层内侧开口5012，且通过多个第一绝缘层内侧开口5012接触第一半导体层201以形成多个第一电极第二接触区612。第一电极61覆盖多个第一绝缘层外侧开口5011，且通过多个第一绝缘层外侧开口5011于外周部2011接触第一半导体层201并形成多个第一电极第一接触区611。各多个第一电极第一接触区611包含一第一接触面积小于各多个第一电极第二接触区612的一第二接触面积。多个第一电极第一接触区611包含一第一接触总面积大于多个第一电极第二接触区612的一第二接触总面积。
本实施例通过在外周部2011配置多个第一电极第一接触区611，减少内侧区域2010的第一电极第二接触区612的第二接触总面积，既能够抑制正向电压Vf的上升，又能够确保较宽大的发光区域。
在发光元件1的俯视下，多个第一电极第一接触区611形成于四个角落以外的区域，并且多个第一电极第一接触区611等间隔或非等间隔地散布形成在外周部2011之上以改善电流密度的分布。
如图1所示，发光元件1包含一顶针区60位于半导体叠层20上的几何中心处。顶针区60不与第一电极61及第二电极62相接触，并与第一电极61及第二电极62电性隔缘。顶针区60作为保护外延层的结构以避免外延层于后段制作工艺，例如裸片分离、翻转、测试裸片、封装，为顶针所损害。
保护层70包含一第一保护层开口701位于内侧区域2010及一第二保护层开口702位于内侧区域2010，且第一保护层开口701包含一第一开口宽度W1大于第二保护层开口702的一第二开口宽度W2。
发光元件1包含一第一电极垫81及一第二电极垫82。如图1所示，第一电极垫81邻近半导体叠层20的第一侧壁21及第二电极垫82邻近半导体叠层20的第二侧壁22。第一电极垫81与第一侧壁21之间的一第一距离小于第二电极垫82与第二侧壁22之间的一第二距离。
如图2所示，第一电极垫81通过第一保护层开口701接触第一电极61，第二电极垫82通过第二保护层开口702接触第二电极62。
第一电极垫81及第二电极垫82具有不同的导电性，例如第一电极垫81可以是N型电极垫，第二电极垫82可以是P型电极垫。第一电极垫81及第二电极垫82位于半导体台面20m上，并分别位于第一保护层开口701及第二保护层开口702上以接触第一电极61及第二电极62，并分别电连接至第一半导体层201及第二半导体层202。
顶针区60，第一电极61，第二电极62，第一电极垫81及第二电极垫82包含金属材料，例如铬(Cr)、钛(Ti)、钨(W)、金(Au)、铝(Al)、铟(In)、锡(Sn)、镍(Ni)、铂(Pt)、银(Ag)等金属或上述材料的合金。顶针区60，第一电极61，第二电极62，第一电极垫81及第二电极垫82可由单个层或是多个层所组成。例如，顶针区60，第一电极61，第二电极62，第一电极垫81或第二电极垫82可包括Ti/Au层、Ti/Pt/Au层、Cr/Au层、Cr/Pt/Au层、Ni/Au层、Ni/Pt/Au层、Cr/Al/Cr/Ni/Au层或Ag/NiTi/TiW/Pt层。第一电极垫81及第二电极垫82可作为外部电源供电至第一半导体层201及第二半导体层202的电流路径。第一电极61，第二电极62，第一电极垫81及第二电极垫82各包含一厚度介于1μm～100μm之间，较佳为1.2μm～60μm之间，更佳为1.5μm～6μm之间。
钝化层30、绝缘层50及/或保护层70设置在在半导体叠层20上，是作为发光元件1的保护膜及防静电的层间绝缘膜。作为绝缘膜，钝化层30、绝缘层50及/或保护层70可以为一单层结构，包含金属氧化物或金属氮化物，例如可优选使用选自由Si、Ti、Zr、Nb、Ta、Al构成的组中的至少一种氧化物或氮化物。钝化层30、绝缘层50、及/或保护层70也可以包含不同折射率的两种以上的材料交替堆叠以形成一分布式布拉格反射镜(DBR)结构，选择性地反射特定波长的光。例如，可通过层叠SiO2/TiO2或SiO2/Nb2O5等层来形成高反射率的绝缘反射结构。当SiO2/TiO2或SiO2/Nb2O5形成分布式布拉格反射镜(DBR)结构时，分布式布拉格反射镜(DBR)结构的每一个层被设计成活性层212发出的光的波长的四分之一的光学厚度的一或整数倍。分布式布拉格反射镜(DBR)结构的每一个层的厚度在λ/4的一或整数倍的基础上可具有±30％的偏差。由于分布式布拉格反射镜(DBR)结构的的每一个层的厚度会影响到反射率，因此优选地利用电子束蒸镀(E-beam evaporation)来形成介电层30，绝缘层50，及/或保护层70以稳定的控制分布式布拉格反射镜(DBR)结构的每一个层的厚度。
发光元件1包含切割道10d位于基板10的侧边10S与第一半导体层201的一侧边21S之间，且切割道10d包含一宽度介于5μm～50μm之间，较佳小于30μm，更佳小于15μm。切割道10d露出基板10的上表面101，并位于发光元件1的周围以环绕半导体叠层20。
图4是图1用虚线表示的区域I的放大图。图5是图4的切线I-I’的结构剖面图。图6是图1用虚线表示的区域II的放大图。图7是图6的切线II-II’的结构剖面图。如图4及图5所示，在平行于发光元件1的第一边11或第二边12的方向上，凸出部2007包含一最大宽度介于30μm～60μm之间。凹陷部2006包含一最大宽度介于30μm～60μm之间。
绝缘层50及保护层70于外周部2011相接触的部分包含一第一厚度T1及一第二厚度T2，且第二厚度T2大于第一厚度T1。在发明的一实施例中，第一厚度T1介于3μm～30μm之间，第二厚度T2介于6μm～60μm之间。所述厚度对应于在垂直于第二半导体层202的上表面的方向上测量的厚度。
钝化层30及绝缘层50于半导体台面20m上相接触的部分包含一第三厚度T3及一第四厚度T4，且第四厚度T4大于第三厚度T3。在发明的一实施例中，第三厚度T3介于3μm～30μm之间，第四厚度T4介于6μm～60μm之间。所述厚度对应于在垂直于第二半导体层202的上表面的方向上测量的厚度。
如图5所示，邻近发光元件1的第一边11的切割道10d包含一第一宽度D1。如图7所示，邻近发光元件1的第二边12的切割道10d包含一第二宽度D2。第一宽度D1与第二宽度D2可相同或不相同。在本实施例中，第二宽度D2大于第一宽度D1，第二宽度D2与第一宽度D1之间具有一比值(D2/D1)大于2，但小于4。
图8是图1用虚线表示的区域III的放大图。图9是图8的切线III-III’的结构剖面图。图10是图1用虚线表示的区域IV的放大图。图11是图10的切线IV-IV’的结构剖面图。在平行于发光元件1的第三边13或第四边14的方向上，凸出部2007包含一最大宽度介于30μm～60μm之间。凹陷部2006包含一最大宽度介于30μm～60μm之间。
如图9所示，邻近发光元件1的第三边13或第四边14(图未示)的切割道10d的一部分包含一第三宽度D3。如图11所示，邻近发光元件1的第三边13或第四边14(图未示)的切割道10d的另一部分包含一第四宽度D4。第三宽度D3与第四宽度D4不相同。换言之，邻近发光元件1的第三边13或第四边14的切割道10d包含两种以上的宽度，第四宽度D4大于第三宽度D3，且第四宽度D4与第三宽度D3之间的比值(D4/D3)大于2，但小于4。在平行于发光元件1的第三边13或第四边14的一方向上，具有第三宽度D3的切割道10d的一部分的长度可大于、小于或等于具有第四宽度D4的切割道10d的另一部分的长度。为了保留较多的发光面积，优选的为具有第三宽度D3的切割道10d的一部分的长度大于具有第四宽度D4的切割道10d的另一部分的长度。
如图5及图7所示，第一电极61包含一第一电极第一侧表面611S邻近发光元件1的第一边11及一第一电极第二侧表面612S邻近发光元件1的第二边12。第一电极第一侧表面611S与发光元件1的第一边11之间的距离小于第一电极第二侧表面612S与发光元件1的第二边12之间的距离。
如图9及图11所示，第一电极61还包含一第一电极第三侧表面613S邻近发光元件1的第三边13及发光元件1的第一边11，及一第一电极第四侧表面614S邻近发光元件1的第三边13及发光元件1的第二边12。第一电极第三侧表面613S与发光元件1的第三边13之间的距离小于第一电极第四侧表面614S与发光元件1的第三边13之间的距离。
图12为依本发明一实施例的发光装置2的示意图。将前述实施例中的发光元件1以倒装芯片的形式安装于封装基板51的第一垫片511及第二垫片512上。第一垫片51511及第二垫片512之间通过一包含绝缘材料的绝缘部53做电性绝缘。倒装芯片安装是将与电极垫形成面相对的成长基板侧向上设为主要的光取出面，例如发光元件1的基板10为发光元件1的主要的光取出面。为了增加发光装置2的光取出效率，可于发光元件1的周围设置一反射结构54。
图13为依本发明一实施例的发光装置3的示意图。发光装置3为一球泡灯包括一灯罩602、一反射镜604、一发光模块600、一灯座610、一散热片614、一连接部616以及一电连接元件618。发光模块600包含一承载部606，以及多个发光单元608位于承载部606上，其中多个发光体608可为前述实施例中的发光元件1或发光装置2。
本发明所列举的各实施例仅用以说明本发明，并非用以限制本发明的范围。任何人对本发明所作的任何显而易知的修饰或变更都不脱离本发明的精神与范围。

Claims (12)

1.一种发光元件，包含：
基板；
半导体叠层，包含第一半导体层，活性层及第二半导体层位于该基板上，其中在俯视图下，该半导体叠层包含外周部及内侧区域，该外周部露出该第一半导体层，该第二半导体层设置于为该外周部所环绕的该内侧区域；
绝缘层，包含多个第一绝缘层外侧开口位于该外周部及第二绝缘层开口位于该内侧区域；
第一电极，覆盖该多个第一绝缘层外侧开口，通过该多个第一绝缘层外侧开口于该外周部接触该第一半导体层以形成多个第一电极第一接触区；
第二电极，覆盖该第二绝缘层开口，并通过该第二绝缘层开口电连接至该第二半导体层；以及
保护层，覆盖该绝缘层，该第一电极，及该第二电极，
其中，该绝缘层及该保护层于该外周部相接触的一部分包含总厚度自该外周部向该内侧区域渐减。
2.如权利要求1所述的发光元件，其中自该发光元件的俯视图观之，该半导体叠层包含四个角落及四个侧壁，该多个第一绝缘层外侧开口位于该四个角落以外的该四个侧壁上。
3.如权利要求2所述的发光元件，其中自该发光元件的该俯视图观之，该半导体叠层的该四个侧壁包含直线，方波纹，波浪纹或前述任两种的组合。
4.如权利要求2所述的发光元件，包含第一电极垫，及第二电极垫，其中自该发光元件的该俯视图观之，该半导体叠层的该四个侧壁包含第一侧壁，与该第一侧壁相对的第二侧壁，第三侧壁，与该第三侧壁相对的第四侧壁，且该第一电极垫邻近该第一侧壁及该第二电极垫邻近该第二侧壁。
5.如权利要求4所述的发光元件，其中该第一电极垫与该第一侧壁之间的第一距离小于该第二电极垫与该第二侧壁之间的第二距离。
6.如权利要求4所述的发光元件，其中该保护层包含第一保护层开口位于该内侧区域及第二保护层开口位于该内侧区域，且该第一保护层开口包含第一开口宽度大于该第二保护层开口的第二开口宽度。
7.如权利要求6所述的发光元件，其中该第一电极垫通过该第一保护层开口接触该第一电极，且该第二电极垫通过该第二保护层开口接触该第二电极。
8.如权利要求4所述的发光元件，还包含多个孔穴位于该内侧区域，其中该多个孔穴穿过该活性层及该第二半导体层以露出该第一半导体层。
9.如权利要求8所述的发光元件，其中该多个孔穴的一个与该发光元件的第一边以第一最短距离相间隔，该多个孔穴的该个与该发光元件的第二边以第二最短距离相间隔，该多个孔穴的该个与该发光元件的第三边以第三最短距离相间隔，且该第一最短距离大于或等于该第二最短距离，该第一最短距离大于该第三最短距离。
10.如权利要求8所述的发光元件，其中该绝缘层还包含多个第一绝缘层内侧开口以对应该多个孔穴，该第一电极覆盖该多个第一绝缘层内侧开口，且通过该多个第一绝缘层内侧开口接触该第一半导体层以形成多个第一电极第二接触区。
11.如权利要求10所述的发光元件，其中各该多个第一电极第一接触区包含第一接触面积小于各该多个第一电极第二接触区的第二接触面积。
12.如权利要求11所述的发光元件，其中该多个第一电极第一接触区包含第一接触总面积大于该多个第一电极第二接触区的第二接触总面积。
CN202210594547.3A 2021-05-28 2022-05-27 发光元件 Pending CN115411163A (zh)

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