CN115394266A - Non-spliced integrated liquid crystal display screen capable of achieving partition independent display - Google Patents
Non-spliced integrated liquid crystal display screen capable of achieving partition independent display Download PDFInfo
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- CN115394266A CN115394266A CN202211080644.7A CN202211080644A CN115394266A CN 115394266 A CN115394266 A CN 115394266A CN 202211080644 A CN202211080644 A CN 202211080644A CN 115394266 A CN115394266 A CN 115394266A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
- G09G3/3666—Control of matrices with row and column drivers using an active matrix with the matrix divided into sections
Abstract
The embodiment of the invention provides a non-spliced integrated liquid crystal display capable of being separately and independently displayed, which comprises: a first display region having a first pixel unit array having a plurality of first row control signal lines and a plurality of first column signal lines; a second display region having a second pixel unit array having a plurality of second row control signal lines and a plurality of second column signal lines; and a plurality of switching transistors respectively connected between the plurality of first row control signal lines and the plurality of second row control signal lines or between the plurality of first column signal lines and the plurality of second column signal lines.
Description
Technical Field
The invention relates to the field of display screens, in particular to a non-spliced integrated liquid crystal display screen capable of displaying in a partitioned and independent mode.
Background
Currently, display screens are used in a variety of display systems, such as, for example, on-board integrated information display systems. In these display systems, it is sometimes desirable to use tiled display screens.
Generally, the tiled display screen is mostly physically tiled by using independent display units, and each single-screen display unit serving as the tiled unit has a relatively independent structure and is packaged independently. Under the condition, when two or more than two display screens are spliced to form a large display screen for display, due to the fact that the screen is provided with a gap at the splicing position and the frame distance from the edge of the visible area of the display screen to the edge of the display screen, the display picture of the whole display screen is provided with the splicing gap, and the whole display effect of the spliced display picture is seriously influenced.
On the other hand, there is also a seamless joining technique, for example, U.S. Pat. No. 7,295,179 B2, which forms display portions independent of each other on an integrated glass substrate. Since the substrate is integral, there are no visible stitching gaps between the display sections. However, with this seamless stitching technique, since the switching signal is independently applied to each display portion, when the entire display is performed on all the display portions, it is difficult to realize absolutely synchronized display, and a state where the images on both sides of the stitching portion are not synchronized occurs.
In view of the above-mentioned drawbacks in the prior art, it is desirable to provide an improved display screen, which can ensure the integrity of the entire display and can independently control different display areas of the display screen.
Disclosure of Invention
One of the objects of the present invention is to realize a split display function of a liquid crystal panel without splicing. In the prior art, split-screen display control is realized on the basis of a physically independent liquid crystal screen, and full-screen overall display is realized through external circuit and software processing. In the invention, the liquid crystal screen has no physical partition, so that the problems of splicing gaps and image synchronization do not exist.
The invention also aims to realize the partition control of the liquid crystal screen by utilizing the existing liquid crystal screen manufacturing process.
In order to achieve the above object, the present invention provides a non-splicing integrated liquid crystal display capable of displaying separately and independently, comprising: a first display region having a first pixel unit array having a plurality of first row control signal lines and a plurality of first column signal lines; a second display region having a second pixel unit array having a plurality of second row control signal lines and a plurality of second column signal lines; and a plurality of switching transistors respectively connected between the plurality of first row control signal lines and the plurality of second row control signal lines or between the plurality of first column signal lines and the plurality of second column signal lines.
In an embodiment of the present invention, when the plurality of switching transistors are turned on, the plurality of first row control signal lines and the plurality of second row control signal lines are correspondingly connected to receive a plurality of first row control signals or a plurality of second row control signals, respectively, or the plurality of first column signal lines and the plurality of second column signal lines are correspondingly connected to receive a plurality of first column signals or a plurality of second column signals, respectively.
In the embodiment of the present invention, when the plurality of switching transistors are turned off, the plurality of first row control signal lines and the plurality of second row control signal lines are correspondingly turned off so that the plurality of first row control signal lines respectively receive a plurality of first row control signals and the plurality of second row control signal lines respectively receive a plurality of second row control signals, or the plurality of first column signal lines and the plurality of second column signal lines are correspondingly turned off so that the plurality of first column signal lines respectively receive a plurality of first column signals and the plurality of second column signal lines respectively receive a plurality of second column signals.
In an embodiment of the present invention, the control lines of the plurality of switching transistors are connected to be turned on or off at the same time.
In an embodiment of the present invention, each of the plurality of switching transistors includes a thin film transistor, wherein the thin film transistor is an amorphous silicon thin film transistor such that a width of a gap between the first display region and the second display region is 16 to 20 micrometers.
In an embodiment of the present invention, each of the plurality of switching transistors includes a thin film transistor, wherein the thin film transistor is a polysilicon thin film transistor such that a width of a gap between the first display region and the second display region is 12 micrometers.
Another embodiment of the present invention provides a non-tiled integrated liquid crystal display capable of displaying separately and independently, including: a first display region having a first pixel unit array having a plurality of first row control signal lines and a plurality of first column signal lines; a second display region having a second pixel unit array having a plurality of second row control signal lines and a plurality of second column signal lines; a third display region having a third pixel unit array having a plurality of third row control signal lines and a plurality of third column signal lines; a fourth display area having a fourth pixel unit array having a plurality of fourth row control signal lines and a plurality of fourth column signal lines; a plurality of first switching transistors respectively connected between the plurality of first row control signal lines and the plurality of second row control signal lines; a plurality of second switching transistors respectively connected between the plurality of second column signal lines and the plurality of third column signal lines; a plurality of third switching transistors respectively connected between the plurality of third row control signal lines and the plurality of fourth row control signal lines; and a plurality of fourth switching transistors respectively connected between the plurality of first column signal lines and the plurality of fourth column signal lines.
In an embodiment of the present invention, when the plurality of first switching transistors are turned on, the plurality of first row control signal lines and the plurality of second row control signal lines are correspondingly connected to respectively receive a plurality of first row control signals or a plurality of second row control signals, wherein when the plurality of second switching transistors are turned on, the plurality of second column signal lines and the plurality of third column signal lines are correspondingly connected to respectively receive a plurality of second column signals or a plurality of third column signals, wherein when the plurality of third switching transistors are turned on, the plurality of third row control signal lines and the plurality of fourth column control signal lines are correspondingly connected to respectively receive a plurality of third row control signals or a plurality of fourth row control signals, and wherein when the plurality of fourth switching transistors are turned on, the plurality of first column signal lines and the plurality of fourth column signal lines are correspondingly connected to respectively receive a plurality of first column signals or a plurality of fourth column signals.
In an embodiment of the present invention, when the plurality of first switching transistors are turned off, the plurality of first row control signal lines and the plurality of second row control signal lines are correspondingly turned off so that the plurality of first row control signal lines receive the plurality of first row control signals, respectively, and the plurality of second row control signal lines receive the plurality of second row control signals, respectively, wherein when the plurality of second switching transistors are turned off, the plurality of second column signal lines and the plurality of third column signal lines are correspondingly turned off so that the plurality of second column signal lines receive the plurality of second column signals, respectively, the plurality of third column signal lines receive the plurality of third column signals, respectively, wherein when the plurality of third switching transistors are turned off, the plurality of third row control signal lines and the plurality of fourth row control signal lines are correspondingly turned off so that the plurality of third row control signal lines receive the plurality of third row control signals, respectively, the plurality of fourth row control signal lines receive the plurality of fourth row control signals, respectively, and wherein when the plurality of fourth switching transistors are turned off, the plurality of first column control signal lines and the plurality of fourth column signal lines receive the plurality of fourth column signal lines, respectively, so that the plurality of fourth column signal lines receive the plurality of fourth signal lines.
In an embodiment of the present invention, the control lines of the plurality of first switching transistors are connected to be simultaneously turned on or off, wherein the control lines of the plurality of second switching transistors are connected to be simultaneously turned on or off, wherein the control lines of the plurality of third switching transistors are connected to be simultaneously turned on or off, and wherein the control lines of the plurality of fourth switching transistors are connected to be simultaneously turned on or off.
The embodiment of the invention has the beneficial effects that: the screen is divided and connected with a plurality of display areas through the switching transistor, so that full-screen integral display or split-screen display control is realized. Compared with a spliced liquid crystal screen formed by splicing liquid crystal screens which are independent of each other, the liquid crystal screen does not have a physical boundary of a display area, so that the overall display effect of a picture is not influenced during overall display. In addition, since the signal lines (row control signal lines or column signal lines) of the adjacent display areas are short-circuited together by the switching transistor to be simultaneously controlled without an additional synchronization control circuit or software on the periphery, absolute synchronization of image display of each display area can be ensured, so that the problem of image synchronization of different display areas does not exist. In addition, the switching transistor introduced into the screen in the invention can be formed by adopting the manufacturing process of the existing liquid crystal screen, so that the improvement of the liquid crystal screen can be realized on the basis of not increasing the process complexity and the manufacturing cost.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below. It is obvious that the drawings in the following description are some embodiments of the invention, and that for a person skilled in the art, other drawings can be derived from them without inventive effort.
Fig. 1 is a schematic diagram of the structure and wiring of a liquid crystal panel according to embodiment 1 of the present invention.
Fig. 2 is a schematic view of a liquid crystal panel according to embodiment 1 of the present invention.
Fig. 3 is a schematic diagram of the structure and wiring of a liquid crystal panel according to embodiment 2 of the present invention.
Fig. 4 is a schematic view of a liquid crystal panel according to embodiment 2 of the present invention.
Fig. 5 is a schematic diagram of the structure and wiring of a liquid crystal panel according to embodiment 3 of the present invention.
Fig. 6 is a schematic view of a liquid crystal panel according to embodiment 3 of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without inventive step based on the embodiments of the present invention, are within the scope of protection of the present invention.
Example 1
As shown in fig. 1 and 2, an embodiment of the present invention provides a non-tiled integrated liquid crystal display 100 capable of separately displaying in a divisional manner, which includes a first display area 101 and a second display area 102. The first display region 101 and the second display region 102 are provided on the same substrate, and are connected by a switching transistor 110. In an embodiment of the present invention, the first display region 101 and the second display region 102 are disposed side by side along the X axis, and a column of switching transistors 110 is disposed between the first display region 101 and the second display region 102 along the Y axis.
The first display region 101 has a plurality of pixel cells 101a with switch circuits 101b, and the second display region 102 has a plurality of pixel cells 102a with switch circuits 102 b. According to an embodiment of the present invention, the switch circuits 101b, 102b comprise thin film transistors.
In the embodiment of the present invention, the first display region 101 and the second display region 102 are arranged in left-right symmetry with the axis of the column in which the switching transistor 110 is located as a symmetry axis, so that the pixel units 101a and 102a of the two are also arranged in symmetry with the axis as the symmetry axis. The pixel units 101a and 102a may be pixels composed of 3 sub-pixels of red (R), green (G) and blue (B).
In an embodiment of the invention, the switching circuits 101b, 102b are located distal to the axis of symmetry. As shown in fig. 1, the "distal" is represented by: the switching circuit 101b of the first display region 101 is located at the upper left corner of the pixel unit 101a, and the switching circuit 102b of the second display region 102 is located at the upper right corner of the pixel unit 102a. It should also be understood that the term "distal" may also be expressed as: the switch circuit 101b of the first display region 101 is located at the lower left corner of the pixel unit 101a, and the switch circuit 102b of the second display region 102 is located at the lower right corner of the pixel unit 102a.
The switch circuits 101b, 102b are disposed at the far side positions as described above, and are each distant from the central area of the liquid crystal panel 100 in each pixel unit, thereby providing a placement area for the switch transistor 110. And since the switching circuits 101b, 102b are located on the far side, the electric field generated by the switching transistors has the least influence on the electric field in the pixel cells 101a, 102a of the liquid crystal panel 100.
In the embodiment of the present invention, the first display region 101 has a first pixel unit array composed of pixel units 101a having a plurality of first row control signal lines R 11 、R 12 、…、R 1(n-1) 、R 1n And a plurality of first column signal lines C 11 、C 12 、…、C 1(n-1) 、C 1n . The second display region 102 has a second pixel cell array composed of pixel cells 102a having a plurality of second row control signal lines R 21 、R 22 、…、R 2(n-1) 、R 2n And a plurality of second column signal lines C 21 、C 22 、…、C 2(n-1) 、C 2n . As shown in fig. 1, a plurality of (n) switching transistors 110 are respectively connected to a plurality of first row control signal lines R 11 、R 12 、…、R 1(n-1) 、R 1n And a plurality of second row control signal lines R 21 、R 22 、…、R 2(n-1) 、R 2n In the meantime. In the first display region 101, the switch circuit 101b of the pixel unit 101a receives a row control signal and a column signal via the corresponding row control signal line and column signal line associated therewith, and operates under the control of the row control signal and column signal. In the second display region 102, the switch circuits 102b of the pixel units 102a receive row control signals and column signals via corresponding row control signal lines and column signal lines associated therewith, and operate under the control of the row control signals and column signals.
In the embodiment of the invention, the number of the active ingredients is more thanWhen the switching transistors 110 are turned on, as shown in FIG. 1, a plurality of first row control signal lines R 11 、R 12 、…、R 1(n-1) 、R 1n And a plurality of second row control signal lines R 21 、R 22 、…、R 2(n-1) 、R 2n Are correspondingly connected to receive a plurality of first row control signals or a plurality of second row control signals, respectively. In other words, the pixel units 101a and 102a are pixel units having the same structure, and thus any one of the first row control signal and the second row control signal can control the pixel units 101a and 102a.
In the embodiment of the present invention, when the plurality of switching transistors 110 are turned off, as shown in fig. 1, the plurality of first row control signal lines R 11 、R 12 、…、R 1(n-1) 、R 1n And a plurality of second row control signal lines R 21 、R 22 、…、R 2(n-1) 、R 2n Correspondingly disconnected to make a plurality of first row control signal lines R 11 、R 12 、…、R 1(n-1) 、R 1n Respectively receive multiple first row control signals and multiple second row control signal lines R 21 、R 22 、…、R 2(n-1) 、R 2n Respectively receiving a plurality of second row control signals.
Therefore, as described above, by providing a plurality of switching transistors 110, the entire display or the divisional display of the liquid crystal panel 100 can be controlled. In addition, since the switching transistor 110 shorts the corresponding row control signal lines together when turned on, so that the row control signal lines of different display areas receive the row control signal simultaneously, there is no image synchronization problem when the liquid crystal panel 100 displays a full screen.
In an embodiment of the present invention, the control lines of the plurality of switching transistors 110 are connected together to form a control line Ctr as shown in fig. 1. In this case, the plurality of switching transistors 110 are simultaneously turned on or off. When the control line Ctr is kept at the high level, the plurality of switching transistors 110 are turned on. When the control line Ctr is kept at a low level, the plurality of switching transistors 110 are turned off. When the plurality of switching transistors 110 are turned on, the row control signal lines connected correspondingly are short-circuited, so that the first display region 101 and the second display region 102 are formed as an integrated display region. When the plurality of switching transistors 110 are turned off, the corresponding row control signal lines are turned off, so that the first display region 101 and the second display region 102 become display regions independent of each other.
In the embodiment of the present invention, the control signals of the plurality of switching transistors 110 each adopt a dc voltage control signal of a constant voltage, so that the switching transistor is in an off or fully on state, and the plurality of switching transistors 110 are in a constant operating state during operation, so that the generated electric field is constant. Therefore, the working electric field of the liquid crystal molecules in the pixel units on both sides of the switching transistor 110 is not affected, and the pixel units on both sides are isolated so that the electric fields do not affect each other.
In an embodiment of the present invention, each of the plurality of switching transistors includes a Thin Film Transistor (TFT), which may be the same type as the transistor in each pixel cell. As is known in the art, a thin film transistor is a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), the use of which as a switching transistor is also well known in the art and will not be described in detail herein. In this case, the switching transistor 110 may be simultaneously formed using an existing manufacturing process of the liquid crystal panel TFT. Therefore, the improved liquid crystal screen disclosed by the invention can be formed on the basis of not adding new processes and manufacturing procedures.
In an embodiment of the present invention, the thin film transistor may include an amorphous silicon thin film transistor formed using an amorphous silicon process such that a width of a gap between the first display region 101 and the second display region 102 is 16 to 20 micrometers. It should be noted that the gap between the first display region 101 and the second display region may also be understood as a gap between opposite sides of the pixel units 101a and 102a on both sides of the switching transistor. In another embodiment of the present invention, the thin film transistor may include a polysilicon thin film transistor formed using a low temperature polysilicon process such that a width of a gap between the first display region 101 and the second display region 102 is 12 micrometers. Therefore, there is no distinct physical boundary between the first display region 101 and the second display region 102, and there is no visible boundary on the screen when the liquid crystal panel 100 displays the screen as a whole.
In an embodiment of the present invention, the number of rows and columns of the first pixel cell array is equal to the number of rows and columns of the second pixel cell array, respectively. As shown in fig. 1, a column of switching transistors 110 is disposed in a central region of the liquid crystal panel 100, so that the liquid crystal panel 100 is divided into the same first display region 101 and second display region 102. However, it should be understood that embodiments of the present invention are not limited thereto. The column switching transistors 110 may also be disposed in a non-central region of the liquid crystal panel 100, such that the number of columns in the first display region 101 is different from the number of columns in the second display region 102, but the number of rows in the first display region and the second display region are the same.
In an embodiment of the invention, the conductive lines driving the switching circuits 101b, 102b, i.e. the row control signal lines and the column signal lines, extend distally along the X-axis and the Y-axis, respectively, to form row interface leads and column interface leads. As shown in fig. 2, only the row interface lead 101c of the first display area 101 and the row interface lead 102c of the second display area 102 are shown. It is to be understood that the first display region 101 may be provided with column interface leads (not shown) on one of upper and lower sides in the Y-axis direction, and the second display region 102 may be provided with column interface leads (not shown) on one of upper and lower sides in the Y-axis direction.
Example 2
As shown in fig. 3 and fig. 4, an embodiment of the present invention provides a non-tiled integrated liquid crystal display 200 capable of separately displaying in a divisional manner, which includes a first display area 201 and a second display area 202. The first display region 201 and the second display region 202 are provided over the same substrate, and are connected to each other through a switching transistor 210. In the embodiment of the present invention, the first display region 201 and the second display region 202 are disposed side by side along the Y axis, and a row of switching transistors 210 is disposed between the first display region 201 and the second display region 202 along the X axis.
The first display region 201 has a plurality of pixel cells 201a with switch circuits 201b, and the second display region 202 has a plurality of pixel cells 202a with switch circuits 202 b. According to an embodiment of the present invention, the switching circuits 201b, 202b include thin film transistors.
In the embodiment of the present invention, the first display region 201 and the second display region 202 are arranged in bilateral symmetry with the axis of the row in which the switching transistor 210 is located as a symmetry axis, so that the pixel units 201a and 202a of the two are also arranged in symmetry with the axis as a symmetry axis. The pixel units 201a, 202a may be pixels composed of 3 sub-pixels of red (R), green (G), and blue (B).
In an embodiment of the invention, the switching circuits 201b, 202b are located distally to the axis of symmetry. As shown in fig. 3, the "distal" behavior is: the switch circuit 201b of the first display region 201 is located at the upper left corner of the pixel unit 201a, and the switch circuit 202b of the second display region 202 is located at the lower left corner of the pixel unit 102a. It should also be understood that the term "distal" may also be expressed as: the switch circuit 201b of the first display region 201 is located at the upper right corner of the pixel unit 101a, and the switch circuit 202b of the second display region 202 is located at the lower right corner of the pixel unit 202a.
According to the above, the switching circuits 201b, 202b are far from the central region of the liquid crystal panel 200, which provides a placement area for the switching transistor 210, and since the switching circuits 201b, 202b are located on the far side, the influence of the electric field generated by the switching transistors on the electric field in the pixel cells 201a, 202a of the liquid crystal panel 200 is minimal.
In the embodiment of the present invention, the first display region 201 has a first pixel cell array composed of pixel cells 201a having a plurality of first row control signal lines R 11 、R 12 、…、R 1(n-1) 、R 1n And a plurality of first column signal lines C 11 、C 12 、…、C 1(n-1) 、C 1n . The second display region 202 has a second pixel cell array composed of pixel cells 202a having a plurality of second row control signal lines R 21 、R 22 、…、R 2(n-1) 、R 2n And a plurality of second column signal lines C 21 、C 22 、…、C 2(n-1) 、C 2n . As shown in fig. 3, a plurality of (n) switching transistors 210 are connected to the plurality of first column signal lines C, respectively 11 、C 12 、…、C 1(n-1) 、C 1n And a plurality of second column signal lines C 21 、C 22 、…、C 2(n-1) 、C 2n In the meantime. In the first display region 201, the switch circuit 201b of the pixel unit 201a receives a row control signal and a column signal via corresponding row control signal lines and column signal lines associated therewith, and operates under the control of the row control signal and the column signal. In the second display region 202, the switch circuit 202b of the pixel unit 202a receives a row control signal and a column signal via the corresponding row control signal line and column signal line associated therewith, and operates under the control of the row control signal and column signal.
In the embodiment of the invention, when the plurality of switching transistors 210 are turned on, as shown in fig. 3, the plurality of first column signal lines C 11 、C 12 、…、C 1(n-1) 、C 1n And a plurality of second column signal lines C 21 、C 22 、…、C 2(n-1) 、C 2n The first column signal and the second column signal are respectively received by the corresponding connection. In other words, the pixel units 201a and 202a are the same pixel unit, and thus any one of the first column signal and the second column signal can control the pixel units 201a and 202a.
In the embodiment of the invention, when the plurality of switching transistors 210 are turned off, as shown in fig. 3, the plurality of first column signal lines C 11 、C 12 、…、C 1(n-1) 、C 1n And a plurality of second column signal lines C 21 、C 22 、…、C 2(n-1) 、C 2n Correspondingly disconnected, so that a plurality of first column signal wires C 11 、C 12 、…、C 1(n-1) 、C 1n Respectively receiving a plurality of first column signals, a plurality of second column signal lines C 21 、C 22 、…、C 2(n-1) 、C 2n Respectively receiving a plurality of second column signals.
Therefore, as described above, by providing a plurality of switching transistors 210, the entire display or the divisional display of the liquid crystal panel 200 can be controlled. In addition, since the switching transistor 210 shorts the corresponding column signal lines together when turned on, so that the column signal lines of different display areas receive the column signals simultaneously, there is no need to consider the problem of image synchronization when the liquid crystal panel 200 displays a full screen.
In an embodiment of the present invention, the control lines of the plurality of switching transistors 210 are connected together to form a control line Ctr as shown in fig. 3. In this case, the plurality of switching transistors 210 are simultaneously turned on or off. When the control line Ctr is kept at the high level, the plurality of switching transistors 210 are turned on. When the control line Ctr is kept at the low level, the plurality of switching transistors 210 are turned off. When the plurality of switching transistors 210 are turned on, the correspondingly connected column signal lines are shorted, so that the first display region 201 and the second display region 202 are formed as an integrated display region. When the plurality of switching transistors 210 are turned off, the corresponding column signal lines are turned off, so that the first display region 201 and the second display region 202 become display regions independent of each other.
In the embodiment of the present invention, the control signals of the plurality of switching transistors 210 are all direct current voltage control signals with constant voltage, so that the switching transistors are in an off or full on state, and the plurality of switching transistors 210 are in a constant operating state during operation, so that the generated electric field is constant. Therefore, the working electric field of the liquid crystal molecules in the pixel units on both sides of the switching transistor 210 is not affected, and the pixel units on both sides are isolated so that the electric fields do not affect each other.
In an embodiment of the present invention, each of the plurality of switching transistors includes a Thin Film Transistor (TFT), which may be the same type as the transistor in each pixel cell. As is known in the art, a thin film transistor is a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), the use of which as a switching transistor is also well known in the art and will not be described in detail herein. In this case, the switching transistor 210 may be simultaneously formed using the existing manufacturing process of the liquid crystal panel TFT. Therefore, the improved liquid crystal screen disclosed by the invention can be formed on the basis of not adding new processes and manufacturing procedures.
In an embodiment of the present invention, the thin film transistor may include an amorphous silicon thin film transistor formed using an amorphous silicon process such that a width of a gap between the first display region 201 and the second display region 202 is 16 to 20 micrometers. In another embodiment of the present invention, the thin film transistor may include a polysilicon thin film transistor formed using a low temperature polysilicon process such that a width of a gap between the first display region 201 and the second display region 202 is 12 micrometers. Therefore, there is no distinct physical boundary between the first display region 201 and the second display region 202, and there is no visible boundary on the screen when the liquid crystal panel 200 displays the screen as a whole.
In an embodiment of the present invention, the number of rows and columns of the first pixel cell array is equal to the number of rows and columns of the second pixel cell array, respectively. As shown in fig. 3, a row of switching transistors 210 is disposed in a central region of the liquid crystal panel 200, so that the liquid crystal panel 200 is divided into the same first display region 201 and second display region 202. However, it should be understood that embodiments of the present invention are not limited thereto. A row of switching transistors 210 may also be disposed in a non-central region of the liquid crystal panel 200 such that the number of rows in the first display region 201 is different from the number of rows in the second display region 202, but the number of columns is the same.
In an embodiment of the invention, the conductive lines driving the switching circuits 201b, 202b, i.e. the row control signal lines and the column signal lines, extend distally along the X-axis and the Y-axis, respectively, to form row interface leads and column interface leads. As shown in fig. 4, only the column interface lead 201c of the first display area 201 and the column interface lead 202c of the second display area 202 are shown. It is to be understood that the first display region 201 may be provided with row interface leads (not shown) on one of the left and right sides in the X-axis direction, and the second display region 202 may be provided with row interface leads (not shown) on one of the left and right sides in the X-axis direction.
Example 3
As shown in fig. 5 and 6, an embodiment of the present invention provides a non-tiled integrated liquid crystal panel 300 capable of separately displaying in a partitioned manner, which includes a first display area 301, a second display area 302, a third display area 303, and a fourth display area 304. The first display region 301, the second display region 302, the third display region 303, and the fourth display region 304 are provided on the same substrate, and as shown in fig. 5, adjacent display regions are connected by the switching transistor 210. In the embodiment of the present invention, as shown in fig. 5, the first row and the first column of switching transistors which are orthogonal to each other are taken as reference axes, and then the first display area 301 is located in the first quadrant, the second display area 302 is located in the second quadrant, the third display area 303 is located in the third quadrant, and the fourth display area 304 is located in the fourth quadrant. The first column switching transistors 310 are disposed between the first display region 301 and the second display region 302 along the Y axis, the first row switching transistors 320 are disposed between the second display region 302 and the third display region 303 along the X axis, the second column switching transistors 330 are disposed between the third display region 303 and the fourth display region 304 along the Y axis, and the second row switching transistors 340 are disposed between the first display region 301 and the fourth display region 304 along the X axis.
The first display region 301 has a plurality of pixel cells 301a with switch circuits 301b, the second display region 302 has a plurality of pixel cells 302a with switch circuits 302b, the third display region 303 has a plurality of pixel cells 303a with switch circuits 303b, and the fourth display region 304 has a plurality of pixel cells 304a with switch circuits 304 b. According to an embodiment of the present invention, the switching circuits 301b, 302b, 303b, 304b comprise thin film transistors.
In the embodiment of the present invention, the first display region 301 and the second display region 302 and the third display region 303 and the fourth display region 304 are arranged bilaterally symmetrically with the axis of the column where the switching transistors 310 and 330 are located as the symmetry axis, so that the pixel units 301a and 302a and the pixel units 303a and 304a are also arranged symmetrically with the axis as the symmetry axis, and the first display region 301 and the fourth display region 304 and the second display region 302 and the third display region 303 are arranged vertically symmetrically with the axis of the row where the switching transistors 320 and 340 are located as the symmetry axis, so that the pixel units 301a and 304a and the pixel units 302a and 303a are also arranged symmetrically with the axis as the symmetry axis. In other words, the four display regions 301, 302, 304 are formed to be center-symmetrical around the center of the liquid crystal panel 300, and thus the pixel units 301a, 302a, 303a, 304a are also formed to be center-symmetrical. The pixel units 301a, 302a, 303a, 304a may be pixels composed of 3 sub-pixels of red (R), green (G), and blue (B).
In an embodiment of the invention, the switching circuits 301b, 302b, 303b, 304b are located distal to the centre of symmetry. The "distal" behavior is: the switch circuit 301b of the first display area 301 is located at the upper right corner of the pixel unit 301a, the switch circuit 302b of the second display area 302 is located at the upper left corner of the pixel unit 302a, the switch circuit 303b of the third display area 303 is located at the lower left corner of the pixel unit 303a, and the switch circuit 304b of the fourth display area 304 is located at the lower right corner of the pixel unit 304a.
According to the above, the switching circuits 301b, 302b, 303b, 304b are located away from the center of symmetry of the liquid crystal panel 300 in the respective corresponding pixel cells, which provides a placement area for the switching transistors 310, 320, 330, 340, and since the switching circuits 301b, 302b, 303b, 304b are located on the far side, the influence of the electric field generated by the switching transistors on the electric field in the pixel cells 301a, 302a, 303a, 304a of the liquid crystal panel 300 is minimized.
In the embodiment of the present invention, the first display region 301 has a first pixel unit array composed of pixel units 301a having a plurality of first row control signal lines R 11 、…、R 1n And a plurality of first column signal lines C 11 、…、C 1n . The second display region 302 has a second pixel cell array composed of pixel cells 302a having a plurality of second row control signal lines R 21 、…、R 2n And a plurality of second column signal lines C 21 、…、C 2n . The third display region 303 has a third pixel cell array composed of pixel cells 303a having a plurality of third row control signal lines R 31 、…、R 3n And a plurality of third column signal lines C 31 、…、C 3n . The fourth display region 304 has a fourth pixel cell array composed of pixel cells 304a having a plurality of fourth row control signal lines R 41 、…、R 4n And a plurality of fourth column signal lines C 41 、…、C 4n . As shown in FIG. 5, a plurality (n) of first switch crystalsThe transistor 310 is respectively connected to a plurality of first row control signal lines R 11 、…、R 1n And a plurality of second row control signal lines R 21 、…、R 2n A plurality of (n) second switching transistors 320 are connected to the plurality of second column signal lines C, respectively 21 、…、C 2n And a plurality of third column signal lines C 31 、…、C 3n A plurality of (n) third switching transistors 330 are respectively connected to the plurality of third row control signal lines R 31 、…、R 3n And a plurality of fourth row control signal lines R 41 、…、R 4n In between, a plurality of (n) fourth switching transistors 340 are connected to the plurality of first column signal lines C, respectively 11 、…、C 1n And a plurality of fourth column signal lines C 41 、…、C 4n In the meantime. In the first display region 301, the switch circuit 301b of the pixel unit 301a receives a row control signal and a column signal via the corresponding row control signal line and column signal line associated therewith, and operates under the control of the row control signal and column signal. In the second display region 302, the switch circuit 302b of the pixel unit 302a receives a row control signal and a column signal via corresponding row control signal lines and column signal lines associated therewith, and operates under the control of the row control signal and the column signal. In the third display region 303, the switch circuits 303b of the pixel units 303a receive row control signals and column signals via corresponding row control signal lines and column signal lines associated therewith, and operate under the control of the row control signals and column signals. In the fourth display region 304, the switch circuits 304b of the pixel units 304a receive row control signals and column signals via corresponding row control signal lines and column signal lines associated therewith, and operate under the control of the row control signals and column signals.
In the embodiment of the present invention, as shown in fig. 5, when the plurality of first switching transistors 310 are turned on, the plurality of first row control signal lines R 11 、…、R 1n And a plurality of second row control signal lines R 21 、…、R 2n Are correspondingly connected to receive a plurality of first row control signals or a plurality of second row control signals, respectively. When the second switch transistors are turned on 320, the second signal lines C 21 、…、C 2n And a plurality of third column signal lines C 31 、…、C 3n Correspondingly connected to receive the second column signals or the third column signals, respectively. When the third switching transistors 330 are turned on, the third row control signal lines R 31 、…、R 3n And a plurality of fourth row control signal lines R 41 、…、R 4n Are correspondingly connected to receive a plurality of third row control signals or a plurality of fourth row control signals, respectively. When the plurality of fourth switching transistors 340 are turned on, the plurality of first column signal lines C 11 、…、C 1n And a plurality of fourth column signal lines C 41 、…、C 4n Are correspondingly connected to receive the first column signals or the fourth column signals respectively.
In the embodiment of the present invention, as shown in fig. 5, when the plurality of first switching transistors 310 are turned off, the plurality of first row control signal lines R 11 、…、R 1n And a plurality of second row control signal lines R 21 、…、R 2n Correspondingly disconnected to make a plurality of first row control signal lines R 11 、…、R 1n Respectively receive multiple first row control signals and multiple second row control signal lines R 21 、…、R 2n Respectively receiving a plurality of second row control signals. When the plurality of second switching transistors 320 are turned off, the plurality of second column signal lines C 21 、…、C 2n And a plurality of third column signal lines C 31 、…、C 3n Correspondingly disconnected, so that a plurality of second column signal lines C 21 、…、C 2n Respectively receiving a plurality of second column signals, a plurality of third column signal lines C 31 、…、C 3n Respectively receiving a plurality of third column signals. When the third switching transistors 330 are turned off, the third row control signal lines R 31 、…、R 3n And a plurality of fourth row control signal lines R 41 、…、R 4n Correspondingly disconnected to make a plurality of third row control signal lines R 31 、…、R 3n Respectively receiving a plurality of third row control signals, a plurality of fourth row control signal lines R 41 、…、R 4n Respectively receiving a plurality of fourth row control signals. When the fourth switching transistors 340 are turned off, the first switching transistorsColumn signal line C 11 、…、C 1n And a plurality of fourth column signal lines C 41 、…、C 4n Correspondingly disconnected, so that a plurality of first column signal lines C 11 、…、C 1n Respectively receiving a plurality of first column signals, a plurality of fourth column signal lines C 41 、…、C 4n Respectively receiving a plurality of fourth column signals.
Therefore, according to the above, by providing the plurality of first switching transistors 310, the plurality of second switching transistors 320, the plurality of third switching transistors 330, and the plurality of fourth switching transistors 340, it is possible to control the entire display or the divisional display of the liquid crystal panel 300. In addition, since the switching transistor 310, 320, 330, or 340 shorts together the corresponding row control signal line or column signal line when turned on, so that the row control signal line or column signal line of different display areas simultaneously receive the row control signal or column signal, there is no image synchronization problem when the liquid crystal panel 300 displays a full screen display screen.
In the embodiment of the present invention, the control lines of the plurality of first switching transistors 310, the plurality of second switching transistors 320, the plurality of third switching transistors 330, and the plurality of fourth switching transistors 340 are each connected together to form the control lines Ctr1, ctr2, ctr3, ctr4 as shown in fig. 5, respectively. In this case, the plurality of first switching transistors 310, the plurality of second switching transistors 320, the plurality of third switching transistors 330, and the plurality of fourth switching transistors 340 are simultaneously turned on or off, respectively. When the control line Ctr1, ctr2, ctr3, or Ctr4 maintains a high level, the switching transistor 310, 320, 330, or 340 is turned on. When the control line Ctr1, ctr2, ctr3, or Ctr4 is kept low, the switching transistor 310, 320, 330, or 340 is turned off. When the switching transistors 310, 320, 330, and 340 are all turned on, the correspondingly connected signal lines are shorted, so that the first display region 301, the second display region 302, the third display region 303, and the fourth display region 304 are formed as an integrated display region. When the switching transistor 310, 320, 330, or 340 is turned off, the corresponding signal line is turned off, so that the display regions corresponding to the adjacent display regions are independent of each other.
In the embodiment of the present invention, the control signals of the switching transistors 310, 320, 330, 340 are all direct current voltage control signals with constant voltages, so that the switching transistors are in an off or full on state, and the plurality of switching transistors 310, 320, 330, 340 are in a constant operating state during operation, so that the generated electric field is constant. Therefore, the operating electric field of the liquid crystal molecules in the pixel cells on both sides of the switching transistors 310, 320, 330, 340 is not affected, and the influence of the electric field of the pixel cells on both sides is also isolated.
In an embodiment of the present invention, each of the switching transistors 310, 320, 330, 340 comprises a Thin Film Transistor (TFT), which may be of the same type as the transistors in each pixel cell. As is known in the art, a thin film transistor is a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), the use of which as a switching transistor is also well known in the art and will not be described in detail herein. In this case, the switching transistors 310, 320, 330, 340 may be simultaneously formed using an existing manufacturing process of the liquid crystal panel TFT. Therefore, the improved liquid crystal screen disclosed by the invention can be formed on the basis of not adding new processes and manufacturing procedures.
In an embodiment of the present invention, the thin film transistor may include an amorphous silicon thin film transistor formed using an amorphous silicon process such that a width of a gap between the first display region 301 and the second display region 302, between the first display region 301 and the fourth display region 304, between the third display region 303 and the second display region 302, and between the third display region 303 and the fourth display region 304 is 16 micrometers to 20 micrometers. In another embodiment of the present invention, the thin film transistor may include a polysilicon thin film transistor formed using a low temperature polysilicon process such that the width of the gap between the first display region 301 and the second display region 302, between the first display region 301 and the fourth display region 304, between the third display region 303 and the second display region 302, and between the third display region 303 and the fourth display region 304 is 12 micrometers. Therefore, there is no distinct physical boundary between adjacent display regions, and there is no visible boundary on the screen when the liquid crystal panel 300 displays the screen as a whole.
In an embodiment of the present invention, the number of rows and columns of the first pixel cell array, the number of rows and columns of the second pixel cell array, the number of rows and columns of the third pixel cell array, and the number of rows and columns of the fourth pixel cell array are respectively equal. As shown in fig. 5, the switching transistors 310, 320, 330, 340 are respectively disposed along the symmetry axis of the liquid crystal panel 300 such that the liquid crystal panel 300 is uniformly divided into the same first display region 301, second display region 302, third display region 303, fourth display region 304. However, it should be understood that embodiments of the present invention are not limited thereto. The switching transistors 310, 320, 330 or 340 may also not be arranged along the axis of symmetry of the liquid crystal panel 300 (but still along the X-axis or Y-axis) so that the number of rows or columns of adjacent display areas may be different.
In an embodiment of the invention, the electrically conductive lines driving the switching circuits 301b, 302b, 303b, 304b, i.e. the row control signal lines and the column signal lines, extend distally along the X-axis and the Y-axis, respectively, to form row interface leads and column interface leads. As shown in fig. 6, only the row interface leads 301c, 302c, 303c, 304c of the respective display areas 301, 302, 303, 304 are shown. It is to be understood that the first display region 301 may be provided with column interface leads (not shown) at an upper side in the Y-axis direction, the second display region 302 may be provided with column interface leads (not shown) at an upper side in the Y-axis direction, the third display region 303 may be provided with column interface leads (not shown) at a lower side in the Y-axis direction, and the fourth display region 304 may be provided with column interface leads (not shown) at a lower side in the Y-axis direction.
Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (10)
1. A non-splicing integrated liquid crystal display capable of being separately and independently displayed comprises:
a first display region having a first pixel unit array having a plurality of first row control signal lines and a plurality of first column signal lines;
a second display region having a second pixel unit array having a plurality of second row control signal lines and a plurality of second column signal lines; and
a plurality of switching transistors respectively connected between the plurality of first row control signal lines and the plurality of second row control signal lines or between the plurality of first column signal lines and the plurality of second column signal lines.
2. The partitionable individual display non-tiled integrated liquid crystal screen of claim 1, wherein when the plurality of switching transistors are turned on, the plurality of first row control signal lines and the plurality of second row control signal lines are correspondingly connected to receive a plurality of first row control signals or a plurality of second row control signals, respectively, or the plurality of first column signal lines and the plurality of second column signal lines are correspondingly connected to receive a plurality of first column signals or a plurality of second column signals, respectively.
3. The partitionally independent display non-tiled integrated liquid crystal panel of claim 1, wherein when the plurality of switching transistors are turned off, the plurality of first row control signal lines and the plurality of second row control signal lines are correspondingly turned off such that the plurality of first row control signal lines respectively receive a plurality of first row control signals and the plurality of second row control signal lines respectively receive a plurality of second row control signals, or the plurality of first column signal lines and the plurality of second column signal lines are correspondingly turned off such that the plurality of first column signal lines respectively receive a plurality of first column signals and the plurality of second column signal lines respectively receive a plurality of second column signals.
4. The partitionable individual display non-tiled integrated liquid crystal screen of claim 1, wherein the control lines of the plurality of switching transistors are connected to be turned on or off simultaneously.
5. The partitionable individual display non-tiled integrated liquid crystal screen of claim 4, wherein each of the plurality of switching transistors comprises a thin film transistor,
wherein the thin film transistor is an amorphous silicon thin film transistor such that a width of a gap between the first display region and the second display region is 16 to 20 micrometers.
6. The partitionable individual display non-tiled unitary liquid crystal screen of claim 4, wherein each of the plurality of switching transistors comprises a thin film transistor,
wherein the thin film transistor is a polysilicon thin film transistor such that a width of a gap between the first display region and the second display region is 12 micrometers.
7. A non-splicing integrated liquid crystal display capable of being separately and independently displayed comprises:
a first display region having a first pixel unit array having a plurality of first row control signal lines and a plurality of first column signal lines;
a second display region having a second pixel unit array having a plurality of second row control signal lines and a plurality of second column signal lines;
a third display region having a third pixel unit array having a plurality of third row control signal lines and a plurality of third column signal lines;
a fourth display area having a fourth pixel unit array having a plurality of fourth row control signal lines and a plurality of fourth column signal lines;
a plurality of first switching transistors respectively connected between the plurality of first row control signal lines and the plurality of second row control signal lines;
a plurality of second switching transistors respectively connected between the plurality of second column signal lines and the plurality of third column signal lines;
a plurality of third switching transistors respectively connected between the plurality of third row control signal lines and the plurality of fourth row control signal lines; and
a plurality of fourth switching transistors respectively connected between the plurality of first column signal lines and the plurality of fourth column signal lines.
8. The partitionable individual display non-tiled integrated liquid crystal panel of claim 7, wherein the plurality of first row control signal lines and the plurality of second row control signal lines are correspondingly connected to receive a plurality of first row control signals or a plurality of second row control signals, respectively, when the plurality of first switching transistors are turned on,
wherein the plurality of second column signal lines and the plurality of third column signal lines are correspondingly connected to receive a plurality of second column signals or a plurality of third column signals, respectively, when the plurality of second switching transistors are turned on,
wherein when the plurality of third switching transistors are turned on, the plurality of third row control signal lines and the plurality of fourth row control signal lines are correspondingly connected to receive the plurality of third row control signals or the plurality of fourth row control signals, respectively, and
wherein when the plurality of fourth switching transistors are turned on, the plurality of first column signal lines and the plurality of fourth column signal lines are correspondingly connected to receive a plurality of first column signals or a plurality of fourth column signals, respectively.
9. The partitionable individual display non-tiled integrated liquid crystal panel of claim 7, wherein when the first plurality of switching transistors are turned off, the first plurality of row control signal lines and the second plurality of row control signal lines are correspondingly turned off such that the first plurality of row control signal lines receive the first plurality of row control signals, respectively, and the second plurality of row control signal lines receive the second plurality of row control signals, respectively,
wherein when the plurality of second switching transistors are turned off, the plurality of second column signal lines and the plurality of third column signal lines are correspondingly turned off, so that the plurality of second column signal lines respectively receive a plurality of second column signals, the plurality of third column signal lines respectively receive a plurality of third column signals,
wherein when the plurality of third switching transistors are turned off, the plurality of third row control signal lines and the plurality of fourth row control signal lines are correspondingly turned off, such that the plurality of third row control signal lines receive the plurality of third row control signals, respectively, the plurality of fourth row control signal lines receive the plurality of fourth row control signals, respectively, and
when the fourth switching transistors are turned off, the first column signal lines and the fourth column signal lines are correspondingly turned off, so that the first column signal lines receive first column signals respectively, and the fourth column signal lines receive fourth column signals respectively.
10. The partitionable individual display non-tiled integrated liquid crystal panel of claim 7, wherein the control lines of the plurality of first switching transistors are connected to be turned on or off simultaneously,
wherein control lines of the plurality of second switching transistors are connected to be simultaneously turned on or off,
wherein control lines of the plurality of third switching transistors are connected to be simultaneously turned on or off, and
wherein control lines of the plurality of fourth switching transistors are connected to be simultaneously turned on or off.
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