CN115378911B - LIN bus automatic addressing system and implementation method - Google Patents
LIN bus automatic addressing system and implementation method Download PDFInfo
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- CN115378911B CN115378911B CN202211298480.5A CN202211298480A CN115378911B CN 115378911 B CN115378911 B CN 115378911B CN 202211298480 A CN202211298480 A CN 202211298480A CN 115378911 B CN115378911 B CN 115378911B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40169—Flexible bus arrangements
- H04L12/40176—Flexible bus arrangements involving redundancy
- H04L12/40195—Flexible bus arrangements involving redundancy by using a plurality of nodes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L2012/40208—Bus networks characterized by the use of a particular bus standard
- H04L2012/40234—Local Interconnect Network LIN
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Abstract
The invention discloses an LIN bus automatic addressing system and a realization method thereof, wherein the LIN bus automatic addressing system comprises: the LIN bus is connected among the slave nodes, the first slave node is connected with the master node through the LIN bus, the slave node module is provided with a plurality of slave nodes, and each slave node comprises: a physical layer transceiver S, a physical layer transceiver M, a protocol controller and a bus port; the bus port is provided with a host connection port and a slave connection port in each slave node; the protocol controller includes: the system comprises an RXD link control unit, a TXD link control unit, a first switch, a second switch and a third switch, and a plurality of slave nodes can be connected to the LIN bus without additionally increasing ports or shut resistors or ADCs, so that the automatic addressing of the LIN bus is realized.
Description
Technical Field
The invention relates to the technical field of LIN buses, in particular to an LIN bus automatic addressing system and an implementation method.
Background
A LIN bus is a low-cost serial communication network defined for an automobile distributed electronic system and is suitable for applications without high requirements on the bandwidth, performance or fault-tolerant function of the network, the LIN bus adopts an SCI (UART) data format and a mode of a single master controller and multiple slave devices, and the slave devices on the LIN bus determine the addresses of the slave devices through automatic addressing of the bus, so that each slave device does not need to determine the addresses in advance in the design and production process, and the design and production cost is reduced.
In a first prior art, referring to fig. 1, each slave node provides two additional ports, one micro-input port D1 and the other micro-output port D2, the D1 input of the first slave node can be set to low level or controlled by the output port of the master node; the D2 output of the first slave node is connected to the D1 input port of the second slave node, in turn, in this manner to effect the daisy-chain connection of fig. 1; initially, the output port D2 of all the slave node devices outputs a high level, and when the address of the slave node is not yet assigned and D1 inputs a low level, the current slave node is selected, address information received and received from the address assignment message of the slave is received as the current node address, and then the D2 output port is switched from the high level to the low level. Similar operations continue until each slave completes the address assignment.
Each slave node of this scheme requires the addition of two additional ports: the input port D1 and the output port D2 increase the area cost of the device node control chip.
In a second prior art, referring to fig. 2, all transceivers are initially closed, the first slave node closes its transceiver switch after being assigned an address, then the second slave node can be assigned an address, and so on to complete the address assignment for all nodes.
The serial resistance of the slave device is increased, the tolerance to ground drift is reduced, and the number of nodes of the connectable slave device is influenced finally by the method.
The prior art can not meet the requirements of people at the present stage, and the prior art is urgently needed to be reformed based on the current situation.
Disclosure of Invention
The invention aims to provide an LIN bus automatic addressing system and an implementation method thereof, so as to solve the problems in the background technology.
In one aspect, the present invention provides an automatic LIN bus addressing system according to the following technical solution, including: the master node, the slave node module and the LIN bus;
the slave node module has a plurality of slave nodes, each of the slave nodes including: a physical layer transceiver S, a physical layer transceiver M, a protocol controller and a bus port;
preferably, the slave nodes are connected through a LIN bus, and the first slave node is connected with the master node through the LIN bus;
the bus port is provided with a host connection port and a slave connection port in each slave node, wherein the host connection port is arranged at the receiving end of a physical layer transceiver S, the physical layer transceiver S is coupled with a master node through the host connection port, the slave connection port is arranged at the transmitting end of a physical layer transceiver M, and the physical layer transceiver M is coupled with the physical layer transceiver S of the next slave node through the slave connection port;
the protocol controller includes: the RXD link control unit, the TXD link control unit, the first switch, the second switch and the third switch; wherein, the first and the second end of the pipe are connected with each other,
preferably, the RXD link control unit controls the physical layer transceiver S to receive data sent by the master node through a control signal line RXD _ S, and controls the physical layer transceiver M to receive data sent by the physical layer transceiver S through a control signal line RXD _ M;
preferably, the TXD link control unit controls the physical layer transceiver S to transmit data through a control signal line TXD _ S, and controls the physical layer transceiver M to transmit data through a control signal line TXD _ M;
on the other hand, the invention also provides another technical scheme as follows, a method for realizing the automatic addressing of the LIN bus comprises the following specific steps:
step S1: the main node sends a bus initialization command frame;
step S2: the main node sends an automatic addressing initialization frame;
and step S3: the main node sends an address allocation frame;
and step S4: the main node sends an address allocation frame again;
step S5: the steps in step S4 are sequentially continued until all slave node addresses have completed address assignment.
Step S6: the physical layer transceiver M forwards the received address assignment frame and determines whether there is a match with the current slave node address.
The invention has the following beneficial effects:
(1) The slave node of the invention is provided with two pairs of TXD and RXD control signal lines, so that no additional port is required, and the area cost of the slave node control chip is reduced.
(2) The invention adopts the protocol controller to automatically forward, effectively solves the problem of ground drift, and can connect more slave nodes on the LIN bus.
(3) The invention does not need to increase the shut resistor and the ADC, thereby reducing the realization difficulty and being more convenient to operate.
(4) The invention realizes the automatic addressing of the LIN bus by receiving and forwarding the address distribution frame through the physical layer transceiver S, the physical layer transceiver M, the protocol controller and the bus port.
Drawings
Fig. 1 is a schematic diagram of a first prior art structure in the field of LIN bus technology;
fig. 2 is a schematic diagram of a second prior art structure in the field of LIN bus technology;
FIG. 3 is a schematic diagram of the general architecture of the automatic addressing system of the present invention;
FIG. 4 is a flow chart of a method for implementing automatic addressing according to the present invention;
fig. 5 is a schematic diagram of the receiving and forwarding processes of the slave node of the implementation method of the automatic addressing of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the invention without making any creative effort, shall fall within the protection scope of the invention.
Referring to fig. 3, in one aspect, the present invention provides an LIN bus automatic addressing system, including: master node, slave node module, LIN bus.
The slave node module has a plurality of slave nodes, each of the slave nodes including: the physical layer transceiver S, the physical layer transceiver M, the protocol controller and the bus port, and the slave nodes are connected through a LIN bus, and the first slave node is connected with the master node through the LIN bus.
In fig. 3, the host connection port includes D1 and D2 \8230 \ 8230, dn, and the slave connection port includes K1 and K2 \8230 \ 8230, kn, where the host connection port is disposed at a receiving end of a physical layer transceiver S, the physical layer transceiver S is coupled to a master node through the host connection port and is configured to receive a bus initialization command frame sent by the master node or a slave node address allocation frame or other frames of normal communication, the slave connection port is disposed at a sending end of the physical layer transceiver M, and the physical layer transceiver M is coupled to a physical layer transceiver S of a next slave node through the slave connection port.
The protocol controller includes: the RXD link control unit, the TXD link control unit, the first switch S0, the second switch S1 and the third switch S2; the RXD link control unit controls the physical layer transceiver S to receive data transmitted by the main node through a control signal line RXD _ S, and controls the physical layer transceiver M to receive data transmitted by the physical layer transceiver S through a control signal line RXD _ M.
The TXD link control unit controls the physical layer transceiver S to transmit data through a control signal line TXD _ S, and controls the physical layer transceiver M to transmit data through a control signal line TXD _ M.
The first switch S0 is disposed on a control signal line TXD _ M for controlling the physical layer transceiver M, and controls whether the physical layer transceiver M can transmit data by controlling the opening or closing of the first switch S0 to operate whether the control signal line TXD _ M is effectively coupled to the LIN bus.
The second switch S1 is disposed on a control signal line RXD _ M that controls the physical layer transceiver M, and controls whether the control signal line RXD _ M is effectively coupled to the LIN bus by controlling the opening or closing of the second switch S1, so as to control whether the physical layer transceiver M can receive data.
The third switch S2 is disposed on a control signal line TXD _ S of the TXD link control unit coupled to the physical layer transceiver S, and controls whether the TXD link control unit is effectively coupled to the LIN bus by controlling the opening or closing of the third switch S2, so as to control whether the physical layer transceiver S can transmit data.
Referring to fig. 4 and 5, in another aspect, the present invention further provides another technical solution as follows, in which an implementation method for LIN bus automatic addressing includes the following specific steps:
step S1: the master node transmits a bus initialization command frame.
In an initial state, a first switch S0 and a second switch S1 in a protocol controller are closed, a third switch S2 is opened, each slave node can receive a frame sent by a master node at the moment, wherein the third switch S2 is opened because no slave node needs to return a response when an automatic addressing initialization command is received; the first switch S0 and the second switch S1 are closed to ensure that each slave node can receive an automatic addressing initialization command sent by the master node; optionally, in step 1, the state of the second switch S1 may be either open or closed, and as long as the first switch S0 is closed, what state of the second switch does not affect the slave node receiving the automatic addressing initialization command sent by the master node.
Step S2: the master node sends an auto-addressing initialization frame.
After each slave node receives the address addressing initialization frame, the first switch S0 and the second switch S1 of the current slave node are opened, and the third switch S2 is closed, wherein the first switch S0 and the second switch S1 are opened to be disconnected with the subsequent slave node, and the third switch S2 is closed to enable the current slave node to have the capability of returning response, at the moment, because the first switch S0 and the second switch S1 are both in an open state, the LIN bus is in an open state at the first slave node, and only the first slave node is connected to the LIN bus at the moment.
And step S3: the master node transmits an address assignment frame.
The first slave node sets the received node address as the address of the first slave node, replies an optional slave node response frame, then puts the first switch S0 and the second switch S1 in a closed state, and puts the third switch S2 in an open state; the first switch S0 and the second switch S1 are in a closed state to be connected to a subsequent LIN bus, so that an address assignment frame sent by the master node can be received by a subsequent slave node, and a response returned by the subsequent slave node can be transmitted back to the master node; since the current slave node has already allocated an address, and will not respond to the address allocation frame any more, the third switch S2 is opened.
And step S4: the master node again transmits an address assignment frame.
Since the first slave node has allocated an address, no longer responds to the node address allocation frame, and the first switch S0 of the first slave node has been closed, the first slave node will automatically forward the received address allocation frame to the second slave node through the physical layer transceiver M; after the second slave node receives the slave node address allocation frame, the received node address is also used as the address of the second slave node, an optional node response frame is replied, and then the first switch S0 and the second switch S1 are placed in a closed state, and the third switch S2 is placed in an open state.
Step S5: the steps in step S4 are sequentially continued until all slave node addresses have completed address assignment.
Step S6: the physical layer transceiver M forwards the received address assignment frame and determines whether there is a match with the current slave node address.
After the slave nodes complete address allocation, the first switches S0 on the slave node LIN bus are all closed, the address allocation frame received from the physical layer transceiver S is forwarded from the physical layer transceiver M, and the second switch S1 is closed, so that the response of the subsequent slave nodes can be returned to the master node.
When the node address of the received frame is not matched with the current slave node address, keeping the first switch S0 and the second switch S1 closed, and opening the third switch S2; here, the first switch S0 and the second switch S1 are closed to ensure that a frame sent by the master node can be forwarded to a subsequent slave node, and the slave node can also return a response to the master node; the third switch S2 is made open because the current slave node is not selected and no response needs to be returned.
When the node address of the received frame is matched with the current slave node address, the first switch S0 and the second switch S1 are kept open, the third switch S2 is closed, and the response is replied through the current protocol controller, so that the automatic addressing of the LIN bus is completed; here the first switch S0 and the second switch S1 are open because the current slave node has been selected and does not need to forward, and the third switch S2 is closed because the current node needs to return a response.
Although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that various changes in the embodiments and/or modifications of the invention can be made, and equivalents and modifications of some features of the invention can be made without departing from the spirit and scope of the invention.
Claims (10)
1. A LIN bus automatic addressing system, comprising: the LIN bus is connected among the slave nodes, and the first slave node is connected with the master node through the LIN bus, and the LIN bus is characterized in that: a plurality of slave nodes can be connected to the LIN bus without additionally adding ports or shut resistors or ADCs, so that the automatic addressing of the LIN bus is realized;
the slave node module has a plurality of slave nodes, and each of the slave nodes includes: a physical layer transceiver S, a physical layer transceiver M, a protocol controller and a bus port;
the bus port is provided with a host connection port and a slave connection port in each slave node;
the protocol controller includes: the RXD link control unit, the TXD link control unit, the first switch S0, the second switch S1 and the third switch S2; wherein the content of the first and second substances,
the RXD link control unit controls the physical layer transceiver S to receive data sent by the main node through a control signal line RXD _ S, and controls the physical layer transceiver M to receive data sent by the physical layer transceiver S through a control signal line RXD _ M;
the TXD link control unit controls the physical layer transceiver S to transmit data through a control signal line TXD _ S, and controls the physical layer transceiver M to transmit data through a control signal line TXD _ M;
the first switch S0 is disposed on a control signal line TXD _ M for controlling the physical layer transceiver M, and controls whether the physical layer transceiver M can transmit data by controlling whether the control signal line TXD _ M is effectively coupled to the LIN bus by opening or closing the first switch S0;
the second switch S1 is arranged on a control signal line RXD _ M controlling the physical layer transceiver M, and controls whether the physical layer transceiver M can receive data by controlling the second switch S1 to be opened or closed to operate whether the control signal line RXD _ M is effectively coupled to the LIN bus;
the third switch S2 is disposed on a control signal line TXD _ S of the TXD link control unit coupled to the physical layer transceiver S, and controls whether the TXD link control unit is effectively coupled to the LIN bus by controlling the opening or closing of the third switch S2, so as to control whether the physical layer transceiver S can transmit data.
2. The LIN bus automatic addressing system of claim 1, wherein: the host connection port is arranged at the receiving end of the physical layer transceiver S, and the physical layer transceiver S is coupled with the host node through the host connection port and is used for receiving a bus initialization command frame or a slave node address allocation frame or a normal communication frame sent by the host node.
3. The LIN bus automatic addressing system of claim 1, wherein: the slave connection port is set at the transmitting end of the physical layer transceiver M, and the physical layer transceiver M is coupled to the physical layer transceiver S of the next slave node through the slave connection port.
4. A method for implementing LIN bus auto-addressing based on the system of any of claims 1-3, characterized in that the method comprises the following specific steps:
step S1: the main node sends a bus initialization command frame;
in an initial state, the first switch S0 and the second switch S1 are closed, and the third switch S2 is opened, so that each slave node can receive a frame transmitted from the master node;
step S2: the main node sends an automatic addressing initialization frame;
after each slave node receives the address addressing initialization frame, the first switch S0 and the second switch S1 of the current slave node are opened, and the third switch S2 is closed, so that only the first slave node is connected to the LIN bus;
and step S3: the main node sends an address allocation frame;
the first slave node sets the received node address as the address of the first slave node, replies an optional slave node response frame, then puts the first switch S0 and the second switch S1 in a closed state, and puts the third switch S2 in an open state;
and step S4: the main node sends an address allocation frame again;
the first slave node automatically forwards the received address allocation frame to the second slave node through the physical layer transceiver M; when the second slave node receives the slave node address allocation frame, the received node address is used as the address of the second slave node, an optional node response frame is replied, the first switch S0 and the second switch S1 are placed in a closed state, and the third switch S2 is placed in an open state;
step S5: sequentially executing the steps in the step S4 until all slave node addresses finish address allocation;
step S6: the physical layer transceiver M forwards the received address allocation frame and judges whether the address is matched with the current node address;
after the slave nodes finish address allocation, all the first switches S0 on the LIN bus of the slave nodes are closed, address allocation frames received by the physical layer transceiver S are forwarded by the physical layer transceiver M, and the second switch S1 is closed, so that the response of the subsequent slave nodes can be returned to the master node;
when the node address of the received frame is not matched with the current slave node address, the first switch S0 and the second switch S1 are kept closed, and the third switch S2 is opened, so that the frame sent by the master node can be forwarded to a subsequent slave node, and meanwhile, the slave node can also return a response to the master node;
when the node address of the received frame matches the current slave node address, the first switch S0 and the second switch S1 are kept open and the third switch S2 is closed and the response is replied by the current protocol controller.
5. The method of claim 4, wherein: in step S1, the third switch S2 is opened, so that no response is returned by any slave node after receiving an auto-addressing initialization command from the slave node.
6. The method of claim 4, wherein: in step S1, the first switch S0 and the second switch S1 are closed, so that each slave node can receive an automatic addressing initialization command sent by the master node.
7. The method of claim 4, wherein: in step S1, the initial state of the second switch S1 further includes disconnection, and the state of the second switch S1 does not affect the slave node receiving the automatic addressing initialization command sent by the master node.
8. The method of claim 4, wherein: in step S2, the first switch S0 and the second switch S1 are opened to open the subsequent slave node, and the third switch S2 is closed to enable the current slave node to have the capability of returning a response.
9. The method of claim 4, wherein: in step S3, the first switch S0 and the second switch S1 are in a closed state, so that the subsequent LIN bus is in a connected state, the address assignment frame sent by the master node can be received by the subsequent slave node, and a response returned by the subsequent slave node can also be transmitted back to the master node.
10. The method of claim 4, wherein: in step 3, the third switch S2 is opened and no further address allocation frame is responded to.
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| CN202211298480.5A CN115378911B (en) | 2022-10-24 | 2022-10-24 | LIN bus automatic addressing system and implementation method |
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| EP1320222A1 (en) * | 2001-12-13 | 2003-06-18 | AMI Semiconductor Belgium BVBA | Multiplex transmission system with in-circuit addressing |
| CN103425590A (en) * | 2012-05-16 | 2013-12-04 | 英飞凌科技股份有限公司 | System and method to address devices connected to a bus system |
| CN104461985A (en) * | 2014-12-31 | 2015-03-25 | 哈尔滨工业大学 | Master-slave synchronous serial communication bus based on node cascading and implementation method thereof |
| CN114301732A (en) * | 2022-03-08 | 2022-04-08 | 深圳市驰普科达科技有限公司 | Circuit for realizing bus communication, bus communication system and power supply energy storage device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| EP3700138B1 (en) * | 2019-02-22 | 2023-08-02 | Volvo Car Corporation | Monitoring lin nodes |
| DE102019207174A1 (en) * | 2019-05-16 | 2020-11-19 | Robert Bosch Gmbh | Transmitting / receiving device and communication control device for a subscriber station of a serial bus system and method for communication in a serial bus system |
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- 2022-10-24 CN CN202211298480.5A patent/CN115378911B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1320222A1 (en) * | 2001-12-13 | 2003-06-18 | AMI Semiconductor Belgium BVBA | Multiplex transmission system with in-circuit addressing |
| CN103425590A (en) * | 2012-05-16 | 2013-12-04 | 英飞凌科技股份有限公司 | System and method to address devices connected to a bus system |
| CN104461985A (en) * | 2014-12-31 | 2015-03-25 | 哈尔滨工业大学 | Master-slave synchronous serial communication bus based on node cascading and implementation method thereof |
| CN114301732A (en) * | 2022-03-08 | 2022-04-08 | 深圳市驰普科达科技有限公司 | Circuit for realizing bus communication, bus communication system and power supply energy storage device |
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