CN115333744B - High-reliability RO (reverse osmosis) PUF (physical unclonable function) circuit and excitation generation method thereof - Google Patents
High-reliability RO (reverse osmosis) PUF (physical unclonable function) circuit and excitation generation method thereof Download PDFInfo
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- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/32—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
- H04L9/3271—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials using challenge-response
- H04L9/3278—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials using challenge-response using physically unclonable functions [PUF]
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Abstract
The invention discloses a high-reliability RO PUF circuit and an excitation generation method thereof, which comprises an RRAM random source module, a control programming module and a measurement module, wherein two paths of ring oscillator circuits in the measurement module consist of 1 current starvation type NAND gate and 8 current starvation type inverters, and the RRAM array is used for providing reference current for the current starvation type ring oscillator. The MOS tube is enabled to work in a subthreshold region by adjusting the control voltage, so that the sensitivity of the ring oscillator to temperature change is reduced, the reliability of the PUF is improved, and meanwhile, the power consumption of the circuit overall is obviously reduced. In addition, the invention provides a stimulus generation method, and the exposed stimulus response is deleted by comparing the magnitude of each column current in the RRAM array, so that the password analysis attack can be resisted, and the safety of the PUF is improved.
Description
Technical Field
The invention belongs to the field of hardware safety, and particularly relates to a ring oscillator physical unclonable function circuit design based on a novel resistive random access memory RRAM.
Background
Because of the popularity of the internet of things and cloud computing, terminal devices face a tremendous security threat. Most of the keys are stored in non-volatile memory (NVM) where physical attacks (such as side channel analysis) can easily obtain the keys. Therefore, the internet of things device needs a safer key storage mode to ensure the security of the system. PUFs are a promising hardware security primitive that has evolved rapidly over the last decades with explosive growth of electronic devices, using as keys process errors introduced by variations in the Integrated Circuit (IC) manufacturing process and environment. When a corresponding stimulus is input to the PUF, the PUF may generate a unique and unpredictable response, based on which the PUF may implement device identity authentication by comparing the stored stimulus response in the database with the stimulus response generated by the PUF circuit. PUFs can be generally classified into weak PUFs and strong PUFs according to the number of stimulus responses in the PUF. The number of stimulus responses in a strong PUF grows exponentially whereas the number of stimulus responses in a weak PUF is small, in most cases only one. Thus, strong PUFs are typically used for device authentication and weak PUFs are typically used for key generation.
The original PUF design is mostly based on FPGAs and ASICs, with the most classical PUF designs including SRAM PUFs, RO PUFs, and arbiter PUFs. SRAM PUFs are weak PUFs, and SRAM is metastable, randomly and stably in a "0" or "1" state due to transistor mismatch during fabrication, thereby generating unique response values. The ROPUF and the arbiter PUF are strong PUFs. The RO PUF extracts the difference in RO oscillation frequency by using the delay difference between inverters, and generates a unique response value by comparing the oscillation frequencies of different ROs. The arbiter PUF uses a 2-to-1 Multiplexer (MUX) as the basic element, and the arbiter generates a unique response value by comparing the order of arrival of the final two signals due to the delay difference between the two paths inside the MUX.
As CMOS technology process steps gradually enter bottlenecks, logic density is approaching physical limits, and CMOS size reduction will cause more problems. Thus, the beyond CMOS age needs to seek new nano-devices. RRAM is a novel nonvolatile memory, has the great advantages of small area and low power consumption, and can be compatible with CMOS technology. RRAM is an advanced storage architecture where there are a large number of random sources, suitable for new PUF designs. By applying a forward or reverse voltage of appropriate magnitude, the RRAM can switch between a High Resistance State (HRS) and a Low Resistance State (LRS). However, the influence of instability of resistance change, retention loss, thermal sensitivity, or the like of the RRAM during writing may cause bit flipping at the response generation stage. PUF functions may be implemented with RRAM, for example: when a suitable median voltage is applied, the RRAM cell will have half of the cells set to HRS and the other half to LRS, thus generating random keys, but this mechanism is susceptible to various supply voltages and ambient temperatures.
Conventional RO PUFs, while easy to implement and resistant to signal noise, are sensitive to environmental changes (temperature, supply voltage, etc.), resulting in lower reliability of conventional RO PUFs, while RO PUFs consume a large circuit area due to the large number of ring oscillators required as a random source. And the overall power consumption of the circuit is also large due to the high oscillation frequency of the conventional RO PUF. Therefore, there is a need for a high reliability low power consumption RO PUF circuit design based on new types of memory.
Disclosure of Invention
The present invention is directed to solving the technical problems mentioned in the background art, and provides a high-reliability RO PUF circuit and a stimulus generation method thereof.
In order to achieve the technical purpose, the invention adopts the following technical scheme:
the invention provides a high-reliability RO PUF circuit, which comprises a random source module, a control programming module and a measuring module, wherein the random source module is an RRAM cell array, the measuring module comprises two paths of current starvation type ring oscillator circuits, a counting circuit and a digital comparison circuit, the control programming module performs write operation on the RRAM cells of the random source module to generate random source reference currents, the resistance difference from RRAM cell devices to devices is mapped into the two paths of current starvation type ring oscillator circuits, the RO of the two paths of current starvation type ring oscillator circuits generates different oscillation frequency changes, the control programming module acquires, judges, compares and outputs results on the oscillation frequencies generated by the RO of the two paths of current starvation type ring oscillator circuits, wherein the random source reference currents are generated through different RRAM cell combinations in the RRAM array, and the RO PUF circuit realizes reconstruction under the two paths of current starvation type ring oscillator circuits.
Further, the control programming module includes four signals: R/W signal, meas signal, comp signal and Clk signal, R/W signal carries out write operation to RRAM unit, meas signal control counting circuit measures RO oscillation frequency of two-way current starvation type ring oscillator circuit and carries out data acquisition, comp signal control digital comparison circuit compares RO oscillation frequency of two-way current starvation type ring oscillator circuit that gathers, clk signal is used for providing fixed clock signal control count time for the counting circuit.
Further, the current starvation ring oscillator circuit comprises 1 current starvation nand gate and 8 current starvation inverters which are connected end to end, the current starvation inverter comprises 2 PMOS and 2 NMOS, the top PMOS and the bottom NMOS are used as output circuits of the current mirror, the middle PMOS and the NMOS are used as conventional inverters, and the current starvation nand gate is added with the top PMOS and the bottom NMOS to be used as output circuits of the current mirror.
Further, all current mirrors in the current starved ring oscillator circuit share a reference current and input circuit, the reference current being defined by an adjustable control voltage V ctrl The RRAM array generation of the random source module is carried out, two rows are randomly selected in the RRAM array, any number of RRAM units in each row are selected as random sources to provide reference current, the reference current is copied to an input end M3 of a PMOS current mirror through a current mirror formed by two NMOS of the current mirror module, the reference current is output to a conventional inverter through a top PMOS current mirror and a bottom NMOS current mirror of each current starving inverter, the time delay of all the conventional inverters is controlled, and the control voltage V is regulated ctrl And enabling the MOS tube of the current starvation type ring oscillator to work in a subthreshold region.
Further, the counting circuit comprises 1 16-bit timer and 2 20-bit counters, the timer is used for ensuring that the counting time of the two counters is consistent, and the 2 counters are used for respectively counting RO oscillation frequencies of the two current starvation type ring oscillator circuits.
The invention also provides a high-reliability RO PUF circuit excitation generation method, which comprises four circulation steps, namely circulation i, circulation p, circulation j and circulation k. Cycle i and cycle p traverse the combination of all columns in the RRAM array, i increases by 1 from 1 each cycle (i.e., one column is selected after each cycle starting from the first column), while p increases from i to n in each cycle of i (i.e., one column is selected after each cycle starting from the ith column until the last column n). Thus, i can select to each column, and in each cycle of i, cycle p can select to the combination of all columns after i, so that the combination of all columns in the array can be traversed. Likewise, the loops j and k traverse the combination of all rows in the RRAM array. The four-cycle step may traverse all of the stimulus responses of the RO PUF based RRAM array, determine the stimulus response, compare the result of the upper cycle with the present cycle, if the upper cycle result is I t1，j-1 ＞I t2，j And the result of this period is I t2，k ＞I t1，j-1 Then delete comparison I t2，k And I t2，j An excitation response of (2); if the result of the upper period is I t1，j-1 ＜I t2，j And the result of this period is I t2，k ＜I t1，j-1 Then delete comparison I t2，k And I t2，j Wherein I is t1,j-1 Indicating that the j-1 th row is selected and t1 RRAM cells are selected in the j-1 th row, I t2,j Indicating that the j-th row is selected and t2 RRAM cells are selected in the j-th row, I t2,k Indicating that the kth row is selected and t2 RRAM cells are selected in the k rows, the number of t1 and t2 are equal.
The invention has the following advantages:
(1) The high-reliability RO PUF circuit transfers the random source of the conventional RO PUF from a large number of ring oscillators to the RRAM array, and can reconstruct the RO PUF by utilizing different RRAM combinations only by two current starvation type ring oscillators. The RRAM-based RO PUF circuit reduces the use of a ring oscillator, significantly reduces the circuit area, and improves the reconfigurability of the PUF.
(2) The invention is realized by adjusting the control voltage V ctrl The MOS tube of the current starvation type ring oscillator can be enabled to work in a subthreshold region, the sensitivity of the ring oscillator to temperature is reduced, and therefore the reliability of the PUF at different temperatures is improved. Meanwhile, the subthreshold operation can enable the current starvation type ring oscillator circuit to generate lower oscillation frequency in a smaller number of stages, so that the overall power consumption of the RO PUF circuit is reduced.
(3) The invention provides a stimulus generation method for improving the security of an RO PUF, which not only can traverse all stimulus responses, but also can judge whether information of other stimulus responses is leaked or not by evaluating the comparison relation between two related stimulus responses. If the relevant information is revealed, the exposed stimulus response is deleted, thereby improving the resistance of the RO PUF to cryptanalysis attacks.
Drawings
FIG. 1 is a schematic diagram of the overall circuit design of a high reliability RO PUF of an embodiment of the present invention;
FIG. 2 is a schematic diagram of a high reliability RO PUF circuit implementation of an embodiment of the present invention;
FIG. 3 is a schematic diagram of an RRAM-based current starving ring oscillator circuit according to an embodiment of the present invention;
FIG. 4 is a stimulus generation algorithm that is resistant to cryptanalysis attacks in accordance with an embodiment of the present invention;
fig. 5 is a deviation of the frequency of a high reliability RO PUF with temperature change according to an embodiment of the invention;
fig. 6 is a range of oscillation frequency variation of a high reliability RO PUF of an embodiment of the present invention.
Detailed Description
Embodiments of the present invention are described in further detail below with reference to the accompanying drawings.
The general circuit design of the high-reliability RO PUF circuit provided by the invention is shown in figure 1, and comprises a control programming module, a random source module and a measuring module. The random source module is an RRAM array, and the measuring module comprises 2 current starvation type ring oscillator circuits, a counting circuit and a digital comparison circuit. The control programming module includes four signal lines, R/W signal, meas signal, comp signal, and Clk signal. Firstly, R/W signals perform write operation on the RRAM array, and because the resistance distribution of the HRS is wider and the power consumption of the overall circuit can be reduced, RESET operation is performed on all RRAM cells, and the RRAM cells are programmed into the HRS. The RRAM device-to-device resistance difference is mapped to a current starved ring oscillator circuit, resulting in a change in the oscillation frequency of RO. The Meas signal controls the counting circuit to measure the oscillation frequency of RO, the counting circuit comprises 1 16-bit timer and 2 20-bit counters, the timer inputs a fixed clock of 50MHz, the counter measures the oscillation frequency of two current starvation type ring oscillator circuits (ROa and ROb are respectively set), when the timer counts overflows, the Flag signal turns off the counter, so that the counting time is ensured to be the same, and the acquisition of the oscillation frequency of the two current starvation type ring oscillator circuits is completed. The Comp signal controls the digital comparison circuit to compare the oscillation frequency of the two-path current starvation type ring oscillator circuit, if f ROa >f ROb A response "1" is output, otherwise a "0" is output.
The peripheral circuit includes an R/W module, a column decoder, a WL driver, and an analog selector, the analog selector being composed of analog transmission gates. The high-reliability RO PUF circuit takes an excitation signal as an address to be input, response is generated by comparing oscillation frequencies of two current starvation type ring oscillators, the RO PUF circuit only needs the two current starvation type ring oscillators, and reconfigurability is realized by selecting different RRAM combinations in an RRAM array in a random source module. A high reliability RO PUF implementation based on RRAM is critical how to map the random source of RRAM into RO. A high reliability RO PUF circuit implementation based on RRAM is shown in fig. 2. The measurement module of the present invention has two current starved ring oscillators, and the random source is no longer from a large number of different ring oscillators, but rather from the RRAM array of the random source module. The NMOS in the RRAM array is used to provide a limiting current. The oscillation module comprises two 9-level current starvation type ring oscillators, and consists of 8 current starvation type inverters connected end to end and 1 current starvation type NAND gate, wherein the current starvation type NAND gate can control whether RO oscillates or not: when en= "1", RO may produce oscillation; when en= "0", RO cannot oscillate. The PUF may not enable RO when CRPs need not be generated to reduce power consumption. The difference of the resistance values among RRAM devices is converted into the difference among oscillation frequencies of the current starving type ring oscillators, and the oscillation frequencies of the two current starving type ring oscillators are compared, so that a unique response value is generated. The RO PUF transfers the random source from the ring oscillator array to the RRAM array, can realize the reconfiguration only by 2 ring oscillators, does not need a large number of redundant ring oscillators, and obviously reduces the circuit area.
A current starved ring oscillator circuit based on RRAM is shown in fig. 3. The left shaded portion is the input end of the current mirror, an adjustable control voltage V ctrl Applied to the RRAM to provide a reference current to the output of the current mirror. The current starvation type ring oscillator is composed of 1 current starvation type NAND gate and 8 current starvation type inverters which are connected end to end, each current starvation type inverter comprises 2 PMOS and 2 NMOS, the PMOS and NMOS at the top and bottom are used as output circuits of the current mirror, whereinThe PMOS and NMOS of the capacitor act as conventional inverters. The current starved NAND gate also adds top and bottom PMOS and NMOS as output circuits for the current mirror on the basis of a conventional NAND gate. All the current mirrors share a reference current and an input circuit, the reference current is copied to an input end M3 of the PMOS current mirror through the current mirror formed by M1 and M2, and then is output to the conventional inverter through the top PMOS current mirror and the bottom NMOS current mirror of each current starved inverter, so that the delay of the conventional inverter is controlled. Due to the resistance value difference between RRAM devices, the reference current can change to a certain extent, so that the oscillation frequency of the ring oscillator is different. In this way, a random source in the RRAM can be extracted as a design primitive for the PUF.
Since ring oscillators are sensitive to temperature variations, the reliability of the RO PUF will be significantly reduced when the two ring oscillators are shifted differently with temperature variations. Therefore, in order to improve the reliability of the RO PUF, the high reliability RO PUF based on RRAM provided by the invention can be realized by adjusting the control voltage V ctrl And enabling the MOS tube of the current starvation type ring oscillator to work in a subthreshold region. When the MOS tube works in a subthreshold region, the diffusion current and the drift current in the MOS tube reach balance, the change of the drain current along with the temperature is reduced, and the sensitivity of the ring oscillator to the temperature is reduced, so that the reliability of the PUF at different temperatures is improved. As shown in FIG. 5, the frequency deviation of the conventional RO PUF can reach more than 50% at maximum along with the temperature change, and the high-reliability RO PUF provided by the invention is characterized in that V ctrl When=0.3v, the frequency deviation is significantly reduced with temperature, and in the worst case, not higher than 10%. Meanwhile, the subthreshold operation can enable the current starvation type ring oscillator circuit to generate lower oscillation frequency in a smaller number of stages, so that the overall power consumption of the PUF circuit is reduced. As shown in fig. 6, the frequency of the RO PUF proposed by the present invention varies with the number of RRAM selected, and when 32 RRAM are selected, the highest frequency is about 230MHz, which is far lower than the GHz level of the conventional RO PUF, and the power consumption of the PUF circuit is significantly reduced.
The invention provides a high-reliability RO PUFThe excitation response of the circuit is generated as follows: 1) All the RRAMs in the RRAM array are reset to a high resistance state. The input excitation signal is used as address to regulate the control voltage V ctrl And any two rows are selected to be connected to the input end of the current mirror, and any number of RRAM can be selected in each row to provide reference current for the current starvation type ring oscillator. 2) The current starving ring oscillators are enabled to start oscillating and the oscillation frequencies of the two current starving ring oscillators are measured. 3) The frequency of the two current starved ring oscillators is compared to generate a response value.
The response of the RO PUF is generated by comparing the frequency of the ring oscillator, so that the RO PUF is vulnerable to cryptanalysis attacks. For example, in the RO PUF proposed by the present invention, if when selecting RRAM for the ith and jth rows, due to f i >f j The output response is "1", where f i Representing the frequency at which row i is selected, f j Indicating the frequency at which the j rows are selected. When selecting the ith row and the kth row, due to f k >f i Output response is "0"f k Representing the frequency of selecting k rows, f i Indicating the frequency at which row i is selected. At this time, when the j-th column and the k-th column are selected again, f is necessarily the case k >f j The output response is "0". Therefore, these exposed stimulus responses need to be deleted to resist the cryptanalytic attack. The RO PUF can select any two rows in the RRAM array, and the output frequency of RO is proportional to the selected current, so that the response value is generated essentially by comparing the current magnitudes of the two selected rows of RRAM. To this end, the invention proposes a stimulus generation algorithm for an RO PUF, as shown in fig. 4. I i，j Indicating that the RRAM of column i and row j was selected, the algorithm includes four loop steps, loop i, loop p, loop j, and loop k, respectively. Cycle i and cycle p traverse the combination of all columns in the RRAM array, i increases by 1 from 1 each cycle (i.e., one column is selected after each cycle starting from the first column), while p increases from i to n in each cycle of i (i.e., one column is selected after each cycle starting from the ith column until the last column n). Thus, i can be selected toEach column and in each cycle of i, cycle p can be chosen to be the combination of all columns after i, so that the combination of all columns in the array can be traversed. Similarly, the loop j and loop k traverse all rows in the RRAM array, which can complete the traversal of all RRAM combinations in the RRAM array, outputting all stimulus responses. And, each time a frequency comparison is made to generate a response, the two stimulus responses that were previously correlated are evaluated, and the results in the upper period are compared with those in the present period. I t，j Indicating that the j-th row is selected and t RRAM are selected in the row. If the result of the upper period is I t1，j-1 ＞I t2，j And the result of this period is I t2，k ＞I t1，j-1 Then delete comparison I t2，k And I t2，j An excitation response of (2); if the result of the upper period is I t1，j-1 ＜I t2，j And the result of this period is I t2，k ＜I t1，j-1 Then delete comparison I t2，k And I t2，j Is responsive to the excitation of (a). Wherein t1 and t2 are the number of RRAM selected in two rows, t1 and t2 are equal, and j-1, j and k are the rows selected in two periods. The stimulus responses generated in this way can eliminate the correlation between adjacent stimulus responses, improving the resistance of the RO PUF to crypto-analysis attacks.
The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above examples, and all technical solutions belonging to the concept of the present invention belong to the protection scope of the present invention. It should be noted that modifications and adaptations to the invention without departing from the principles thereof are intended to be within the scope of the invention as set forth in the following claims.
Claims (6)
1. The high-reliability RO PUF circuit is characterized by comprising a random source module, a control programming module and a measuring module, wherein the random source module is an RRAM cell array, the measuring module comprises two paths of current starvation type ring oscillator circuits, a counting circuit and a digital comparison circuit, the control programming module performs write operation on the RRAM cells of the random source module to generate random source reference currents, the resistance difference from RRAM cell devices to devices is mapped into the two paths of current starvation type ring oscillator circuits, the RO of the two paths of current starvation type ring oscillator circuits generates different oscillation frequency changes, the control programming module collects, judges, compares and outputs results of the oscillation frequencies generated by the RO of the two paths of current starvation type ring oscillator circuits, and the random source reference currents are generated through different RRAM cell combinations in the RRAM array, so that the RO PUF circuit realizes reconstruction under the two paths of current starvation type ring oscillator circuits.
2. The high reliability RO PUF circuit of claim 1 wherein said control programming module includes four signals: R/W signal, meas signal, comp signal and Clk signal, R/W signal carries out write operation to RRAM unit, meas signal control counting circuit measures RO oscillation frequency of two-way current starvation type ring oscillator circuit and carries out data acquisition, comp signal control digital comparison circuit compares RO oscillation frequency of two-way current starvation type ring oscillator circuit that gathers, clk signal is used for providing fixed clock signal control count time for the counting circuit.
3. The high reliability RO PUF circuit of claim 1 wherein the current starved ring oscillator circuit includes 1 current starved nand gate and 8 current starved inverters connected end to end, the current starved inverters including 2 PMOS and 2 NMOS, top PMOS and bottom NMOS as output circuits of the current mirror, middle PMOS and NMOS as regular inverters, the current starved nand gate adding top PMOS and bottom NMOS as output circuits of the current mirror.
4. A high reliability RO PUF circuit according to claim 3 in which all current mirrors in the current starved ring oscillator circuit share a reference current and input circuit, the reference current being defined by an adjustable control voltage V ctrl RRAM array passing through random source moduleColumn generation, selecting two rows randomly in RRAM array, selecting arbitrary number of RRAM cells in each row as random source to provide reference current, copying the reference current to the input end of PMOS current mirror through two NMOS of current mirror module, outputting to conventional inverter through top PMOS current mirror and bottom NMOS current mirror of each current starving inverter, controlling delay of all conventional inverters, and regulating control voltage V ctrl And enabling the MOS tube of the current starvation type ring oscillator to work in a subthreshold region.
5. The high reliability RO PUF circuit of claim 1 wherein the counting circuit comprises 1 16-bit timer and 2 20-bit counters, the timer being configured to ensure that the two counters count at the same time, the 2 counters counting RO oscillation frequencies of the two current starved ring oscillator circuits, respectively.
6. The method of claim 1, comprising four loops, loop I, loop p, loop j, and loop k, respectively, the loops I and loop p traversing combinations of all columns in the RRAM array, I starting at 1 and increasing by 1 each loop, i.e., starting at a first column, each loop selecting one column after, p starting at I and increasing by n each loop, i.e., starting at an ith column, each loop selecting one column after, until a last column n, loop p can be selected to combinations of all columns after I in each loop of I, loops I and loop p can traverse combinations of all columns in the RRAM array, and likewise, the loops j and loop k traversing combinations of all rows in the RRAM array, the four loops steps can traverse results of the response to the stimulus based on the RO response of the RRAM array, determining the response to the stimulus, comparing the upper period with the current period, if the upper period is I t1，j-1 ＞I t2，j And the result of this period is I t2，k ＞I t1，j-1 Then delete comparison I t2，k And I t2，j An excitation response of (2); if the result of the upper period is I t1，j-1 ＜I t2，j And the result of this period is I t2，k ＜I t1，j-1 Then delete comparison I t2，k And I t2，j Wherein I is t1,j-1 Indicating that the j-1 th row is selected and t1 RRAM cells are selected in the j-1 th row, I t2,j Indicating that the j-th row is selected and t2 RRAM cells are selected in the j-th row, I t2,k Indicating that the kth row is selected and t2 RRAM cells are selected in the k rows, the number of t1 and t2 are equal.
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103236922A (en) * | 2013-04-23 | 2013-08-07 | 曹元� | Circuit and electronic device with physical unclonable function, and implementation method for circuit and electronic device |
| CN107506174A (en) * | 2017-08-14 | 2017-12-22 | 深圳大学 | Real random number generator based on hungry electric current ring oscillator |
| CN109522753A (en) * | 2017-09-18 | 2019-03-26 | 清华大学 | Circuit structure and its driving method, chip and its authentication method, electronic equipment |
| CN109783060A (en) * | 2019-01-16 | 2019-05-21 | 河海大学常州校区 | High-speed, true random-number generator based on current-steering ring oscillator |
| CN109817261A (en) * | 2019-01-17 | 2019-05-28 | 北京大学深圳研究生院 | A kind of PUF circuit and its control method based on resistive formula memory |
| US10424380B1 (en) * | 2018-06-15 | 2019-09-24 | Qualcomm Incorporated | Physically unclonable function (PUF) memory employing static random access memory (SRAM) bit cells with added passive resistance to enhance transistor imbalance for improved PUF output reproducibility |
| CN113707201A (en) * | 2021-10-27 | 2021-11-26 | 南京航空航天大学 | Efficient reconfigurable ring oscillator PUF circuit based on RRAM |
-
2022
- 2022-07-13 CN CN202210818062.8A patent/CN115333744B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103236922A (en) * | 2013-04-23 | 2013-08-07 | 曹元� | Circuit and electronic device with physical unclonable function, and implementation method for circuit and electronic device |
| CN107506174A (en) * | 2017-08-14 | 2017-12-22 | 深圳大学 | Real random number generator based on hungry electric current ring oscillator |
| CN109522753A (en) * | 2017-09-18 | 2019-03-26 | 清华大学 | Circuit structure and its driving method, chip and its authentication method, electronic equipment |
| US10424380B1 (en) * | 2018-06-15 | 2019-09-24 | Qualcomm Incorporated | Physically unclonable function (PUF) memory employing static random access memory (SRAM) bit cells with added passive resistance to enhance transistor imbalance for improved PUF output reproducibility |
| CN109783060A (en) * | 2019-01-16 | 2019-05-21 | 河海大学常州校区 | High-speed, true random-number generator based on current-steering ring oscillator |
| CN109817261A (en) * | 2019-01-17 | 2019-05-28 | 北京大学深圳研究生院 | A kind of PUF circuit and its control method based on resistive formula memory |
| CN113707201A (en) * | 2021-10-27 | 2021-11-26 | 南京航空航天大学 | Efficient reconfigurable ring oscillator PUF circuit based on RRAM |
Non-Patent Citations (1)
| Title |
|---|
| Theoretical Analysis of Configurable RO PUFs and Strategies to Enhance Security;黎江等;PROCEEDINGS OF THE 2019 IEEE INTERNATIONAL WORKSHOP ON SIGNAL PROCESSING SYSTEMS (SIPS 2019);20200819;91-96 * |
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