CN115332268A - Display panel and array substrate thereof - Google Patents

Display panel and array substrate thereof Download PDF

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Publication number
CN115332268A
CN115332268A CN202210804254.3A CN202210804254A CN115332268A CN 115332268 A CN115332268 A CN 115332268A CN 202210804254 A CN202210804254 A CN 202210804254A CN 115332268 A CN115332268 A CN 115332268A
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China
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substrate
fan
line
notch
fanout line
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CN202210804254.3A
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Chinese (zh)
Inventor
张建英
袁海江
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HKC Co Ltd
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HKC Co Ltd
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Priority to CN202210804254.3A priority Critical patent/CN115332268A/en
Publication of CN115332268A publication Critical patent/CN115332268A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Optics & Photonics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The application provides a display panel and an array substrate thereof, wherein the array substrate comprises a substrate, and the substrate is provided with a display area and a non-display area; a plurality of data signal lines are arranged in the display area, a driving circuit and a plurality of fan-out lines are arranged in the non-display area, and the plurality of data signal lines are connected to the driving circuit through the plurality of fan-out lines in a one-to-one correspondence manner; at least one notch structure is arranged on at least one fan-out line so as to enable impedance between every two fan-out lines to be uniform; in the direction perpendicular to the substrate, the cross-sectional area of the position, where the fan-out line has the notch structure, is smaller than the maximum cross-sectional area of the fan-out line. Through set up the breach structure on the fan-out line to reduce the fan-out line at the ascending cross-sectional area in direction of perpendicular to substrate, thereby increase the impedance of fan-out line, make the impedance between each fan-out line that differs in length keep unanimous, and then under the condition that does not increase the wire winding region, improve display panel and show uneven problem, simultaneously, be favorable to the design of the narrow frame of display panel.

Description

Display panel and array substrate thereof
Technical Field
The present application relates to the field of display technologies, and in particular, to a display panel and an array substrate thereof.
Background
The display panel is composed of a Thin Film Transistor (TFT) array and a driving circuit module for driving the TFT array, and signals output by the driving circuit module are conducted to the TFT array through fan-out lines; however, since the Fan-out Area (Fan-out Area) has a limited space, the lengths of the Fan-out lines are not uniform, so that the impedance of the Fan-out lines is not uniform, and the display panel is not uniform due to the difference of the driving signals transmitted correspondingly. The existing design adopts a mode of winding fan-out wires to ensure that the lengths of the fan-out wires are consistent, but the method needs to increase a winding area and is not beneficial to the design and development of a narrow-frame display panel. Therefore, a new design scheme is needed to solve the problem of non-uniform impedance of the fan-out lines without affecting the design and development of the narrow-bezel display panel.
Disclosure of Invention
The technical problem that this application mainly solved provides a display panel and array substrate thereof, solves among the prior art fan-out line impedance inhomogeneous and leads to the display panel to show uneven problem.
In order to solve the above technical problem, a first technical solution provided by the present application is: provided is an array substrate including:
a substrate having a display region and a non-display region; a plurality of data signal lines are arranged in the display area, a driving circuit and a plurality of fan-out lines are arranged in the non-display area, and the plurality of data signal lines are connected to the driving circuit through the plurality of fan-out lines in a one-to-one correspondence manner; wherein, be provided with a plurality of shapes and the equal same breach structure of size on at least two fan-out lines to make the impedance between every fan-out line even.
Wherein, the breach structure is logical groove, half intercommunication groove, blind groove, through-hole or blind hole.
Wherein, in the extending direction of the fan-out line, a plurality of notch structures are arranged on the fan-out line.
Wherein, the quantity of the gap structures on at least two fanout lines is equal.
Wherein, in the extending direction which is parallel to the substrate and is vertical to the fanout line, at least one side of the fanout line is provided with a gap structure.
Wherein, in the extending direction which is parallel to the substrate and vertical to the fanout line, the gap structures at two sides of the fanout line are at least partially arranged oppositely; the width of the notch structure is not more than one third of the maximum width of the fanout line.
The notch structure penetrates through the fan-out line in the extending direction parallel to the substrate and vertical to the fan-out line, and the height of the notch structure is smaller than that of the fan-out line in the direction vertical to the substrate.
Wherein, in the direction parallel to the substrate, the middle of the fanout line is provided with at least one notch structure.
Wherein, in the direction perpendicular to the substrate, the fanout line is provided with at least two gap structures.
The second technical scheme provided by the application is as follows: providing a display panel, comprising a first substrate and a second substrate, wherein the first substrate is the array substrate; the second substrate is arranged opposite to the first substrate.
The beneficial effect of this application: different from the prior art, the application provides a display panel and an array substrate thereof, wherein the array substrate comprises a substrate, and the substrate is provided with a display area and a non-display area; a plurality of data signal lines are arranged in the display area, a driving circuit and a plurality of fan-out lines are arranged in the non-display area, and the plurality of data signal lines are connected to the driving circuit through the plurality of fan-out lines in a one-to-one correspondence manner; at least one notch structure is arranged on at least one fan-out line so as to enable the impedance between each fan-out line to be uniform; in the direction perpendicular to the substrate, the cross-sectional area of the position where the fan-out line has the notch structure is smaller than the maximum cross-sectional area of the fan-out line. The gap structure is arranged on the fan-out line, so that the cross section area of the fan-out line in the direction perpendicular to the substrate is reduced, the impedance of the fan-out line is increased, the impedance between the fan-out lines with different lengths is kept consistent, the problem of uneven display of the display panel is solved under the condition that a winding area is not increased, and meanwhile, the design of a narrow frame of the display panel is facilitated.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without any inventive work.
Fig. 1 is a schematic structural diagram of an embodiment of a display panel provided in the present application;
fig. 2 is a schematic structural diagram of an embodiment of an array substrate provided in the present application;
fig. 3 is a schematic structural diagram of a first embodiment of a fanout line provided in the present application;
FIG. 4 isbase:Sub>A schematic sectional perspective view A-A of FIG. 3;
fig. 5 is a schematic structural diagram of a second embodiment of a fanout line provided in the present application;
fig. 6 is a schematic structural diagram of a third embodiment of a fanout line provided in the present application;
fig. 7 is a schematic structural diagram of a fourth embodiment of a fanout line provided by the present application;
fig. 8 is a schematic structural diagram of a fifth embodiment of a fanning line provided in the present application;
fig. 9 is a schematic structural diagram of a sixth embodiment of a fanout line provided by the present application;
fig. 10 is a schematic structural diagram of a seventh embodiment of a fanout line provided by the present application;
fig. 11 is a schematic structural diagram of an eighth embodiment of a fanout line provided in the present application;
fig. 12 is a schematic structural diagram of a ninth embodiment of a fanout line provided by the present application;
fig. 13 is a schematic structural diagram of a tenth embodiment of a fanout line provided by the present application;
fig. 14 is a schematic structural diagram of an eleventh embodiment of a fanout line provided in the present application.
The reference numbers illustrate:
the display panel comprises a first substrate-1, a substrate-10, a display area-11, a data signal line-111, a non-display area-12, a driving circuit-121, a fan-out line-122, a notch structure-1220, a second substrate-2, a liquid crystal layer-3 and a display panel-100.
Detailed Description
The embodiments of the present application will be described in detail below with reference to the drawings.
In the following description, for purposes of explanation and not limitation, specific details are set forth such as particular system structures, interfaces, techniques, etc. in order to provide a thorough understanding of the present application.
The technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms "first", "second" and "third" in this application are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any indication of the number of technical features indicated. Thus, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of the feature. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless explicitly specified otherwise. In the embodiment of the present application, all directional indicators (such as up, down, left, right, front, rear \8230;) are used only to explain the relative positional relationship between the components, the motion situation, etc. at a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indicator is changed accordingly. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein may be combined with other embodiments.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an embodiment of a display panel provided in the present application.
The display panel 100 includes a first substrate 1 and a second substrate 2 that are disposed opposite to each other, one of the first substrate 1 and the second substrate 2 is an array substrate, and the other is a color filter substrate or an encapsulation substrate. When one of the first substrate 1 and the second substrate 2 is a package substrate, the display panel 100 is a light emitting diode; when one of the first substrate 1 and the second substrate 2 is a color film substrate, the display panel 100 may be a light emitting diode or a liquid crystal display panel 100, and the display panel is designed according to actual requirements without being limited too much. The following description will be given mainly by taking the liquid crystal display panel 100 as an example.
In this embodiment, the display panel 100 is a liquid crystal display panel 100, the first substrate 1 is an array substrate, and the second substrate 2 is a color filter substrate. The first substrate 1 and the second substrate 2 sandwich the liquid crystal layer 3 located in a space between the first substrate 1 and the second substrate 2. The liquid crystal layer 3 functions as a light valve in the display panel 100, and can control the brightness of transmitted light, thereby achieving the effect of information display.
The first substrate 1 includes a substrate 10, a pixel electrode (not shown), and a thin film transistor layer (not shown). The first substrate 1 may further include other functional layers, which are not limited herein. The substrate 10 may be a hard film or a flexible film. When the substrate 10 is a hard film material, it may be glass or the like; when the substrate 10 is a flexible film, it may be a PI adhesive material.
The second substrate 2 includes a filter layer (not shown) and a black matrix layer (not shown), and may further include other functional layers, which are not limited herein.
Referring to fig. 1 and 2, fig. 2 is a schematic structural diagram of an embodiment of an array substrate provided in the present application.
The substrate 10 has a display area 11 and a non-display area 12 surrounding the display area 11. A plurality of data signal lines 111 are disposed in the display region 11 in parallel, a driving circuit 121 and a plurality of fanout lines 122 are disposed in the non-display region 12, and the plurality of data signal lines 111 are connected to the driving circuit 121 through the plurality of fanout lines 122 in a one-to-one correspondence. The display area 11 may further include a pixel electrode and a scanning signal line, which are not limited herein. The non-display area 12 may also be provided with a test circuit, a scan circuit, and other structures, which are not limited herein. The driving circuit 121 is used for driving the display panel 100 to implement a display function.
One end of the fanout line 122 is connected to the driving circuit 121, and the other end is connected to the data signal line 111, for transmitting the driving signal of the driving circuit 121 to the data signal line 111, so as to implement the display function of the display panel 100. The plurality of fanning out lines 122 are arranged at intervals, the length of the fanning out line 122 in the middle is shortest, the length of the fanning out line 122 farther away from the fanning out line 122 in the middle is longer, and the length of the fanning out line 122 on the outermost side is longest. The fanout lines 122 made of the same material are adopted, and the longer the length of the fanout line 122 is, the larger the impedance is, the notch structure 1220 can be arranged on the fanout line 122, so that the cross-sectional area of the fanout line 122 in the direction perpendicular to the substrate 10 is reduced, the impedance of the shorter fanout line 122 is increased, the impedance distribution of the fanout lines 122 with different lengths is uniform, and the phenomenon that the display of the display panel 100 is uneven due to the fact that the impedance of the fanout lines 122 is uneven and correspondingly transmitted driving signals are different is improved.
A plurality of notch structures 1220 having the same shape and size are disposed on at least two fanout lines 122, so that the impedance between each fanout line 122 is uniform. That is to say, at least two fanout lines 122 are provided with the notch structures 1220, or all the fanout lines 122 are provided with the notch structures 1220, and the shapes and sizes of all the notch structures 1220 are the same. The shape and size of the notch structure 1220 are the same, which simplifies the manufacturing process of the notch structure 1220.
The number of the notch structures 1220 on at least two fanout lines 122 is equal. The shortest fanout line 122 is arranged linearly, and there is only one fanout line, and the remaining fanout lines 122 arranged on both sides of the shortest fanout line 122 are symmetrically arranged with the shortest fanout line 122 as a central symmetry axis. That is, except for the shortest fanning-out line 122, the remaining fanning-out lines 122 are all paired, the lengths of the fanning-out lines 122 paired are the same, the impedances are the same, and the number of the notch structures 1220 disposed on the fanning-out lines 122 paired is also the same.
In the extending direction of the fanout line 122, a plurality of notch structures 1220 are disposed on the fanout line 122. That is, one fan-out line 122 may be provided with a plurality of notch structures 1220 having the same shape and size in the extending direction thereof, and the impedance of the fan-out line 122 is changed by adjusting the number of the notch structures 1220 of the fan-out line 122. The shape and size of each notch structure 1220 are the same, and may be regarded as an equivalent resistance, and the number of notch structures 1220 to be arranged on each fan-out line 122 is determined by calculating the impedance difference between each fan-out line 122 in advance, and the shorter the length of the fan-out line 122 is, the more notch structures 1220 are arranged.
The notch structure 1220 is any one of a through groove, a semi-communicating groove, a blind groove, a through hole and a blind hole. The notch 1220 may be other irregular shapes, and is not limited herein. The notch structure 1220 can be formed by physical vapor deposition, etching, chemical vapor deposition, etc., or can be formed by other methods, which are not limited herein.
In the following description of the direction, it is specified that an extending direction parallel to the substrate 10 and perpendicular to the fanout line 122 is an X direction, an extending direction parallel to the fanout line 122 is a Z direction, a direction perpendicular to the substrate 10 is a Y direction, the X direction, the Y direction and the Z direction are perpendicular to each other, and the cross-sectional area of the fanout line 122 refers to the cross-sectional area of the fanout line 122 in the Y direction.
In an extending direction parallel to the substrate 10 and parallel to the fanout line 122, at least one side of the fanout line 122 is provided with a notch structure 1220. That is, in the Z direction, the notch structure 1220 may be provided on any one side of the fanout line 122, or the notch structures 1220 may be provided on both sides of the fanout line 122. In the Z direction, when the notch structures 1220 are disposed on one side or both sides of the fanout line 122, a plurality of notch structures 1220 may be disposed in the Y direction on the fanout line 122, where the heights of the notch structures 1220 are both smaller than the maximum height of the fanout line 122, and the width of the notch structure 1220 is smaller than the maximum width of the fanout line 122, so as to prevent the height and/or the width of the notch structures 1220 from being too large, which may cause the fanout line 122 to break and affect the transmission of the fanout line 122 to the driving signal.
When the notch structures 1220 are disposed on both sides of the fanout line 122 in the Z direction, at least a portion of the notch structures 1220 on both sides of the fanout line 122 are disposed opposite to each other in the extending direction parallel to the substrate 10 and perpendicular to the fanout line 122; the width of the notch 1220 is no greater than one third of the maximum width of the fanout line 122. When the notch structures 1220 arranged on the two sides of the fanout line 122 are partially or completely oppositely arranged in the X direction, the width of the notch structures 1220 is not more than one third of the maximum width of the fanout line 122, so as to prevent the fanout line 122 from breaking; when the notch structures 1220 disposed on the two sides of the fanout line 122 are not disposed oppositely, the width of the notch structures 1220 is smaller than the maximum width of the fanout line 122. In the X direction, the more notch structures 1220 are disposed on the fanout line 122, the smaller the cross-sectional area of the fanout line 122 at that position, the greater the impedance.
In the X direction, the notch structure 1220 may penetrate through the fan-out line 122, and the height of the notch structure 1220 is smaller than the height of the fan-out line 122. That is, the notch structure 1220 communicates two surfaces or three surfaces of the fanout line 122 in a direction parallel to the substrate 10. When the notch structure 1220 is connected to two surfaces of the fan-out line 122 in the X direction, the notch structure 1220 is a through hole and is connected to two surfaces of the substrate 10, which are opposite to the fan-out line 122 and perpendicular to the two surfaces, and the height of the notch structure 1220 is smaller than the height of the fan-out line 122. When the notch structure 1220 communicates with three surfaces of the fanout line 122 in the X direction, the notch structure 1220 may communicate with three mutually perpendicular surfaces of the fanout line 122, or communicate with two surfaces of the fanout line 122 that are oppositely disposed and perpendicular to the substrate 10, and communicate with the other surface perpendicular to the two surfaces of the fanout line 122. The height of the notch structure 1220 is smaller than the height of the fan-out wire 122, so as to prevent the fan-out wire 122 from being broken due to the excessive height of the notch structure 1220.
At least one notch structure 1220 may be provided in the middle of the fanout line 122 in a direction parallel to the substrate 10. When the notch structure 1220 is disposed in the middle of the fanout line 122, the notch structure 1220 may be disposed on a surface of the fanout line 122 away from the substrate 10 or a surface of the fanout line 122 close to the substrate 10, may be disposed in the middle of the fanout line 122, or may penetrate through the fanout line 122 in a direction perpendicular to the substrate 10. When the notch structure 1220 is disposed in the middle of the fanout line 122, the notch structure 1220 is sealed inside the fanout line 122. In the Y direction, at least one notch 1220 is disposed on the fanout line 122. In the Y direction, when the fan-out line 122 is provided with the notch structure 1220, the notch structure 1220 is only disposed on a surface of the fan-out line 122 away from the substrate 10, or only disposed on a surface of the fan-out line 122 close to the substrate 10, or only disposed in the middle of the fan-out line 122, or only in the Y direction, and penetrates through the fan-out line 122.
When the fanout line 122 is provided with at least two notch structures 1220 in the Y direction, projections of at least some of the notch structures 1220 on the substrate 10 are at least partially disposed oppositely or not disposed oppositely, that is, in the Y direction, all of the notch structures 1220 are partially disposed oppositely or completely disposed oppositely or not disposed oppositely; or some of the notch structures 1220 are disposed partially or all of the notch structures 1220 are disposed opposite each other, and some of the notch structures 1220 are not disposed opposite each other. The more the notch structures 1220 of the fanout line 122 are in a direction perpendicular to a plane of the substrate 10, the smaller the cross-sectional area of the fanout line 122 is, which can more effectively increase the impedance of the fanout line 122, and can also reduce the number of the notch structures 1220 in the extending direction of the fanout line 122.
Referring to fig. 2 to 4, fig. 3 isbase:Sub>A schematic structural view ofbase:Sub>A first embodiment ofbase:Sub>A fanout line provided in the present application, and fig. 4 isbase:Sub>A schematic sectional perspective structure view ofbase:Sub>A-base:Sub>A in fig. 3.
In the present embodiment, each fan-out line 122 is provided with a notch structure 1220, and only the right side of the fan-out line 122 along the Z direction is provided with the notch structure 1220. The shorter the length of the fanout line 122, the more notch structures 1220 on the fanout line 122. All of the notch structures 1220 are identical in shape and size. The notch structure 1220 is a semi-connected groove, and is respectively connected to the surface of the side of the fan-out line 122 away from the substrate 10 and the surface of the side of the fan-out line 122 perpendicular to the substrate 10. It should be understood that the notch 1220 can be other irregular shapes, and is not intended to be limiting. By arranging the notch structure 1220 on one side of the fanout line 122, the cross-sectional area of the fanout line 122 can be reduced without affecting the design and development of the narrow-frame display panel 100, and the impedance of the fanout line 122 is increased, so that the impedance between the fanout lines 122 is uniform, the problem of non-uniform display of the display panel 100 is solved without increasing the winding area, meanwhile, the design of the narrow frame of the display panel 100 is facilitated, in addition, the shape and the size of the notch structure 1220 are the same, and the preparation process of the notch structure 1220 can be simplified.
Referring to fig. 2 and 5, fig. 5 is a schematic structural diagram of a fanout line according to a second embodiment of the present application.
The second embodiment of the fan-out line 122 provided by the present application is the same as the structural substrate of the first embodiment of the fan-out line 122 provided by the present application, and the difference is that: the notch structure 1220 is a semi-connected groove, and is respectively connected to the surface of the fan-out line 122 close to the substrate 10 and the surface of the fan-out line 122 perpendicular to the substrate 10.
In this embodiment, the notch structure 1220 is a semi-connected groove, and respectively connects the surface of the fan-out line 122 close to the substrate 10 and the surface of the fan-out line 122 perpendicular to the substrate 10. The insulating layer is etched to form a protruding structure, the fanout line 122 is prepared on the side of the insulating layer away from the substrate 10, and the protruding structure is embedded into the fanout line 122 to form a notch structure 1220 of the fanout line 122. The notch 1220 may be formed by other methods, and is not limited herein. The notch 1220 may have other shapes, and is not limited herein. By arranging the notch structures 1220 with the same shape and size on one side of the fanout lines 122, the impedance between the fanout lines 122 can be uniform, and the preparation process of the notch structures 1220 can be simplified.
Referring to fig. 2 and 6, fig. 6 is a schematic structural diagram of a fan-out line according to a third embodiment of the present application.
The third embodiment of the fanout line 122 provided in this application is the same as the structural substrate of the first embodiment of the fanout line 122 provided in this application, and the difference is that: the notch structure 1220 penetrates the fanout line 122 in a direction perpendicular to the substrate 10.
In this embodiment, the notch structure 1220 is a through groove, and respectively communicates with a surface of the fan-out line 122 close to the substrate 10, a surface of the fan-out line 122 far from the substrate 10, and a surface of the fan-out line 122 perpendicular to the substrate 10. That is, in the Y direction, the notch structure 1220 penetrates through the fanout line 122, and the height of the notch structure 1220 in this embodiment is greater than that of the first embodiment of the fanout line 122 in this application; meanwhile, the width of the notch structure 1220 must be smaller than the width of the fan-out line 122 where the notch structure 1220 is not disposed, so as to prevent the too large width of the notch structure 1220 from breaking the fan-out line 122 and affecting the transmission of the driving signal on the fan-out line 122. Under the condition that the shape and the size of the notch structure 1220 are the same, the larger the height of the notch structure 1220 is, the smaller the cross-sectional area of the fanout line 122 at the position where the notch structure 1220 is arranged is, so that the impedance of the fanout line 122 at the position can be more effectively increased, thereby reducing the number of the notch structures 1220 on the fanout line 122 and simplifying the preparation process of the notch structure 1220.
Referring to fig. 2 and 7, fig. 7 is a schematic structural diagram of a fan-out line according to a fourth embodiment of the present application.
The fourth embodiment of the fanout line 122 provided by the present application is the same as the structural substrate of the first embodiment of the fanout line 122 provided by the present application, and the difference is that: the notch structure 1220 is disposed on a side of the fanout line 122 perpendicular to the substrate 10, and the notch structure 1220 is only communicated with the side of the fanout line 122 perpendicular to the substrate 10.
In the present embodiment, in the Z direction, one side of the fanout line 122 is provided with a notch structure 1220, the notch structure 1220 is a blind groove, the notch structure 1220 is disposed on a side surface of the fanout line 122 perpendicular to the substrate 10, and the notch structure 1220 is only communicated with the side surface of the fanout line 122 perpendicular to the substrate 10. When the notch structure 1220 is prepared, a metal layer may be prepared, the notch structure 1220 is etched on the metal layer, the insulating material is filled in the notch structure 1220, and then another metal layer is prepared on the side of the metal layer close to the notch structure 1220, where the metal layer is the fanout line 122, that is, the fanout line 122 with the notch structure 1220 is obtained. The notch 1220 may be formed by other methods, without limitation. In the present embodiment, there is one notch 1220 in the Y direction. In other alternative embodiments, the plurality of notch structures 1220 may be spaced apart in the Y direction. The notch 1220 can also have other shapes. Compared with the first embodiment of the present application that provides the fanned-out lines 122, the present embodiment can also reduce the cross-sectional area of the fanned-out lines 122, increase the impedance thereof, and make the impedance distribution between the fanned-out lines 122 uniform.
In other alternative implementations, when the notch structure 1220 is disposed on only one side of the fanout line 122 in the Z direction, the notch structure 1220 is disposed on the left side of a part of the fanout line 122, and the notch structure 1220 is disposed on the right side of a part of the fanout line 122.
Referring to fig. 2 and 8, fig. 8 is a schematic structural diagram of a fifth embodiment of a fanout line provided in the present application.
The fifth embodiment of the fanout line 122 provided by the present application is the same as the structural substrate of the third embodiment of the fanout line 122 provided by the present application, except that: in the Z direction, notch structures 1220 are disposed on both sides of the fanout line 122, and the width of the notch structures 1220 is not greater than one third of the maximum width of the fanout line 122.
In the present embodiment, in the Z direction, the notch structures 1220 disposed on two sides of each fanout line 122 are disposed oppositely, and the width of the notch structures 1220 is not greater than one third of the maximum width of the fanout line 122. The notch structure 1220 is a through groove, and respectively communicates the surface of the side of the fanout line 122 away from the substrate 10, the surface of the side of the fanout line 122 close to the substrate 10, and a side of the fanout line 122 perpendicular to the substrate 10. In other alternative embodiments, the notch structures 1220 disposed on both sides of the fanout line 122 in the Z direction may be partially disposed or not disposed oppositely. The notch 1220 can also have other shapes. Compared with the third embodiment of the fanout line 122 provided by the present application, in the case that the shape and size of the notch structures 1220 are the same, the more the notch structures 1220 of the fanout line 122 are in a direction perpendicular to a certain plane of the substrate 10, the smaller the cross-sectional area of the fanout line 122 is, the more the impedance of the fanout line 122 can be effectively increased, and the number of the notch structures 1220 in the extending direction of the fanout line 122 can also be reduced.
Referring to fig. 2 and 9, fig. 9 is a schematic structural diagram of a sixth embodiment of a fanout line provided in the present application.
The sixth embodiment of the fan-out line 122 provided by the present application is the same as the structural substrate of the fourth embodiment of the fan-out line 122 provided by the present application, and the difference is that: in the X direction, the notch structures 1220 are respectively connected to the two surfaces of the fanout line 122, which are opposite and perpendicular to the substrate 10, and connected to the surface of the fanout line 122, which is far away from the substrate 10.
In the present embodiment, in the X direction, the notch structures 1220 are respectively connected to the two surfaces of the fanout line 122 disposed oppositely and perpendicular to the substrate 10, and connected to the surface of the fanout line 122 away from the substrate 10. The notch structure 1220 is a through-groove, and a cross section of the through-groove in a direction parallel to the substrate 10 is a parallelogram, and in alternative embodiments, the notch structure 1220 may have other shapes. Compared with the fourth embodiment of the present application, in the case that the length and the height of the notch structure 1220 are the same, the wider the width of the notch structure 1220 is, the smaller the cross-sectional area of the fanout line 122 is, and the impedance of the fanout line 122 can be more effectively increased.
Referring to fig. 2 and 10, fig. 10 is a schematic structural diagram of a seventh embodiment of a fanout line provided in the present application.
The seventh embodiment of the fan-out line 122 provided by the present application is the same as the substrate of the sixth embodiment of the fan-out line 122 provided by the present application, except that: in the X direction, the notch 1220 is disposed opposite to the fanout line 122 and perpendicular to two surfaces of the substrate 10.
In the present embodiment, in the X direction, the notch structure 1220 is disposed opposite to the fanout line 122 and perpendicular to two surfaces of the substrate 10, and the notch structure 1220 is a through hole. Compared with the sixth embodiment of the present application, the present embodiment can also reduce the cross-sectional area of the fanned-out lines 122 and increase the impedance thereof, so that the impedance distribution between the fanned-out lines 122 is uniform.
Referring to fig. 2 and 11, fig. 11 is a schematic structural diagram of an eighth embodiment of a fanout line provided in the present application.
The eighth embodiment of the fanout line 122 provided by the present application is the same as the structural substrate of the first embodiment of the fanout line 122 provided by the present application, except that: in the X direction, a notch structure 1220 is disposed in the middle of the fanout line 122, and the notch structure 1220 is disposed on a surface of the fanout line 122 away from the substrate 10.
In the present embodiment, a notch 1220 is disposed in the middle of the fanout line 122 in the X direction. The notch 1220 is a blind groove and is disposed on a surface of the fanout line 122 away from the substrate 10. In other alternative embodiments, the notch structure 1220 is a blind groove and can be disposed on a surface of the fanout line 122 near the substrate 10. Compared with the first embodiment of the present application, the present embodiment can also reduce the cross-sectional area of the fanned-out lines 122 and increase the impedance thereof, so that the impedance distribution between the fanned-out lines 122 is uniform.
Referring to fig. 2 and 12, fig. 12 is a schematic structural diagram of a ninth embodiment of a fanout line provided in the present application.
The ninth embodiment of the fanout line 122 provided by the present application is the same as the structural substrate of the first embodiment of the fanout line 122 provided by the present application, except that: in the X direction, a notch structure 1220 is disposed in the middle of the fanout line 122, and the notch structure 1220 penetrates through the fanout line 122 in a direction perpendicular to the substrate 10.
In the present embodiment, the notch structure 1220 penetrates through the fanout line 122 in a direction perpendicular to the substrate 10, that is, the notch structure 1220 communicates a surface of the fanout line 122 away from the substrate 10 and a surface of the fanout line 122 close to the substrate 10. The notch structure 1220 is a through hole, a cross section of the through hole in a direction parallel to the substrate 10 is rectangular, and a width of the notch structure 1220 in the X direction is smaller than a maximum width of the fanout line 122. Compared with the first embodiment of the fan-out wire 122 provided by the application, under the condition that the length and the width of the notch structure 1220 are the same, the height of the notch structure 1220 is larger, and the smaller the cross-sectional area of the fan-out wire 122 provided with the notch structure 1220 is, the impedance of the fan-out wire 122 at the position can be more effectively increased, so that the number of the notch structures 1220 on the fan-out wire 122 can be reduced, and the preparation process of the notch structure 1220 is simplified.
Referring to fig. 2 and 13, fig. 13 is a schematic structural diagram of a tenth fanout line according to the present application.
The tenth embodiment of the fanout line 122 provided by the present application is the same as the structural substrate of the first embodiment of the fanout line 122 provided by the present application, except that: in the X direction, two notch structures 1220 are disposed in the middle of the fanout line 122, and both the notch structures 1220 are disposed on the surface of the fanout line 122 away from the substrate 10.
In the present embodiment, in the X direction, two notch structures 1220 are disposed in the middle of the fanout line 122, the notch structures 1220 are blind grooves, and both the notch structures 1220 are disposed on the surface of the fanout line 122 away from the substrate 10. In the X direction, the two notch structures 1220 are disposed diametrically opposite each other. In a plane perpendicular to the substrate 10, the more notch structures 1220 are disposed, the smaller the cross-sectional area of the fanout line 122 at the position is, and the more effective the impedance of the fanout line 122 at the position can be increased.
Referring to fig. 2 and fig. 14, fig. 14 is a schematic structural diagram of an eleventh embodiment of a fanout line provided in the present application.
The eleventh embodiment of the fanout line 122 provided in this application is the same as the structural substrate of the tenth embodiment of the fanout line 122 provided in this application, and the difference is that: in the X direction, two notch structures 1220 are disposed in the middle of the fanout line 122, one notch structure 1220 is disposed on the surface of the fanout line 122 away from the substrate 10, and the other notch structure 1220 is disposed on the surface of the fanout line 122 close to the substrate 10.
In the present embodiment, in the X direction, two notch structures 1220 are disposed in the middle of the fanout line 122, the notch structures 1220 are blind grooves, one notch structure 1220 is disposed on the surface of the fanout line 122 away from the substrate 10, and the other notch structure 1220 is disposed on the surface of the fanout line 122 close to the substrate 10. The two notch structures 1220 are not disposed opposite to each other in the Y direction, and the two notch structures 1220 are not disposed opposite to each other in the X direction. In a plane perpendicular to the substrate 10, the more notch structures 1220 are disposed, the smaller the cross-sectional area of the fanout line 122 at the position is, and the more effective the impedance of the fanout line 122 at the position can be increased.
The application provides an array substrate, which comprises a substrate 10, wherein the substrate 10 is provided with a display area 11 and a non-display area 12; a plurality of data signal lines 111 are arranged in the display area 11, a driving circuit 121 and a plurality of fan-out lines 122 are arranged in the non-display area 12, and the plurality of data signal lines 111 are connected to the driving circuit 121 through the plurality of fan-out lines 122 in a one-to-one correspondence manner; at least one notch structure 1220 is arranged on at least one fanout line 122, so that the impedance between each fanout line 122 is uniform; in a direction perpendicular to the substrate 10, the cross-sectional area of the fanout line 122 where the notch structure 1220 is located is smaller than the maximum cross-sectional area of the fanout line 122. The notch structure 1220 is arranged on the fanout line 122 to reduce the cross-sectional area of the fanout line 122 in the direction perpendicular to the substrate 10, so that the impedance of the fanout line 122 is increased, the impedances of the fanout lines 122 with different lengths are kept consistent, the problem of uneven display of the display panel 100 is solved under the condition that a winding area is not increased, and meanwhile, the design of a narrow frame of the display panel 100 is facilitated.
The above description is only an embodiment of the present application, and not intended to limit the scope of the present application, and all equivalent structures or equivalent processes performed by the present application and the contents of the attached drawings, which are directly or indirectly applied to other related technical fields, are also included in the scope of the present application.

Claims (10)

1. An array substrate, comprising:
a substrate having a display region and a non-display region; a plurality of data signal lines are arranged in the display area, a driving circuit and a plurality of fan-out lines are arranged in the non-display area, and the plurality of data signal lines are connected to the driving circuit through the plurality of fan-out lines in a one-to-one correspondence manner;
the fan-out structure is characterized in that a plurality of notch structures with the same shape and size are arranged on at least two fan-out lines, so that impedance between every two fan-out lines is uniform.
2. The array substrate of claim 1, wherein the gap structure is a through groove, a semi-connected groove, a blind groove, a through hole or a blind hole.
3. The array substrate of claim 1, wherein a plurality of the notch structures are disposed on the fan-out line in an extending direction of the fan-out line.
4. The array substrate of claim 3, wherein the number of the notch structures on at least two of the fanout lines is equal.
5. The array substrate of claim 4, wherein at least one side of the fanout line is provided with the notch structure in an extending direction parallel to the substrate and parallel to the fanout line.
6. The array substrate of claim 5, wherein the notch structures on two sides of the fanout line are at least partially disposed opposite to each other in an extending direction parallel to the substrate and perpendicular to the fanout line; the width of the notch structure is not more than one third of the maximum width of the fanout line.
7. The array substrate of claim 4, wherein the notch structure extends through the fanout line in a direction parallel to the substrate and perpendicular to an extension direction of the fanout line, and a height of the notch structure is less than a height of the fanout line in a direction perpendicular to the substrate.
8. The array substrate of claim 4, wherein at least one of the notch structures is disposed in the middle of the fanout line in a direction parallel to the substrate.
9. The array substrate of claim 5, 7 or 8, wherein the fanout line is provided with at least two of the notch structures in a direction perpendicular to the substrate.
10. A display panel, comprising:
a first substrate which is the array substrate of any one of claims 1 to 9;
the second substrate is arranged opposite to the first substrate.
CN202210804254.3A 2022-07-07 2022-07-07 Display panel and array substrate thereof Pending CN115332268A (en)

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Application Number Priority Date Filing Date Title
CN202210804254.3A CN115332268A (en) 2022-07-07 2022-07-07 Display panel and array substrate thereof

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Application Number Priority Date Filing Date Title
CN202210804254.3A CN115332268A (en) 2022-07-07 2022-07-07 Display panel and array substrate thereof

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080137016A1 (en) * 2006-12-11 2008-06-12 Kim So Woon Fanout line structure and flat display device including fanout line structure
CN103309107A (en) * 2013-05-13 2013-09-18 深圳市华星光电技术有限公司 Fan-out line structure of array substrate and display panel
CN207008253U (en) * 2017-07-28 2018-02-13 京东方科技集团股份有限公司 A kind of display base plate and display device
CN108598088A (en) * 2018-04-27 2018-09-28 武汉华星光电技术有限公司 TFT array substrate and display device
CN108649039A (en) * 2018-06-01 2018-10-12 深圳市华星光电技术有限公司 Array substrate, display panel and display device
CN111580313A (en) * 2020-06-16 2020-08-25 京东方科技集团股份有限公司 Array substrate, display module, electronic equipment and manufacturing method of array substrate

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080137016A1 (en) * 2006-12-11 2008-06-12 Kim So Woon Fanout line structure and flat display device including fanout line structure
CN103309107A (en) * 2013-05-13 2013-09-18 深圳市华星光电技术有限公司 Fan-out line structure of array substrate and display panel
CN207008253U (en) * 2017-07-28 2018-02-13 京东方科技集团股份有限公司 A kind of display base plate and display device
CN108598088A (en) * 2018-04-27 2018-09-28 武汉华星光电技术有限公司 TFT array substrate and display device
CN108649039A (en) * 2018-06-01 2018-10-12 深圳市华星光电技术有限公司 Array substrate, display panel and display device
CN111580313A (en) * 2020-06-16 2020-08-25 京东方科技集团股份有限公司 Array substrate, display module, electronic equipment and manufacturing method of array substrate

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