CN115327341A - Fuse circuit function testing method and device, electronic equipment and storage medium - Google Patents
Fuse circuit function testing method and device, electronic equipment and storage medium Download PDFInfo
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- CN115327341A CN115327341A CN202210818871.9A CN202210818871A CN115327341A CN 115327341 A CN115327341 A CN 115327341A CN 202210818871 A CN202210818871 A CN 202210818871A CN 115327341 A CN115327341 A CN 115327341A
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- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
- G01R31/2834—Automated test systems [ATE]; using microprocessors or computers
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Abstract
The application discloses a method and a device for testing the function of a fuse circuit, electronic equipment and a storage medium. The method comprises the following steps: acquiring a working instruction for controlling a target fuze circuit, wherein the working instruction comprises: a target fuse circuit is in a target working mode to be entered; acquiring a target object in a target fuse circuit in a target working mode; acquiring target processing operation corresponding to a target object; and processing the target object according to the target processing operation to obtain a target processing result of the target object, and storing the target processing result. The method and the device determine the current target working mode through the working instruction, and simultaneously automatically determine the target object in the fuze circuit in the target working mode. And then, the target object is processed by using target processing operation corresponding to the target object, so that parallel testing or parameter calibration of a plurality of testing channels of the fuze circuit is realized. Manual operation is not needed any more, and the working efficiency is improved.
Description
Technical Field
The present disclosure relates to the field of circuit testing, and in particular, to a method and an apparatus for testing a function of a fuse circuit, an electronic device, and a storage medium.
Background
In the prior art, in the process of testing a fuze circuit, manual control is needed for testing work, and test parameters used in the testing process are fixed and can only execute serial test, only a certain channel can be tested in each test, and various different testing requirements cannot be met flexibly.
Disclosure of Invention
In order to solve the technical problems or at least partially solve the technical problems, the application provides a method and a device for testing the function of a fuze circuit, an electronic device and a storage medium.
According to an aspect of an embodiment of the present application, there is provided a method for testing a function of a fuze circuit, including:
acquiring a working instruction for controlling a target fuze circuit, wherein the working instruction comprises: a target working mode to be entered by the target fuze circuit;
acquiring a target object in the target fuze circuit in the target working mode, wherein the target object comprises: at least one test group in the target fuze circuit, a test channel corresponding to the test group, or at least one parameter of the target fuze circuit;
acquiring target processing operation corresponding to the target object;
and processing the target object according to the target processing operation to obtain a target processing result of the target object, and storing the target processing result.
Further, the acquiring a target object in the target fuze circuit in the target working mode includes:
under the condition that the target working mode is a circuit testing mode, detecting at least one selected operation acting on a target testing interface displayed by an upper computer, wherein the target testing interface comprises a plurality of different testing groups and testing channels corresponding to the testing groups;
determining at least one target test group and at least one target test channel included in the target test group based on the selected operation;
and determining the target test group and the target test channel as the target object.
Further, the acquiring the target object in the target fuze circuit in the target working mode includes:
under the condition that the test mode is a parameter calibration mode, acquiring calibration requirements, and extracting current parameters to be calibrated of the fuze circuit tester from the calibration requirements, wherein the parameters to be calibrated at least comprise an internal clock and an internal voltage of the fuze circuit tester;
and determining the parameter to be calibrated as the target object.
Further, the processing the target object according to the target processing operation to obtain a target processing result of the target object includes:
acquiring the test priority of a target test group;
performing a function test on the target test channels in the target test group according to the test priority to obtain a test result corresponding to each target test channel in the target test group;
wherein the functional test comprises: a locking function test, an unlocking function test and a self-destruction function test.
Further, the performing a function test on the target test channel in the target test priority according to the test priority to obtain a test result corresponding to each target channel test of the target test group includes:
acquiring a configuration request triggered on the target test interface;
responding to the configuration request, and displaying a test parameter setting interface;
detecting input operation acting on the test parameter setting interface, and determining parameter values corresponding to all test parameters displayed on the test parameter setting interface based on the input operation;
and based on the sequence of the test priority, performing functional test on the target test channels in each target test group by using the parameter values to obtain test results corresponding to the target test channels.
Further, the processing the target object according to the target processing operation to obtain a target processing result of the target object includes:
under the condition that the target object is the internal clock of the fuze circuit tester, outputting the target object to a target fuze circuit according to the clock pulse width preset by an upper computer to obtain a clock test result;
and correcting the internal clock of the fuze circuit tester by using the clock test result.
Further, the processing the target object according to the target processing operation to obtain a target processing result of the target object includes:
under the condition that the target object is the internal voltage of the fuze circuit tester, sending a control instruction to power supply equipment so that the power supply equipment supplies power to an upper computer according to the control instruction;
and collecting a voltage test result of the target fuse circuit, and correcting the internal voltage of the fuse circuit tester by using the clock test result.
According to still another aspect of the embodiments of the present application, there is also provided a function test apparatus of a fuze circuit, including:
the receiving module is used for acquiring a working instruction for controlling the target fuze circuit, wherein the working instruction comprises: a target working mode to be entered by the target fuze circuit;
a first obtaining module, configured to obtain a target object in the target fuze circuit in the target operating mode, where the target object includes: at least one test group in the target fuze circuit, a test channel corresponding to the test group, or at least one parameter of the target fuze circuit;
the second acquisition module is used for acquiring target processing operation corresponding to the target object;
and the processing module is used for processing the target object according to the target processing operation to obtain a target processing result of the target object and storing the target processing result.
According to another aspect of the embodiments of the present application, there is also provided a storage medium including a stored program that executes the above steps when the program is executed.
According to another aspect of the embodiments of the present application, there is also provided an electronic apparatus, including a processor, a communication interface, a memory, and a communication bus, where the processor, the communication interface, and the memory complete communication with each other through the communication bus; wherein: a memory for storing a computer program; a processor for executing the steps of the method by running the program stored in the memory.
Embodiments of the present application further provide a computer program product containing instructions, which when executed on a computer, cause the computer to perform the steps of the above method.
Compared with the prior art, the technical scheme provided by the embodiment of the application has the following advantages: the method provided by the embodiment of the application determines the current target working mode through the working instruction, and simultaneously automatically determines the target object in the fuze circuit in the target working mode. And then, the target object is processed by using the target processing operation corresponding to the target object, so that the parallel test or parameter calibration of a plurality of test channels of the fuze circuit is realized. Manual operation is not needed any more, and the working efficiency is improved.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and, together with the description, serve to explain the principles of the application.
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art to obtain other drawings without inventive exercise.
Fig. 1 is a flowchart of a method for testing a function of a fuze circuit according to an embodiment of the present disclosure;
fig. 2 is a flowchart of a method for testing the function of a fuze circuit according to another embodiment of the present disclosure;
FIG. 3 is a schematic diagram of a target test interface according to an embodiment of the present disclosure;
fig. 4 is a flowchart of a method for testing the function of a fuze circuit according to another embodiment of the present disclosure;
fig. 5 is a schematic diagram of a test parameter setting interface according to an embodiment of the present disclosure;
fig. 6 is a schematic diagram of a test fuze circuit provided in an embodiment of the present application;
fig. 7 is a block diagram of a functional test apparatus for a fuze circuit according to an embodiment of the present disclosure;
fig. 8 is a schematic diagram of a fuze circuit tester according to an embodiment of the present application.
Detailed Description
In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments, and the illustrative embodiments and descriptions thereof of the present application are used for explaining the present application and do not constitute a limitation to the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another similar entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of another identical element in a process, method, article, or apparatus that comprises the element.
The embodiment of the application provides a method and a device for testing the function of a fuse circuit, electronic equipment and a storage medium. The method provided by the embodiment of the invention can be applied to any required electronic equipment, for example, the electronic equipment can be electronic equipment such as a server and a terminal, and the method is not particularly limited herein, and is hereinafter simply referred to as electronic equipment for convenience in description.
According to an aspect of embodiments of the present application, there is provided a method embodiment of a method for testing a function of a fuze circuit. Fig. 1 is a flowchart of a method for testing a function of a fuze circuit according to an embodiment of the present application, where as shown in fig. 1, the method includes:
step S11, obtaining a working instruction for controlling the target fuse circuit, wherein the working instruction comprises: a target mode of operation to be entered by the target fuze circuit.
The method provided by the embodiment of the application is applied to a circuit tester, and a program for testing/calibrating the fuze circuit is deployed in the circuit tester. Specifically, the circuit tester includes: the test board is used for executing corresponding test/calibration operation according to an instruction output by the upper computer. The test board is provided with a data processing core circuit, a test function circuit and the like.
In the embodiment of the application, the data processing core circuit integrates power management, the bottom plate can take power from the data processing core circuit, the design cost of the bottom plate is reduced, and the design difficulty is simplified. Meanwhile, the data processing core circuit is provided with two pieces of DDR3, 1GB in total, and the two pieces of DDR3 are connected to the PS end of the ZYNQ. The data processing core circuit has reasonable wiring and compact design, 50mm multiplied by 50mm, and is beneficial to designing smaller functional bottom plates. GPIO/differential pairs are abundant, with core boards up to 200 IOs (100 pairs differential).
In the embodiment of the present application, the test function circuit includes: a time sequence control circuit, an output signal waveform acquisition circuit, a power supply circuit and the like. The output signal waveform acquisition circuit comprises 8 ADCs, each ADC is responsible for four-path signal time-sharing acquisition, and 8 paths of parallel signal waveforms can be acquired at the same time. The ADC chip is an 8-channel and 12-bit precision AD conversion chip with an ADC-128S102CIMT, the acquisition rate is 500ksps-1Msps, the waveform of a signal to be acquired is dozens of microseconds of pulses, and the output waveform can be captured according to the sampling theorem.
In the embodiment of the application, whether a user triggers a control operation on an upper computer in a circuit tester is detected, and a target fuze circuit which needs to be tested/calibrated at present is determined under the condition that the control operation is detected. Then, detecting selection operation triggered by a user to determine a target working mode selected by the user, and generating a working instruction based on the target working mode, wherein the target working mode comprises the following steps: a circuit test mode and a parameter calibration mode.
Step S12, a target object in the target fuse circuit in the target working mode is obtained, wherein the target object comprises: at least one test group in the target fuze circuit and a test channel corresponding to the test group, or at least one parameter of the target fuze circuit.
In the embodiment of the present application, as shown in fig. 2, the step S12 of acquiring the target object in the target signaling circuit in the target operating mode includes the following steps A1 to A3:
a1, under the condition that a target working mode is a circuit testing mode, detecting at least one selected operation acting on a target testing interface displayed by an upper computer, wherein the target testing interface comprises a plurality of different testing groups and testing channels corresponding to the testing groups.
And step A2, determining at least one target test group and at least one target test channel included in the target test group based on the selected operation.
And step A3, determining the target test group and the target test channel as target objects.
In the embodiment of the application, under the condition that the target working mode is the circuit testing mode, at least one selected operation acting on a target testing interface displayed by the upper computer is detected. It should be noted that the target test interface displayed by the upper computer includes: a plurality of different test groups, and a test channel corresponding to each test group. As shown in fig. 3, the target test interface includes: the test system comprises a first test group, a second test group, a third test group and a fourth test group. Specifically, the selection operation triggered by the user based on the target test interface may be detected, and the test channels included in each test group may be determined.
In the embodiment of the application, at least one selection operation acting on a target test interface is detected, a test group selected by the selection operation is determined as a target test group, and at least one target test channel included in the target test group is determined based on the selection operation. For example: the target test set includes: a first test group, a second test group and a third test group. Wherein, the target test channel that first test group includes has: 1 route, 2 routes and 3 routes. The second test group comprises the following target test channels: 4 routes, 5 routes and 6 routes. The third test group includes target test channels having: lane 1 and lane 8. Each path can be provided with one or more combinations of a locking test, an unlocking test and a self-destruction test.
In the embodiment of the present application, step S12, acquiring a target object in a target signaling circuit in a target operating mode, as shown in fig. 4, includes the following steps B1-B2:
and B1, under the condition that the test mode is a parameter calibration mode, acquiring calibration requirements, and extracting parameters to be calibrated from the calibration requirements, wherein the parameters to be calibrated at least comprise a clock and a voltage.
And B2, determining the parameter to be calibrated as a target object.
In the embodiment of the application, under the condition that the test mode is the parameter calibration mode, the calibration requirement uploaded by a user is obtained, the calibration requirement comprises a parameter to be calibrated, and the parameter to be calibrated can be a clock or a voltage.
And step S13, acquiring a target processing operation corresponding to the target object.
In the embodiment of the present application, since different target objects correspond to different processing operations, a target processing operation corresponding to a target object may be determined by a preset correspondence between an object and a processing operation, based on the correspondence. For example: in the case where the target object is a clock, calibration is performed using a preset pulse width. In the case where the target object is a voltage, calibration may be performed by supplying power from the outside and collecting the voltage.
And step S14, processing the target object according to the target processing operation to obtain a target processing result of the target object, and storing the target processing result.
In this embodiment, step S14, processing the target object according to the target processing operation to obtain a target processing result of the target object, includes the following steps C1-C2:
and C1, acquiring the test priority of the target test group.
In this embodiment of the present application, the obtaining of the test priority of the target test group may be determining the test priority of the target test group according to a display order of the target test group on the target test interface.
And step C2, performing function test on the target test channels in the target test group according to the test priority to obtain a test result corresponding to each target test channel in the target test group.
In an embodiment of the present application, the functional test includes: a locking function test, an unlocking function test and a self-destruction function test.
In the embodiment of the present application, the method for performing a function test on a target test channel in a target test priority according to the test priority to obtain a test result corresponding to each target channel test of a target test group includes the following steps:
step C201, a configuration request triggered on the target test interface is obtained.
Step C202, responding to the configuration request, and displaying a test parameter setting interface.
Step C203, detecting an input operation acting on the test parameter setting interface, and determining a parameter value corresponding to each test parameter displayed on the test parameter setting interface based on the input operation.
And step C204, based on the sequence of the test priority, performing function test on the target test channels in each target test group by using the parameter values to obtain the test results corresponding to the target test channels.
In the embodiment of the application, the click operation on the target test interface is obtained, and if the trigger position of the click operation is matched with the preset position, the trigger configuration request is determined. At the moment, the upper computer responds to the configuration request and displays a test parameter setting interface.
In the embodiment of the present application, a plurality of test parameters are displayed in the test parameter setting interface, and as shown in fig. 5, the test parameters include: locking voltage, unlocking voltage, self-destruction voltage, and switch action parameters in the test process, such as: the self-destruction charging time, the self-destruction discharging time and the self-destruction overtime time. Specifically, the user may input a parameter value corresponding to each test parameter on the test parameter setting interface. Therefore, the upper computer can detect the input operation on the test parameter setting interface and determine the parameter value corresponding to each test parameter based on the input operation.
In the embodiment of the application, based on the sequence of the test priorities, the parameter values are used for executing the function test on the target test channels in each target test group, so as to obtain the test result corresponding to the target test channels.
As an example, the upper computer may perform a function test on each target test channel in the target test group at the same time, and referring to fig. 6, the function test specifically performed on the target fuze circuit in parallel is as follows:
and (3) locking test: (1) Switch K2 is closed and after a duration of T2_ K2 (2 s), switch K2 is opened. (2) The switch K1 is closed, after waiting for time T2_ K1 (100 ms), the switch K1 is opened, while the switches K3 and K4 are closed. (3) While closing K1, after waiting time T1_ K3, switch K2 is closed, and after delay time T2_ K3, switch K2 is opened.
And (3) unlocking test: (1) Switch K2 is closed and after a duration of T2_ K2 (2 s), switch K2 is opened. (2) After waiting time T2_ K1 (100 ms) with switch K1 closed, switch K1 is opened, while switches K3 and K4 are closed. (3) While closing K1, switch K2 is closed after waiting time T1_ K3, and after delaying time T2_ K3, switch K2 is opened. (4) And starting to acquire the voltage of the resistors at two ends of the R1 while closing the switch K1, judging the unlocking condition, and if the output voltage is greater than the Vth (5V) pulse, normally unlocking.
Self-destruction test: (1) Switch K2 is closed and after a duration of T2_ K2 (2 s), switch K2 is opened. (2) After waiting time T2_ K1 (100 ms) with switch K1 closed, switch K1 is opened, while switches K3 and K4 are closed. (3) And starting to collect the voltage of the resistors at two ends of the R1 while closing the switch K1, judging the self-destruction condition, and if the output voltage is greater than Vth (25V) pulse in T3 (99 s), the self-destruction is normal.
The method provided by the embodiment of the application can realize the selection of the test channel and the test type, and the test parameters can be set, so that the flexibility and the adaptability of the test work are improved. Meanwhile, the test process is automatically executed in parallel according to the selected test groups, manual testing is not needed, and three functions of 32 circuits can be automatically tested at each time according to configuration, so that the working efficiency is greatly improved.
In this embodiment of the present application, step S14, processing the target object according to the target processing operation to obtain the target processing result of the target object, includes the following steps D1-D2:
step D1, under the condition that a target object is an internal clock of the fuze circuit tester, outputting the internal clock to a target fuze circuit according to a clock pulse width preset by an upper computer to obtain a clock test result;
and D2, correcting the internal clock of the fuze circuit tester by using the clock test result.
In this embodiment of the present application, step S14, processing the target object according to the target processing operation to obtain a target processing result of the target object, includes the following steps E1 to E2:
e1, sending a control instruction to the power supply equipment under the condition that the target object is the internal voltage of the fuze circuit tester so that the power supply equipment supplies power to the upper computer according to the control instruction;
and E2, collecting a voltage test result of the target fuse circuit, and correcting the internal voltage of the fuse circuit tester by using the clock test result.
According to the method provided by the embodiment of the application, the obtained voltage value and pulse width time value of the output voltage pulse of the tested circuit are more accurate through the compensation algorithm, so that the internal voltage of the fuze circuit tester is corrected by using the voltage value in the obtained voltage test result, and the internal clock of the fuze circuit tester is corrected by using the pulse width time value in the obtained clock test result, so that the internal clock of the fuze circuit tester can be corrected, and the internal voltage and the pulse width time value of the output voltage pulse of the tested circuit are more accurate
The method provided by the embodiment of the application determines the current target working mode through the working instruction, and simultaneously automatically determines the target object in the fuze circuit in the target working mode. And then, the target object is processed by using target processing operation corresponding to the target object, so that parallel testing or parameter calibration of a plurality of testing channels of the fuze circuit is realized. Manual operation is not needed any more, and the working efficiency is improved.
Fig. 7 is a block diagram of a testing apparatus for a fuze circuit provided in an embodiment of the present application, which may be implemented as part or all of an electronic device through software, hardware, or a combination of the two. As shown in fig. 7, the apparatus includes:
a receiving module 71, configured to obtain a working instruction for controlling the target fuze circuit, where the working instruction includes: a target fuse circuit is in a target working mode to be entered;
a first obtaining module 72, configured to obtain a target object in the target signaling circuit in the target operating mode, where the target object includes: at least one test group in the target fuze circuit and a test channel corresponding to the test group, or at least one parameter of the target fuze circuit;
a second obtaining module 73, configured to obtain a target processing operation corresponding to a target object;
and the processing module 74 is configured to process the target object according to the target processing operation, obtain a target processing result of the target object, and store the target processing result.
In the embodiment of the application, the first obtaining module is configured to detect at least one selected operation acting on a target test interface displayed by the upper computer when the target working mode is the circuit test mode, where the target test interface includes a plurality of different test groups and a test channel corresponding to each test group; determining at least one target test group and at least one target test channel included in the target test group based on the selected operation; and determining the target test group and the target test channel as target objects.
In the embodiment of the application, the first obtaining module is configured to obtain a calibration requirement and extract a parameter to be calibrated from the calibration requirement when the test mode is the parameter calibration mode, where the parameter to be calibrated includes at least a clock and a voltage; and determining the parameter to be calibrated as a target object.
In the embodiment of the application, the processing module is configured to obtain a test priority of a target test group; performing function test on the target test channels in the target test group according to the test priority to obtain a test result corresponding to each target test channel in the target test group; wherein, the functional test includes: a locking function test, an unlocking function test and a self-destruction function test.
In the embodiment of the application, the processing module is used for acquiring a configuration request triggered on a target test interface; responding to the configuration request, and displaying a test parameter setting interface; detecting input operation acting on the test parameter setting interface, and determining parameter values corresponding to all test parameters displayed on the test parameter setting interface based on the input operation; and based on the sequence of the test priority, performing function test on the target test channels in each target test group by using the parameter values to obtain a test result corresponding to the target test channels.
In the embodiment of the application, the processing module is configured to output a clock pulse width preset by an upper computer to the target fuze circuit to obtain a clock test result when the target object is a clock; and correcting the clock by using the clock test result.
In the embodiment of the application, the processing module is used for sending a control instruction to the power supply equipment under the condition that the target object is voltage, so that the power supply equipment supplies power to the upper computer according to the control instruction; and collecting a voltage test result of the target fuse circuit, and correcting the voltage by using the voltage test result.
Fig. 8 is a schematic diagram of a fuze circuit tester provided in an embodiment of the present application, and as shown in fig. 8, the fuze circuit tester includes: the device comprises a touch screen, a control acquisition circuit, a test interface, an equipment direct current power supply and a program control power supply; the touch screen is connected with the control acquisition circuit, the control acquisition circuit is connected with the test interface, the output end of the equipment direct-current power supply is respectively connected with the touch screen and the control acquisition circuit, and the output end of the programmable power supply is connected with the control acquisition circuit. The input ends of the equipment direct current power supply and the programmable power supply are connected with a 220V alternating current power supply.
An embodiment of the present application further provides an electronic device, where the electronic device may include: the system comprises a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory are communicated with each other through the communication bus.
A memory for storing a computer program;
the processor is configured to implement the steps of the above embodiments when executing the computer program stored in the memory.
The communication bus mentioned in the above terminal may be a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like. The communication bus may be divided into an address bus, a data bus, a control bus, etc.
The communication interface is used for communication between the terminal and other equipment.
The Memory may include a Random Access Memory (RAM) or a non-volatile Memory (non-volatile Memory), such as at least one disk Memory. Optionally, the memory may also be at least one memory device located remotely from the processor.
The Processor may be a general-purpose Processor, and includes a Central Processing Unit (CPU), a Network Processor (NP), and the like; the Integrated Circuit may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other Programmable logic device, a discrete Gate or transistor logic device, or a discrete hardware component.
In yet another embodiment provided by the present application, there is also provided a computer-readable storage medium having stored therein instructions, which when run on a computer, cause the computer to perform the method for testing a fuze circuit as described in any of the above embodiments.
In a further embodiment provided by the present application, there is also provided a computer program product containing instructions which, when run on a computer, cause the computer to perform the method of testing a fuze circuit as described in any of the above embodiments.
In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, cause the processes or functions described in accordance with the embodiments of the application to occur, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wire (e.g., coaxial cable, fiber optic, digital subscriber line) or wirelessly (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that incorporates one or more of the available media. The usable medium may be a magnetic medium (e.g., floppy Disk, hard Disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid State Disk), among others.
The above description is only for the preferred embodiment of the present application, and is not intended to limit the scope of the present application. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application are included in the protection scope of the present application.
The above description is merely exemplary of the present application and is presented to enable those skilled in the art to understand and practice the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A functional test method of a fuse circuit, which is applied to a fuse circuit tester, is characterized by comprising the following steps:
acquiring a working instruction for controlling a target fuze circuit, wherein the working instruction comprises the following steps: a target working mode to be entered by the target fuze circuit;
acquiring a target object in the target fuze circuit in the target working mode, wherein the target object comprises: at least one test group in the target fuze circuit, a test channel corresponding to the test group, or at least one parameter of the target fuze circuit;
acquiring target processing operation corresponding to the target object;
and processing the target object according to the target processing operation to obtain a target processing result of the target object, and storing the target processing result.
2. The method of claim 1, wherein said obtaining a target object in said target fuze circuit in said target mode of operation comprises:
under the condition that the target working mode is a circuit testing mode, detecting at least one selected operation acting on a target testing interface displayed by an upper computer, wherein the target testing interface comprises a plurality of different testing groups and testing channels corresponding to the testing groups;
determining at least one target test group and at least one target test channel included in the target test group based on the selected operation;
and determining the target test group and the target test channel as the target object.
3. The method of claim 1, wherein said obtaining a target object in said target fuze circuit in said target mode of operation comprises:
under the condition that the test mode is a parameter calibration mode, acquiring calibration requirements, and extracting current parameters to be calibrated of the fuze circuit tester from the calibration requirements, wherein the parameters to be calibrated at least comprise an internal clock and an internal voltage of the fuze circuit tester;
and determining the parameter to be calibrated as the target object.
4. The method according to claim 2, wherein the processing the target object according to the target processing operation to obtain a target processing result of the target object comprises:
acquiring the test priority of a target test group;
performing a function test on the target test channels in the target test group according to the test priority to obtain a test result corresponding to each target test channel in the target test group;
wherein the functional test comprises: a locking function test, an unlocking function test and a self-destruction function test.
5. The method of claim 4, wherein the performing the functional test on the target test channel in the target test priority according to the test priority to obtain the test result corresponding to each target channel test of the target test group comprises:
acquiring a configuration request triggered on the target test interface;
responding to the configuration request, and displaying a test parameter setting interface;
detecting input operation acting on the test parameter setting interface, and determining parameter values corresponding to all test parameters displayed on the test parameter setting interface based on the input operation;
and based on the sequence of the test priority, performing functional test on the target test channels in each target test group by using the parameter values to obtain test results corresponding to the target test channels.
6. The method according to claim 3, wherein the processing the target object according to the target processing operation to obtain a target processing result of the target object comprises:
under the condition that the target object is the internal clock of the fuze circuit tester, outputting the target object to a target fuze circuit according to the clock pulse width preset by an upper computer to obtain a clock test result;
and correcting the internal clock of the fuze circuit tester by using the clock test result.
7. The method according to claim 3, wherein the processing the target object according to the target processing operation to obtain a target processing result of the target object comprises:
under the condition that the target object is the internal voltage of the fuze circuit tester, sending a control instruction to power supply equipment so that the power supply equipment supplies power to an upper computer according to the control instruction;
and collecting a voltage test result of the target fuse circuit, and correcting the internal voltage of the fuse circuit tester by using the clock test result.
8. A functional test apparatus for a fuse circuit, comprising:
the receiving module is used for acquiring a working instruction for controlling the target fuze circuit, wherein the working instruction comprises the following steps: a target working mode to be entered by the target fuze circuit;
a first obtaining module, configured to obtain a target object in the target fuze circuit in the target operating mode, where the target object includes: at least one test group in the target fuze circuit, a test channel corresponding to the test group, or at least one parameter of the target fuze circuit;
the second acquisition module is used for acquiring target processing operation corresponding to the target object;
and the processing module is used for processing the target object according to the target processing operation to obtain a target processing result of the target object and storing the target processing result.
9. A storage medium, characterized in that the storage medium comprises a stored program, wherein the program is operative to perform the method steps of any of the preceding claims 1 to 7.
10. An electronic device is characterized by comprising a processor, a communication interface, a memory and a communication bus, wherein the processor and the communication interface are used for realizing mutual communication by the memory through the communication bus; wherein:
a memory for storing a computer program;
a processor for performing the method steps of any of claims 1 to 7 by executing a program stored on a memory.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210818871.9A CN115327341A (en) | 2022-07-12 | 2022-07-12 | Fuse circuit function testing method and device, electronic equipment and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210818871.9A CN115327341A (en) | 2022-07-12 | 2022-07-12 | Fuse circuit function testing method and device, electronic equipment and storage medium |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115327341A true CN115327341A (en) | 2022-11-11 |
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ID=83916966
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210818871.9A Pending CN115327341A (en) | 2022-07-12 | 2022-07-12 | Fuse circuit function testing method and device, electronic equipment and storage medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115327341A (en) |
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2022
- 2022-07-12 CN CN202210818871.9A patent/CN115327341A/en active Pending
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