CN1152793A

CN1152793A - Method for making fluorine-injected polysilicon buffering local oxidation semiconductor device

Info

Publication number: CN1152793A
Application number: CN 95121117
Authority: CN
Inventors: 庄敏宏; 王志贤; 倪诚聪
Original assignee: MAOXI ELECTRONIC CO Ltd TAIWAN
Current assignee: Maode Science and Technology Co., Ltd.
Priority date: 1995-12-20
Filing date: 1995-12-20
Publication date: 1997-06-25
Anticipated expiration: 2015-12-20
Also published as: CN1057870C

Abstract

The present invention relates to a method for manufacturing semiconductor device by using fluorine ion implantation to prevent active region of device from forming pit. Its method includes the following steps: forming substrate layer on silicon chip; settling a polysilicon buffer layer on the substrate layer; injecting fluorine ions into the polysilicon buffer layer; settling a silicon nitride layer and limiting active region of device; forming field oxide layer; removing silicon nitride layer; dry etching polysilicon buffer layer and etching substrate layer so as to expose the active region silicon chip surface.

Description

Inject the manufacture method of the polysilicon buffering local oxidation semiconductor device of fluorine

The present invention relates to the manufacture method of a kind of polysilicon buffering local oxidation PBLOCOS＜Poly BufferedLOCal Oxide of Silicon＞semiconductor device, fluorine ion to polysilicon resilient coating is injected in particularly a kind of utilization makes semiconductor wafer surface can not produce pothole, to improve the manufacture method of device reliability and rate of finished products.

Traditional silicon selective oxidation (LOCOS LOCal Oxide of Silicon) technology can be suitable for the manufacturing technology more than 0.5 micron, in 64M and above dynamic random access memory＜DRAM Dynamic Random Access Memory＞manufacture method, littler and the device density increase of device size, development effectively reaches reliable separation manufacturing method with isolating device active area benefit fractal key, so more advanced selective oxidation technology is necessary, polysilicon buffering local oxidation PBLOCOS＜Poly Buffered LOCal Oxide of Silicon＞manufacture method is to isolate a kind of improvement manufacture method of purpose in order to further compacting lateral oxidation to be fit to submicron component, this kind utilizes the manufacture method of polysilicon layer as the stress-buffer layer between silica and silicon nitride layer, though can in the process that field oxide generates, eliminate beak effect (Bird ' s Beak Effect), yet, after removing polysilicon and silicon nitride, but unavoidably form pothole (Pits), the origin cause of formation of pothole is because during the growth field oxide, the chemical composition and the mechanical property of the subregion of polysilicon are changed, the silicon chip surface erosion can be gone out pothole at removal polysilicon and the used etchant of silicon nitride process, and these potholes will cause damage after being formed on active area to the device of follow-up making.

Main purpose of the present invention is to disclose a kind ofly comes improved new manufacturing method in addition at above-mentioned drawback; So that utilize the device of this new manufacturing method can not produce pothole, thereby better characteristic is arranged, and relatively its technological innovation place of the present invention and habitual skill is to be to utilize to inject fluorine ion to the polysilicon resilient coating, so just can improve above-mentioned defective, and then can obtain intact device active region.

The present invention utilizes the injection of fluorine ion to form the manufacture method of the semiconductor device of pothole to avoid device active region for a kind of, its step comprises, and forms laying on silicon chip, deposits a polysilicon buffering layer on laying, inject fluorine ion to the polysilicon resilient coating, deposit a silicon nitride layer, limit device active region, form field oxide layer, remove silicon nitride layer, dry ecthing polysilicon buffering layer, and etching laying are to expose active area silicon chip surface.

The device profile structure chart that Fig. 1 to Fig. 8 finished for each stage of injecting fluorine ion PBLOCOS manufacture method according to the present invention.

For fear of the problems such as device active region hole that habitual PBLOCOS manufacture method institute may form, the present invention to be to inject the character that fluorine ion improves the polysilicon buffering layer, shows that details are as follows in conjunction with the accompanying drawings:

Referring to Fig. 1 to Fig. 8, be the semiconductor device sectional structure chart of finishing according to each stage of manufacture method of the present invention.Referring to Fig. 1, the execution following steps are shown: form pad oxide 12 on silicon chip 10, pad oxide thickness is about 60～200 dusts.

Referring to Fig. 2, its execution in step is: deposit a polysilicon layer 22 as resilient coating, these polysilicon layer 22 thickness are about 500～600 dusts.

Referring to Fig. 3, its execution in step is: inject fluorine ion to described polysilicon layer 22; It injects energy and is about 20Kev, and implantation dosage is about 2E15 (2 * 10 ¹⁵)～7E15cm ^-2Inject fluorine ion, be the character that is used for improving the polysilicon buffering layer as previously mentioned, making it not have big polysilicon grain in the process that forms field oxide produces, because of its microcosmic crystal structure diminishes, make polysilicon more can absorb big stress, and the polysilicon that this kind injects fluorine more has oxidation resistant ability, and can not influence its follow-up removal step.

Referring to Fig. 4, its execution in step is: deposit a silicon nitride layer 42, these silicon nitride layer 42 thickness are about 1500～2000 dusts.

Referring to Fig. 5, its execution in step is: limiting device active region 50, is to limit the device active region figure with photoresist, and the described silicon nitride layer 42 of anisotropic etching and polysilicon layer 22 and obtain 52 among the figure, 54.

Referring to Fig. 6, its execution in step is: form field oxide layer 62, thickness is about 5000～6000 dusts, can utilize about 60～100 minutes of wet oxidation process (Wet Oxid-ation) at about 1000 ℃ for reaching this thickness.

Referring to Fig. 7, its execution in step is: remove silicon nitride layer 54, remove as the available heat phosphoric acid solution.

Referring to Fig. 8, its execution in step is: remove polysilicon layer 52, available dry ecthing method is removed, and the etching laying, to expose active area silicon chip surface.

Shown in Figure 8 is the cross-section structure of semiconductor device that injects the PBLOCOS manufacture method gained of fluorine according to the present invention, the experiment proved that, pothole just again can not see in the active area silicon chip surface of removing behind silicon nitride layer, polysilicon layer and the etching laying.

Innovation of the present invention is in the shortcoming of the pothole infringement active area that is produced at habitual PBLOCOS manufacture method, improved, it is characterized in that utilizing and inject fluorine ion, so just can improve above-mentioned defective, and then can obtain intact device active region to the polysilicon resilient coating.

Though the present invention illustrates with a preferred embodiment; but be not in order to limit spirit of the present invention and invention scope; and those skilled in the art; in not breaking away from spirit of the present invention and scope; when can doing a little change retouching, its scope of patent protection should on appending claims and etc. same domain decide.

Claims

1, a kind of injection that utilizes fluorine ion forms the manufacture method of the semiconductor device of pothole to avoid device active region, and its step comprises:

On silicon chip, form laying;

Deposition one resilient coating on this laying;

Fluorine ion is injected this resilient coating;

Deposit a silicon nitride layer;

Limit device active region;

Form field oxide layer.

2, manufacture method as claimed in claim 1 wherein, also comprises after the described formation field oxide layer step:

Remove this silicon nitride layer;

The dry ecthing resilient coating is to remove this resilient coating;

This laying of etching is to expose active area silicon chip surface.

3, manufacture method as claimed in claim 1, wherein, described laying is a silicon oxide layer.

4, manufacture method as claimed in claim 3, wherein, described silicon oxide layer thickness is about 60～200 dusts (Angstrom).

5, manufacture method as claimed in claim 1, wherein, described resilient coating is a polysilicon layer.

6, manufacture method as claimed in claim 5, wherein, described polysilicon layer thickness is about 500～600 dusts (Angstrom).

7, manufacture method as claimed in claim 1, wherein, described silicon nitride layer thickness is about 1500～2000 dusts.

8, manufacture method as claimed in claim 1, wherein, described formation field oxide layer step is for utilizing about 60～100 minutes of wet oxidation process (Wet Oxidation) under about 1000 ℃.

9, manufacture method as claimed in claim 1, wherein, described field oxide layer thickness is about 5000～6000 dusts.

10, manufacture method as claimed in claim 1, wherein, described injection fluorine ion step is to inject energy to be about 20Kev, implantation dosage is about 2E15～7E15cm ^-2

11, manufacture method as claimed in claim 2, wherein, this silicon nitride layer step of described removal is to remove with hot phosphoric acid solution.

12, a kind of fluorine ion that utilizes injects to avoid device active region to form the manufacture method of the semiconductor device of pothole, and its step comprises:

On silicon chip, form the silicon oxide liner bed course that thickness is about 60～200 dusts;

Deposition one thickness is about the polysilicon buffering layer of 500～600 dusts on this laying;

Inject fluorine ion to this polysilicon buffering layer, inject energy and be about 20Kev, implantation dosage is about 2E15～7E15cm ^-2(2 * 10 ¹⁵～7 * 10 ¹⁵Cm ^-2);

Deposit the silicon nitride layer that a thickness is about 1500～2000 dusts;

Limit device active region;

Form the field oxide layer that thickness is about 5000～6000 dusts;

Remove this silicon nitride layer;

Dry ecthing polysilicon buffering layer is to remove this polysilicon buffering layer;

The etching oxidation silicon liner layer is to expose active area silicon chip surface.