CN115274457A - Preparation method of ultrathin indium tin oxide thin film transistor with adjustable threshold voltage - Google Patents

Preparation method of ultrathin indium tin oxide thin film transistor with adjustable threshold voltage Download PDF

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CN115274457A
CN115274457A CN202210917408.XA CN202210917408A CN115274457A CN 115274457 A CN115274457 A CN 115274457A CN 202210917408 A CN202210917408 A CN 202210917408A CN 115274457 A CN115274457 A CN 115274457A
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tin oxide
indium tin
threshold voltage
ultrathin
oxide film
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陈琳
钱柏帆
王天宇
孟佳琳
孙清清
张卫
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Fudan University
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    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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Abstract

The invention discloses a preparation method of an ultrathin indium tin oxide thin film transistor with adjustable threshold voltage, which comprises the following steps: forming a source electrode and a drain electrode on a silicon substrate with a silicon dioxide layer; on the structure, an ultrathin indium tin oxide film and a high-K dielectric layer are sequentially grown by adopting atomic layer deposition; forming a metal gate on the high-K dielectric layer; etching the high-K dielectric layer and the ultrathin indium tin oxide film by adopting a metal gate self-alignment process, and removing the high-K dielectric layer and the ultrathin indium tin oxide film except the channel region; and carrying out rapid thermal annealing treatment, and accurately regulating and controlling the thickness of the ultrathin indium tin oxide film of the channel layer at the nanometer level so as to directly regulate and control the threshold voltage of the transistor.

Description

Preparation method of ultrathin indium tin oxide thin film transistor with adjustable threshold voltage
Technical Field
The invention relates to the technical field of semiconductors, in particular to a preparation method of an ultrathin indium tin oxide thin film transistor with adjustable threshold voltage.
Background
The threshold voltage of the device plays a decisive role in the power consumption of the silicon-based CMOS circuit, and the whole power consumption of the circuit can be greatly reduced by reducing the threshold voltage. As the size of the semiconductor device is reduced to the nanometer level, the threshold voltage of the device can not exceed 0.8V at most to meet the requirements of different circuits. Voltage variations of a few tens of millivolts can have a significant impact on device performance and circuit operation. The general method for adjusting the threshold voltage of the device is mainly realized by changing the doping concentration of the substrate or the thickness of the dielectric layer. However, the doping concentration of the substrate has important influence on other device parameters such as junction depth, surface potential and the like besides the threshold voltage; the thickness of the dielectric layer directly affects the controllability of the gate to the channel in addition to the threshold voltage. The dielectric layer is too thin, so that electrons can pass through the dielectric layer through a tunneling effect to generate a tunneling current, the electric leakage is increased, and the off-state performance of the device is influenced.
Indium tin oxide is a transparent conductive oxide material which is widely applied, and has large-scale application in the fields of solar cells, conductive coatings, displays and the like. Indium tin oxide material is found in almost all screens, from televisions, computer screens to mobile devices. Typical low resistance indium tin oxide results from a high electron concentration due to oxygen vacancies and interstitial tin atoms therein, and pins the fermi level at the conduction band edge. Research shows that the material of indium tin oxide, which is widely researched and applied in industrial production lines, has the potential to become a transistor channel layer, because the forbidden bandwidth can be effectively increased and some carriers are exhausted by reducing the thickness of indium tin oxide.
Disclosure of Invention
The invention discloses a preparation method of an ultrathin indium tin oxide thin film transistor with adjustable threshold voltage, which comprises the following steps: forming a source electrode and a drain electrode on a silicon substrate with a silicon dioxide layer; on the structure, an ultrathin indium tin oxide film and a high-k dielectric layer are sequentially grown by adopting atomic layer deposition; forming a metal gate on the high-k dielectric layer; etching the high-k dielectric layer and the ultrathin indium tin oxide film by adopting a metal gate self-alignment process, and removing the high-k dielectric layer and the ultrathin indium tin oxide film except the channel region; and carrying out rapid thermal annealing treatment, and accurately regulating and controlling the thickness of the ultrathin indium tin oxide film of the channel layer at the nanometer level so as to directly regulate and control the threshold voltage of the transistor.
In the preparation method of the ultrathin indium tin oxide thin film transistor with adjustable threshold voltage, the thickness of the ultrathin indium tin oxide thin film is preferably 0.5 nm-20 nm.
In the method for manufacturing an ultra-thin indium tin oxide thin film transistor with an adjustable threshold voltage, preferably, the step of growing a single reaction period of the ultra-thin indium tin oxide thin film by atomic layer deposition comprises: introducing gas volatilized by liquid trimethylindium into a reaction cavity, wherein the reaction time is 1000ms, introducing argon for 1s to remove unreacted metal organic precursor and byproducts, stopping introducing the gas, and vacuumizing the cavity for 15s; then introducing gas volatilized by liquid tetra (dimethylamino) tin into a reaction cavity, wherein the reaction time is 1000ms, introducing argon for 1s to remove unreacted metal organic precursor and byproducts, stopping introducing the gas, and vacuumizing the cavity for 15s; and introducing water vapor into the reaction cavity for 100ms, introducing argon for 1s to remove unreacted water vapor and byproducts, stopping introducing the gas, and vacuumizing the cavity for 15s.
In the preparation method of the ultrathin indium tin oxide thin film transistor with adjustable threshold voltage, the temperature of rapid thermal annealing is preferably 200-350 ℃ and the time is 30-300 s.
Drawings
FIG. 1 is a flow chart of a method for making an ultra-thin ITO TFT with adjustable threshold voltage.
Fig. 2 to 4 are schematic structural diagrams of the stages of the manufacturing method of the ultra-thin ito thin film transistor with adjustable threshold voltage.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more clearly and completely understood, the technical solutions in the embodiments of the present invention will be described below with reference to the accompanying drawings in the embodiments of the present invention, and it should be understood that the specific embodiments described herein are only for explaining the present invention and are not intended to limit the present invention. The described embodiments are only some embodiments of the invention, not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "upper", "lower", "vertical", "horizontal", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience in describing the present invention and simplifying the description, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
Furthermore, numerous specific details of the invention, such as structure, materials, dimensions, processing techniques and techniques of the devices are described below in order to provide a more thorough understanding of the invention. However, as will be understood by those skilled in the art, the present invention may be practiced without these specific details. Unless otherwise specified below, each part in the device may be formed of a material known to those skilled in the art, or a material having a similar function developed in the future may be used.
FIG. 1 is a flow chart of a method for making an ultra-thin ITO TFT with adjustable threshold voltage. As shown in fig. 1, the method for preparing the ultra-thin ito thin film transistor with adjustable threshold voltage comprises the following steps:
in step S1, a 200nm thick poly (methyl methacrylate) (PMMA) is spin-coated on a silicon 100 substrate having a silicon dioxide layer 101, and an alignment mark and a source and a drain of a MOSFET are exposed by an electron beam. After development, the source electrode 102 and the drain electrode 103 are formed by peeling using electron beam evaporation/magnetron sputtering of Ni with a thickness of 70nm using a lift-off process, as shown in fig. 2.
S2, growing an ultrathin indium tin oxide film 104 with the thickness of 0.5-20 nm and a high-k dielectric layer 105 with the thickness of 2-10 nm in sequence by utilizing an atomic layer deposition technology, as shown in figure 3. Wherein the indium tin oxide takes trimethyl indium, tetra (dimethylamino) tin and water as reaction precursors, the reaction temperature is 225 ℃, and the pressure of a reaction cavity is 5Torr.
The single reaction cycle includes: introducing gas volatilized by liquid trimethylindium into a reaction cavity, wherein the reaction time is 1000ms, introducing argon for 1s to remove unreacted metal organic precursor and byproducts, stopping introducing the gas, and vacuumizing the cavity for 15s; then introducing gas volatilized by liquid tetra (dimethylamino) tin into a reaction cavity, wherein the reaction time is 1000ms, introducing argon for 1s to remove unreacted metal organic precursors and byproducts, stopping introducing the gas, and vacuumizing the cavity for 15s; wherein, the ratio of the times of introducing the two gaseous reactants into the reaction cavity is as follows: tetrakis (dimethylamino) tin =10:0 to 10: and 8, respectively. The property of the ultrathin indium tin oxide film can be improved by adjusting the ratio of the two gaseous reactants.
Introducing water vapor into the reaction cavity for 100ms, introducing argon for 1s to remove unreacted water vapor and byproducts, stopping introducing gas, and vacuumizing the cavity for 15s.
The reaction was carried out for 80 cycles to obtain an indium tin oxide film having a thickness of about 5 nm. Films grown using atomic layer deposition are uniform and repeatable and the thickness of the film can be controlled very accurately by varying the number of cycles deposited.
And S3, spin-coating PMMA with the thickness of 200nm on a sample, performing electron beam overlay to expose a corresponding grid pattern, developing, performing electron beam evaporation/magnetron sputtering on Ni with the thickness of 70nm, and stripping by adopting an uncovering-stripping process to form a grid 106.
Step S4, adopting BCl 3 And Ar plasma, a metal gate self-aligned process etches the high-k dielectric layer 105 and the ultra-thin indium tin oxide film 104, removing the ultra-thin indium tin oxide film 104 and the high-k dielectric layer 105 except for the channel region, as shown in fig. 4. Wherein the flow rate of Ar plasma is 50sccm, BCl 3 The flow rate is 20sccm, the pressure is 10mTorr, the power is 150W, and the etching time is about 40 s.
And S5, rapidly performing thermal annealing for 30-300S at the temperature of 200-350 ℃ to improve the performance of the device.
The method can obtain the indium tin oxide films with different thicknesses and different stoichiometric ratios by accurately controlling the thickness and the stoichiometric ratio of the indium tin oxide film by utilizing the atomic layer deposition technology. The threshold voltage of a thin film transistor prepared by using the thin film as a channel layer directly depends on the thickness of the thin film. The threshold voltage of the transistor is directly regulated and controlled by controlling the thickness of the indium tin oxide film of the channel layer, so that the side effect brought by the traditional transistor threshold voltage regulation method is avoided.
In addition, the method is simple and efficient, the raw material cost is saved, all equipment in the preparation process is the existing equipment on the conventional semiconductor production line, and other equipment does not need to be purchased and added. The materials used in the preparation process are applied in a semiconductor production line, and no pollution source is introduced. The equipment, raw materials and process conditions used in the preparation process of the method are compatible with the CMOS subsequent process, and the method is suitable for large-area preparation.
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention.

Claims (4)

1. A preparation method of an ultrathin indium tin oxide thin film transistor with adjustable threshold voltage is characterized by comprising the following steps:
forming a source electrode and a drain electrode on a silicon substrate with a silicon dioxide layer;
on the structure, an ultrathin indium tin oxide film and a high-k dielectric layer are sequentially grown by adopting atomic layer deposition;
forming a metal gate on the high-k dielectric layer;
etching the high-k dielectric layer and the ultrathin indium tin oxide film by adopting a metal gate self-alignment process, and removing the high-k dielectric layer and the ultrathin indium tin oxide film except the channel region;
carrying out rapid thermal annealing treatment on the mixture,
the thickness of the ultrathin indium tin oxide film of the channel layer is accurately regulated and controlled at the nanometer level, so that the threshold voltage of the transistor is directly regulated and controlled.
2. The method for preparing ultrathin indium tin oxide thin film transistor with adjustable threshold voltage as claimed in claim 1,
the thickness of the ultrathin indium tin oxide film is 0.5 nm-20 nm.
3. The method for preparing ultrathin indium tin oxide thin film transistor with adjustable threshold voltage as claimed in claim 1,
the steps of growing a single reaction cycle of an ultrathin indium tin oxide film by atomic layer deposition comprise:
introducing gas volatilized by liquid trimethyl indium into a reaction cavity, wherein the reaction time is 1000ms, introducing argon for 1s to remove unreacted metal organic precursor and byproducts, stopping introducing the gas, and vacuumizing the cavity for 15s;
then introducing gas volatilized by liquid tetra (dimethylamino) tin into a reaction cavity, wherein the reaction time is 1000ms, introducing argon for 1s to remove unreacted metal organic precursors and byproducts, stopping introducing the gas, and vacuumizing the cavity for 15s;
introducing water vapor into the reaction cavity for 100ms, introducing argon for 1s to remove unreacted water vapor and byproducts, stopping introducing gas, and vacuumizing the cavity for 15s.
4. The method for preparing the ultra-thin ITO thin film transistor with adjustable threshold voltage of claim 1,
the temperature of the rapid thermal annealing is 200-350 ℃, and the time is 30-300 s.
CN202210917408.XA 2022-08-01 2022-08-01 Preparation method of ultrathin indium tin oxide thin film transistor with adjustable threshold voltage Pending CN115274457A (en)

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