CN115243462A - Circuit board and processing method - Google Patents
Circuit board and processing method Download PDFInfo
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- CN115243462A CN115243462A CN202110436321.6A CN202110436321A CN115243462A CN 115243462 A CN115243462 A CN 115243462A CN 202110436321 A CN202110436321 A CN 202110436321A CN 115243462 A CN115243462 A CN 115243462A
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- conductive
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/188—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by direct electroplating
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
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- Microelectronics & Electronic Packaging (AREA)
- Structure Of Printed Boards (AREA)
Abstract
The application discloses a circuit board and a processing method. The processing method comprises the steps of providing a substrate, wherein a conductive metal layer is arranged on the surface of at least one side of the substrate, and an annular groove is formed in the substrate; electroplating in the annular groove to form a conductive coating, wherein the surface of the conductive coating is flush with the surface of the conductive metal layer; etching the conductive metal layer on the substrate to obtain a conductive circuit layer; the conductive circuit is electrically connected with the conductive plating layer. The rapid heat conduction in the circuit board is realized through the annular conductive coating on the substrate. Meanwhile, the conductive coating is used as a heat conduction structure, and the annular section of the heat conduction structure can have a larger sectional area, so that the heat generation quantity of the heat conduction structure can be reduced when the circuit board works. In addition, the annular conductive coating has a larger contact area with the substrate, so that the bonding force is better, the probability of heated delamination of the circuit board can be reduced and the high temperature resistance of the circuit board can be increased when the circuit board is subjected to high-temperature operation such as welding.
Description
Technical Field
The present disclosure relates to circuit board technologies, and particularly to a circuit board and a processing method thereof.
Background
When the electronic product is in a working state, the long-term reliability of the circuit board can be influenced by a large amount of heat generated by the chip. Therefore, how to increase the heat conduction and heat dissipation of the circuit board becomes a key issue in the circuit board technology field.
In the traditional method, a heat conducting material block such as a copper plug is added in the circuit board to promote the rapid heat conduction of the circuit board. However, the size of the copper plug in the circuit board is generally limited by the size of the copper plug, and when the size to be plugged is less than 3.0 x 3.0mm, the difficulty of the copper plug process is increased, and mass production is not easy. In addition, when the copper-filled circuit board is subjected to subsequent soldering processing, the copper and the circuit board substrate are prone to delamination due to large difference of thermal expansion coefficients, and the reliability of the circuit board is also affected.
Disclosure of Invention
The application provides a circuit board and a processing method thereof, which aim to solve the problem of heat conduction and heat dissipation of the circuit board.
In order to solve the technical problem, the application adopts a technical scheme that: provided is a processing method of a circuit board, comprising the following steps: providing a substrate, wherein a conductive metal layer is arranged on at least one side surface of the substrate; an annular groove is formed in the substrate; electroplating in the annular groove to form a conductive coating, wherein the surface of the conductive coating is flush with the surface of the conductive metal layer; etching the conductive metal layer on the substrate to obtain a conductive circuit layer; wherein, the conductive circuit layer is electrically connected with the conductive plating layer.
Optionally, the step of forming an annular groove on the substrate includes: an annular groove is formed in the substrate through laser ablation, and the groove width of the annular groove is 0.5-2.0mm.
Optionally, before the step of forming the annular groove on the substrate, the method further includes: and etching the conductive metal layer on one side of the substrate to expose the substrate in the region corresponding to the annular groove.
Optionally, the step of providing a substrate, at least one side surface of the substrate being provided with a conductive metal layer, includes: providing a substrate, wherein a first conductive metal layer and a second conductive metal layer are respectively arranged on the surfaces of two sides of the substrate; before the step of forming the annular groove on the substrate, the method further comprises the following steps: etching the first conductive metal layer to expose the substrate in the region corresponding to the annular groove; electroplating in the annular groove to form a conductive coating, wherein the surface of the conductive coating is flush with the surface of the conductive metal layer, and the step comprises the following steps: and electroplating is carried out in the annular groove to form a conductive copper layer, and the surface of the conductive copper layer is flush with the surface of the first conductive metal layer.
Optionally, after the step of electroplating in the annular groove to form the conductive plating layer, a surface of the conductive plating layer is flush with a surface of the conductive metal layer, the method further includes: and polishing the surfaces of the conductive coating and the conductive metal layer to ensure that the surfaces of the conductive coating and the conductive metal layer are smooth.
In order to solve the technical problem, the other technical scheme adopted by the application is as follows: provided is a circuit board including: the conductive circuit layer is arranged on the substrate, wherein an annular conductive plating layer is embedded in the substrate, and the conductive plating layer is electrically connected with the conductive circuit layer.
Optionally, the annular conductive plating layer is an annular conductive copper layer.
Optionally, the annular conductive plating is a loop-type conductive plating.
Optionally, the annular conductive plating layer has a width of 0.5-2.0mm.
Optionally, the substrate is a flexible substrate.
The beneficial effect of this application is: the processing method of the circuit board is characterized in that a substrate is provided, and at least one side surface of the substrate is provided with a conductive metal layer; an annular groove is formed in the substrate; electroplating in the annular groove to form a conductive coating, wherein the surface of the conductive coating is flush with the surface of the conductive metal layer; etching the conductive metal layer on the substrate to obtain a conductive circuit layer; the conductive circuit is electrically connected with the conductive coating, so that heat in the circuit board can be rapidly led out through the annular conductive coating. Meanwhile, the conductive coating is adopted as the heat conduction structure, and the annular section of the heat conduction structure can have a larger sectional area, so that the heat generation quantity of the heat conduction structure can be reduced when the circuit board works. In addition, the annular conductive coating has a larger contact area with the substrate, so that the bonding force is better, the probability of heated delamination of the circuit board can be reduced when the circuit board is subjected to high-temperature operation such as welding, and the high-temperature resistance of the circuit board is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the embodiments and the drawings used in the description of the prior art, and obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without inventive efforts.
Fig. 1 is a schematic flow chart of a first embodiment of a processing method of a circuit board provided by the present application;
fig. 2 is a schematic flow chart of a first embodiment of a processing method of a circuit board provided by the present application;
FIG. 3 is a schematic diagram of a circuit board according to an embodiment of the present disclosure;
FIG. 3a is a schematic cross-sectional view taken along the plane a-a' in FIG. 3;
fig. 4 is a schematic structural diagram of another embodiment of a circuit board provided in the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present application without making any creative effort belong to the protection scope of the present application.
The terms "first", "second" and "third" in this application are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any indication of the number of technical features indicated. Thus, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of the feature. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless explicitly specifically limited otherwise. In the embodiment of the present application, all directional indicators (such as up, down, left, right, front, rear \8230;) are used only to explain the relative positional relationship between the components, the motion situation, etc. at a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indicator is changed accordingly. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments without conflict. The following are detailed by specific examples.
The circuit board in the application can be a flexible circuit board, a rigid circuit board or a rigid-flexible circuit board. A Flexible Printed Circuit (FPC), which may be called a Flexible Circuit board, has a Flexible property.
Referring to fig. 1, fig. 1 is a schematic flow chart of a first embodiment of a processing method of a circuit board provided in the present application, which specifically includes:
step S101: providing a substrate, wherein at least one side surface of the substrate is provided with a conductive metal layer.
In this step, the substrate may be a rigid substrate or a flexible substrate. Specifically, the rigid substrate may be made of an insulating material, for example, a resin material. The reinforced material is soaked with resin adhesive and is prepared by the processes of drying, cutting, laminating and the like. The flexible substrate may include a substrate formed of a PI (Polyimide) substrate or a PET (Polyethylene terephthalate) substrate.
The surface of at least one side of the substrate is provided with a conductive metal layer, the surface of one side of the substrate can be provided with the conductive metal layer, or the surfaces of two sides of the substrate can be provided with the conductive metal layers. The conductive metal layer may include, but is not limited to, copper, aluminum, iron, nickel, gold, silver, platinum group, chromium, magnesium, tungsten, molybdenum, lead, tin, indium, zinc, or alloys thereof. When the conductive metal layer is a copper layer, the substrate in this step may be a single-sided copper-clad substrate or a double-sided copper-clad substrate.
For better illustration, in the present embodiment, two side surfaces of the substrate are respectively defined as a first surface and a second surface. The first surface of the substrate is provided with a conductive metal layer, while the second surface of the substrate may or may not be provided with a conductive metal layer.
Step S102: an annular groove is arranged on the base plate.
In this embodiment, the annular groove may be formed by machining or laser ablation. In particular, the laser ablation mode can select UV, picosecond cutting or CO2 and the like. Further, the grooving method may be selected according to the material property of the substrate and the groove size.
In one embodiment, the substrate is a flexible substrate, and the annular groove is formed by laser ablation. The width of the annular groove can reach the range of 0.5-2.0mm by a laser ablation mode, and the groove opening precision is better. The accurate control of the size of the slot in the step provides a basis for the high-precision control of the shape or the pattern of the conductive coating in the next step.
In this step, the shape or pattern of the annular groove directly affects the shape or pattern of the conductive plating layer in the next step S103. The area and the pattern of the annular groove can be set according to the internal resistance and the heat dissipation requirement of the circuit board.
In another embodiment, before this step, the method further comprises etching the conductive metal layer on one side of the substrate to expose the substrate in a region corresponding to the annular groove. The first surface of the substrate is provided with a conductive metal layer, the conductive metal layer on the first surface of the substrate is etched, and the conductive metal layer in the region corresponding to the annular groove is removed, so that the substrate in the region corresponding to the annular groove is exposed, namely the first surface of the substrate in the region corresponding to the annular groove is exposed, and subsequent grooving processing is performed.
Step S103: and electroplating in the annular groove to form a conductive coating, wherein the surface of the conductive coating is flush with the surface of the conductive metal layer.
In this step, electroplating, which may be electroplating metal, is performed in the annular groove to form a conductive plating layer. Specifically, metallic copper, iron, aluminum, and the like may be electroplated. The shape of the conductive plating layer formed by electroplating is consistent with that of the annular groove, so that the formed conductive plating layer is also annular. And in the depth direction, the surface of the conductive plating layer is flush with the surface of the conductive metal layer, namely flush with the surface of the conductive metal layer on the first surface of the substrate. Or the thickness of the conductive plating layer is the sum of the thickness of the substrate and the thickness of the conductive metal layer on the first surface.
According to the embodiment, the shape and the pattern of the conductive coating are controlled through the annular groove, the thickness of the conductive coating is controlled through the surface of the conductive coating and the surface parallel and level of the conductive metal layer, and the conductive coating is very simply and conveniently processed with high precision.
In other embodiments, after the conductive plating layer is obtained by electroplating, the surfaces of the conductive plating layer and the conductive metal layer may be polished to make the surfaces of the conductive plating layer and the conductive metal layer flat. Because of the direct control of the electroplating process, making the surface of the conductive plating flush with the surface of the conductive metal layer may require more stringent condition control. In this embodiment, the thickness of the plating layer in the actual plating is increased appropriately, and then the surfaces of the conductive plating layer and the conductive metal layer are polished, so that the surface of the conductive plating layer is flush with the surface of the conductive metal layer more easily and accurately. Specifically, the polishing treatment can be performed by ceramic polishing or sand belt polishing, and the polished surface has good flatness and no residue, and has small surface pits.
Step S104: etching the conductive metal layer on the substrate to obtain a conductive circuit layer; the conductive circuit layer is electrically connected with the conductive plating layer.
And etching the conductive metal layer on the first surface of the substrate to obtain a conductive circuit layer, wherein the conductive circuit layer is electrically connected with the conductive coating. In one embodiment, only the conductive metal layer on the first surface of the substrate may be etched, and the conductive plating layer flush with the surface of the conductive metal layer on the first surface of the substrate may not be etched. In yet another embodiment, the conductive metal layer and the conductive plating layer of the first surface of the substrate are etched. The flat surfaces of the conductive metal layer and the conductive plating layer are also treated by electroplating.
In this embodiment, the rapid heat dissipation in the circuit board is realized through the annular conductive plating layer. Meanwhile, the conductive coating is adopted as the heat conduction structure, and the annular section of the heat conduction structure can have a larger sectional area, so that the heat generation quantity of the heat conduction structure can be reduced when the circuit board works. In addition, the annular conductive coating has a larger contact area with the substrate, so that the bonding force is better, the probability of heated delamination of the circuit board can be reduced when the circuit board is subjected to high-temperature operation such as welding, and the high-temperature resistance of the circuit board is improved.
In other embodiments, after the step S104, the method further includes laminating the Copper Clad Laminate (CCL) or the Flexible Copper Clad Laminate (FCCL) with the circuit pattern obtained by etching to obtain a multi-layer circuit board or a rigid-flex circuit board.
Referring to fig. 2, fig. 2 is a schematic flow chart of a first embodiment of a processing method of a circuit board provided in the present application, which specifically includes:
step S201: providing a substrate, wherein a first conductive metal layer and a second conductive metal layer are respectively arranged on the surfaces of two sides of the substrate.
In this step, the substrate may be a rigid substrate or a flexible substrate. Specifically, the rigid substrate may be made of an insulating material, for example, a resin material. The reinforced material is soaked with resin adhesive and is prepared by the processes of drying, cutting, laminating and the like. The flexible substrate may include a substrate formed of a PI (Polyimide) substrate or a PET (Polyethylene terephthalate) substrate.
The two side surfaces of the substrate are respectively defined as a first surface and a second surface. The first surface of the substrate is provided with a first conductive metal layer, and the second surface is provided with a second conductive metal layer. The material of the first conductive metal layer and the second conductive metal layer may include, but is not limited to, copper, aluminum, iron, nickel, gold, silver, platinum group, chromium, magnesium, tungsten, molybdenum, lead, tin, indium, zinc, or alloys thereof.
Step S202: and etching the first conductive metal layer to expose the substrate in the region corresponding to the annular groove.
In this step, the first surface of the substrate is provided with the conductive metal layer, and the conductive metal layer on the first surface of the substrate is etched to remove the conductive metal layer in the region corresponding to the annular groove, so that the substrate in the region corresponding to the annular groove is exposed, that is, the first surface of the substrate in the region corresponding to the annular groove is exposed, so as to perform subsequent grooving processing.
Step S203: an annular groove is arranged on the base plate.
The relevant description in this step may refer to the relevant text description in step S102, and is not described herein again.
Specifically, the opening direction of the annular groove is the first surface direction of the substrate, the groove bottom of the annular groove and the second surface of the substrate are the same plane, that is, the depth of the annular groove formed in the substrate is the same as the thickness of the substrate, so that the conductive copper layer in step S204 can be in contact connection with the second conductive metal layer on the substrate. Wherein the shape of the annular groove matches the pattern or shape of the conductive copper layer in step S204.
Step S204: and electroplating in the annular groove to form a conductive copper layer, wherein the surface of the conductive copper layer is flush with the surface of the first conductive metal layer.
In this step, the conductive plating layer is specifically a conductive copper layer, and other relevant descriptions may refer to the relevant text description in step S103, which is not described herein again. Similarly, in this step, the thickness of the electroplated conductive copper layer may be appropriately greater than that of the surface of the first conductive metal layer, that is, the conductive copper layer slightly protrudes from the surface of the first conductive metal layer, and then the surfaces of the first conductive metal layer and the conductive copper layer are polished, so as to more easily and accurately achieve that the surface of the conductive copper layer is flush with the surface of the first conductive metal layer. Specifically, the polishing treatment can be performed by ceramic polishing or sand belt polishing, and the polished surface has good flatness and no residue, and has small surface pits.
Step S205: etching the first conductive metal layer and the second conductive metal layer to obtain a conductive circuit layer; the conductive circuit layer is electrically connected with the conductive copper layer.
In this step, the first conductive metal layer and the second conductive metal layer are etched respectively to obtain the conductive line layer with the corresponding pattern. Wherein, at least one conductive circuit layer is electrically connected with the conductive copper layer.
In the embodiment, the annular conductive copper layer is correspondingly formed in the pad area of the processed circuit board, so that the cross-sectional area of the heat conducting structure is greatly increased, the internal resistance of the circuit board can be reduced, and the heat generation quantity of the circuit board during working is reduced. Furthermore, the annular conductive copper layer or the annular copper base can rapidly guide out heat generated in the circuit board or heat generated by a chip connected with the circuit board, and the problem of heat dissipation of the high-power chip is solved. In addition, the annular conductive plating layer has larger contact area with the substrate, so that the bonding force is better, the probability of heated delamination of the circuit board can be reduced when the circuit board is subjected to high-temperature operation such as welding and the like, and the heat resistance and the reliability of the circuit board are improved.
In one embodiment, the substrate is a flexible substrate, and the two side surfaces of the flexible substrate are respectively provided with a first conductive copper layer and a second conductive copper layer. And etching the first conductive copper layer to expose the flexible substrate in the area corresponding to the annular groove. The flexible substrate is provided with an annular groove, electroplating is carried out in the annular groove to form a conductive coating, and the surface of the conductive coating is flush with the surface of the first conductive copper layer. And etching the flexible board with the double-sided copper-clad layer to obtain the flexible board with the conductive circuit layer. And after etching and other treatments are carried out on the copper-clad hard board to be pressed, stacking and hot-pressing are carried out on the hard board, the flexible board and the insulating layer, so that all the layers are fixedly connected. And windowing the bent area in the laminated multilayer circuit board, removing the hard board corresponding to the bent area, and exposing the soft board to obtain the bendable soft and hard combined circuit board.
In the embodiment, in the soft and hard combined circuit board, the annular conductive plating layer is used for increasing the bonding force between the conductive plating layer and the flexible substrate, and reducing the possibility that the soft board, the hard board and the conductive plating layer are layered when heated due to different thermal expansion coefficients. In addition, the annular conductive coating can also reduce the internal resistance of the circuit board, reduce the heat generation quantity of the circuit board during working and increase the heat dissipation.
Referring to fig. 3 and 3a, fig. 3 is a schematic structural diagram of an embodiment of a circuit board provided in the present application, and fig. 3a is a schematic cross-sectional diagram of a-a' plane in fig. 3. The circuit board comprises a substrate 31 and a conductive circuit layer 32 arranged on the substrate 31, wherein an annular conductive plating layer 33 is embedded in the substrate 31, and the conductive plating layer 33 is electrically connected with the conductive circuit layer 32.
The conductive circuit layer 32 may be made of, but not limited to, copper, aluminum, iron, nickel, gold, silver, platinum group, chromium, magnesium, tungsten, molybdenum, lead, tin, indium, zinc, or alloys thereof. The material of the conductive plating layer 33 may include, but is not limited to, copper, aluminum, iron, nickel, gold, silver, platinum group, chromium, magnesium, tungsten, molybdenum, lead, tin, indium, zinc, or alloys thereof. The conductive plating layer 33 and the conductive circuit layer 32 may be made of the same material or different materials. In one embodiment, the conductive plating layer 33 and the conductive trace layer 32 are both made of copper, and in this case, the annular conductive plating layer 33 is an annular conductive copper layer.
The conductive plating layer 33 is annular in shape, i.e., includes an annular structure having an inner ring and an outer ring. The width D of the annular structure surrounded by the inner ring and the outer ring is the width D of the conductive plating layer 33, see fig. 3a. In one embodiment, the width D of the conductive plating 33 is 0.5-2.0mm. The annular structure can be a regular annular structure such as a circular ring shape, a square-circle shape and the like, and also comprises an irregular annular structure, and only the annular structure formed by an inner ring and an outer ring is needed.
Referring to fig. 4, fig. 4 is a schematic structural diagram of another embodiment of the circuit board provided in the present application.
The circuit board includes a flexible substrate 41 and first and second conductive trace layers 42 and 43 disposed on both side surfaces of the flexible substrate 41. The flexible substrate 41 is embedded with a rectangular conductive plating layer 44, and the rectangular conductive plating layer 44 is electrically connected to the first conductive trace layer 42 and/or the second conductive trace layer 43.
In the present embodiment, the flexible substrate 41 and the entirety of the first conductive trace layer 42 and the second conductive trace layer 43 provided on both side surfaces of the flexible substrate 41 are regarded as a flexible board. An insulating layer 45 is provided on each of both surfaces of the flexible board, and a hard board 46 is provided on each of the other surfaces of the insulating layer 45. The hard plate 46 may include a hard substrate and a conductive circuit layer disposed on at least one side surface of the hard substrate. Wherein the hard sheet 46 may be a single layer sheet or a multi-layer sheet. The surface of the rigid board 46 may also be provided with a circuit board outer structure (not shown).
The circuit board further comprises a windowing area 47, and the windowing area 47 enables the part except the soft board in the area to be removed, so that the soft board is exposed, and therefore bending is achieved, and the flexible rigid-flexible printed circuit board is obtained.
In this embodiment, the insulating layer 45 may be a prepreg (also referred to as pre or pp) that serves as an insulation between the first flexible board and the first hard board. In other embodiments, other insulating materials may be used for insulating layer 45.
In the present embodiment, the conductive plating layer 44 in the shape of a square-wave increases the bonding force between the conductive plating layer 44 and the flexible substrate 41 in the flexible rigid-flexible board, and reduces the possibility of delamination of the flexible substrate 41, the hard board 46, and the conductive plating layer 44 when heated due to different thermal expansion coefficients. In addition, the square-wave conductive coating 44 increases the cross-sectional area, thereby reducing the internal resistance of the circuit board, reducing the heat generation of the circuit board during operation, and increasing the heat dissipation and thermal conductivity of the circuit board.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes, which are made by the contents of the specification and the drawings, or which are directly or indirectly applied to other related technical fields, are intended to be included within the scope of the present application.
Claims (10)
1. A method for processing a circuit board, comprising:
providing a substrate, wherein at least one side surface of the substrate is provided with a conductive metal layer;
an annular groove is formed in the substrate;
electroplating is carried out in the annular groove to form a conductive coating, and the surface of the conductive coating is flush with the surface of the conductive metal layer;
etching the conductive metal layer on the substrate to obtain a conductive circuit layer; wherein the conductive circuit layer is electrically connected with the conductive plating layer.
2. The method of claim 1, wherein said step of forming an annular groove in said base plate comprises:
and forming an annular groove on the substrate through laser ablation, wherein the width of the annular groove is 0.5-2.0mm.
3. The method of machining as claimed in claim 1, wherein the step of forming the annular groove in the base plate is preceded by the step of:
and etching the conductive metal layer on one side of the substrate to expose the substrate in the region corresponding to the annular groove.
4. The process of claim 1, wherein said step of providing a substrate having at least one surface provided with a conductive metal layer comprises:
providing the substrate, wherein a first conductive metal layer and a second conductive metal layer are respectively arranged on the surfaces of two sides of the substrate;
before the step of forming the annular groove on the substrate, the method further comprises the following steps:
etching the first conductive metal layer to expose the substrate in the region corresponding to the annular groove;
the step of electroplating in the annular groove to form a conductive coating, wherein the surface of the conductive coating is flush with the surface of the conductive metal layer comprises the following steps:
and electroplating is carried out in the annular groove to form a conductive copper layer, and the surface of the conductive copper layer is flush with the surface of the first conductive metal layer.
5. The process of claim 1, wherein the step of electroplating into the annular groove to form a conductive plating layer having a surface that is flush with the surface of the conductive metal layer is followed by the step of:
and polishing the surfaces of the conductive coating and the conductive metal layer to smooth the surfaces of the conductive coating and the conductive metal layer.
6. A circuit board, comprising:
the conductive circuit comprises a substrate and a conductive circuit layer arranged on the substrate, wherein an annular conductive plating layer is embedded in the substrate and is electrically connected with the conductive circuit layer.
7. The circuit board of claim 6, wherein the annular conductive plating layer is an annular conductive copper layer.
8. The circuit board of claim 6, wherein the annular conductive plating is a clip-type conductive plating.
9. The circuit board of claim 6, wherein the width of the annular conductive plating layer is 0.5-2.0mm.
10. The circuit board of claim 6, wherein the substrate is a flexible substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110436321.6A CN115243462A (en) | 2021-04-22 | 2021-04-22 | Circuit board and processing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202110436321.6A CN115243462A (en) | 2021-04-22 | 2021-04-22 | Circuit board and processing method |
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| Publication Number | Publication Date |
|---|---|
| CN115243462A true CN115243462A (en) | 2022-10-25 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202110436321.6A Pending CN115243462A (en) | 2021-04-22 | 2021-04-22 | Circuit board and processing method |
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| CN (1) | CN115243462A (en) |
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- 2021-04-22 CN CN202110436321.6A patent/CN115243462A/en active Pending
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