CN115225592B - Direct memory access data transmission method and system - Google Patents
Direct memory access data transmission method and system Download PDFInfo
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- CN115225592B CN115225592B CN202210617295.1A CN202210617295A CN115225592B CN 115225592 B CN115225592 B CN 115225592B CN 202210617295 A CN202210617295 A CN 202210617295A CN 115225592 B CN115225592 B CN 115225592B
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- 230000005540 biological transmission Effects 0.000 title claims abstract description 193
- 238000000034 method Methods 0.000 title claims abstract description 37
- 238000004891 communication Methods 0.000 claims abstract description 38
- 230000002776 aggregation Effects 0.000 claims abstract description 27
- 238000004220 aggregation Methods 0.000 claims abstract description 27
- 230000004931 aggregating effect Effects 0.000 claims description 5
- 230000001960 triggered effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9057—Arrangements for supporting packet reassembly or resequencing
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9036—Common buffer combined with individual queues
Abstract
The invention provides a direct memory access data transmission method and a system, which relate to the technical field of network communication and comprise the following steps: when an operating system of the computer system transmits data outwards, network data packets transmitted each time are dispersed into a plurality of transmission packets which are respectively stored in different memory addresses, and a linked list is correspondingly generated; the method comprises the steps that a driver program obtains and sequentially aggregates corresponding transmission packets to a data transmission buffer area from each memory address according to a transmission sequence in a linked list, and in the aggregation process, a first separator is added between two adjacent transmission packets, and direct memory access is executed once when each data transmission buffer area reaches a first transmission standard, so that all the transmission packets currently aggregated in the data transmission buffer area are moved to communication hardware equipment; the communication hardware device identifies each transmission packet to transmit accordingly according to each first separator. The method has the advantages of reducing the access times of the direct memory and effectively improving the transceiving performance of the network data packet, especially the small packet on the network.
Description
Technical Field
The present invention relates to the field of network communications technologies, and in particular, to a method and a system for transmitting direct memory access data.
Background
Computer operating systems such as windows or linux operating systems, which are popular today, use a scatter list structure/gather list structure to scatter a network packet to a plurality of discrete memory address stores, such as storing data including two or more MDLs (Memory DescriptorList, memory descriptor tables), each MDL (Memory Descriptor List, memory descriptor table) being a memory block, when sending network packets. When the network data packet is transmitted by adopting a DMA (Direct Memory Access ) mode, since the communication hardware device on the market currently triggers a DMA burst for each memory block, sending each network data packet needs to be performed several times. If the data packets are smaller, such as game application and real-time audio application, each data packet is about 100Bytes, the DMA applies for a bus once, the amount of data transferred is small, and the DMA performance is reduced at this time, so that the network transmission performance is reduced sharply. Similarly, similar problems exist in data reception.
Disclosure of Invention
Aiming at the problems existing in the prior art, the invention provides a direct memory access data transmission method, which is characterized in that a computer system is pre-configured, communication hardware equipment is loaded on the computer system, a driving program of the communication hardware equipment is correspondingly installed on the computer system, and a data transmission buffer area is also configured in the computer system;
the direct memory access data transmission method includes a data transmission process including:
step S1, when an operating system of the computer system transmits data outwards, network data packets transmitted each time are dispersed into a plurality of transmission packets which are respectively stored in different memory addresses, a linked list is correspondingly generated, and the linked list is configured with the transmission sequence of each transmission packet and the corresponding memory address;
step S2, the driver acquires the linked list, and then sequentially aggregates the corresponding transmission packets to the data transmission buffer area from each memory address according to the transmission sequence in the linked list, adds a first separator between two adjacent transmission packets in the aggregation process, and executes a direct memory access every time the data transmission buffer area reaches a first transmission standard so as to move all the transmission packets currently aggregated in the data transmission buffer area to the communication hardware equipment;
step S3, the communication hardware device identifies each transmission packet according to each first separator, so as to correspondingly transmit each transmission packet to the network.
Preferably, in step S2, when the occupied space of the data transmission buffer reaches a first space value or the aggregation time reaches a first time value, it indicates that the data transmission buffer reaches the first transmission standard.
Preferably, the communication hardware device is configured with a data receiving buffer, and the direct memory access data transmission method further includes a data receiving process, where the data receiving process includes:
step A1, when receiving a plurality of received packets sent by the network, the communication hardware equipment sequentially aggregates each received packet to the data receiving buffer according to a receiving sequence, adds a second separator between two adjacent received packets, and executes a direct memory access every time the data receiving buffer reaches a second transmission standard so as to move all the currently aggregated received packets in the data receiving buffer to the driver;
and step A2, the driver identifies each received packet according to each second separator so as to correspondingly send each received packet to the operating system.
Preferably, in the step A1, when the occupied space of the data receiving buffer reaches a second space value or the aggregate time reaches a second time value, it indicates that the data receiving buffer reaches the second transmission standard.
The invention also provides a direct memory access data transmission system, which applies the direct memory access data transmission method, and comprises the following steps:
a computer system having a communication hardware device loaded thereon, the computer system comprising:
the operating system is used for dispersing network data packets transmitted each time into a plurality of transmission packets and storing the transmission packets in different memory addresses respectively when the data are transmitted outwards, and correspondingly generating a linked list, wherein the linked list is configured with the transmission sequence of each transmission packet and the corresponding memory address;
the driver is connected with a data transmission buffer zone and comprises a first processing unit, wherein the first processing unit is used for acquiring the linked list, then sequentially aggregating the corresponding transmission packets to the data transmission buffer zone from each memory address according to the transmission sequence in the linked list, adding a first separator between two adjacent transmission packets in the aggregation process, and executing one direct memory access when the data transmission buffer zone reaches a first transmission standard every time so as to move all the transmission packets currently aggregated in the data transmission buffer zone to the communication hardware equipment;
the communication hardware device comprises a first identification unit, which is used for identifying each sending packet according to each first separator so as to correspondingly send each sending packet into a network.
Preferably, when the occupied space of the data transmission buffer area reaches a first space value or the aggregation time reaches a first time value, the data transmission buffer area reaches the first transmission standard.
Preferably, the communication hardware device further includes:
the second processing unit is connected with a data receiving buffer area, and is used for sequentially aggregating each received packet to the data receiving buffer area according to a receiving sequence when receiving a plurality of received packets sent by the network, adding a second separator between two adjacent received packets, and executing one direct memory access when each data receiving buffer area reaches a second transmission standard so as to move all currently aggregated received packets in the data receiving buffer area to the driver;
the driver further includes a second identifying unit, configured to identify each of the received packets according to each of the second separators, so as to send each of the received packets to the operating system correspondingly.
Preferably, when the occupied space of the data receiving buffer area reaches a second space value or the aggregation time reaches a second time value, the data receiving buffer area reaches the second transmission standard.
The technical scheme has the following advantages or beneficial effects:
1) When a computer system transmits network data packets to a network, the transmission packets scattered at different memory addresses are aggregated together, and when the network data packets are received, a plurality of receiving packets are aggregated together, and a direct memory access operation is triggered once when the aggregation operation meets corresponding transmission standards, so that the direct memory access times are effectively reduced, and the transceiving performance of the network data packets, especially small packets, on the network is effectively improved;
2) When the aggregation is carried out, the corresponding separator separation is adopted between all the sending packets or all the receiving packets, so that the effective identification of all the sending packets or all the receiving packets after the data handling is realized.
Drawings
FIG. 1 is a flow chart of a data transmission process according to a preferred embodiment of the present invention;
FIG. 2 is a flow chart of a data receiving process according to a preferred embodiment of the present invention;
fig. 3 is a schematic diagram of a direct memory access data transmission system according to a preferred embodiment of the present invention.
Detailed Description
The invention will now be described in detail with reference to the drawings and specific examples. The present invention is not limited to the embodiment, and other embodiments may fall within the scope of the present invention as long as they conform to the gist of the present invention.
In a preferred embodiment of the present invention, based on the above-mentioned problems existing in the prior art, a method for transmitting direct memory access data is provided, a computer system is preconfigured, a communication hardware device is loaded on the computer system, a driver of the communication hardware device is correspondingly installed on the computer system, and a data transmission buffer area is also configured in the computer system;
the direct memory access data transmission method includes a data transmission process, as shown in fig. 1, including:
step S1, when an operating system of a computer system transmits data outwards, network data packets transmitted each time are dispersed into a plurality of transmission packets which are respectively stored in different memory addresses, a linked list is correspondingly generated, and the transmission sequence of each transmission packet and the corresponding memory address are configured in the linked list;
step S2, the driver program obtains a linked list, sequentially aggregates corresponding transmission packets to a data transmission buffer area from each memory address according to the transmission sequence in the linked list, adds a first separator between two adjacent transmission packets in the aggregation process, and executes a direct memory access when the data transmission buffer area reaches a first transmission standard each time so as to move all the current aggregated transmission packets in the data transmission buffer area to communication hardware equipment;
and step S3, the communication hardware equipment identifies each sending packet according to each first separator so as to correspondingly send each sending packet into the network.
Specifically, in this embodiment, the communication hardware device includes, but is not limited to, a network card, a wifi device, and a bluetooth device. When the operating system sends data outwards, one or more network data packets can be sent each time, a linked list can be correspondingly generated for each data packet, a linked list can be correspondingly generated for a plurality of network data packets sent each time, and the plurality of network data packets also have corresponding sending sequences in the linked list.
Taking a single network data packet as an example, it may include a plurality of transmission packets, after the driver acquires the linked list, copying each transmission packet to the data transmission buffer area in turn according to the transmission sequence of each transmission packet for aggregation, and it can be understood that the storage space of the data transmission buffer area is limited, so that a corresponding first transmission standard needs to be set, and as a trigger condition of direct memory access, in the preferred embodiment of the present invention, in step S2, when the occupied space of the data transmission buffer area reaches a first space value or the aggregation time reaches a first time value, it is indicated that the data transmission buffer area reaches the first transmission standard.
Specifically, in this embodiment, on the premise that the storage space of the data transmission buffer area is limited, if the network data packet includes too many transmission packets, for example, 10 transmission packets, and the corresponding data transmission buffer area can only store 8 transmission packets at most, after copying the first 8 transmission packets in the transmission sequence and adding the corresponding first delimiter, performing a direct memory access, then performing copy aggregation on the remaining 2 transmission packets, and so on. Because the aggregated data transmission buffer area is a continuous memory, when the first transmission standard is met and data needs to be transmitted, the data in the data transmission buffer area can be moved to the communication hardware equipment by using only one direct memory access. The netperf test is used for sending the performance of the small packet, and the performance of the small packet can be improved by 15% by adopting the technical scheme.
As a preferred embodiment, when executing the aggregation operation, the driver may process, before aggregation, which transmission packets can be aggregated to the data transmission buffer according to the transmission sequence of the linked list based on the storage space of the driver, the occupied memory of each transmission packet, and the first space value, and then copy each transmission packet in turn according to the corresponding memory address, and add a first separator before or after each transmission packet.
As another preferred embodiment, when executing the aggregation operation, the driver may check the occupied space of the data transmission buffer, the remaining space and the occupied memory of the transmission packet before copying one transmission packet each time according to the transmission sequence of the linked list, and then determine whether the transmission packet can be aggregated this time, and if so, copy each transmission packet in turn according to the corresponding memory address, and add a first separator before or after each copy of the transmission packet until the occupied space of the data transmission buffer reaches the first space value.
It can be seen that, in the above embodiment, only whether the occupied space of the data transmission buffer area reaches the first space value is considered, if the operating system transmits more network data packets each time, or when the data volume of each network data packet is larger, the occupied space of the data transmission buffer area can reach the first space value soon, and only whether the occupied space of the data transmission buffer area reaches the first space value is considered, so that the requirements of reducing the direct memory access times and the low delay of data transmission can be met. However, if the number of network data packets sent by the operating system at each time is smaller, for example, only one network data packet is sent, and the data volume of the network data packet is smaller, that is, after all the sending packets of the network data packet are aggregated to the data sending buffer area, the occupied space of the data sending buffer area still cannot reach the first space value. At this time, if the next network data packet is sent out after a long time, high delay is caused by long waiting, based on this, a timer can be configured at the same time, when the aggregation time reaches a first time value when the aggregation operation is started, even if the occupied space of the data transmission buffer area does not reach the first space value, the execution of one direct memory access is triggered, so that the delay condition is comprehensively considered while the direct memory access times are reduced.
It can be appreciated that the first transmission standard may be configured to at least one of reach a first space value and reach a first time value when aggregation takes place for the occupied space of the data transmission buffer according to the application scenario. In addition, the first transmission standard may be configured such that the number of the transmission packets aggregated this time reaches a preset threshold.
In this embodiment, the first spatial value and the first time value may be unique values, or may be multiple values, and may be configured according to requirements. Taking the first time value as a plurality of examples, a shorter first time value can be correspondingly configured according to the real-time requirement, such as a higher real-time requirement in a game mode, a longer first time value can be correspondingly configured according to a lower real-time requirement, and in an actual application scene, a driver can realize the identification of the real-time requirement through software configuration so as to dynamically adapt to the corresponding first time value. The first space value and so on are not described in detail herein.
In a preferred embodiment of the present invention, a data receiving buffer is configured in the communication hardware device, and the direct memory access data transmission method further includes a data receiving process, as shown in fig. 2, where the data receiving process includes:
step A1, when receiving a plurality of receiving packets sent by a network, the communication hardware equipment sequentially aggregates each receiving packet to a data receiving buffer area according to a receiving sequence, adds a second separator between two adjacent receiving packets, and executes a direct memory access when each data receiving buffer area reaches a second transmission standard so as to move all currently aggregated receiving packets in the data receiving buffer area to a driving program;
and step A2, the driver identifies each received packet according to each second separator so as to correspondingly send each received packet to the operating system.
Specifically, in this embodiment, the data receiving process is opposite to the data transmission path of the data sending process, but the data aggregation operation and the identification operation are the same as the data receiving process, and the specific process is not described here again.
In a preferred embodiment of the present invention, in step A1, when the occupied space of the data receiving buffer reaches a second space value or the aggregate time reaches a second time value, it indicates that the data receiving buffer reaches a second transmission standard.
Specifically, in this embodiment, the configuration principle of the second transmission standard is the same as that of the first transmission standard, and will not be described here again. It is understood that the specific values of the first spatial value and the second spatial value may be the same or different, and the specific values of the first time value and the second time value may be the same or different. Wherein the first spatial value is preferably the largest transmission unit.
The present invention also provides a direct memory access data transmission system, applying the above direct memory access data transmission method, as shown in fig. 3, the direct memory access data transmission system includes:
computer system 1, computer system 1 has communication hardware device 2 loaded thereon, computer system 1 includes:
the operating system 11 is configured to, when transmitting data outwards, disperse network data packets transmitted each time into a plurality of transmission packets, and store the transmission packets in different memory addresses respectively, and correspondingly generate a linked list, where a transmission sequence of each transmission packet and a corresponding memory address are configured in the linked list;
the driver 12 is connected to a data transmission buffer 13, the driver 12 includes a first processing unit 121 for obtaining a linked list, and then sequentially aggregating corresponding transmission packets to the data transmission buffer from each memory address according to a transmission sequence in the linked list, adding a first separator between two adjacent transmission packets during the aggregation process, and executing a direct memory access every time the data transmission buffer reaches a first transmission standard, so as to move all the transmission packets currently aggregated in the data transmission buffer to the communication hardware device;
the communication hardware device 2 comprises a first identifying unit 21 for identifying each transmission packet according to each first separator, so as to correspondingly transmit each transmission packet into the network.
In a preferred embodiment of the present invention, when the occupied space of the data transmission buffer reaches a first space value or the aggregation time reaches a first time value, it indicates that the data transmission buffer reaches a first transmission standard.
In the preferred embodiment of the present invention, the communication hardware device 2 further comprises:
the second processing unit 22 is connected to a data receiving buffer 23, and the second processing unit 22 is configured to, when receiving a plurality of received packets sent by the network, sequentially aggregate each received packet to the data receiving buffer according to a receiving order, add a second separator between two adjacent received packets, and perform a direct memory access each time the data receiving buffer reaches a second transmission standard, so as to move all currently aggregated received packets in the data receiving buffer to the driver;
the driver 12 further includes a second identifying unit 122 for identifying each received packet according to each second separator, so as to send each received packet to the operating system correspondingly.
In a preferred embodiment of the present invention, when the occupied space of the data receiving buffer reaches a second space value or the aggregate time reaches a second time value, it indicates that the data receiving buffer reaches a second transmission standard.
The foregoing description is only illustrative of the preferred embodiments of the present invention and is not to be construed as limiting the scope of the invention, and it will be appreciated by those skilled in the art that equivalent substitutions and obvious variations may be made using the description and drawings, and are intended to be included within the scope of the present invention.
Claims (2)
1. A direct memory access data transmission method is characterized in that a computer system is pre-configured, communication hardware equipment is loaded on the computer system, a driving program of the communication hardware equipment is correspondingly installed on the computer system, and a data transmission buffer area is also configured in the computer system;
the direct memory access data transmission method includes a data transmission process including:
step S1, when an operating system of the computer system transmits data outwards, network data packets transmitted each time are dispersed into a plurality of transmission packets which are respectively stored in different memory addresses, a linked list is correspondingly generated, and the linked list is configured with the transmission sequence of each transmission packet and the corresponding memory address;
step S2, the driver acquires the linked list, and then sequentially aggregates the corresponding transmission packets to the data transmission buffer area from each memory address according to the transmission sequence in the linked list, adds a first separator between two adjacent transmission packets in the aggregation process, and executes a direct memory access every time the data transmission buffer area reaches a first transmission standard so as to move all the transmission packets currently aggregated in the data transmission buffer area to the communication hardware equipment;
step S3, the communication hardware equipment identifies each sending packet according to each first separator so as to correspondingly send each sending packet to a network;
in the step S2, when the occupied space of the data transmission buffer area reaches a first space value or the aggregation time reaches a first time value, it indicates that the data transmission buffer area reaches the first transmission standard;
the communication hardware device is configured with a data receiving buffer area, and the direct memory access data transmission method further includes a data receiving process, where the data receiving process includes:
step A1, when receiving a plurality of received packets sent by the network, the communication hardware equipment sequentially aggregates each received packet to the data receiving buffer according to a receiving sequence, adds a second separator between two adjacent received packets, and executes a direct memory access every time the data receiving buffer reaches a second transmission standard so as to move all the currently aggregated received packets in the data receiving buffer to the driver;
step A2, the driver identifies each received packet according to each second separator so as to correspondingly send each received packet to the operating system;
in the step A1, when the occupied space of the data receiving buffer area reaches a second space value or the aggregation time reaches a second time value, it indicates that the data receiving buffer area reaches the second transmission standard.
2. A direct memory access data transmission system to which the direct memory access data transmission method as claimed in claim 1 is applied, the direct memory access data transmission system comprising:
a computer system having a communication hardware device loaded thereon, the computer system comprising:
the operating system is used for dispersing network data packets transmitted each time into a plurality of transmission packets and storing the transmission packets in different memory addresses respectively when the data are transmitted outwards, and correspondingly generating a linked list, wherein the linked list is configured with the transmission sequence of each transmission packet and the corresponding memory address;
the driver is connected with a data transmission buffer zone and comprises a first processing unit, wherein the first processing unit is used for acquiring the linked list, then sequentially aggregating the corresponding transmission packets to the data transmission buffer zone from each memory address according to the transmission sequence in the linked list, adding a first separator between two adjacent transmission packets in the aggregation process, and executing one direct memory access when the data transmission buffer zone reaches a first transmission standard every time so as to move all the transmission packets currently aggregated in the data transmission buffer zone to the communication hardware equipment;
the communication hardware equipment comprises a first identification unit, a second identification unit and a communication unit, wherein the first identification unit is used for identifying each transmission packet according to each first separator so as to correspondingly transmit each transmission packet into a network;
when the occupied space of the data transmission buffer area reaches a first space value or the aggregation time reaches a first time value, the data transmission buffer area is indicated to reach the first transmission standard;
the communication hardware device further includes:
the second processing unit is connected with a data receiving buffer area, and is used for sequentially aggregating each received packet to the data receiving buffer area according to a receiving sequence when receiving a plurality of received packets sent by the network, adding a second separator between two adjacent received packets, and executing one direct memory access when each data receiving buffer area reaches a second transmission standard so as to move all currently aggregated received packets in the data receiving buffer area to the driver;
the driver further includes a second identifying unit, configured to identify each of the received packets according to each of the second separators, so as to send each of the received packets to the operating system correspondingly;
and when the occupied space of the data receiving buffer area reaches a second space value or the aggregation time reaches a second time value, indicating that the data receiving buffer area reaches the second transmission standard.
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