CN115220565A

CN115220565A - Dormancy control method and device for base frequency processor BP and electronic equipment

Info

Publication number: CN115220565A
Application number: CN202210858168.0A
Authority: CN
Inventors: 王中宜
Original assignee: Vivo Mobile Communication Co Ltd
Current assignee: Vivo Mobile Communication Co Ltd
Priority date: 2022-07-20
Filing date: 2022-07-20
Publication date: 2022-10-21

Abstract

The application discloses a dormancy control method and device of a base frequency processor BP and electronic equipment, belonging to the technical field of communication; the method comprises the following steps: under the condition that a cache mechanism exists in a scene where a first application currently running is determined to be located, an Application Processor (AP) calculates a first data volume which can be obtained by the first application within a first duration; the first duration is the duration of a first time interval, and the BP corresponding to the first application is in an operating state in the first time interval; setting the BP corresponding to the first application to be in a dormant state in a second time interval according to the first data volume; wherein a starting time point of the second time interval is an ending time point of the first time interval, and a duration of the second time interval is associated with the first data volume.

Description

Dormancy control method and device for base frequency processor BP and electronic equipment

Technical Field

The application belongs to the technical field of communication, and particularly relates to a sleep control method and device for a base frequency processor (BP) and electronic equipment.

Background

In the prior art, an electronic device includes two processors, which are respectively: an Application Processor (AP) and a Baseband Processor (BP). Wherein, the operating system and the application program are operated on the AP; electronic equipment radio frequency communication control software (such as a Modem) runs on the BP. Since the rf control functions (signal modulation, coding, rf displacement, etc.) are highly time dependent, the rf functions are performed on the BP, which runs a real-time system.

Networking applications currently used by users can be divided into two broad categories: one type of application needs to use a timely network, various behaviors of a user need timely responses of a terminal and a server, such as game playing, network video and the like, and the other type of application always responds in time without the terminal and the server. However, when the electronic device in the prior art uses various networking applications, the applications will continuously communicate with the radio frequency communication control software of the electronic device (i.e., the AP will continuously communicate with the BP), so as to ensure the normal use of the applications. However, for applications that do not use a terminal and a server to respond in time, the continuous operation of the BP may cause an increase in power consumption of the electronic device.

Disclosure of Invention

An object of the embodiments of the present application is to provide a sleep control method and apparatus for a baseband processor BP, and an electronic device, which can solve the problem of high power consumption of the electronic device caused by continuous operation of the baseband processor BP in the electronic device.

In a first aspect, an embodiment of the present application provides a sleep control method for a baseband processor BP, including:

under the condition that a cache mechanism exists in a scene where a first application which is currently running is determined, an application processor AP calculates a first data size which can be obtained by the first application in a first duration; the first duration is the duration of a first time interval, and the baseband processor BP corresponding to the first application is in an operating state in the first time interval;

setting the BP corresponding to the first application to be in a dormant state in a second time interval according to the first data volume;

wherein a starting time point of the second time interval is an ending time point of the first time interval, and a duration of the second time interval is associated with the first data volume.

In a second aspect, an embodiment of the present application provides a sleep control apparatus for a baseband processor BP, which is applied to an application processor AP, and includes:

the first calculation module is used for calculating a first data size which can be obtained by a first application in a first duration under the condition that a cache mechanism exists in a scene where the first application which is currently running is determined to be located; the first duration is the duration of a first time interval, and the baseband processor BP corresponding to the first application is in an operating state in the first time interval;

the first setting module is used for setting the BP corresponding to the first application to be in a dormant state in a second time interval according to the first data volume;

In a third aspect, embodiments of the present application provide an electronic device, which includes a processor and a memory, where the memory stores a program or instructions executable on the processor, and the program or instructions, when executed by the processor, implement the steps of the method according to the first aspect.

In a fourth aspect, embodiments of the present application provide a readable storage medium, on which a program or instructions are stored, which when executed by a processor, implement the steps of the method according to the first aspect.

In a fifth aspect, an embodiment of the present application provides a chip, where the chip includes a processor and a communication interface, where the communication interface is coupled to the processor, and the processor is configured to execute a program or instructions to implement the method according to the first aspect.

In a sixth aspect, embodiments of the present application provide a computer program product, stored on a storage medium, for execution by at least one processor to implement the method according to the first aspect.

In the embodiment of the present application, in a case where it is determined that a caching mechanism exists in a currently running first application, the application processor AP calculates a first data amount that is available for the first application for a first duration; the method comprises the steps that a first duration is the duration of a first time interval, a base frequency processor (BP) corresponding to a first application is in an operating state in the first time interval, and the BP corresponding to the first application is set to be in a dormant state in a second time interval according to a first data volume; wherein a starting time point of the second time interval is an ending time point of the first time interval, and a duration of the second time interval is associated with the first data volume. Namely, the AP identifies the application with the cache mechanism and reduces the operation time of BP in the operation process of the application, thereby achieving the purpose of saving the power consumption of the electronic equipment.

Drawings

Fig. 1 is a flowchart illustrating steps of a sleep control method for a baseband processor BP according to an embodiment of the present application;

FIG. 2 is a schematic diagram of a first example and a second example provided by an embodiment of the present application;

fig. 3 is a schematic structural diagram of a sleep control apparatus for a baseband processor BP according to an embodiment of the present application;

fig. 4 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure;

fig. 5 shows a second schematic structural diagram of an electronic device according to an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be described clearly below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some, but not all, embodiments of the present application. All other embodiments that can be derived by one of ordinary skill in the art from the embodiments given herein are intended to be within the scope of the present disclosure.

The terms first, second and the like in the description and in the claims of the present application are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that embodiments of the application may be practiced in sequences other than those illustrated or described herein, and that the terms "first," "second," and the like are generally used herein in a generic sense and do not limit the number of terms, e.g., the first term can be one or more than one. In addition, "and/or" in the specification and claims means at least one of connected objects, a character "/" generally means that a preceding and succeeding related objects are in an "or" relationship.

The sleep control method for the baseband processor BP provided in the embodiment of the present application is described in detail below with reference to the accompanying drawings by specific embodiments and application scenarios thereof.

As shown in fig. 1, an embodiment of the present application provides a sleep control method for a baseband processor BP, including:

step 101, under the condition that a cache mechanism exists in a scene where a currently running first application is located, an application processor AP calculates a first data size that can be obtained by the first application within a first duration; the first duration is the duration of a first time interval, and the baseband processor BP corresponding to the first application is in an operating state in the first time interval;

for example, a user starts a first application, the AP identifies an application scenario, and checks whether the current scenario needs to be cached; and if the current scene needs to be cached, determining that a caching mechanism exists in the scene where the first application is located.

Alternatively, the first amount of data may be referred to as: the BP may obtain the data volume of the first application from the server in the first duration, or the data volume of the first application that the BP may cache in the first duration.

Step 102, setting the BP corresponding to the first application to be in a dormant state in a second time interval according to the first data volume; wherein a starting time point of the second time interval is an ending time point of the first time interval, and a duration of the second time interval is associated with the first data volume. For example, as shown in fig. 2, the first time interval is [0, T1), then the first duration is T1; the second time interval is [ T1, T2].

In this step, the "caching mechanism exists in the scene where the first application is located" may be understood as: the available duration of the content corresponding to the first data size that can be cached in the first duration (referred to as the available duration of the first data size for short) in the first application is longer than the first time duration, so that the BP does not need to perform caching all the time in the available duration of the first data size, and thus the second time interval in which the BP can be dormant can be determined according to the first data size.

According to the embodiment of the application, the application needing the cache mechanism is identified, so that the operation time of the BP in the operation process of the application is reduced, and the purpose of saving the power consumption of the electronic equipment is achieved.

In at least one embodiment of the present application, step 102 comprises:

calculating the time length of the first data volume available in the first application according to the data consumption speed in the running process of the first application and the first data volume to obtain a target time interval, wherein the starting time point of the target time interval is the ending time point of the first time interval, and the duration of the target time interval is equal to: subtracting the first duration from a length of time the first amount of data is usable in a first application;

determining at least part of a target time interval as a second time interval, and setting the content of the BP in the second time interval to be in a dormant state;

and the second time interval is positioned in the range of the target time interval, and the starting time point of the second time interval is the starting time point of the target time interval.

For example, as shown in fig. 2, the first time interval is [0, T1), then the first duration is T1; the target time interval is [ T1, T3] and the second time interval is [ T1, T2].

As an optional embodiment, after obtaining the target time interval, the method further includes:

determining at least part of the target time interval as a third time interval, and setting the BP as a running state in the third time interval;

wherein the BP performs data caching on the first application in the third time interval; and the end time point of the third time interval is the end time point of the target time interval, and the third time interval is a part of the target time interval except the second time interval.

In other words, in order to ensure the flow of the first application to run, the BP needs to enter a running state after sleeping for a period of time to continue to perform the data caching work. It can be understood that the electronic device needs to adjust the BP to the running state to buffer the data before the first data amount is completely used, so as to ensure that the first application can run in the flow.

Optionally, the duration of the third time interval is the time of the next data buffering. Specifically, the third duration corresponding to the third time interval may be the same as the first duration, or may be different; the electronic equipment can perform custom setting on the cache duration according to the network, the temperature and the like.

It should be noted that the first duration and the third duration corresponding to different first applications may be the same or different, and are not specifically limited herein.

As an optional embodiment, the first duration and/or the third duration is associated with at least one of:

a temperature of the electronic device;

a current network quality of the electronic device;

a category of the first application.

For example, in the case that the category of the first application is a video-class application, the first duration and the third duration are related to the temperature of the electronic device and/or the current network quality; for another example, when the category of the first application is a text application such as a web page, the first duration and the third duration are preset durations.

The first duration and/or the third duration may be referred to as a buffer duration.

In the embodiment of the application, the cache duration can be customized by the electronic equipment; the cache duration may be different for different applications, different network environment differences, etc. For example, the caching duration of the first caching of each type of application may use a preset value (e.g., 30 s), and the caching durations corresponding to the second caching, the third caching, and the subsequent caching, respectively, may be set by the electronic device in a user-defined manner according to the network quality and the temperature.

Optionally, W = P × t = U × I × t; wherein W is heat energy generated by the electronic equipment, P is electric power, U is working voltage of the electronic equipment, and I is working current of the electronic equipment; since the current and the voltage are constant when the electronic device is operated, the heat energy generated by the electronic device is proportional to the operating time t, and the longer the operating time t is, the more heat is generated, and the temperature of the electronic device may be higher. Therefore, the AP may dynamically adjust the length of the buffering time according to the temperature of the electronic device.

As an alternative embodiment, in the case that the BP performs data caching for the first application in a third duration corresponding to the third duration, the AP performs steps 101 to 102, that is, calculates a first data size available for the first application in the third duration, and sets the BP corresponding to the first application in a dormant state in the second duration according to the first data size; that is to say, the AP can control the BP to switch between the sleep state and the running state according to the calculated second time interval (the second time interval can be understood as the sleepable time interval of the BP), so as to avoid that the BP is always in the running state, and thus achieve the purpose of saving the power of the electronic device.

In at least one embodiment of the present application, step 101 comprises:

determining the current data caching speed according to the network quality;

and calculating a first data volume which can be obtained by the first application in the first duration according to the current data caching speed and the first duration.

For example, if the first duration is t1, and the current data caching speed is v1, the first amount of data SUM = v1 × t1 that can be obtained by the first application in the first duration. The data consumption speed during the running of the first application is v2, the time length of the first data amount SUM usable in the first application is t2, and t2= SUM/v2. During the time period t2-t1, the first application can still work normally even if the BP does not acquire data.

Further, in order to ensure that the next segment of cache data is ready before the "length of time that the first amount of data is usable in the first application" is finished, the embodiment of the present application caches the next segment before the "length of time that the first amount of data is usable in the first application" is finished. Therefore, the AP needs to determine the second time interval according to the target time interval and a third duration corresponding to the third time interval.

For example, as shown in fig. 2, the first time interval is [0, T1), then the first duration is T1; the target time interval is [ T1, T3]; the second time interval is [ T1, T2]; the third time interval is (T2, T3), the duration of the third time interval is a third time period T3, the time length of the first data volume which can be used in the first application is T2, the second time period corresponding to the second time interval is T, T = T2-T1-T3, and the second time period T is the time length of the BP which can sleep.

In order to more clearly describe the sleep control method of the baseband processor BP provided in the embodiment of the present application, two examples are described below.

Example 1

As shown in fig. 2, a process of the BP dormancy control method according to the embodiment of the present application is as follows:

s101: a user starts networking application, an AP identifies the current use scene of the application, and checks whether the current scene needs to be cached;

s102: if the application use scene is a cache-needed mechanism at present, the AP determines that the network downloading speed is v1 according to the current network quality, and calculates the total data SUM = v1 × t1 which can be taken by the application from the server end within the cache time t1 according to the network downloading speed in the current system being v1 and the self-defined cache time t1 (preset t1=30 s);

s103: calculating the speed of data consumption of the application in the current state per second as v2;

s104: in conjunction with S102 and S103, the time period T2= SUM/v2 that the application can use for the resource SUM taken in the time period T1, corresponding to the time point T3 (i.e. the ending time point of the time period T2 is the time point T3).

In order to ensure the continuity of application work, data which needs to be taken to the next section before the data consumption is finished is acquired in the time period T1, and a time point T1 when the BP enters the sleep mode and a time point T2 when the BP exits the sleep mode can be calculated (T2 = T2-T3);

s105: the BP can start to enter the sleep at the time point of T1, and after T (T = T2-T1-T3), the BP is awakened to continue working at the time point of T2;

s106: and circulating S101-S105.

Example two, assume the first application is video APP

S201: a user opens a video APP;

s202: under the condition of a good network environment, in order to ensure that the fluency of playing the video can cache the video content, as shown in fig. 2, the video content in the time interval (0-T3) can be cached in the time interval (0-T1);

s203: even if the video APP is not networked from the T1 time point to the T3 time point, the video APP can work normally, but if the video content of the next stage cannot be cached before the T3 time point, the video APP does not have the content to be played, and therefore the video content of the next stage needs to be cached before the T3 time point.

Calculating a reasonable buffer time interval according to the video content downloading speed of the electronic equipment and the video content consumption speed of the video APP, enabling the BP of the electronic equipment end to start to enter a sleep mode at a time point T1, and waking up again at a time point T2 (the value of T2 is equal to the value of T3 minus the buffer time value T3 of the next section);

s204: the electronic device and the video APP loop through S202-S203.

In summary, in the embodiment of the present application, the AP identifies the application having the cache mechanism, and reduces the BP running time in the running process of the application, so as to achieve the purpose of saving power consumption of the electronic device.

In the sleep control method of the BP provided in the embodiment of the present application, the execution subject may be a sleep control device of the BP. In the embodiment of the present application, a sleep control method for a BP sleep control device to execute a BP is taken as an example, and the sleep control device for a BP provided in the embodiment of the present application is described.

As shown in fig. 3, the present embodiment further provides a sleep control apparatus 300 for a baseband processor BP, which is applied to an application processor AP, and includes:

the calculating module 301 is configured to calculate a first data size that can be obtained by a first application within a first duration under the condition that it is determined that a caching mechanism exists in a scenario where a currently running first application is located; the first duration is the duration of a first time interval, and the baseband processor BP corresponding to the first application is in an operating state in the first time interval;

a determining module 302, configured to set a BP corresponding to the first application to a sleep state in a second time interval according to the first data amount;

As an alternative embodiment, the setting module is further configured to:

As an alternative embodiment, the apparatus further comprises:

the determining module is used for determining at least part of the target time interval as a third time interval and setting the BP as a running state in the third time interval;

wherein the BP performs data caching on the first application in the third time interval; and the ending time point of the third time interval is the ending time point of the target time interval, and the third time interval is the part of the target time interval except the second time interval.

As an alternative embodiment, the calculation module is further configured to:

determining the current data caching speed according to the network quality;

and calculating a first data size which can be obtained by the first application in the first duration according to the current data caching speed and the first duration.

As an optional embodiment, the duration of the first time period and/or the third time interval is associated with at least one of:

a temperature of the electronic device;

a current network quality of the electronic device;

a category of the first application.

In the embodiment of the application, the AP identifies the application with the cache mechanism and reduces the operation time of the BP in the operation process of the application, so that the aim of saving the power consumption of the electronic equipment is fulfilled.

It should be noted that the sleep control apparatus for the baseband processor BP provided in the embodiment of the present application is an apparatus capable of executing the sleep control method for the baseband processor BP, and all embodiments of the sleep control method for the baseband processor BP are applicable to the apparatus and can achieve the same or similar beneficial effects.

The sleep control device of the baseband processor BP in the embodiment of the present application may be an electronic device, or may be a component in the electronic device, such as an integrated circuit or a chip. The electronic device may be a terminal, or may be a device other than a terminal. The electronic Device may be, for example, a Mobile phone, a tablet computer, a notebook computer, a palm top computer, a vehicle-mounted electronic Device, a Mobile Internet Device (MID), an Augmented Reality (AR)/Virtual Reality (VR) Device, a robot, a wearable Device, an ultra-Mobile personal computer (UMPC), a netbook or a Personal Digital Assistant (PDA), and the like, and may also be a server, a Network Attached Storage (Network Attached Storage, NAS), a personal computer (NAS), a Television (TV), a teller machine, a self-service machine, and the like, and the embodiments of the present application are not limited in particular.

The sleep control device of the baseband processor BP in the embodiment of the present application may be a device having an operating system. The operating system may be an Android (Android) operating system, an ios operating system, or other possible operating systems, and embodiments of the present application are not limited specifically.

The sleep control device of the baseband processor BP according to the embodiment of the present application can implement each process implemented by the method embodiments of fig. 1 to fig. 2, and is not described herein again to avoid repetition.

Optionally, as shown in fig. 4, an electronic device 400 is further provided in this embodiment of the present application, and includes a processor 401 and a memory 402, where the memory 402 stores a program or an instruction that can be executed on the processor 401, and when the program or the instruction is executed by the processor 401, the steps of the sleep control method embodiment of the baseband processor BP are implemented, and the same technical effect can be achieved, and are not described herein again to avoid repetition.

It should be noted that the electronic device in the embodiment of the present application includes the mobile electronic device and the non-mobile electronic device described above.

Fig. 5 is a schematic diagram of a hardware structure of an electronic device implementing the embodiment of the present application.

The electronic device 500 includes, but is not limited to: a radio frequency unit 501, a network module 502, an audio output unit 503, an input unit 504, a sensor 505, a display unit 506, a user input unit 507, an interface unit 508, a memory 509, a processor 510, and the like.

Those skilled in the art will appreciate that the electronic device 500 may further include a power supply (e.g., a battery) for supplying power to various components, and the power supply may be logically connected to the processor 510 via a power management system, so as to implement functions of managing charging, discharging, and power consumption via the power management system. The electronic device structure shown in fig. 5 does not constitute a limitation of the electronic device, and the electronic device may include more or less components than those shown, or combine some components, or arrange different components, and thus, the description is omitted here.

The processor 510 is configured to, in a case that it is determined that a caching mechanism exists in a scenario in which a currently running first application is located, calculate, by an application processor AP, a first amount of data that is available for the first application within a first duration; the first duration is duration of a first time interval, and the BP corresponding to the first application is in an operating state in the first time interval; setting the BP corresponding to the first application to be in a dormant state in a second time interval according to the first data volume; wherein a starting time point of the second time interval is an ending time point of the first time interval, and a duration of the second time interval is associated with the first data volume.

In the embodiment of the application, the AP is used for identifying the application with the cache mechanism and reducing the operation time of BP in the operation process of the application, so that the purpose of saving the power consumption of the electronic equipment is achieved.

Optionally, the processor 510 is further configured to determine at least a part of the target time interval as a third time interval, and set the BP in the third time interval as a running state;

In the embodiment of the application, the electronic device can control the BP to be switched between the running state and the dormant state according to the dormant time interval obtained by calculation, so that the BP is prevented from being always in the running state, and the purpose of saving the electric quantity of the electronic device is achieved.

It should be understood that in the embodiment of the present application, the input Unit 504 may include a Graphics Processing Unit (GPU) 5041 and a microphone 5042, and the Graphics processor 5041 processes image data of still pictures or videos obtained by an image capturing device (such as a camera) in a video capturing mode or an image capturing mode. The display unit 506 may include a display panel 5061, and the display panel 5061 may be configured in the form of a liquid crystal display, an organic light emitting diode, or the like. The user input unit 507 includes at least one of a touch panel 5071 and other input devices 5072. The touch panel 5071 is also called a touch screen. The touch panel 5071 may include two parts of a touch detection device and a touch controller. Other input devices 5072 may include, but are not limited to, a physical keyboard, function keys (e.g., volume control keys, switch keys, etc.), a trackball, a mouse, and a joystick, which are not described in further detail herein.

The memory 509 may be used to store software programs as well as various data. The memory 509 may mainly include a first storage area storing a program or an instruction and a second storage area storing data, wherein the first storage area may store an operating system, an application program or an instruction (such as a sound playing function, an image playing function, etc.) required for at least one function, and the like. Further, the memory 509 may include volatile memory or non-volatile memory, or the memory x09 may include both volatile and non-volatile memory. The non-volatile Memory may be a Read-Only Memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an Electrically Erasable PROM (EEPROM), or a flash Memory. The volatile Memory may be a Random Access Memory (RAM), a Static Random Access Memory (Static RAM, SRAM), a Dynamic Random Access Memory (Dynamic RAM, DRAM), a Synchronous Dynamic Random Access Memory (Synchronous DRAM, SDRAM), a Double Data Rate Synchronous Dynamic Random Access Memory (Double Data Rate SDRAM, ddr SDRAM), an Enhanced Synchronous SDRAM (ESDRAM), a Synchronous Link DRAM (SLDRAM), and a Direct bus RAM (DRRAM). The memory 509 in embodiments of the present application includes, but is not limited to, these and any other suitable types of memory.

Processor 510 may include one or more processing units; optionally, the processor 510 integrates an application processor, which mainly handles operations related to the operating system, user interface, and applications, and a modem processor, which mainly handles wireless communication signals, such as a baseband processor. It will be appreciated that the modem processor described above may not be integrated into processor 510.

The embodiments of the present application further provide a readable storage medium, where a program or an instruction is stored on the readable storage medium, and when the program or the instruction is executed by a processor, the program or the instruction implements each process of the foregoing sleep control method for a baseband processor BP, and can achieve the same technical effect, and in order to avoid repetition, details are not repeated here.

The processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes a computer readable storage medium, such as a computer read only memory ROM, a random access memory RAM, a magnetic or optical disk, and the like.

The embodiment of the present application further provides a chip, where the chip includes a processor and a communication interface, the communication interface is coupled to the processor, and the processor is configured to run a program or an instruction to implement each process of the foregoing sleep control method for a baseband processor BP, and the same technical effect can be achieved, and in order to avoid repetition, details are not repeated here.

It should be understood that the chips mentioned in the embodiments of the present application may also be referred to as system-on-chip, system-on-chip or system-on-chip, etc.

Embodiments of the present application provide a computer program product, where the program product is stored in a storage medium, and the program product is executed by at least one processor to implement the processes of the foregoing embodiments of the sleep control method for a baseband processor BP, and the same technical effects can be achieved.

It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of another identical element in a process, method, article, or apparatus that comprises the element. Further, it should be noted that the scope of the methods and apparatus of the embodiments of the present application is not limited to performing the functions in the order illustrated or discussed, but may include performing the functions in a substantially simultaneous manner or in a reverse order based on the functions involved, e.g., the methods described may be performed in an order different than that described, and various steps may be added, omitted, or combined. In addition, features described with reference to certain examples may be combined in other examples.

Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solutions of the present application may be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal (such as a mobile phone, a computer, a server, or a network device) to execute the method according to the embodiments of the present application.

While the present embodiments have been described with reference to the accompanying drawings, it is to be understood that the invention is not limited to the precise embodiments described above, which are meant to be illustrative and not restrictive, and that various changes may be made therein by those skilled in the art without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. A method for controlling sleep of a baseband processor BP, comprising:

in the event that it is determined that a caching mechanism exists for a currently running first application, the application processor AP calculates a first amount of data that is available for the first application for a first duration; the first duration is the duration of a first time interval, and the baseband processor BP corresponding to the first application is in an operating state in the first time interval;

2. The method according to claim 1, wherein the setting the baseband processor BP corresponding to the first application to the sleep state in the second time interval according to the first data amount comprises:

3. The method of claim 2, wherein after obtaining the target time interval, the method further comprises:

wherein the BP caches data of the first application in the third time interval; and the end time point of the third time interval is the end time point of the target time interval, and the third time interval is a part of the target time interval except the second time interval.

4. The method of claim 1, wherein the AP calculating a first amount of data that the first application is available for a first duration comprises:

determining the current data caching speed according to the network quality;

5. The method according to claim 1 or 3, wherein the duration of the first time period and/or the third time interval is associated with at least one of:

a temperature of the electronic device;

a current network quality of the electronic device;

a category of the first application.

6. A sleep control device for a Baseband Processor (BP) applied to an Application Processor (AP), comprising:

the calculation module is used for calculating a first data volume which can be obtained by a first application in a first duration under the condition that a cache mechanism exists in the first application currently running; the first duration is the duration of a first time interval, and the baseband processor BP corresponding to the first application is in an operating state in the first time interval;

a setting module, configured to set a BP corresponding to the first application to a dormant state in a second time interval according to the first data amount;

7. The apparatus of claim 6, wherein the setup module is further configured to:

8. The apparatus of claim 7, further comprising:

9. The apparatus of claim 6, wherein the computing module is further configured to:

determining the current data caching speed according to the network quality;

10. The apparatus according to claim 6 or 8, wherein the duration of the first time period and/or the third time interval is associated with at least one of:

a temperature of the electronic device;

a current network quality of the electronic device;

a category of the first application.