CN115201735A - Loop iteration calibration method and test equipment using same - Google Patents

Loop iteration calibration method and test equipment using same Download PDF

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Publication number
CN115201735A
CN115201735A CN202110379301.XA CN202110379301A CN115201735A CN 115201735 A CN115201735 A CN 115201735A CN 202110379301 A CN202110379301 A CN 202110379301A CN 115201735 A CN115201735 A CN 115201735A
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gradient algorithm
input power
workstation
good cell
average value
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徐韡
王贺春
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Advantest Corp
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Advantest Corp
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Priority to CN202110379301.XA priority Critical patent/CN115201735A/en
Priority to PCT/CN2022/084406 priority patent/WO2022213877A1/en
Publication of CN115201735A publication Critical patent/CN115201735A/en
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R35/00Testing or calibrating of apparatus covered by the other groups of this subclass
    • G01R35/005Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2832Specific tests of electronic circuits not provided for elsewhere
    • G01R31/2834Automated test systems [ATE]; using microprocessors or computers
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R35/00Testing or calibrating of apparatus covered by the other groups of this subclass

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  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

A loop iteration calibration method and a test device using the same are provided. The loop iteration calibration method comprises the following steps: an internal circulation step and an external circulation step. The internal circulation step comprises: according to the target power and the output power, adjusting the input power of the first known good unit through a first gradient algorithm, and then adjusting the input power through a second gradient algorithm, wherein the step length of the first gradient algorithm is larger than that of the second gradient algorithm; and taking a first average value for the input power adjusted by the second gradient algorithm. The external circulation step comprises: performing an inner loop step with the second known good cell to obtain a second average value of the second known good cell; and averaging the first average value and the second average value to obtain a final average value, and calibrating the test equipment according to the final average value. The method has the advantages of reducing the test times, improving the calibration efficiency, and reducing the working performance difference among a plurality of known good units or the error generated by the random error of a single known good unit.

Description

Loop iteration calibration method and test equipment using same
Technical Field
The present invention relates to a related technology of chip unit testing, and more particularly, to a loop iteration calibration method and a testing apparatus using the same.
Background
In the production process of the chip units, the chip units meeting the specification need to be screened out through test equipment. However, the test equipment usually generates errors due to slight environmental differences caused by interface load boards (interface boards), test cards (test cards), hardware aging, or temperature, and so on, and therefore, it is necessary to calibrate the test equipment using Known Good Units (KGUs) that have been tested and meet the specifications, and then perform the test screening of the chip units.
In a Power Amplifier (PA) of a communication chip unit, when power is located at a cross point of a saturation region and a linear region, linearity is greatly changed, and therefore, calibration or test is not easy. In addition, the performance (performance) may not be exactly the same across multiple known good cells, even a single known good cell may have random error. Moreover, excessive input power or too long time during testing or calibration may increase the temperature of the chip, resulting in variations in operating performance. There is a need in the art for calibration and testing that is inefficient and risky to produce.
Disclosure of Invention
An objective of the present invention is to provide a loop iteration calibration method and a test apparatus using the same, which can effectively improve the calibration efficiency.
The embodiment of the invention provides a loop iteration calibration method and test equipment using the same. The interface carrier is provided with known good units. The workstation is used to execute a computer program to perform a loop iteration calibration method. The loop iteration calibration method comprises an inner loop step and an outer loop step. The internal circulation step comprises: applying input power to the first known good cell via the workstation and the test card, and measuring an output power of the first known good cell; the workstation adjusts the input power through a first gradient algorithm according to the target power and the output power, and then adjusts the input power through a second gradient algorithm, wherein the step length of the first gradient algorithm is larger than that of the second gradient algorithm; and the workstation taking a first average of the input power adjusted by the second gradient algorithm. An external circulation step comprising: performing an inner loop step with a second known good cell to obtain a second average value of the second known good cell; and averaging the first average value and the second average value by the workstation to obtain a final average value, and calibrating according to the final average value.
In an embodiment of the present invention, the inner loop step further includes: when the input power is not applied, the operating voltages of the first known good cell and the second known good cell are maintained by the test card, and the amplifier modules in the first known good cell and the second known good cell are turned off.
In an embodiment of the present invention, the first gradient algorithm is an accelerated gradient algorithm, and the second gradient algorithm is a fixed gradient algorithm.
In an embodiment of the present invention, in the inner loop step, the workstation adjusts the input power by the first gradient algorithm for no more than 3 times according to the target power.
In an embodiment of the present invention, in the inner loop step, the workstation takes a first average value and a second average value for the input power adjusted by the second gradient algorithm for a predetermined number of times.
According to the embodiment of the invention, the first gradient algorithm is adopted to adjust the input power applied to the known good unit, and then the second gradient algorithm is adopted to adjust the input power, so that the step length of the first gradient algorithm is larger than that of the second gradient algorithm, the target input power can be rapidly approached, the test times are reduced, and the test efficiency is improved. In addition, the embodiment of the invention adopts a mode of averaging the input power, so that the working performance difference among a plurality of known good units or the error generated by the random error of a single known good unit can be reduced.
The foregoing description is only an overview of the technical solutions of the present invention, and in order to make the technical means of the present invention more clearly understood, the present invention may be implemented in accordance with the content of the description, and in order to make the above and other objects, features, and advantages of the present invention more clearly understood, the following preferred embodiments are specifically described below with reference to the accompanying drawings.
Drawings
Fig. 1 is a schematic diagram of a testing apparatus according to an embodiment of the present invention.
Fig. 2 is a schematic flowchart of a loop iteration calibration method according to an embodiment of the present invention.
Fig. 3 is a schematic diagram of the measured values of the power consumption current in the loop iteration calibration method according to the embodiment of the present invention.
Fig. 4 is a schematic diagram of output power versus input power in the iterative calibration method provided in the embodiment of the present invention.
Fig. 5 is a waveform diagram of the power consumption current in the loop iteration calibration method according to the embodiment of the present invention.
Detailed Description
Fig. 1 is a schematic diagram of a testing apparatus according to an embodiment of the present invention. In this embodiment, the test equipment 10, which may also be referred to as a tester (tester), includes an interface carrier 101, a test head 102 (tester header), and a workstation 103. The test head 102 of the test apparatus 10 may have a variety of test cards, such as, but not limited to, device power supply test card 1021 (device power supply card), radio frequency test card 1022 (RF card), and digital control test card 1023 (digital card), each for a different test task. The test head 102 is electrically connected to a Device Under Test (DUT) through the interface carrier 101, for example, the wiring of the interface carrier 101 electrically connects the probes of the test card and the pins of the DUT to transmit the resources of the test equipment 10, such as current, voltage, frequency, etc., to the DUT. When performing calibration on the test apparatus 10, a known good unit KGU, which is, for example, a chip unit tested in a laboratory and passing a specification, or the like, is used as a device under test. In fig. 1, 4 known good units KGUs are taken as an example, but not limited thereto. The workstation 103 is, for example, a computer using a Window or Linux system, having a memory, a processor, a display card, a screen, a human-machine interface, etc., and the processor executes a computer program stored in the memory to perform the loop iteration calibration method, but is not limited thereto. In addition, it is necessary to supplement that the original known good units KGU are usually small in number and cannot support the requirement of mass production of Automatic Test Equipment (ATE) (usually, the number of known good units KGU provided by the customer is less than 10 pcs). As volume production starts, the number of these original known good units KGUs cannot support the calibration requirements of multiple test stations (testers), and also the loss of the known good units KGUs during normal volume production needs to be considered. Therefore, it is necessary to expand/collect the original small number of known good units KGUs into a certain number of known good units KGUs suitable for mass production in a mass production environment while ensuring that the original known good units KGU characteristics/data are not shifted. Therefore, a high-consistency KGU expanding/collecting method is needed, which comprises step 1. Before mass production is released formally, a certain position (site) of a certain carrier plate (LB) needs to be determined as a reference (the corresponding position of the carrier plate should be confirmed in a laboratory without any problem and be agreed with customers) and all the subsequent steps will use the position; step 2, testing an original known good unit KGU by using the loop iteration correction method defined by the invention; step 3, obtaining a compensation value through the loop iteration correction method defined by the invention and using the compensation value in a program; step 4, testing 500-1000 pcs mass production chip units in advance to obtain the overall characteristics of the current lot; step 5, tightening a limit value (limit) of the current program according to the lot integral characteristic obtained in the step 4 by using a script or other tools; and step 6, the whole lot is tested again, and the known good unit KGU with higher consistency is obtained. In step 5 (tightening the limit range), it is reasonably set according to the number of the key test items to be compared, for example, after the lot characteristics obtained in step 4 are obtained (maximum/minimum Max/Min in each test item of 500-1000 pcs), the new limit range is tightened by 50%, if there are 20 key test items to be compared, the number of the last good units KGU may be greatly reduced (since the current lot average characteristic is known before, it is not an exponential decrease, but may be greatly reduced). In step 6 (final KGU throughput), the new limit setting in step 5 affects the result (how many test items need to tighten the limit and how tight the limit needs to be tightened), and the KGU final throughput is recommended to be kept below 10% by adjusting the setting appropriately. If the final output of KGU is too high, the amount of KGU in the formal mass production correction procedure needs to be increased to eliminate the error caused by the insufficient consistency of KGU. Of course, the above combination is not fixed, and some experiments are required to balance the relationship between KGU yield and KGU uniformity at the beginning of mass production.
Fig. 2 is a schematic flowchart of a loop iteration calibration method according to an embodiment of the present invention. Fig. 3 is a schematic diagram of the measured values of the power consumption current in the loop iteration calibration method according to the embodiment of the present invention. Please refer to fig. 2 and fig. 3 together. In this embodiment, as shown in fig. 2, the loop iteration calibration method performed by the test apparatus 10 includes an inner loop step S10 and an outer loop step S20. The calibration records CL1, CL2 and CL3 of the three inner loop step S10 are shown in fig. 3, the horizontal axis represents the number of measurements for each known good cell KGU; the vertical axis represents the difference between the measured power consumption current value and the target power consumption current value of the known good cell KGU, hereinafter referred to as ICC delta, and the unit is milliampere (mA). In this embodiment, the target value of the consumption current of the known good unit KGU is used as a reference of the target power to calibrate the input power of the test equipment 10 to the known good unit KGU. As can be seen from fig. 3, as the number of times of adjustment of the input power increases, the ICC delta gradually decreases. The present invention is not limited thereto and the test equipment 10 may be calibrated according to the voltage of the known good cell KGU or a reference that refers to the voltage, current or a combination thereof of different circuit nodes as the target power.
Fig. 4 is a schematic diagram of output power versus input power in the iterative calibration method provided in the embodiment of the present invention. Referring to fig. 3 and 4 together, it can be seen in the calibration record CL3 shown in fig. 3 that after the 4 th measurement, the ICC delta oscillates around plus or minus 20mA, because the known good unit KGU operates in a non-linear region (as shown in fig. 4, around the point P2) under the condition of inputting higher power to the known good unit KGU. Compared to operating in the linear region (as shown in fig. 4, near the point P1), the power consumption current of the known good cell KGU operating in the non-linear region is sensitive and unstable, and even a slight change in the input power may have a large influence on the power consumption current of the known good cell KGU.
Please continue to refer to fig. 2. In this embodiment, the inner loop step S10 includes steps S101 to S107. Next, step S101 to step S107 will be described.
The count value of the number of measurements is incremented by 1 (step S101).
An input power is applied to the known good unit KGU through the workstation 103 and the test head 102, and an output power of the known good unit KGU is measured (step S103).
When the number of times of adjusting the input power (for example, the number of times of measuring the count value minus 1 or the number of times of additionally recording the adjustment of the input power) is not more than 3 times, the workstation 103 adjusts the input power by the first gradient algorithm according to the target power and the output power; when the number of times of adjusting the input power is more than 3 times, the workstation 103 adjusts the input power through the second gradient algorithm according to the target power and the output power, wherein the step size of the first gradient algorithm is larger than that of the second gradient algorithm (step S105). In detail, as shown in fig. 3, the ICC delta is larger at the 1 st to 4 th measurements, that is, during the previous times of input power adjustment, since the fluctuation of the output power occupies a smaller portion of the ICC delta, the direction of adjusting the input power is expected to be unchanged at the previous times, that is, the input power needs to be increased or decreased at the previous times. Therefore, the input power is adjusted by the first gradient algorithm with a larger step size, which is a parameter used to determine the update amount of the current input power and the next input power, such as step size or learning rate. Next, as shown in fig. 3, in the 5 th and subsequent measurements, the ICC delta is small, and the fluctuation of the output power starts to occupy the main portion of the ICC delta, so that the input power is adjusted by the second gradient algorithm with a small step size. The first Gradient algorithm and the second Gradient algorithm are, for example, an Accelerated Gradient algorithm, such as a new acceptable Gradient algorithm, and a step size (learning rate) used by the first Gradient algorithm is greater than a step size (learning rate) used by the second Gradient algorithm; alternatively, the first gradient algorithm and the second gradient algorithm are, for example, fixed gradient algorithms, wherein the second gradient algorithm adjusts the input power with a step size (learning rate) of 0.15dBm, while the first gradient algorithm uses a step size larger than 0.15dBm, for example twice as large as the second gradient algorithm; alternatively, the first gradient algorithm and the second gradient algorithm may be a combination of the above algorithms, for example, the first gradient algorithm is an accelerating gradient algorithm, and the second gradient algorithm is a fixed gradient algorithm, but not limited thereto. In short, to converge quickly, a search of a large step size is performed in the previous loop iterations, and the next search is set up by the slope of this time and the last result, it is expected that the known good unit KGU should still operate in the linear region and not be affected too much by the temperature from the beginning. While a search of smaller step size is performed after a search of larger step size (typically 3 steps are required), this is done for two reasons: a. multiple searches may cause a significant increase in the heat/temperature of the known-good-unit KGU, which may lead to a degradation in the performance of the known-good-unit KGU, and the search may no longer be suitable beyond expectation; b. the close target is usually at the boundary of the linear and saturated regions, so that the yield is too low and the adjustment is not a suitable part of the edge cell. If the search is incorrect, oscillation may occur and convergence may never occur even if the calibration time is increased. Thus, by combining them to perform faster, more stable/repeatable calibrations.
Returning to the step S101 when the count value of the number of times of measurement is less than 20 times; when the measurement number count value is equal to 20 times, the workstation 103 returns the measurement number count value to zero, and screens and averages the input power adjusted a predetermined number of times by the second gradient algorithm (step S107). For example, taking 20mA as the condition for the filtering, and taking 10 times as an example of the predetermined times, in the calibration records CL1 and CL2 shown in fig. 3, the ICC delta adjusted 10 times later is between 20mA, so that all the input powers adjusted 10 times later are used to take the average value; in the calibration record CL3, the ICC delta measured at the 17 th time is greater than 20mA, so that the 17 th input power is screened out of all the input powers adjusted 10 times later and is not used, and the rest of the input powers are used for averaging. In other embodiments, the step S101 may be returned to when the count value of the number of measurements is different, for example, preferably more than 10 times to reduce the error, but is not limited thereto.
Therefore, although it is known that the good unit KGU may be in different working intervals during calibration, and the output power curves of different patterns are shown as the calibration records CL1 to CL3 in fig. 3, the inner loop step S10 provided in this embodiment enables the output power curves of different patterns to be applicable by taking an average value, so as to reduce the need for manual operation, and have good versatility.
Please continue to refer to fig. 2. In this embodiment, the outer loop step S20 includes the following steps: performing the inner loop step S10 on each known good unit KGU to obtain an average value of the input power of each known good unit KGU (step S201); and screening the average value of the input power of each known good unit KGU, taking the final average value, and calibrating according to the final average value (step S203). In detail, after obtaining a plurality of average values of the input power of all known good units KGU, the extreme values or the unqualified values of the plurality of average values are selected and not used, and the rest average values are taken as the final average value.
For example, if 10 known good units KGU are used for the loop iteration calibration method, the outer loop step S20 includes: performing the inner loop step S10 on the first known good unit KGU to obtain a first average value of the input power of the first known good unit KGU; then, the inner loop step S10 is performed on the second known good unit KGU to obtain a second average value of the input power of the second known good unit KGU; and so on until a tenth average of the input power of the tenth known good unit KGU is obtained. And then screening the extreme values with larger difference or the average values which do not meet the conditions from the first average value to the tenth average value to be not used, and taking the rest average values as the final average value. Finally, the workstation 103 is calibrated according to the final average value. In other embodiments, more than 10 known good units KGUs may be used, such as 20 or more.
Fig. 5 is a waveform diagram of the power consumption current in the loop iteration calibration method according to the embodiment of the present invention. During the inner loop step S10 for the known good unit KGU, the step S103 is performed a plurality of times, that is, the known good unit KGU is inputted with power (e.g., waveform 4) and output power (e.g., current consumption, such as waveforms 1 to 3) is measured a plurality of times. In the time interval from the end of the input power to the known good unit KGU and the measurement of the output power to the next input power, for example, between the time T2 and T3 or between the time T4 and T5 shown in the waveform 3, the known good unit KGU still has a normal operating power consumption current, and such a power consumption current also causes the known good unit KGU to heat up. Therefore, in the embodiment, as shown in the waveform 1, the operating voltage VCC of the known-good unit KGU is further maintained by the device power test card 1021, and a signal is sent to the control module of the known-good unit KGU by the digital control test card 1023, so as to turn off the amplifier module in the known-good unit KGU after the end of the output power measurement until the next input power, thereby avoiding the test error caused by adjusting the operating voltage and reducing the temperature rise of the amplifier module to change the operating characteristics. The above-mentioned manner of turning off the amplifier modules in the known good unit KGU is not limited thereto, and the amplifier modules in the known good unit KGU may be turned off from the outside through the interface carrier 101, the test head 102, or the like. In addition, the amplifier module in the known good unit KGU does not need to be turned off every time the input power is ended, and may be selectively turned off only after a certain number of times of the input power is ended, for example, the waveform 1 shown in fig. 5, where the input power is turned off every two times. In other embodiments, the power control may be turned off when the input power is adjusted using the first gradient algorithm and not turned off when the input power is adjusted using the second gradient algorithm. In other embodiments, when the power input to the known-good-unit KGU is not available, the waveform 2 shown in fig. 5 may be used to turn off or lower the power VCC supplied to the known-good-unit KGU by the device power test card 1021 to reduce the temperature rise.
It should be noted that in other embodiments, different numbers of times the input power is adjusted may be used as a basis for the switching algorithm. For example, the number of times the input power is adjusted using the first gradient algorithm may also be less than 3 times or greater than 3 times. Further, the step size of the first gradient algorithm or the second gradient algorithm may be adjusted. For example, the number of times the input power is adjusted using the first gradient algorithm is decreased and the step size is increased, or the number of times the input power is adjusted using the first gradient algorithm is increased and the step size is decreased. Alternatively, the number of times may not be used as the basis of the switching algorithm, and for example, when the measured output power approaches the target value within a range (for example, when icc delta is less than 40mA as shown in fig. 3) at step S105, the next adjustment is switched to the adjustment of the input power using the second gradient algorithm. It should be noted that the basis of the above-mentioned switched gradient algorithm, the step size used by the gradient algorithm, the predetermined number of times the average is used, may be adjusted by the workstation 103 according to the measured results or the actual requirements, for example by modifying the parameters used by the computer program or adapting the computer program.
In summary, the embodiment of the invention adopts the first gradient algorithm to adjust the input power applied to the known good cells, and then adjusts the input power through the second gradient algorithm, because the step length of the first gradient algorithm is larger than that of the second gradient algorithm, the target input power can be rapidly approached to reduce the test times, and the test efficiency is improved. In addition, the embodiment of the invention adopts a mode of averaging a plurality of input powers adjusted by the second gradient algorithm with smaller step size for a single known good unit, so that the fluctuation generated when the known good unit works in a nonlinear interval can be avoided. In addition, the embodiment of the invention adopts a mode of averaging the input power of each known good unit and then taking the final average value, thereby reducing the working performance difference among a plurality of known good units or the error generated by the random error of a single known good unit.
Although the present invention has been described with reference to the preferred embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the present invention.

Claims (10)

1. A test device using a loop iteration calibration method, the test device comprising an interface carrier, a test card, and a workstation, the interface carrier having known good cells thereon, the workstation being configured to execute a computer program to perform the loop iteration calibration method, the loop iteration calibration method comprising:
an internal circulation step, comprising:
applying input power to a first known-good cell through the workstation and the test card, and measuring output power of the first known-good cell;
the workstation adjusts the input power through a first gradient algorithm according to the target power and the output power, and then adjusts the input power through a second gradient algorithm, wherein the step length of the first gradient algorithm is larger than that of the second gradient algorithm; and
the workstation taking a first average of the input power adjusted by the second gradient algorithm; and
an external circulation step comprising:
performing the inner loop step with a second known good cell to obtain a second average of the second known good cell; and
and the workstation averages the first average value and the second average value to obtain a final average value, and carries out calibration according to the final average value.
2. The test apparatus of claim 1, wherein the inner loop step further comprises: when the input power is not applied, maintaining, by the test card, operating voltages of the first known-good cell and the second known-good cell, and turning off amplifier modules in the first known-good cell and the second known-good cell.
3. The test apparatus of claim 1, wherein the first gradient algorithm is an accelerated gradient algorithm and the second gradient algorithm is a fixed gradient algorithm.
4. The test apparatus of claim 1, wherein in the inner loop step, the workstation adjusts the input power by the first gradient algorithm no more than 3 times according to the target power.
5. The test apparatus of claim 1, wherein in the inner loop step, the workstation takes the first average and the second average for the input power adjusted a predetermined number of times by the second gradient algorithm.
6. A loop iteration calibration method is applicable to test equipment and is characterized by comprising an interface carrier plate, a test card and a workstation, wherein a known good unit is arranged on the interface carrier plate, the workstation is used for executing a computer program to carry out the loop iteration calibration method, and the loop iteration calibration method comprises the following steps:
an internal circulation step, comprising:
applying input power to a first known-good cell through the workstation and the test card, and measuring output power of the first known-good cell;
the workstation adjusts the input power through a first gradient algorithm according to the target power and the output power, and then adjusts the input power through a second gradient algorithm, wherein the step length of the first gradient algorithm is larger than that of the second gradient algorithm; and
the workstation taking a first average of the input power adjusted by the second gradient algorithm; and
an outer loop step, comprising:
performing the inner loop step with a second known good cell to obtain a second average of the second known good cell; and
and the workstation averages the first average value and the second average value to obtain a final average value, and carries out calibration according to the final average value.
7. The iterative calibration method of claim 6, wherein said inner loop step further comprises: when the input power is not applied, maintaining, by the test card, operating voltages of the first known-good cell and the second known-good cell, and turning off amplifier modules in the first known-good cell and the second known-good cell.
8. The iterative calibration method of claim 6, wherein said first gradient algorithm is an accelerated gradient algorithm and said second gradient algorithm is a fixed gradient algorithm.
9. The iterative calibration method of claim 6, wherein said workstation adjusts said input power by said first gradient algorithm no more than 3 times based on said target power in said inner loop step.
10. The iterative calibration method of claim 6, wherein in said inner loop step, said workstation takes said first average and said second average for said input power adjusted a predetermined number of times by said second gradient algorithm.
CN202110379301.XA 2021-04-08 2021-04-08 Loop iteration calibration method and test equipment using same Pending CN115201735A (en)

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US10345418B2 (en) * 2015-11-20 2019-07-09 Teradyne, Inc. Calibration device for automatic test equipment
CN111308315A (en) * 2019-12-04 2020-06-19 南京派格测控科技有限公司 P1dB measurement method of radio frequency power amplifier chip
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