CN115172200A - Method for testing annealing process effect of semiconductor device - Google Patents
Method for testing annealing process effect of semiconductor device Download PDFInfo
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- CN115172200A CN115172200A CN202210844559.7A CN202210844559A CN115172200A CN 115172200 A CN115172200 A CN 115172200A CN 202210844559 A CN202210844559 A CN 202210844559A CN 115172200 A CN115172200 A CN 115172200A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
- H01L22/26—Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
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- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The invention discloses a method for testing the annealing process effect of a semiconductor device, and belongs to the technical field of ohmic contact annealing of semiconductor devices. The method comprises the following steps: arranging a layer of metal film on the front surface of the bare wafer; splitting the wafer covered with the metal film along the horizontal direction and the vertical direction to obtain an experimental sheet without the metal film on the side surface; annealing the test piece, and observing the metal surface appearance and color change of the test piece; and testing the current-voltage characteristics of the front surface and the back surface of the experimental piece, and determining an annealing process window required by forming ohmic contact according to the current-voltage characteristics. The method does not require any patterning means and does not require coordination of other processes such as ion implantation activation. The testing method does not need any photoetching, etching, metal thickening and other processes, and compared with the traditional testing process for solving the ohmic contact characterization, the method can quickly and accurately determine the annealing process effect of the semiconductor device.
Description
Technical Field
The invention belongs to the technical field of ohmic contact annealing of semiconductor devices, and particularly relates to a method for testing the annealing process effect of a semiconductor device.
Background
The ohmic contact technology is one of the important process technologies in the semiconductor field, and the ohmic contact technology can be used for forming good ohmic contact between metal and a semiconductor material, so that the resistance and the power consumption of a device are reduced. The most common means for achieving good ohmic contact is thermal annealing, i.e. after the metal/semiconductor structure is formed, the sample wafer is thermally annealed, when the metal/semiconductor interface reaches the reaction temperature, the metal/semiconductor interface and the sample wafer are subjected to an extended reaction to form an alloy, and the ohmic contact can be formed.
A commonly used means for testing and characterizing the ohmic contact effect is to form a patterned metal Line, most typically a Charge transfer Line Model (Charge transfer Line Model), by using photolithography, etching, metal thickening and other processes after a thermal annealing process, then perform an IV test, and analyze the ohmic contact effect according to the test result. The testing and characterizing method has relatively complex flow, needs other processing technology to be matched and has relatively long period; in addition, the thickness of the alloy layer required for forming the ohmic contact is thinner and thinner at present, and reaches the nanometer scale, if the traditional testing process is still used for testing, the pollution and damage of the ultrathin alloy layer are easily caused, so that the testing accuracy is influenced. On the other hand, the integrated circuit industry pursues efficiency, it is very important to complete process development, test characterization and establish a process window quickly, and the traditional ohmic contact test procedure consumes a long time and is not beneficial to efficiency improvement.
In order to solve the above problems, the present invention provides a simple method for accurately and rapidly determining the annealing process effect of a semiconductor device.
Disclosure of Invention
The invention aims to: in order to solve the problems of relatively complex and relatively long time consuming of the traditional ohmic contact characterization test process, a simple method for accurately and quickly determining the annealing process effect of a semiconductor device is provided, the whole test process does not need any photoetching, etching, metal thickening and other processes, and the confirmation of the annealing process window required by ohmic contact formation can be completed only by using a non-patterned substrate.
The invention is realized by the following technical scheme:
in a first aspect, the present invention provides a method for testing the annealing process effect of a semiconductor device, which includes:
arranging a layer of metal film on the front surface of the bare wafer;
splitting the wafer covered with the metal film along the horizontal direction and the vertical direction to obtain an experimental sheet of which the side surface is not covered with the metal film;
annealing the experimental sheet, observing the metal surface appearance and color change of the experimental sheet, testing the current-voltage characteristics of the front surface and the back surface of the experimental sheet, and determining an annealing process window required by ohmic contact according to the current-voltage characteristics.
Further, in a preferred embodiment of the present invention, the method for disposing the metal film on the front surface of the wafer includes thermal evaporation, electron beam evaporation or magnetron sputtering.
Further, in a preferred embodiment of the present invention, the metal film covers the front surface of the wafer entirely, and the thickness of the metal film is 50 to 150nm.
Further, in a preferred embodiment of the present invention, the annealing process includes processing the test piece using a thermal annealing process or a laser annealing process.
Further, in a preferred embodiment of the present invention, the test piece is treated with a thermal annealing process:
when the annealing temperature is lower than the lower limit of an annealing process window required for forming ohmic contact, the metal and the silicon cannot form ohmic contact, and the current-voltage characteristic shows an insulator characteristic;
when the annealing temperature is in an annealing process window required by forming ohmic contact, metal and silicon form ohmic contact, and the current-voltage characteristic shows a Schottky characteristic;
when the annealing temperature is higher than the upper limit of the annealing process window required for forming ohmic contact, the metal and the silicon are in a transition alloy state, and the current-voltage characteristic shows an insulator characteristic.
Further, in a preferred embodiment of the present invention, the test piece is processed using a laser annealing process:
when the laser energy density is less than the lower limit of an annealing process window required for forming ohmic contact, metal and silicon cannot form ohmic contact, and the current-voltage characteristic is represented by the characteristic of an insulator;
when the light energy density is positioned in an annealing process window required for forming ohmic contact, metal and silicon form ohmic contact, and the current-voltage characteristic shows a Schottky characteristic;
when the light energy density is larger than the upper limit of the annealing process window required for forming ohmic contact, the metal and the silicon are in a transition alloy state, and the current-voltage characteristic is represented by an insulator characteristic.
Further, in a preferred embodiment of the present invention, the metal in the metal thin film includes at least one of Al, ti, ni and Cr.
Further, in a preferred embodiment of the present invention, the bare wafer is made of semiconductor materials including silicon, germanium, gallium arsenide, indium phosphide, silicon carbide, and gallium nitride.
Compared with the prior art, the invention at least has the following technical effects:
the traditional method for determining the effect of the ohmic contact annealing process needs to prepare a device by using graphical means such as photoetching, etching and the like, and then tests the electrical characteristics of the device, so that the time consumption is long, the process is relatively complex, and the cost is relatively high. The method for testing the annealing process effect of the semiconductor device does not need any graphical means and other processes such as ion implantation activation and the like. The method is based on a bare wafer, the front surface of the wafer is completely covered with metal by an evaporation or sputtering method, then the side wall of the sample wafer is insulated by manual splitting, then an annealing alloy process is carried out, and then the current-voltage characteristic between the front surface and the back surface of the sample wafer is tested. And determining the process window required for forming good ohmic contact accurately and rapidly according to the test result.
Drawings
FIG. 1 is a process flow diagram of a method for testing the effect of an annealing process of a semiconductor device according to the present invention;
FIG. 2 is a graphical representation of the effects of various alloys of the present invention and the corresponding IV characteristics;
FIG. 3 is a diagram showing the deposition of a metal thin film in example 1;
FIG. 4 is a schematic view showing a wafer breaking process in example 1;
FIG. 5 is a schematic diagram showing the alloying effect when the thickness of the metal film is small in example 1;
FIG. 6 is a schematic diagram showing the alloying effect when the thickness of the metal film is larger in example 1;
fig. 7 shows the results of actual measurement of current-voltage characteristics under different laser annealing conditions in example 1.
Detailed Description
Embodiments of the present invention will be described in detail with reference to the following examples, but it will be understood by those skilled in the art that the following examples are merely illustrative of the present invention and should not be construed as limiting the scope of the present invention, and that the specific conditions not specified in the examples are conducted under conventional conditions or conditions suggested by the manufacturer, and that reagents or equipment not specified by the manufacturer are all conventional products which can be obtained by commercial purchase.
The technical scheme of the invention is as follows:
the present embodiment provides a method for testing annealing process effect of a semiconductor device, and a flowchart is shown in fig. 1, in which 101 is a bare wafer; 102 is a metal film; 103 is an alloy layer.
The test method comprises the following steps:
step S1: arranging a layer of metal film on the front surface of the bare wafer;
bare wafers without patterning, such as wafers made of semiconductor materials such as silicon, germanium, gallium arsenide, indium phosphide, silicon carbide, and gallium nitride, are used.
And arranging a metal film on the front surface of the bare wafer, wherein the metal can form alloy with silicon to realize ohmic contact in the subsequent thermal annealing process. The metal in the metal film comprises Al, ti, ni and Cr metals, and the adhesion of the metals and silicon is good. Preferably, two semiconductor and metal systems of Al-Si and Ni-Si are used.
Furthermore, a metal film is covered on the front surface of the bare wafer by using methods such as thermal evaporation, electron beam evaporation or magnetron sputtering. Preferably, the metal thin film is prepared using a magnetron sputtering method.
Further, the front surface of the wafer is covered with a metal film, the thickness of the metal film is 50-150 nm, and preferably, the thickness of the metal film is 80-120 nm.
Step S2: splitting the wafer covered with the metal film along the horizontal direction and the vertical direction to obtain an experimental sheet without the metal film on the side surface;
due to the characteristics of the metal preparation method, the side surface of the wafer can also be covered by the metal film, and if the wafer is directly used without treatment, incorrect test results can be caused. When the wafer covered with the metal film is split in the horizontal and vertical directions, a sample wafer with four split side surfaces is used as an experimental wafer, the four side surfaces of the experimental wafer are not covered by the metal film, and the transmission of current through the metal on the side surfaces is cut off.
And step S3: annealing the test piece, and observing the metal surface appearance and color change of the test piece; and testing the current-voltage characteristics of the front surface and the back surface of the experimental piece, and determining an annealing process window required by forming ohmic contact according to the current-voltage characteristics.
And (4) microscopic observation: and observing the surface appearance and color change of the annealed metal by using a microscope, wherein when the metal is thin (generally less than 100 nm), the whole metal film participates in the alloying process after annealing, and the color of the metal area is obviously changed. Whether the alloy is generated and the alloy effect can be judged by observing through a microscope. When the metal thickness is thicker (generally greater than 100 nm), in a proper annealing process window, only the metal with a certain thickness above the metal/silicon interface participates in the alloying process, the rest of the metal does not participate in the alloying process, and the metal area has no obvious color change, so that whether the alloy occurs or not can not be judged through microscope observation.
The annealing process includes treating the test piece using a thermal annealing process or a laser annealing process.
Wherein, the thermal annealing process comprises the following steps: cleaning the surface of a silicon wafer, removing an oxide layer on the surface of the silicon wafer by using a fluorine-based solution, then manufacturing a layer of Al with the thickness of 50-150 nm on the surface of the silicon by using an evaporation or sputtering process, heating the silicon to the temperature of more than 300 ℃ in a thermal annealing furnace, wherein the treatment time is more than 30 seconds, and the treatment process can be in a vacuum state or can be filled with protective gases such as nitrogen, inert gas and the like.
The experimental piece is processed by a thermal annealing process:
when the annealing temperature is lower than the lower limit of an annealing process window required for forming ohmic contact, the metal and the silicon cannot form ohmic contact, and the current-voltage characteristic is represented by an insulator characteristic;
when the annealing temperature is in an annealing process window required by forming ohmic contact, metal and silicon form ohmic contact, and the current-voltage characteristic shows a Schottky characteristic;
when the annealing temperature is higher than the upper limit of the annealing process window required for forming ohmic contact, the metal and the silicon are in a transition alloy state, and the current-voltage characteristic is represented by an insulator characteristic.
The laser annealing process comprises the following steps: cleaning the surface of a silicon wafer, removing an oxide layer on the surface of the silicon wafer by using a fluorine-based solution, then manufacturing a layer of Al with the thickness of 50-150 nm on the surface of the silicon by using an evaporation or sputtering process, placing the manufactured Al silicon wafer in a vacuum chamber with a transparent window, or enabling a laser head to have a nitrogen or inert gas purging function, then irradiating a flat-top laser spot with certain energy to the surface of the Al, wherein the energy density is 0.1J/cm 2 Starting at 0.1J/cm 2 The energy interval is sequentially increased to carry out laser spot irradiation of a series of energy densities so as to find out the optimal energy density.
The experimental piece is processed by using the laser annealing process, and the IV characteristics corresponding to different alloy effects are shown in figure 2:
when the laser energy density is less than the lower limit of an annealing process window required for forming ohmic contact, metal and silicon cannot form ohmic contact, and the current-voltage characteristic shows an insulator characteristic;
when the light energy density is positioned in an annealing process window required by ohmic contact, metal and silicon form ohmic contact, and the current-voltage characteristic shows a Schottky characteristic;
when the light energy density is larger than the upper limit of the annealing process window required for forming ohmic contact, the metal and the silicon are in a transition alloy state, and the current-voltage characteristic is represented by an insulator characteristic.
The following describes the embodiments of the present invention in detail. It should be understood that the detailed description and specific examples, while indicating the preferred embodiment of the invention, are given by way of illustration and explanation only, not limitation.
Example 1
The embodiment provides a method for testing the annealing process effect of a semiconductor device, which comprises the following steps:
(1) Silicon wafers were used as bare wafers.
(2) Preparing a metal film: as shown in fig. 3, a layer of 100nm metal film is coated on the front surface of the bare wafer by magnetron sputtering, wherein the metal used is Al.
(3) Splitting: as shown in fig. 4, the wafer covered with the metal thin film was split in the horizontal and vertical directions, and a sample wafer having four split side surfaces was used as a test piece.
(4) The annealing treatment process comprises the following steps: and (3) carrying out laser annealing process treatment on the experimental piece, specifically, placing the experimental piece on a processing moving platform, and adopting vacuum adsorption. Then from 0.1J/cm 2 Starting at 0.1J/cm 2 The energy interval is sequentially increased to carry out laser spot irradiation of a series of energy densities so as to find out the optimal energy density. In the process, nitrogen is used for continuously blowing the surface of the wafer, and a local oxygen-free environment is formed in a spot irradiation area on the surface of the wafer, so that the metal surface is prevented from being oxidized under laser irradiation.
(5) And (4) microscopic observation: and observing the surface appearance and color change of the annealed metal by using a microscope, wherein when the metal is thin (generally less than 100 nm), the whole metal film participates in the alloying process after annealing, and the color of the metal region is obviously changed (as shown in figure 5). Whether the alloy is generated and the effect of the alloy can be judged by observing through a microscope. When the metal thickness is thicker (generally greater than 100 nm), in a suitable annealing process window, only the metal with a certain thickness above the metal/silicon interface participates in the alloying process, the rest of the metal does not participate in the alloying process, and the metal area has no obvious color change (as shown in fig. 6), and at this time, whether the alloy occurs or not can not be judged through microscope observation.
(6) And (3) current and voltage testing: the current-voltage characteristics of the front and back sides of the coupons were tested using a probe station. When the annealing temperature does not reach the threshold for forming the ohmic contact alloy, the ohmic contact alloy cannot be formed, and the current-voltage characteristic between the front and back surfaces of the sample wafer shows an insulator characteristic. When the annealing condition is greater than the threshold for forming the ohmic contact alloy, the ohmic contact alloy can be formed, and the current-voltage characteristic between the front surface and the back surface of the sample wafer shows a schottky diode characteristic. When the annealing conditions were too severe, other forms of alloy layers formed, at which time the current-voltage characteristics between the front and back surfaces of the coupons again appeared to be insulating.
Fig. 7 is a graph of measured current-voltage characteristics after using a laser anneal process without laser energy density. The energy density orders used were: ED1 < ED2 < ED3 < ED4 < ED5 < ED6, and it can be seen that when ED2 < ED3, the current and voltage exhibit an electrical Schottky rectification characteristic, indicating that a good ohmic contact has been formed.
Therefore, the window of the annealing process required to form a good ohmic contact is determined according to the current-voltage characteristics, and ED2 < ED3 is the energy density process window required to form a good ohmic contact.
Finally, it should be noted that: the above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (8)
1. A method for testing the effect of a semiconductor device annealing process is characterized by comprising the following steps:
arranging a layer of metal film on the front surface of the bare wafer;
splitting the wafer covered with the metal film along the horizontal direction and the vertical direction to obtain an experimental sheet without the metal film covering on the side surface;
and annealing the experimental sheet, observing the metal surface appearance and color change of the experimental sheet, testing the current-voltage characteristics of the front surface and the back surface of the experimental sheet, and determining an annealing process window required by forming ohmic contact according to the current-voltage characteristics.
2. The method for testing the effect of the annealing process of the semiconductor device according to claim 1, wherein the method for disposing the metal thin film on the front surface of the wafer comprises thermal evaporation, electron beam evaporation or magnetron sputtering.
3. The method for testing the effect of the annealing process of the semiconductor device according to claim 1, wherein the metal film covers the front surface of the wafer on the whole, and the thickness of the metal film is 50-150 nm.
4. The method for testing the effect of the annealing process of the semiconductor device according to claim 1, wherein the annealing process comprises processing the test piece using a thermal annealing process or a laser annealing process.
5. The method for testing the effect of the annealing process of the semiconductor device according to claim 4, wherein the thermal annealing process is used to process the test piece:
when the annealing temperature is lower than the lower limit of an annealing process window required for forming ohmic contact, the metal and the silicon cannot form ohmic contact, and the current-voltage characteristic shows an insulator characteristic;
when the annealing temperature is in an annealing process window required by forming ohmic contact, metal and silicon form ohmic contact, and the current-voltage characteristic shows a Schottky characteristic;
when the annealing temperature is higher than the upper limit of the annealing process window required for forming ohmic contact, the metal and the silicon are in a transition alloy state, and the current-voltage characteristic shows an insulator characteristic.
6. The method for testing the effect of the annealing process of the semiconductor device according to claim 4, wherein the laser annealing process is used to process the test piece:
when the laser energy density is less than the lower limit of an annealing process window required for forming ohmic contact, metal and silicon cannot form ohmic contact, and the current-voltage characteristic is represented by the characteristic of an insulator;
when the light energy density is positioned in an annealing process window required by ohmic contact, metal and silicon form ohmic contact, and the current-voltage characteristic shows a Schottky characteristic;
when the light energy density is larger than the upper limit of the annealing process window required for forming ohmic contact, the metal and the silicon are in a transition alloy state, and the current-voltage characteristic is represented by an insulator characteristic.
7. The method for testing the effect of the annealing process of the semiconductor device according to claim 1, wherein the metal in the metal thin film comprises at least one of Al, ti, ni and Cr.
8. The method of claim 1, wherein the bare wafer is made of a semiconductor material comprising silicon, germanium, gallium arsenide, indium phosphide, silicon carbide, and gallium nitride.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN115890021A (en) * | 2023-01-05 | 2023-04-04 | 成都功成半导体有限公司 | Wafer laser cutting method and wafer |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102104233A (en) * | 2010-12-31 | 2011-06-22 | 华灿光电股份有限公司 | High-reflectivity light-emitting diode chip with vertical structure and preparation method thereof |
| CN105244266A (en) * | 2015-10-26 | 2016-01-13 | 株洲南车时代电气股份有限公司 | SiC wafer ohmic contact formation method |
| CN106252216A (en) * | 2016-09-21 | 2016-12-21 | 中国科学院合肥物质科学研究院 | Use the method that laser irradiation gallium nitride epitaxial slice improves its ohmic contact characteristic |
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2022
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102104233A (en) * | 2010-12-31 | 2011-06-22 | 华灿光电股份有限公司 | High-reflectivity light-emitting diode chip with vertical structure and preparation method thereof |
| CN105244266A (en) * | 2015-10-26 | 2016-01-13 | 株洲南车时代电气股份有限公司 | SiC wafer ohmic contact formation method |
| CN106252216A (en) * | 2016-09-21 | 2016-12-21 | 中国科学院合肥物质科学研究院 | Use the method that laser irradiation gallium nitride epitaxial slice improves its ohmic contact characteristic |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN115890021A (en) * | 2023-01-05 | 2023-04-04 | 成都功成半导体有限公司 | Wafer laser cutting method and wafer |
| CN115890021B (en) * | 2023-01-05 | 2023-05-16 | 成都功成半导体有限公司 | Wafer laser cutting method and wafer |
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| CN115172200B (en) | 2023-08-04 |
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