CN115132604A - Silicide process monitoring method - Google Patents

Silicide process monitoring method Download PDF

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CN115132604A
CN115132604A CN202211050983.0A CN202211050983A CN115132604A CN 115132604 A CN115132604 A CN 115132604A CN 202211050983 A CN202211050983 A CN 202211050983A CN 115132604 A CN115132604 A CN 115132604A
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silicide
layer
thickness
monitoring method
substrate
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CN115132604B (en
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朱红波
李盼
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Yuexin Semiconductor Technology Co.,Ltd.
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Guangzhou Yuexin Semiconductor Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01BMEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B11/00Measuring arrangements characterised by the use of optical techniques
    • G01B11/02Measuring arrangements characterised by the use of optical techniques for measuring length, width or thickness
    • G01B11/06Measuring arrangements characterised by the use of optical techniques for measuring length, width or thickness for measuring thickness ; e.g. of sheet material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

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  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • General Physics & Mathematics (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

The invention provides a silicide process monitoring method, which comprises the steps of providing a substrate, and sequentially forming a metal layer and a protective layer on the substrate; performing an annealing process to enable the metal layer with partial thickness to react with the substrate to form a silicide layer; removing the protective layer and the metal layer; and measuring the thickness of the silicide layer, if the thickness of the silicide layer is within a preset range, judging that the silicide process is normal, and if the thickness of the silicide layer is not within the preset range, judging that the silicide process is abnormal. Furthermore, whether the silicide process is normal or not is judged by adopting a method of measuring the thickness of the silicide layer by a film thickness measuring instrument or an ellipsometer, so that the damage to the surface of the monitoring wafer can be avoided, the monitoring wafer can be ensured to be recycled for multiple times, and the cost is reduced. Moreover, the thickness of the silicide layer and the temperature of the annealing process are in a linear relation in a certain range, and the testing accuracy is high.

Description

Silicide process monitoring method
Technical Field
The invention relates to the technical field of semiconductors, in particular to a silicide process monitoring method.
Background
In the semiconductor manufacturing process, a silicide (silicide) process is widely used in a Contact (Contact) connection process after a device is formed for reducing Contact resistance. For monitoring the silicide process, an ion implantation process (IMP doping) and a high temperature annealing process are usually performed first, and then a series resistance (Rs) measurement or a silicide loop process (silicide loop process Rs) is performed. However, the series resistance (Rs) measurement or the silicide cycling process series resistance measurement both adopt the series resistance as a final characterization, and is a destructive test, which is not favorable for the recycling of wafers and cost saving. Moreover, the silicide circulating process series resistance measurement method needs to adopt a two-step annealing method to obtain a lower series resistance, and nevertheless, the sensitivity of the series resistance is still poor when the silicide circulating process series resistance measurement method is adopted.
Disclosure of Invention
The invention aims to provide a silicide process monitoring method to solve the problems of destructiveness, high cost and poor sensitivity of the testing method in silicide process monitoring.
In order to solve the above technical problems, the present invention provides a silicide process monitoring method, comprising:
providing a substrate, and sequentially forming a metal layer and a protective layer on the substrate;
performing an annealing process to enable the metal layer with partial thickness to react with the substrate to form a silicide layer;
removing the protective layer and the metal layer;
and measuring the thickness of the silicide layer, if the thickness of the silicide layer is within a preset range, judging that the silicide process is normal, and if the thickness of the silicide layer is not within the preset range, judging that the silicide process is abnormal.
Optionally, the thickness of the silicide layer is measured using a film thickness gauge or an ellipsometer.
Optionally, before measuring the thickness of the silicide layer, forming a dielectric layer on the silicide layer; and measuring the thickness of the dielectric layer while measuring the thickness of the silicide layer so as to monitor whether the process of the dielectric layer is normal or not through the thickness of the dielectric layer.
Optionally, the dielectric layer is silicon nitride.
Optionally, the metal layer is one of titanium, cobalt, or nickel, and the protective layer is titanium nitride.
Optionally, the process temperature of the annealing process is 470-485 ℃,
optionally, the temperature of the annealing process varies linearly with the thickness of the silicide layer.
Optionally, the temperature of the annealing process and the thickness of the silicide layer satisfy the following formula:
y=0.6458x-93.047
where x is the annealing temperature and y is the silicide thickness.
Optionally, a wet etching process is used to remove the protection layer and the metal layer.
Optionally, the solution of the first etching process includes NH 4 OH and H 2 O 2 The solution of the second etching process comprises H 3 PO 4 、HNO 3 And CH 3 COOH。
In the silicide process monitoring method provided by the invention, the silicide layer is formed by utilizing the annealing process, the thickness of the silicide layer is measured, and whether the thickness of the silicide layer is normal or not is judged, so that whether the silicide process is normal or not is judged. Furthermore, whether the silicide process is normal or not is judged by adopting a method of measuring the thickness of the silicide layer by a film thickness measuring instrument or an ellipsometer, so that the damage to the surface of the monitoring wafer can be avoided, the monitoring wafer can be ensured to be recycled for multiple times, and the cost is reduced. Moreover, the thickness of the silicide layer and the temperature of the annealing process are in a linear relation in a certain range, and the testing accuracy is high.
Drawings
FIG. 1 is a flow chart of a method for monitoring a silicide process according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a substrate of an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of a metal layer and a protective layer after forming an embodiment of the invention;
FIG. 4 is a schematic diagram of a structure after forming a silicide layer according to an embodiment of the present invention;
FIG. 5 is a schematic structural diagram of the present invention after removing the protective layer and part of the metal layer;
FIG. 6 is a schematic structural diagram after a dielectric layer is formed according to an embodiment of the present invention;
FIG. 7 is a linear plot of annealing temperature and silicide layer thickness for an embodiment of the present invention;
in the figure, the position of the upper end of the main shaft,
10-a substrate; 11-a metal layer; 12-a protective layer; 13-a silicide layer; 14-dielectric layer.
Detailed Description
To further clarify the objects, advantages and features of the present invention, a more particular description of the invention will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings. It is to be noted that the drawings are in greatly simplified form and are not to scale, but are merely intended to facilitate and clarify the explanation of the embodiments of the present invention. Further, the structures illustrated in the drawings are often part of actual structures. In particular, the drawings may have different emphasis points and may sometimes be scaled differently. It should be further understood that the terms "first," "second," "third," and the like in the description are used for distinguishing between various components, elements, steps, and the like, and are not intended to imply a logical or sequential relationship between various components, elements, steps, or the like, unless otherwise indicated or indicated.
The inventor researches and discovers that the existing silicide process monitoring methods mainly comprise two methods:
the first monitoring method is a method adopting ion implantation, high-temperature annealing and series resistance measurement, and specifically comprises the following steps: providing a substrate, forming a pad oxide layer and a non-doped polysilicon layer on the substrate, then carrying out an ion implantation process to form a doped layer, activating ions in the doped layer through a high-temperature annealing process, reducing the series resistance of the doped layer, testing the series resistance of the doped layer, judging whether the annealing process is normal or not by judging whether the series resistance of the doped layer is within a preset range or not, wherein the annealing process is a key step of silicide formation, and therefore whether the silicide process is normal or not can be presumed by judging whether the series resistance is normal or not. In the monitoring method, because the series resistance is tested destructively, the service life of the wafer for monitoring is influenced, and the cost is high. Moreover, the uniformity of the undoped polysilicon layer and the pad oxide layer is poor, and the interference factors are more, so that the accuracy of the test by adopting the method is poor;
the second monitoring method is to simulate the actual silicide formation process to determine whether the silicide process is normal, and specifically includes: providing a substrate, and forming a metal layer on the substrate; then, carrying out a first annealing process to form a silicide layer; then, removing the part of the metal layer which is not reacted with the substrate; then, a second annealing process is carried out to reduce the contact resistance, wherein the temperature of the second annealing process is, for example, 800-850 ℃, and the series resistance can be effectively reduced by adopting higher annealing temperature; and then measuring the series resistance of the silicide layer, and judging whether the silicide process is normal or not by judging whether the magnitude of the series resistance of the silicide layer is within a preset range or not. Since the second monitoring method also uses the series resistance test and is a destructive test, the service life of the wafer for monitoring is affected, and the monitoring method for measuring the series resistance needs to perform a second annealing process, which is complicated in steps, high in cost and poor in accuracy of a test result.
Based on the research, the invention provides a novel silicide process monitoring method, which is characterized in that the thickness of the silicide layer is measured by utilizing the actual forming process of silicide, whether the silicide process is normal or not is judged by judging whether the thickness of the silicide layer is normal or not, whether the silicide process is normal or not is judged by adopting the method for measuring the thickness of the silicide layer, the damage to the surface of a monitoring wafer can be avoided, so that the monitoring wafer can be recycled for multiple times, the cost can be effectively reduced, the thickness of the silicide layer and the temperature of an annealing process are in a linear relationship within a certain range, and the testing accuracy is high.
FIG. 1 is a flow chart of a method for monitoring a silicide process according to an embodiment of the invention. As shown in fig. 1, the present embodiment provides a method for monitoring a silicide process, including:
step S10, providing a substrate, and sequentially forming a metal layer and a protective layer on the substrate;
step S20, performing an annealing process to react the metal layer with partial thickness with the substrate to form a silicide layer;
step S30, removing the protective layer and the metal layer;
step S40, measuring the thickness of the silicide layer, if the thickness of the silicide layer is within a preset range, determining that the silicide process is normal, and if the thickness of the silicide layer is not within the preset range, determining that the silicide process is abnormal.
Fig. 2 to fig. 6 are schematic structural diagrams corresponding to a silicide process monitoring method according to an embodiment of the invention. Each step of the silicide process monitoring method provided in this embodiment is described in detail below with reference to fig. 2 to fig. 6.
Referring to FIG. 2, in step S10, a substrate 10 is provided, wherein the substrate 10 is, for example, a P-type Bare Silicon wafer (Bare Silicon wafer) and has a resistivity of, for example, 1ohm cm to 100ohm cm.
Before forming the metal layer, a cleaning process is performed on the substrate 10 to remove defects and metal impurities on the substrate 10. The cleaning processes are, for example, a SC1 cleaning process and a SC2 cleaning process. The SC1 cleaning process is performed to remove particles from the substrate surface, and then the SC2 cleaning process is performed to remove metal contamination from the substrate surface. The solution in the SC1 cleaning process comprises NH 4 OH、H 2 O 2 And H 2 And O. The process temperature of the SC1 cleaning process is, for example, 30 ℃ to 80 ℃. Due to H in the SC1 cleaning process 2 O 2 Has a natural oxide film (SiO) on the surface of the substrate 2 ) Hydrophilic, the surface and the particles can be soaked by the cleaning solution, because the natural oxidation film on the surface of the substrate and the Si on the surface of the substrate are NH 4 OH is corroded, so that particles attached to the surface of the substrate fall into the cleaning solution, and the purpose of removing the particles is achieved. The solution of the SC2 cleaning process is HCl, H 2 O 2 And H 2 And O. The SC2 cleaning process has a process temperature of 65-85 ℃ for example, and is used for removing metal contamination of sodium, iron, magnesium and the like on the surface of the substrate.
In a preferred embodiment, before the metal layer is formed, the cassette is switched, because the cleaned bare silicon has a high cleanliness and needs to be placed in a cassette with a cleanliness class of 1, and the next step of metal layer formation needs to be performed, and the cleaned bare silicon needs to be placed in a cassette with a lower cleanliness (the cleanliness of the metal corresponds to a cleanliness class of 3), so that the cleaned bare silicon needs to be switched from the cassette with a cleanliness class of 1 to the cassette with a cleanliness class of 3.
Referring to fig. 3, a metal layer 11 and a protective layer 12 are sequentially formed on the substrate 10. The metal layer 11 and the protective layer 12 may be sequentially formed using a physical vapor deposition process. The metal layer 11 is, for example, one of titanium, cobalt or nickel. In the present embodiment, the metal layer 11 is, for example, cobalt, and the protection layer 12 is, for example, titanium nitride. The protective layer 12 serves to protect the metal layer 11 from oxidation or sulfidation. The thickness of the metal layer 11 is 50-70 angstroms. The thickness of the protective layer 12 is 180-220 angstroms.
In specific implementation, before the metal layer 11 is formed on the substrate 10, argon ion bombardment is performed on the surface of the substrate 10. By bombarding the substrate 10, the oxide layer on the surface of the substrate 10 can be removed, and the oxide layer is prevented from influencing the deposition of the metal layer. The thickness of the bombarded substrate surface is, for example, 15-25 angstroms.
Referring to fig. 4, in step S20, an annealing process is performed to form a silicide layer 13 on a portion of the thickness of the metal layer 11 and the substrate 10. The silicide layer 13 is one of titanium silicide, cobalt silicide, or nickel silicide. In this embodiment, the silicide layer 13 is, for example, a cobalt silicide layer. The process temperature of the annealing process is 470-485 ℃. In the present embodiment, experiments of different annealing temperatures, such as 470 ℃, 475 ℃, 480 ℃, 485 ℃, and 490 ℃, were performed, respectively, to form silicide layers 13 of different thicknesses. A temperature interval is defined in which the annealing temperature and the thickness of the silicide layer are linear. The process time of the annealing process is 25 seconds to 35 seconds, for example, 30 seconds. The process gas of the annealing process is, for example, nitrogen (N) 2 )。
Referring to fig. 5, in step S30, the protective layer 12 and the metal layer 11 that has not reacted with the substrate are removed. Preferably, a wet etching process is used to remove the protective layer 12 and a portion of the metal layer 11 that has not reacted with the substrate. The wet etching process bagThe method comprises a first etching process and a second etching process. The solution of the first etching process comprises NH 4 OH and H 2 O 2 . The first etching process is used for removing surface particles, organic matters and metal pollution. The solution of the second etching process comprises H 3 PO 4 、HNO 3 And CH 3 COOH. The second etching process is used to remove the protective layer 12 and a portion of the metal layer 11 that has not reacted with the substrate.
Since integrated circuits have high cleanliness requirements, in order to prevent the metal layer from contaminating the test equipment, it is preferable that before the silicide layer thickness test is performed, as shown in fig. 6, a dielectric layer 14 is formed on the silicide layer 13, and the dielectric layer 14 covers the silicide layer 13. The dielectric layer 14 is, for example, silicon nitride. The thickness of the dielectric layer 14 is, for example, 350 to 450 angstroms. The dielectric layer 14 may be formed using a chemical vapor deposition process.
Further, the cassette is switched before the deposition of the dielectric layer 14. Since the cleanliness of the metal layer cassette is relatively low (cleanliness class 3) and the cleanliness of the dielectric layer cassette is relatively high (cleanliness class 1), it is necessary to switch the monitor wafer from the cleanliness class 3 cassette to the cleanliness class 1 cassette. In specific implementation, if the requirement on cleanliness is low, the metal pollution to the test equipment is not considered, and the thickness of the silicide layer 13 can be directly tested without forming the dielectric layer 14.
In step S40, the thickness of the silicide layer 13 is measured. The thickness of the silicide layer 13 may be measured using a film thickness meter or an ellipsometer. The ellipsometer is an instrument for nondestructive measurement of transparent film by using ellipsometry, and is used for determining the refractive index and thickness of the optical film by using the reflection of polarized light on the upper and lower surfaces of the film and obtaining the relation between optical parameters and polarization states through a Fresnel formula. The silicide layer belongs to the translucent film, and the dielectric layer belongs to the transparent film. If the thickness of the silicide layer 13 is within a preset range, the silicide process is determined to be normal, if the thickness of the silicide layer 13 is not within the preset range, the silicide process is determined to be abnormal, and if the silicide process is abnormal, the cause of the silicide process abnormality is further investigated. In this embodiment, the thickness of the silicide layer 13 is tested, and the thickness of the dielectric layer 14 is tested at the same time, so as to monitor whether the process of the dielectric layer 14 is normal. If the thickness of the dielectric layer 14 is within a preset range, determining that the forming process of the dielectric layer 14 is normal, and if the thickness of the dielectric layer 14 is not within the preset range, determining that the forming process of the dielectric layer 14 is abnormal, and further checking the reason for the abnormality of the forming process of the dielectric layer 14. The principle of the film thickness measuring instrument is that when light of a specified wavelength range is irradiated onto a thin film, the phases of light reflected from different interfaces are different, thereby causing interference to cause intensity to be constructive or destructive. And this oscillation of intensity is related to the structure of the membrane. The sample thickness and associated optical constants are obtained by fitting such oscillations and fourier transforming. The film thickness measuring instrument comprises various types of film thickness measuring equipment, and the online film thickness measuring machine is one of the film thickness measuring instruments. The thickness of the silicide layer 13 and the dielectric layer 14 is measured by a film thickness measuring instrument or an ellipsometer, the surface of the monitoring wafer is not damaged, the monitoring wafer can be recycled for multiple times, and the cost is reduced. In addition, the silicide process monitoring method not only monitors whether the annealing process is normal, but also monitors whether the metal layer forming process, the wet etching process and the dielectric layer forming process are normal.
FIG. 7 is a linear plot of annealing temperature and silicide layer thickness for an embodiment of the present invention. In this embodiment, the annealing process is performed at different temperatures corresponding to different thicknesses of the silicide layer, and the annealing process is performed at 470 ℃, 475 ℃, 480 ℃, 485 ℃, and 490 ℃, and the thicknesses of the silicide layer at the temperatures corresponding to the annealing process are tested to be 210.3 angstroms, 214.1 angstroms, 216.69 angstroms, 220.2 angstroms, and 213.4 angstroms. The correlation coefficient R of linear regression of the fitted curve is obtained by linear fitting 2 0.9953, when the temperature of the annealing process is 490 ℃, the thickness of the silicide has changed, it can be known that the temperature of the annealing process is in the range of 470 ℃ to 485 ℃, the temperature of the annealing process and the thickness of the silicide layer have linear change, specifically:
y=0.6458x-93.047
where x is the annealing temperature and y is the silicide thickness.
Therefore, the temperature control group (baseline target) of the annealing process is defined as 480 ℃ (when the temperature is low, the thickness of the silicide layer has strong linearity with the temperature), when the temperature is too high, the thickness of the silicide layer of the monitoring wafer is not accurately distorted (when the temperature exceeds 490C, the nonlinear correlation occurs due to the crystal form change), when the temperature is too low, the thickness of the silicide layer is not sufficiently formed, and therefore, the temperature of the annealing process is set to be about 480 ℃. It can be seen that the temperature of the annealing process and the linearity of the thickness of the silicide layer are high, and the test accuracy is high.
In summary, in the silicide process monitoring method provided by the invention, the silicide layer is formed by using the annealing process, the thickness of the silicide layer is measured, and whether the thickness of the silicide layer is normal or not is judged, so that whether the silicide process is normal or not is judged. Furthermore, whether the silicide process is normal or not is judged by adopting a method of measuring the thickness of the silicide layer by a film thickness measuring instrument or an ellipsometer, so that the damage to the surface of the monitoring wafer can be avoided, the monitoring wafer can be ensured to be recycled for multiple times, and the cost is reduced. Moreover, the thickness of the silicide layer and the temperature of the annealing process are in a linear relation in a certain range, and the testing accuracy is high.
It should be understood, however, that the intention is not to limit the invention to the particular embodiments described. It will be apparent to those skilled in the art from this disclosure that many changes and modifications can be made, or equivalents modified, in the embodiments of the invention without departing from the scope of the invention. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention are still within the protection scope of the technical solution of the present invention, unless the content of the technical solution of the present invention is departed from.

Claims (10)

1. A silicide process monitoring method is characterized by comprising the following steps:
providing a substrate, and sequentially forming a metal layer and a protective layer on the substrate;
performing an annealing process to enable the metal layer with partial thickness to react with the substrate to form a silicide layer;
removing the protective layer and the metal layer;
and measuring the thickness of the silicide layer, if the thickness of the silicide layer is within a preset range, judging that the silicide process is normal, and if the thickness of the silicide layer is not within the preset range, judging that the silicide process is abnormal.
2. The silicide process monitoring method of claim 1, wherein the thickness of the silicide layer is measured using a film thickness gauge or an ellipsometer.
3. The silicide process monitoring method of claim 1, wherein a dielectric layer is formed on the silicide layer before the thickness of the silicide layer is measured; and measuring the thickness of the dielectric layer while measuring the thickness of the silicide layer so as to monitor whether the process of the dielectric layer is normal or not through the thickness of the dielectric layer.
4. The silicide process monitoring method of claim 3, wherein the dielectric layer is silicon nitride.
5. The silicide process monitoring method of claim 1, wherein the metal layer is one of titanium, cobalt or nickel and the protective layer is titanium nitride.
6. The silicide process monitoring method of claim 1, wherein the process temperature of the annealing process is 470-485 ℃.
7. The method of claim 1, wherein a temperature of the annealing process varies linearly with a thickness of the silicide layer.
8. The silicide process monitoring method of claim 7, wherein the temperature of the annealing process and the thickness of the silicide layer satisfy the following equation:
y=0.6458x-93.047
where x is the annealing temperature and y is the silicide thickness.
9. The silicide process monitoring method of claim 1, wherein the protective layer and the metal layer are removed using a wet etch process.
10. The silicide process monitoring method of claim 9, wherein the wet etching process comprises a first etching process and a second etching process, and a solution of the first etching process comprises NH 4 OH and H 2 O 2 The solution of the second etching process comprises H 3 PO 4 、HNO 3 And CH 3 COOH。
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CN115621148A (en) * 2022-12-20 2023-01-17 广州粤芯半导体技术有限公司 Method for detecting technological parameters of forming metal silicide

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