CN115117032A - Structure of packaged chip integrated antenna, electronic equipment and preparation method thereof - Google Patents

Structure of packaged chip integrated antenna, electronic equipment and preparation method thereof Download PDF

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Publication number
CN115117032A
CN115117032A CN202210621519.6A CN202210621519A CN115117032A CN 115117032 A CN115117032 A CN 115117032A CN 202210621519 A CN202210621519 A CN 202210621519A CN 115117032 A CN115117032 A CN 115117032A
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China
Prior art keywords
antenna
layer
packaging
packaged
packaged chip
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Pending
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CN202210621519.6A
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Chinese (zh)
Inventor
赵力
熊锋
郭继斌
王勇
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Hubei Xingji Shidai Technology Co Ltd
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Hubei Xingji Shidai Technology Co Ltd
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Priority to CN202210621519.6A priority Critical patent/CN115117032A/en
Publication of CN115117032A publication Critical patent/CN115117032A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64—Impedance arrangements
    • H01L2223/66—High-frequency adaptations
    • H01L2223/6661—High-frequency adaptations for passive devices
    • H01L2223/6677—High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Details Of Aerials (AREA)

Abstract

The invention provides a structure of a packaged chip integrated antenna, electronic equipment and a preparation method thereof, wherein the structure comprises the following components: the side surface of the packaging chip unit is exposed out of the antenna connection point, and the front surface of the packaging chip unit is plastically packaged by a plastic packaging layer; and the antenna is arranged on the plastic packaging layer, extends to the antenna connection point on the side surface of the packaging chip unit and is electrically connected with the antenna connection point. The antenna is directly integrated outside the packaging chip, so that the direct electric connection between the antenna and the packaging chip is realized, the switching through a PCB or an FPC is avoided, and the miniaturization of a product is facilitated; meanwhile, the antenna is more reliably connected in a direct electrical connection mode, the product material is saved, and the cost of the electronic product is reduced; in addition, the structure only needs to test the antenna after the whole packaged chip is molded, so that the test steps are reduced, and the development cycle of the product is shortened; finally, the antenna is formed outside the packaged chip unit, compared with the antenna packaging form of AIP, the antenna is easy to change in form and higher in flexibility, and the compatibility of the antenna and the packaged chip can be effectively improved.

Description

Structure of packaged chip integrated antenna, electronic equipment and preparation method thereof
Technical Field
The invention relates to the technical field of integrated circuit semiconductor chip packaging, in particular to a structure of a packaged chip integrated antenna, electronic equipment and a preparation method thereof.
Background
With the rise of SIP (System in Package) technology, the System integration of chips is higher and higher. Particularly, like Apple airpots and Apple Watch, the whole hardware circuit is packaged integrally, and the integration level of an electronic system is further improved. Although most of the circuits of the current SIP devices or SIP modules are integrated, the antennas are often designed and assembled separately. For the assembly of the antenna, the switching is often performed through a PCB (printed circuit board) or an FPC (flexible circuit board), and the assembly of the antenna is also performed. In fact, in the current products adopting the SIP technology, the used materials are not reduced in antenna integration, the preparation mode is basically the same as that of a mode adopting PCBA (printed circuit board assembly), namely, the antenna and a circuit are integrated separately, the integration level is low, and the products are not easy to miniaturize; the antenna has low connection reliability, large material waste and high cost; the development period of the product is long. The existing AIP (Antenna in Package) technology is mostly realized by mounting an Antenna, once the packaging is completed, an Antenna system is shaped, which is not beneficial to secondary development of hardware and limits the development of application layer customers.
Disclosure of Invention
In view of the above drawbacks of the prior art, an object of the present invention is to provide a structure for packaging a chip integrated antenna, an electronic device, and a manufacturing method thereof, for solving the problems in the prior art that the antenna and the chip are integrated by performing switching through a PCB or FPC and then assembling the antenna, so that the product is not easily miniaturized, the connection reliability of the antenna is low, the material waste is large, the cost is high, the development cycle of the product is long, and the integrated compatibility of the antenna and the chip is low and the secondary development is not facilitated by using the AIP technology.
To achieve the above and other related objects, the present invention provides a packaged chip integrated antenna structure, the packaged chip including:
the side surface of the packaging chip unit is exposed out of at least one antenna connecting point, and the front surface of the packaging chip unit is plastically packaged by a plastic packaging layer;
the antenna is arranged on the plastic packaging layer on the front face of the packaging chip unit, extends to the antenna connection point on the side face of the packaging chip unit and is electrically connected with the antenna connection point.
Optionally, the packaged chip unit uses a package substrate or a lead frame as a carrier, and the antenna connection point is formed by exposing the package substrate or the lead frame in advance.
Furthermore, the package substrate is formed by a substrate layer, the substrate layer is provided with at least one antenna connection point, and the antenna is electrically connected with the antenna connection point on the substrate layer.
Furthermore, the package substrate is formed by laminating a plurality of substrate layers, at least one of the substrate layers is provided with at least one antenna connection point, and the antenna is electrically connected with the antenna connection point on at least one of the substrate layers.
Furthermore, at least one pin on the lead frame is preset as the antenna connection point, and the antenna is electrically connected with the antenna connection point on the lead frame.
Optionally, the packaged chip unit is a single-chip packaged unit or a packaged unit of a plurality of chips with different functions.
Optionally, the antenna includes a bottom adhesive layer located on the surface of the plastic package layer and an antenna main body layer located on the bottom adhesive layer, and the bottom adhesive layer is used for bonding the antenna and the plastic package layer.
Further, the bottom bonding layer is a stainless steel layer or a copper-nickel alloy layer; the antenna main body layer is of a single-layer structure of a stainless steel layer or a copper layer, or the antenna main body layer is of a laminated structure comprising the stainless steel layer and the copper layer.
Further, the thickness of the bottom adhesive layer is between 1 and 10 μm.
The invention also provides electronic equipment which comprises the structure of the packaged chip integrated antenna.
The invention also provides a preparation method of the structure of the packaged chip integrated antenna, which is used for preparing the structure of the packaged chip integrated antenna, and the preparation method comprises the following steps:
providing a packaging chip unit and an antenna sputtering mold; the side surface of the packaging chip unit is exposed out of at least one antenna connecting point, and the front surface of the packaging chip unit is plastically packaged by a plastic packaging layer; an antenna-shaped hollow is formed on the antenna sputtering mold;
covering the antenna sputtering mold on the plastic packaging layer of the packaging chip unit;
sputtering an antenna material on the antenna sputtering mould by adopting a sputtering process;
separating the antenna sputtering mold to form an antenna on the plastic packaging layer; the antenna is formed on the plastic package layer on the front surface of the packaged chip unit, extends to the antenna connection point on the side surface of the packaged chip unit and is electrically connected with the antenna connection point.
Optionally, the material of the antenna sputtering mold is a metal material or a hard plastic material.
As described above, according to the structure of the packaged chip integrated antenna, the electronic device and the manufacturing method thereof, the antenna is directly integrated outside the packaged chip, so that the direct electrical connection between the antenna and the packaged chip is realized, the conventional transfer through a PCB or an FPC is avoided, and the miniaturization of the product is facilitated; meanwhile, the antenna is more reliably connected in a direct electrical connection mode, so that the reliability of the product is improved, the material of the product is saved, and the cost of the electronic product is reduced; in addition, the structure only needs to test the antenna after the whole packaged chip is molded, so that the test steps are reduced, and the development cycle of the product is shortened; finally, the antenna is formed outside the packaged chip unit, compared with an antenna packaging form of AIP, the antenna is easy to change in form and higher in flexibility, can effectively improve the compatibility of the antenna and the packaged chip, and is beneficial to secondary development of products.
Drawings
Fig. 1 is a schematic perspective view illustrating an example of a packaged chip unit in the structure of the packaged chip integrated antenna according to the present invention.
Fig. 2 is a schematic perspective view illustrating an example of a packaged chip integrated antenna according to the present invention.
Fig. 3 is a schematic side view of an example of the structure of the packaged-chip integrated antenna according to the present invention.
Fig. 4 is a schematic side view showing another example of the structure of the packaged chip integrated antenna according to the present invention.
Fig. 5 is a schematic side view illustrating another example of a packaged chip integrated antenna according to the present invention.
Fig. 6 is a schematic perspective view of an exemplary antenna sputtering mold for encapsulating a chip integrated antenna according to the present invention.
Description of the element reference
10 packaged chip unit
101 antenna connection point
102 plastic packaging layer
103 package substrate
104 pin
20 aerial
201 front antenna
202 side antenna
30 antenna sputtering coating die
301 hollow out
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
To facilitate understanding of the structure of the packaged chip integrated antenna provided in this embodiment, an application scenario thereof is first described below. The packaged chip integrated antenna provided by the embodiment can be applied to electronic equipment, and is used for enabling the electronic equipment to receive or send signals and realizing a communication function. The electronic device may be a mobile phone, a tablet personal computer (tablet personal computer), a laptop computer (laptop computer), a personal computer, a notebook computer, a vehicle-mounted device, a wearable device, smart glasses (e.g., AR glasses, XR glasses), a TWS headset (True Wireless Stereo), a smart band, and the like, which is not limited in this embodiment. Please refer to fig. 1 to 6. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of each component in actual implementation may be changed according to actual needs, and the layout of the components may be more complicated.
Example one
As shown in fig. 1 to 5, the present embodiment provides a structure of a packaged chip integrated antenna, including:
as shown in fig. 1, a chip unit 10 is packaged, at least one antenna connection point 101 is exposed from a side surface of the chip unit 10, and a front surface of the chip unit 10 is plastically packaged by a plastic packaging layer 102;
as shown in fig. 2, the antenna 20 is disposed on the molding layer 102 on the front surface of the packaged chip unit 10, and extends to and is electrically connected to the antenna connection point 101 on the side surface of the packaged chip unit 10, so as to implement signal transmission between the antenna 20 and the packaged chip unit 10.
According to the structure of the packaged chip integrated antenna, the antenna is directly integrated outside the packaged chip, so that the direct electric connection between the antenna and the packaged chip is realized, the conventional switching through a PCB or an FPC is avoided, and the miniaturization of a product is facilitated; meanwhile, the antenna is more reliably connected in a direct electrical connection mode, so that the reliability of the product is improved, the material of the product is saved, and the cost of the electronic product is reduced; in addition, the structure only needs to test the antenna after the whole packaged chip is molded, so that the test steps are reduced, and the development cycle of the product is shortened; finally, the antenna is formed outside the packaged chip unit, compared with an antenna packaging form of AIP, the antenna is easy to change in form and higher in flexibility, can effectively improve the compatibility of the antenna and the packaged chip, and is beneficial to secondary development of products.
As shown in fig. 3 to fig. 5, as an example, the packaged chip unit 10 may be packaged by using a package substrate 103 (shown in fig. 3 and fig. 4) or a lead frame (shown in fig. 5) as a carrier, and the antenna connection point 101 is formed by exposing the package substrate 103 or the lead frame. As shown in fig. 3 and 4, the package substrate 103 is used as a carrier to implement a chip package, and in a specific chip packaging process, the package substrate includes at least one substrate layer, which is mostly composed of multiple substrate layers and has a stacked structure of substrate layers and insulating layers. When the package substrate 103 is formed by a substrate layer, the substrate layer may be provided with one antenna connection point 101, or may be provided with more than one antenna connection point 101, and the antenna 20 is electrically connected to the antenna connection point 101, so as to increase the contact area of the antenna. When the package substrate 103 is formed by stacking a plurality of substrate layers, as shown in fig. 3, the antenna 20 may be electrically connected to one substrate layer in the package substrate, and the one substrate layer may be provided with one antenna connection point 101, or may be provided with more than one antenna connection point 101; as shown in fig. 4, the antenna 20 may also be electrically connected to multiple substrate layers in the package substrate, and each of the multiple substrate layers is provided with at least one antenna connection point 101, and the antenna 20 is electrically connected to the antenna connection point 101, so as to increase the contact area of the antenna. Specifically, the antenna 20 is electrically connected to several substrate layers, and the arrangement is not limited herein. As shown in fig. 5, the lead frame is used as a carrier to realize the packaging of the chip, at least one pin 104 is preset as an antenna connection point 101 in the packaging process, and the antenna 20 is electrically connected to the antenna connection point 101, for example, the antenna 20 may be electrically connected to one antenna connection point 101, or may be electrically connected to two or more antenna connection points 101, so as to increase the contact area of the antenna, specifically, the configuration is performed according to the actually used antenna structure.
As an example, only one type of chip, that is, a package of a single-function chip, may be packaged in the packaged chip unit 10; chips with different functions can also be packaged together, namely SIP packaging, to form a system package. The antenna packaging structure of the embodiment is suitable for the packaging form of a single-function chip and the packaging form of SIP.
As an example, the antenna 20 is composed of a bottom adhesive layer on the surface of the plastic package layer 103 and an antenna body layer on the bottom adhesive layer, and the bottom adhesive layer can effectively improve the adhesive force between the antenna 20 and the plastic package layer 103, and improve the reliability of the antenna. Preferably, the bottom adhesive layer is generally selected to be a stainless steel layer or a copper-nickel alloy layer in consideration of adhesive properties and manufacturing costs. The antenna main body layer is at least one layer in the group consisting of a stainless steel layer and a copper layer, namely a single-layer stainless steel layer or a copper layer, and also can be a laminated structure of the stainless steel layer and the copper layer. More preferably, the thickness of the bottom adhesive layer is generally between 1 μm and 10 μm, such as 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm.
Generally, the metal material of the package substrate and the lead frame is copper, and the package substrate and the lead frame can be in good contact with the antenna made of stainless steel or copper.
It should be noted that the form of the antenna 20 in the present embodiment is specifically designed according to different chip functions, such as the inverted F antenna in fig. 2 to fig. 5, which is only an illustration, and in practice, the form of the antenna 20 is various, and may be, for example, a monopole antenna, a dipole antenna, a MIMO antenna, a navigation antenna, and the like. As shown in fig. 2, the antenna 20 generally includes a front antenna 201 located on the front surface of the packaged chip unit 10, and a side antenna 202 located on the side surface of the packaged chip unit 10, wherein the front antenna 201 is a main body of the antenna, the side antenna 202 is mainly connected to the antenna connection point 101, and the front antenna 201 and the side antenna 202 are integrally formed.
Example two
The present embodiment provides a method for manufacturing a structure of a packaged chip integrated antenna, which can be used to manufacture the structure of the packaged chip integrated antenna described in the first embodiment. However, the present invention is not limited to this, and other manufacturing methods for forming the structure of the packaged-chip integrated antenna according to the first embodiment are also possible, but the manufacturing method according to the present invention may be used as the optimal manufacturing method for the structure of the packaged-chip integrated antenna according to the first embodiment. The first embodiment is referred to for the beneficial effects that can be achieved by the structure of the packaged chip integrated antenna prepared by the preparation method, and details are not described below.
As shown in fig. 1, fig. 2 and fig. 6, the preparation method comprises the following steps:
providing a packaged chip unit 10 and an antenna sputtering mold 30; at least one antenna connection point 101 is exposed from the side surface of the packaged chip unit 10, and the front surface of the packaged chip unit 10 is plastically packaged by a plastic packaging layer 102; an antenna-shaped hollow 301 is formed on the antenna sputtering mold 30;
covering the antenna sputtering mold 30 on the plastic package layer 102 of the packaged chip unit 10;
sputtering the antenna material on the antenna sputtering mold 30 by a sputtering process;
separating the antenna sputtering mold 30 to form the antenna 20 on the molding layer 102; the antenna 20 is formed on the molding layer 102 on the front surface of the packaged chip unit 10, and extends to and is electrically connected to the antenna connection point 101 on the side surface of the packaged chip unit 10.
As a specific example, as shown in fig. 6, before performing a sputtering process, the package chip unit 10 to be sputtered is sleeved into the corresponding antenna sputtering mold 30, the size of the antenna sputtering mold 30 is matched with the size of the package chip unit 10, only the hollow 301 on the antenna sputtering mold 30 exposes a partial area of the package chip unit 10, and then the package chip unit is placed into a sputtering device for sputtering a metal material, after the sputtering process is completed, the antenna sputtering mold 30 is separated after cooling, so that the antenna 20 with a desired shape is formed on the surface of the package chip unit 10.
It should be noted here that the thickness of the antenna 20 is set according to the requirements of different antenna performance, and the thickness of the antenna 20 is realized by the thickness of the antenna sputtering mold 30 in the sputtering process. In addition, the specific parameters of the sputtering process are set according to the specific performance requirements of different antennas, and are not limited herein.
As an example, the material of the antenna sputtering mold 30 is generally selected from a metal material or a hard plastic material to meet the requirement of high temperature resistance. The size of the antenna sputtering mold 30 is designed according to the size of the packaging chip unit 10 and the size of the antenna, when the mold is prepared, the mold is cut according to the shape and the size of the preset antenna, so that a hollow 301 with the shape of the preset antenna is formed on the mold, after the packaging chip unit 10 is attached to the mold, the antenna connection point 101 reserved on the packaging chip unit 10 can be connected with the position of the hollow 301, and the antenna pin of the antenna or the metal dew point on the packaging substrate does not need to be connected with the antenna sputtering mold 30.
The antenna 20 formed by sputtering has a front antenna 201 and a side antenna 202 integrally formed.
In summary, the structure of the packaged chip integrated antenna, the electronic device and the manufacturing method thereof of the invention realize the direct electrical connection between the antenna and the packaged chip by directly integrating the antenna outside the packaged chip, thereby avoiding the conventional transfer through a PCB or FPC and facilitating the miniaturization of products; meanwhile, the antenna is more reliably connected in a direct electrical connection mode, so that the reliability of the product is improved, the material of the product is saved, and the cost of the electronic product is reduced; in addition, the structure only needs to test the antenna after the whole packaged chip is formed, thereby reducing the test steps and shortening the development cycle of the product; finally, the antenna is formed outside the packaged chip unit, compared with an antenna packaging form of AIP, the antenna is easy to change in form and higher in flexibility, can effectively improve the compatibility of the antenna and the packaged chip, and is beneficial to secondary development of products. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims (12)

1. A packaged chip integrated antenna structure, the packaged chip comprising:
the side surface of the packaging chip unit is exposed out of at least one antenna connecting point, and the front surface of the packaging chip unit is plastically packaged by a plastic packaging layer;
the antenna is arranged on the plastic packaging layer on the front surface of the packaging chip unit, extends to the antenna connection point on the side surface of the packaging chip unit and is electrically connected with the antenna connection point.
2. The packaged chip integrated antenna structure of claim 1, wherein: the packaging chip unit adopts a packaging substrate or a lead frame as a carrier, and the antenna connecting point is formed by exposing the packaging substrate or the lead frame in advance.
3. The packaged chip integrated antenna structure of claim 2, wherein: the packaging substrate is formed by a substrate layer, at least one antenna connection point is arranged on the substrate layer, and the antenna is electrically connected with the antenna connection point on the substrate layer.
4. The packaged chip integrated antenna structure of claim 2, wherein: the packaging substrate is formed by laminating a plurality of substrate layers, at least one of the substrate layers is provided with at least one antenna connection point, and the antenna is electrically connected with the antenna connection point on at least one of the substrate layers.
5. The packaged chip integrated antenna structure of claim 2, wherein: at least one pin on the lead frame is preset as the antenna connection point, and the antenna is electrically connected with the antenna connection point on the lead frame.
6. The packaged chip integrated antenna structure of claim 1, wherein: the packaging chip unit is a single-chip packaging unit or a packaging unit of a plurality of chips with different functions.
7. The packaged chip integrated antenna structure of claim 1, wherein: the antenna comprises a bottom bonding layer and an antenna main body layer, wherein the bottom bonding layer is located on the surface of the plastic package layer, the antenna main body layer is located on the bottom bonding layer, and the bottom bonding layer is used for bonding the antenna and the plastic package layer.
8. The packaged chip integrated antenna structure of claim 7, wherein: the bottom bonding layer is a stainless steel layer or a copper-nickel alloy layer; the antenna main body layer is of a single-layer structure of a stainless steel layer or a copper layer, or the antenna main body layer is of a laminated structure comprising the stainless steel layer and the copper layer.
9. The packaged chip integrated antenna structure of claim 7, wherein: the thickness of the bottom bonding layer is between 1 and 10 mu m.
10. An electronic device comprising the structure of a packaged chip integrated antenna according to any of claims 1 to 9.
11. A method for manufacturing a packaged chip integrated antenna structure according to any one of claims 1 to 9, the method comprising:
providing a packaging chip unit and an antenna sputtering mold; the side surface of the packaging chip unit is exposed out of at least one antenna connecting point, and the front surface of the packaging chip unit is plastically packaged by a plastic packaging layer; an antenna-shaped hollow is formed on the antenna sputtering mold;
covering the antenna sputtering mold on the plastic packaging layer of the packaging chip unit;
sputtering an antenna material on the antenna sputtering mould by adopting a sputtering process;
separating the antenna sputtering mold to form an antenna on the plastic packaging layer; the antenna is formed on the plastic package layer on the front surface of the packaged chip unit, extends to the antenna connection point on the side surface of the packaged chip unit and is electrically connected with the antenna connection point.
12. The method of manufacturing a packaged chip integrated antenna structure according to claim 11, wherein: the antenna sputtering mold is made of metal materials or hard plastic materials.
CN202210621519.6A 2022-06-01 2022-06-01 Structure of packaged chip integrated antenna, electronic equipment and preparation method thereof Pending CN115117032A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210621519.6A CN115117032A (en) 2022-06-01 2022-06-01 Structure of packaged chip integrated antenna, electronic equipment and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210621519.6A CN115117032A (en) 2022-06-01 2022-06-01 Structure of packaged chip integrated antenna, electronic equipment and preparation method thereof

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CN115117032A true CN115117032A (en) 2022-09-27

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