CN115097961A - Clock calibration method of touch chip, touch chip and touch display device - Google Patents
Clock calibration method of touch chip, touch chip and touch display device Download PDFInfo
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- CN115097961A CN115097961A CN202210826783.3A CN202210826783A CN115097961A CN 115097961 A CN115097961 A CN 115097961A CN 202210826783 A CN202210826783 A CN 202210826783A CN 115097961 A CN115097961 A CN 115097961A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0416—Control or interface arrangements specially adapted for digitisers
- G06F3/04166—Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0416—Control or interface arrangements specially adapted for digitisers
- G06F3/0418—Control or interface arrangements specially adapted for digitisers for error correction or compensation, e.g. based on parallax, calibration or alignment
Abstract
The invention discloses a clock calibration method of a touch chip, the touch chip and a touch display device, and relates to the field of touch. Then calculating the number of actual clocks in a reference clock period through a counter and obtaining a first clock deviation value between the number of the actual clocks and the number of theoretical clocks; when the first clock deviation value exceeds the first threshold value, the clock of the touch chip is inaccurate, the counter feeds the first clock deviation value back to the register and calibrates the clock frequency of the touch chip through the register, automatic detection and calibration of the clock can be achieved in a hardware mode through the counter and the register, the calibration mode is simple, and the calibration precision is high.
Description
Technical Field
The present invention relates to the field of touch control, and in particular, to a clock calibration method for a touch chip, a touch chip and a touch display device.
Background
Currently, in touch display devices such as smart phones, tablet computers, and vehicle-mounted electrical appliances, a touch function is integrated in a display screen, or the touch screen and the display screen work in a matching manner, and a touch chip scans a screen according to a certain frequency to obtain a touch signal. However, the touch function is radiated by the screen refreshing of the display screen, and the touch effect is interfered. The refresh period of the display screen is determined by the frequency of Vsync (Vertical Synchronization). Therefore, the touch function needs to be better matched with the display screen, the accurate Vsync needs to be acquired, and the adaptive frame rate is realized according to the change of the Vsync. And using the Vsync as a reference clock source of the touch chip to become a standard of a calibration clock of the touch chip.
The existing touch chip has the defects that the touch chip does not have the functions of automatically detecting and calibrating the clock by hardware, can only be realized by software, and has complex calibration procedure, low calibration speed and low calibration precision when the clock frequency offset is corrected.
Disclosure of Invention
The invention aims to provide a clock calibration method of a touch chip, the touch chip and a touch display device, which can realize automatic detection and calibration of a clock in a hardware mode through a counter and a register, and have the advantages of simple calibration mode and high calibration precision.
In order to solve the technical problem, the invention provides a clock calibration method of a touch chip, wherein the touch chip comprises a counter and a register;
the clock calibration method of the touch chip comprises the following steps:
s1: acquiring a current frame synchronous signal frequency of a display screen connected with the touch chip, wherein a clock cycle corresponding to the current frame synchronous signal frequency is a frequency cycle, and the frequency cycle is used as a reference clock cycle of the touch chip;
s2: calculating the number of actual clocks of the touch chip in the reference clock period through the counter;
s3: comparing the actual clock number with the theoretical clock number corresponding to the frequency cycle to obtain a first clock deviation value;
s4: when the first clock deviation value exceeds a first threshold value, the counter feeds back the first clock deviation value to the register, the register calibrates the clock frequency of the touch chip, and the calibration result is used as the clock frequency of the touch chip for next working;
s5: calculating first clock deviation values in M continuous reference clock cycles, and if N continuous first clock deviation values are smaller than the first threshold value, determining that the clock frequency of the touch chip is calibrated and stable, wherein M and N are positive integers, and M is larger than or equal to N.
Preferably, the following steps are further performed after step S5:
s6: comparing the actual number of clocks after the clock frequency calibration is stable in the step S5 with the theoretical number of clocks corresponding to the frequency cycle to obtain a second clock deviation value;
s7: judging whether the current clock frequency of the touch chip is accurate or not according to the second clock deviation value and a preset threshold value; if the current clock frequency is inaccurate, further selecting a calibration mode, wherein the calibration mode comprises frequency self-adaptive calibration and counter calibration; if the current clock frequency is accurate, no calibration is required.
Preferably, the step S4 is to calibrate the clock frequency of the touch chip through a register, specifically:
when the actual number of clocks is larger than the theoretical number of clocks corresponding to the frequency period, the register reduces an output value, so that current input by an oscillating circuit connected with the output end of the register is reduced, and the clock frequency of the touch chip is reduced;
and when the actual number of clocks is less than the theoretical number of clocks corresponding to the frequency period, the register increases the output value, so that the current input by an oscillation circuit connected with the output end of the register is increased, and the clock frequency of the touch chip is increased.
Preferably, the preset threshold includes a second threshold and a fourth threshold, the number values of which are sequentially reduced;
when the second clock deviation value is larger than the second threshold value, executing the frequency self-adaptive calibration mode;
and when the second clock deviation value is greater than the fourth threshold and smaller than a second threshold, executing the counter calibration mode.
Preferably, the executing the frequency adaptive calibration method specifically includes:
traversing the pre-stored theoretical clock numbers corresponding to each frequency cycle, searching the theoretical clock number with the minimum deviation from the actual clock number corresponding to the stable clock frequency calibration in the step S5, taking the deviation between the two clock numbers as a third deviation value, and defining the frequency corresponding to the theoretical clock number with the minimum deviation from the actual clock number corresponding to the stable clock frequency calibration in the step S5 as an adaptive frequency;
when the third deviation value is smaller than the fifth threshold, the reference clock cycle of the touch chip is switched to the frequency cycle corresponding to the theoretical clock number with the minimum deviation from the actual clock number corresponding to the stable clock frequency calibration in step S5.
Preferably, the executing the frequency adaptive calibration method further includes:
after switching the reference clock cycle of the touch chip to the frequency cycle corresponding to the theoretical clock number with the minimum deviation of the actual clock number corresponding to the stable clock frequency calibration in step S5,
calculating first clock deviation values in P continuous reference clock periods, and if Q continuous first clock deviation values are smaller than the first threshold value, determining that the clock frequency of the touch chip is calibrated stably, wherein P and Q are positive integers, and P is larger than or equal to Q.
Preferably, the calibration method in step S7 further includes executing a software calibration method, and the preset threshold further includes a third threshold with a magnitude value between the second threshold and the fourth threshold;
when the second clock deviation value is greater than the third threshold and smaller than the second threshold, executing the software calibration mode, wherein the executing of the software calibration mode is that the output value of the register is modified through a software program, so that the current input by an oscillation circuit connected with the output end of the register is changed, and the clock frequency of the touch chip is adjusted;
and when the second clock deviation value is larger than the fourth threshold and smaller than the third threshold, executing the counter calibration mode.
In order to solve the above technical problem, the present invention further provides a touch chip, which includes a first control module and an adjustment module;
the first control module comprises a counter, and is used for acquiring the number of actual clocks generated by the touch chip in a reference clock cycle through the counter and triggering the adjusting module when a first clock deviation value between the number of actual clocks and the number of theoretical clocks preset in a corresponding frequency cycle exceeds a first threshold value;
the adjusting module comprises a register, and the adjusting module is used for controlling the register to reduce an output value when the number of the actual clocks is larger than the number of the theoretical clocks, so that the current input by an oscillating circuit connected with the output end of the register is reduced, and the oscillating frequency of the oscillating circuit is reduced; and when the number of the actual clocks is less than the number of the theoretical clocks, controlling the register to increase the output value, so that the current input by the oscillating circuit connected with the output end of the register is increased, and the oscillating frequency of the oscillating circuit is increased.
Preferably, the first control module is further configured to:
after the adjustment of the adjusting module is completed, acquiring the number of the current actual clocks of the touch chip in the reference clock period;
judging whether a frequency cycle serving as a reference clock cycle of the touch chip is changed or not according to a second clock deviation value between the current actual clock number and the theoretical clock number, wherein the frequency cycle is a clock cycle corresponding to the frequency of a frame synchronization signal of a display screen connected with the touch chip;
and when the second clock deviation value is larger than a second preset threshold value, judging that the frequency cycle is changed, and switching the theoretical clock number of the counter to the frequency corresponding to the current actual clock number.
Preferably, switching the theoretical number of clocks of the counter to a frequency corresponding to the current actual number of clocks includes:
obtaining the frequency of the frame synchronization signal after switching according to the corresponding list of the number of the current actual clocks and the number of the theoretical clocks corresponding to each frequency cycle, and defining the frequency of the frame synchronization signal after switching as a self-adaptive frequency;
and updating the theoretical clock number configuration value of the counter to the theoretical clock number configuration value corresponding to the self-adaptive frequency.
Preferably, the adjusting module further comprises a first MOS transistor, a current mirror module and X adjusting sub-modules, wherein each adjusting sub-module comprises a second MOS transistor and a third MOS transistor, and X is a positive integer;
the input end of the register is a first input end of the adjusting module, the output end of the register is connected with first control ends of X adjusting sub-modules, the input end of the first MOS tube is a second input end of the adjusting module, the output end of the first MOS tube is grounded, a common end of the control end of the first MOS tube, which is connected with the input end of the first MOS tube and is connected with the second control ends of the X adjusting sub-modules, is correspondingly connected with the second control ends of the X adjusting sub-modules one by one, the second ends of the X adjusting sub-modules are grounded, the first ends of the X adjusting sub-modules are connected with each other, the common end of the X adjusting sub-modules is connected with the input end of the current mirror module, and the output end of the current mirror module is the output end of the current adjusting module;
the output end of the second MOS tube is the first end of the adjusting submodule, the control end of the second MOS tube is the first control end of the adjusting submodule, the input end of the second MOS tube is connected with the input end of the third MOS tube, the control end of the third MOS tube is the second control end of the adjusting submodule, and the output end of the third MOS tube is the second end of the adjusting submodule.
Preferably, the first control module is further configured to:
when the second clock deviation value is between the second threshold value and the fourth threshold value, adjusting the output value of the register through the counter, so that each regulating submodule outputs a target current output value;
if the number of the actual clocks is larger than the number of the theoretical clocks, controlling the current regulating value output by the register to reduce a unit regulating value; if the number of the actual clocks is smaller than that of the theoretical clocks, controlling the current regulation value output by the register to increase by the unit regulation value;
when the second clock deviation value is smaller than the fourth threshold value, judging that the clock of the touch chip is accurate;
the second threshold and the fourth threshold decrease in sequence.
Preferably, the preset threshold further includes a third threshold with a magnitude value between the second threshold and the fourth threshold;
the first control module is configured to:
when the second clock deviation value is between the second threshold value and the third threshold value, adjusting the output value of the register through software to enable each regulating submodule to output the target current output value;
and when the second clock deviation value is between the third threshold value and the fourth threshold value, adjusting the output value of the register through the counter, so that each regulating submodule outputs the target current output value.
Preferably, the width-to-length ratios between the first MOS transistor and the third MOS transistors in the respective adjusting submodules are different from each other.
Preferably, the oscillation circuit comprises a first phase inverter, a second phase inverter and M oscillation sub-circuits, each oscillation sub-circuit comprises a fourth MOS transistor and a fifth MOS transistor, and M is a positive integer;
the input end of the oscillation sub-circuit is the input end of the oscillation circuit, the output end of the oscillation sub-circuit is connected with the input end of the first phase inverter, the output end of the first phase inverter is connected with the input end of the second phase inverter, and the output end of the second phase inverter is the output end of the oscillation circuit;
m the common terminal that the input interconnect of the fifth MOS pipe among the oscillation sub-circuit and connection does the input of oscillation sub-circuit, the control end of fourth MOS pipe with the common terminal that the control end of fifth MOS pipe is connected and is connected does the first end of oscillation sub-circuit, the drain electrode of fourth MOS pipe with the common terminal that the drain electrode of fifth MOS pipe is connected and is connected does the second end of oscillation sub-circuit, M the first end and the second end of oscillation sub-circuit establish ties in proper order, and the common terminal that the both ends of the circuit after establishing ties are connected and are connected does the output of oscillation sub-circuit.
In order to solve the technical problem, the invention further provides a touch display device, which comprises the touch chip and a display screen connected with the touch chip.
In summary, the present invention provides a clock calibration method for a touch chip, a touch chip and a touch display device, which first obtain a current frame synchronization signal frequency of a display screen connected to the touch chip, and use a clock cycle corresponding to the current frame synchronization signal frequency as a reference clock cycle of the touch chip, so that the clock calibration of the touch chip is more in line with the standard. Then calculating the number of actual clocks in a reference clock period through a counter; comparing the actual number of clocks with the theoretical number of clocks to obtain a first clock deviation value; when the first clock deviation value exceeds the first threshold value, the clock of the touch chip is inaccurate, at the moment, the counter feeds the first clock deviation value back to the register and calibrates the clock frequency of the touch chip through the register, the first clock deviation value in M continuous reference clock cycles is finally calculated, and if N continuous first clock deviation values are all smaller than the first threshold value, the clock frequency of the touch chip is judged to be calibrated stably. In conclusion, the automatic detection and calibration of the clock can be realized in a hardware form through the counter and the register, the calibration mode is simple, the calibration speed is high, and the calibration precision is high.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed in the prior art and the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
Fig. 1 is a flowchart of a clock calibration method for a touch chip according to the present invention;
FIG. 2 is a flowchart of another clock calibration method for a touch chip according to the present invention;
fig. 3 is a schematic structural diagram of a clock calibration apparatus of a touch chip according to the present invention;
FIG. 4 is a partial circuit diagram of a conditioning module provided by the present invention;
fig. 5 is a circuit diagram of a regulating module according to the present invention.
Detailed Description
The core of the invention is to provide a clock calibration method of a touch chip, the touch chip and a touch display device, which can realize automatic detection and calibration of a clock in a hardware mode through a counter and a register, and have the advantages of simple calibration mode, high calibration speed and high calibration precision.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a flowchart of a clock calibration method for a touch chip according to the present invention, where the touch chip includes a counter and a register;
the clock calibration method of the touch chip comprises the following steps:
s1: acquiring a current frame synchronous signal frequency of a display screen connected with a touch chip, wherein a clock cycle corresponding to the current frame synchronous signal frequency is a frequency cycle, and the frequency cycle is used as a reference clock cycle of the touch chip;
the clock is inaccurate because of temperature drift and the like in the use process of the touch chip, and the display screen matched with the touch chip can influence the clock of the touch chip when the screen is refreshed. Firstly, in order to check whether the clock of the touch chip is accurate, a reference clock period needs to be set for the touch chip so as to obtain the number of clocks in the reference clock period and perform subsequent clock verification, and the like.
S2: calculating the number of actual clocks of the touch chip in a reference clock period through a counter;
according to the method and the device, the number of the actual clocks is calculated through the counter, namely the number of the actual clocks is calculated in a hardware mode, so that the calculation is more accurate and faster, and the accuracy of clock calibration is further guaranteed.
S3: comparing the actual number of clocks with the theoretical number of clocks corresponding to the frequency cycle to obtain a first clock deviation value;
before the clock calibration, the number of theoretical clocks generated in a reference clock period when an oscillating circuit of the touch chip is not interfered is preset, so that the clock calibration is carried out subsequently. After the actual number of clocks is obtained, the actual number of clocks is subtracted from the theoretical number of clocks to obtain a first clock deviation value, and the magnitude of the first clock deviation value reflects the deviation degree of the clocks actually generated by the oscillation circuit in the touch chip.
S4: when the first clock deviation value exceeds a first threshold value, the counter feeds back the first clock deviation value to the register, the register calibrates the clock frequency of the touch chip, and the calibration result is used as the clock frequency of the next working of the touch chip;
the first clock skew value reflects the skew degree of a clock actually generated by an oscillating circuit in the touch chip, a first threshold value is preset according to actual conditions, when the absolute value of the first clock skew value exceeds the first threshold value, it indicates that the oscillating circuit in the touch chip needs to perform clock calibration, therefore, the counter feeds the first clock skew value back to the register, and the clock frequency of the touch chip is calibrated through the register. And taking the calibration result as the clock frequency of the next operation of the touch chip, namely keeping the output value of the register at the output value which enables the number of clocks generated by the oscillating circuit to meet the standard.
In addition, when the input value of the oscillating circuit of the touch chip is calibrated by the register, the adjusting circuit can be arranged between the output end of the register and the circuit input end of the oscillating circuit, and the adjusting circuit can output the standard current corresponding to the output value of the register, so that when the output values of the register are different, the currents output by the adjusting circuit are also different, and the purpose of adjusting the input current of the oscillating circuit is further achieved.
S5: calculating first clock deviation values in M continuous reference clock cycles, and if N continuous first clock deviation values are smaller than a first threshold value, determining that the clock frequency of the touch chip is calibrated and stable, wherein M and N are positive integers, and M is larger than or equal to N.
In order to further ensure that the clock of the touch chip is accurate and stable, after the clock frequency of the touch chip is calibrated through the register, first clock deviation values in M continuous reference clock cycles are calculated, and if N continuous first clock deviation values are smaller than a first threshold value, it is determined that the clock frequency of the touch chip is calibrated stably. In conclusion, the clock cycle corresponding to the current frame synchronization signal frequency, that is, the frequency cycle, is used as the reference clock cycle of the touch chip, so that the accuracy of clock calibration is ensured. And the actual clock number of the touch chip in the reference clock period is obtained through the counter, when the first clock deviation value exceeds a first threshold value, namely the clock of the touch chip is not correct, the clock frequency of the touch chip is adjusted through modifying the output value of the register, the clock of the touch chip is calibrated in a hardware mode, the calibration mode is simple, and the calibration precision is high.
On the basis of the above-described embodiment:
as a preferred embodiment, the following steps are further performed after step S5:
s6: comparing the actual number of clocks after the clock frequency calibration is stabilized in the step S5 with the theoretical number of clocks corresponding to the frequency cycle to obtain a second clock deviation value;
s7: judging whether the current clock frequency of the touch chip is accurate or not according to the second clock deviation value and a preset threshold value; if the current clock frequency is not accurate, further selecting a calibration mode, wherein the calibration mode comprises frequency self-adaptive calibration and counter calibration; if the current clock frequency is accurate, no calibration is required.
In this embodiment, considering that the touch chip is influenced by factors such as temperature drift and the like, and also influenced by screen refreshing of a display screen connected to the touch chip, and influence caused by frequency change of the frame synchronization signal is stronger than influence caused by temperature drift, it is not feasible to determine whether the clock of the touch chip is accurate or not according to the original theoretical clock number when the frequency of the frame synchronization signal changes. Therefore, in this embodiment, it is further necessary to determine whether the current clock frequency of the touch chip is accurate after the clock frequency calibration is performed, and if the current clock frequency of the touch chip is still inaccurate, it is necessary to consider whether the current clock frequency is affected by the change of the screen refreshing period of the display screen.
Before judging whether the current clock frequency of the touch chip is accurate, a preset threshold value is set in advance according to the actual performance of the touch chip, and whether the current clock frequency of the touch chip is accurate can be judged according to the magnitude of the second clock deviation value and the magnitude of the preset threshold value. Referring to fig. 2, fig. 2 is a flowchart of another clock calibration method for a touch chip according to another embodiment of the present invention, wherein if the current clock frequency is inaccurate, a calibration method is further selected, the calibration method includes frequency adaptive calibration and counter calibration, for example, when it is determined that a screen refreshing period of a display screen connected to the touch chip may be changed when the current clock frequency is inaccurate, the clock calibration may be implemented only by modifying a reference clock period of the touch chip; when the current clock frequency is only slightly inaccurate, the clock of the touch chip is possibly inaccurate due to the influence of factors such as temperature drift, and the like, and the clock calibration can be continuously carried out by using the counter and the register under the condition; if the current clock frequency is accurate, no calibration is required.
As a preferred embodiment, in step S4, the clock frequency of the touch chip is calibrated through a register, specifically:
when the number of the actual clocks is larger than the number of the theoretical clocks corresponding to the frequency period, the register reduces the output value, so that the current input by an oscillating circuit connected with the output end of the register is reduced, and the clock frequency of the touch chip is reduced;
when the number of the actual clocks is smaller than the number of the theoretical clocks corresponding to the frequency period, the register increases the output value, so that the current input by the oscillation circuit connected with the output end of the register is increased, and the clock frequency of the touch chip is increased.
In this embodiment, when the number of actual clocks is greater than the number of theoretical clocks, it indicates that the clock currently generated by the oscillation circuit is too fast, so that the output value of the register is reduced to reduce the input current of the oscillation circuit and further slow down the clock generated by the oscillation circuit, thereby achieving the purpose of clock calibration.
When the number of the actual clocks is smaller than the number of the theoretical clocks, the clock generated by the oscillating circuit at present is slow, so that the output value of the register is increased, the input current of the oscillating circuit is increased, the clock generated by the oscillating circuit is adjusted fast, and the purpose of clock calibration is achieved.
As a preferred embodiment, the preset threshold includes a second threshold and a fourth threshold, the magnitudes of which are sequentially decreased;
when the second clock deviation value is larger than a second threshold value, executing a frequency self-adaptive calibration mode;
and when the second clock deviation value is greater than the fourth threshold and less than the second threshold, executing a counter calibration mode.
In this embodiment, a second threshold and a fourth threshold are set, the quantity values of which are sequentially reduced, when a second clock deviation value is greater than the second threshold, the degree that the clock of the touch chip is inaccurate is relatively large, and a frequency adaptive calibration mode needs to be executed to calibrate the clock, where the frequency adaptive calibration mode is to reset the number of reference clocks for the touch chip based on the current frame synchronization signal frequency of the display screen;
when the second clock deviation value is greater than the fourth threshold and less than the second threshold, it indicates that the degree of clock inaccuracy of the touch chip is relatively low, and at this time, a counter calibration mode needs to be executed, that is, the counter and the register may be continuously used for clock calibration.
For example, in the case where the frequency of the oscillation circuit is not changed, if the frequency of the frame synchronization signal is changed, the number of actual clocks in a preset period is changed. For the same frame synchronization signal frequency, the theoretical clock number is fixed, for example, the currently used frame synchronization signal frequency has 60HZ, 90HZ, 120HZ, and 144HZ, and the theoretical clock number corresponding to each frame synchronization signal is 1600000, 1066666, 800000, and 666666, respectively.
If the frequency of the frame synchronization signal is changed from 120HZ to 144HZ, the change range of the actual number of clocks is ((144 + 120)/120) ═ 16.7%, and the change range of the actual number of clocks caused by the temperature drift is very small and usually within 2%, so that when the second deviation value between the current actual number of clocks and the theoretical number of clocks is very large, it can be determined that the frequency of the frame synchronization signal of the display screen has changed at this time, that is, the reference clock period of the touch chip needs to be modified, that is, the frequency adaptive calibration needs to be performed.
In this embodiment, different calibration methods are selected for the magnitude of the second clock deviation value, so that the process of clock calibration is faster and more accurate.
As a preferred embodiment, the method for performing frequency adaptive calibration specifically includes:
traversing the pre-stored theoretical clock numbers corresponding to each frequency cycle, searching the theoretical clock number with the minimum deviation from the actual clock number corresponding to the stable clock frequency calibration in the step S5, taking the deviation between the two clock numbers as a third deviation value, and defining the frequency corresponding to the theoretical clock number with the minimum deviation from the actual clock number corresponding to the stable clock frequency calibration in the step S5 as an adaptive frequency;
when the third deviation value is smaller than the fifth threshold, the reference clock cycle of the touch chip is switched to the frequency cycle corresponding to the theoretical clock number with the minimum deviation of the actual clock number corresponding to the stable clock frequency calibration in step S5.
In this embodiment, the performing the frequency adaptive calibration method includes first traversing the pre-stored theoretical clock numbers corresponding to each frequency cycle, searching the theoretical clock number with the minimum deviation from the actual clock number corresponding to the stable clock frequency calibration in step S5, and obtaining a third deviation value between the actual clock number corresponding to the stable clock frequency calibration and the theoretical clock number with the minimum deviation from the pre-stored theoretical clock numbers. If the third deviation value is smaller than the fifth threshold, the reference clock cycle of the touch chip is switched to the frequency cycle corresponding to the theoretical clock number with the minimum deviation of the actual clock number corresponding to the stable clock frequency calibration in step S5, so as to continuously check whether the clock of the touch chip is accurate.
For example, the actual number of clocks that are 5 consecutive times differs from the actual number of clocks corresponding to the frequency of a certain frame synchronization signal by a small amount, indicating that the frame synchronization signal has switched to the frequency and has stabilized. For example, the actual number of clocks detected five times in succession is switched from 1599950 to 799950, 1599950 is close to the theoretical value 1600000, which indicates that the previous frame synchronization signal frequency was 60HZ, 799950 was close to the theoretical value 800000, which indicates that the current frame synchronization signal frequency was 120HZ, i.e., the frame synchronization signal was switched from 60HZ to 120HZ, and it is necessary to set the theoretical number of clocks to the number of clocks corresponding to the clock period corresponding to 120 HZ.
As a preferred embodiment, the performing the frequency adaptive calibration method further includes:
after the reference clock period of the touch chip is switched to the frequency period corresponding to the theoretical clock number with the minimum deviation of the actual clock number corresponding to the stable clock frequency calibration in step S5, calculating first clock deviation values in P consecutive reference clock periods, and if Q consecutive first clock deviation values are all smaller than a first threshold, determining that the clock frequency of the touch chip is calibrated stably, where P and Q are positive integers, and P is greater than or equal to Q.
In this embodiment, in order to further ensure the accuracy of clock calibration, after switching the reference clock cycle of the touch chip to the frequency cycle corresponding to the theoretical clock number with the minimum deviation of the actual clock number corresponding to the stable clock frequency calibration in step S5, continuously calculating the first clock deviation value P times, and if Q first clock deviation values are all smaller than the first threshold, it indicates that the clock of the current touch chip is calibrated, thereby further ensuring the accuracy of clock calibration.
In addition, specific values of P and Q are not particularly limited in this application, and may be set according to actual situations.
As a preferred embodiment, the calibration method in step S7 further includes performing a software calibration method, and the preset threshold further includes a third threshold with a magnitude between the second threshold and the fourth threshold;
when the second clock deviation value is greater than a third threshold value and less than a second threshold value, executing a software calibration mode, wherein the software calibration mode is to modify an output value of the register through a software program so that a current input by an oscillating circuit connected with an output end of the register is changed, and thus the clock frequency of the touch chip is adjusted;
and executing a counter calibration mode when the second clock deviation value is larger than the fourth threshold value and smaller than the third threshold value.
In this embodiment, it is considered that the accuracy of the counter calibration is higher than that of the calibration directly using the software-written register, but the calibration speed is slow. Therefore, when the error is large, the software is used for calibration, and the speed is high; when the error is small, the counter is adopted for calibration, and the precision is high.
Specifically, a third threshold between the second threshold and the fourth threshold is preset, and when the second clock deviation value is greater than the third threshold and less than the second threshold, it indicates that the current clock of the touch chip is inaccurate to a greater extent, so that a software calibration manner is performed, specifically, the output value of the register is modified by a software program, so that the current input by the oscillation circuit connected to the output end of the register is changed, thereby adjusting the clock frequency of the touch chip. When the second clock deviation value is larger than the fourth threshold and smaller than the third threshold, the current inaccurate clock degree of the touch chip is smaller, the counter calibration mode is executed, and the calibration precision is high.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a clock calibration apparatus of a touch chip according to the present invention, where the touch chip includes a control module 1 and an adjustment module 2;
the control module 1 comprises a counter, the control module 1 is used for acquiring the number of actual clocks generated by the touch chip in a reference clock cycle through the counter, and the adjusting module 2 is triggered when a first clock deviation value between the number of the actual clocks and the number of theoretical clocks preset in a corresponding frequency cycle exceeds a first threshold value;
the adjusting module 2 comprises a register, and the adjusting module 2 is used for controlling the register to reduce the output value when the number of the actual clocks is larger than the number of the theoretical clocks, so that the current input by the oscillating circuit connected with the output end of the register is reduced, and the oscillating frequency of the oscillating circuit is reduced; and when the number of the actual clocks is less than the number of the theoretical clocks, controlling the register to increase the output value, so that the current input by the oscillating circuit connected with the output end of the register is increased, and the oscillating frequency of the oscillating circuit is increased.
In this embodiment, the touch chip includes a control module 1 and an adjustment module 2, and first, the control module 1 obtains, through a counter, the number of actual clocks generated in a reference clock cycle by an oscillation circuit for generating a clock in the touch chip. Before clock calibration, theoretical clock number and a first threshold value are set according to the actual situation of the touch chip. After the actual number of clocks is obtained, the actual number of clocks is subtracted from the theoretical number of clocks to obtain a first clock deviation value, if the first clock deviation value exceeds a first threshold value, it indicates that the clock generated by the oscillation circuit is inaccurate at the moment, and the clock calibration needs to be performed, so the control module 1 triggers the adjustment module 2.
When the number of the actual clocks is larger than the number of the theoretical clocks, it indicates that the currently generated clock of the oscillation circuit is too fast, so that the adjusting module 2 reduces the input current of the oscillation circuit through the register to further slow down the clock generated by the oscillation circuit, thereby achieving the purpose of clock calibration.
When the number of the actual clocks is smaller than the number of the theoretical clocks, it indicates that the clock currently generated by the oscillation circuit is slow, so that the adjusting module 2 increases the input current of the oscillation circuit through the register to further adjust the clock generated by the oscillation circuit fast to achieve the purpose of clock calibration.
The specific adjustment value of the adjustment module 2 for the input current of the oscillation circuit may be a preset unit adjustment value, that is, the input current of the oscillation circuit is decreased by one gear or increased by one gear each time the adjustment module 2 is triggered, and the first difference value is kept within a preset error range after the adjustment module 2 performs multiple adjustments; it may also be that a specific mediation value is set according to a first difference between the actual number of clocks and the theoretical number of clocks, so that the first difference is kept within a preset error range as long as the adjusting module 2 is triggered once.
In addition, the number of theoretical clocks and the specific numerical value of the preset error range are not particularly limited, and the theoretical clocks and the specific numerical value of the preset error range can be set according to actual conditions.
As a preferred embodiment, the control module 1 is further configured to:
after the adjustment of the adjusting module 2 is completed, acquiring the number of current actual clocks of the touch chip in a reference clock period;
judging whether a frequency cycle serving as a reference clock cycle of the touch chip is changed or not according to a second clock deviation value between the current actual clock number and the theoretical clock number, wherein the frequency cycle is a clock cycle corresponding to the frequency of a frame synchronization signal of a display screen connected with the touch chip;
and when the second clock deviation value is greater than a second preset threshold value, judging that the frequency cycle is changed, and switching the theoretical clock number of the counter to the frequency corresponding to the current actual clock number.
Considering that when a display screen connected to a touch chip is refreshed, a clock of the touch chip is also affected, a refresh period of the display screen is related to a frequency of a frame synchronization signal, and an effect caused by a frequency change of the frame synchronization signal is stronger than an effect caused by temperature drift, and a clock inaccuracy caused by the frequency change of the frame synchronization signal is more obvious.
Before judging whether the frequency cycle serving as the reference clock cycle of the touch chip is changed, a theoretical clock number and a second clock deviation value are set in advance according to the actual performance of the touch chip, whether the frequency cycle serving as the reference clock cycle of the touch chip is changed can be judged according to the size of the second clock deviation value, when the second clock deviation value is larger than a second threshold value, the frequency cycle is judged to be changed, and the oscillating circuit is switched to the frequency corresponding to the theoretical clock number and the current actual clock number.
In addition, whether the adjustment module 2 completes the adjustment can be determined by determining the stability of the number of the actual clocks, for example, obtaining the number of the actual clocks in 5 consecutive preset time periods, calculating the difference between each number of the actual clocks and the number of the theoretical clocks, and determining that the adjustment of the adjustment module 2 is completed only when the 5 differences are less than the preset value.
As a preferred embodiment, switching the theoretical clock number of the counter to a frequency corresponding to the current actual clock number includes:
obtaining the frequency after the switching of the frame synchronization signal according to a corresponding list of the number of the current actual clocks and the number of the theoretical clocks corresponding to each frequency cycle, and defining the frequency after the switching of the frame synchronization signal as a self-adaptive frequency;
and updating the theoretical clock number configuration value of the counter to the theoretical clock number configuration value corresponding to the self-adaptive frequency.
In this embodiment, a theoretical clock number correspondence list is preset, and the theoretical clock number correspondence list includes a correspondence between the clock number and the frame synchronization signal frequency. After the actual clock number is obtained, comparing the actual clock number with each clock number in the theoretical clock number corresponding list to determine the frequency after the switching of the frame synchronization signal, defining the frequency after the switching of the frame synchronization signal as the adaptive frequency, and switching the theoretical clock number of the counter to the theoretical clock number corresponding to the adaptive frequency, so as to calibrate the clock of the touch chip again and ensure the stable work of the touch chip.
As a preferred embodiment, the adjusting module 2 further includes a first MOS transistor, a current mirror module, and X adjusting sub-modules, where the adjusting sub-modules include a second MOS transistor and a third MOS transistor, and X is a positive integer;
the input end of the register is a first input end of the adjusting module 2, the output end of the register is connected with first control ends of the X adjusting sub-modules, the input end of the first MOS tube is a second input end of the adjusting module 2, the output end of the first MOS tube is grounded, a common end of the control end of the first MOS tube, which is connected with the input end of the first MOS tube, is connected with second control ends of the X adjusting sub-modules in a one-to-one correspondence manner, the second ends of the X adjusting sub-modules are grounded, the first ends of the X adjusting sub-modules are connected with each other, the common end of the X adjusting sub-modules is connected with the input end of the current mirror module, and the output end of the current mirror module is an output end of the current adjusting module 2;
the output end of the second MOS tube is the first end of the adjusting submodule, the control end of the second MOS tube is the first control end of the adjusting submodule, the input end of the second MOS tube is connected with the input end of the third MOS tube, the control end of the third MOS tube is the second control end of the adjusting submodule, and the output end of the third MOS tube is the second end of the adjusting submodule.
In this embodiment, the number of bits output by the register is a current adjustment value of X bits, each bit of the current adjustment value respectively controls one adjustment submodule to output current, and the sum of the output currents of the adjustment submodules is the current input to the oscillation circuit by the adjustment module 2, so that when the current value output by the register is reduced, the current output to the oscillation circuit by the adjustment module 2 is reduced, thereby achieving the purpose of reducing the number of actual clocks generated by the oscillation circuit in a reference clock cycle.
Specifically, the input end of the first MOS transistor is used for inputting a reference current, and the third MOS transistor in each of the adjusting sub-modules forms a cascode current mirror, so that the output current of each adjusting sub-module is proportional to the reference current, and finally the current mirror module outputs the sum of the output currents of the N adjusting sub-modules to the oscillation circuit, so as to calibrate the clock generated by the oscillation circuit.
Referring to fig. 4, fig. 4 is a partial circuit diagram of a regulating module according to the present invention. In fig. 4, MN4 is a first MOS transistor, IREF is a reference current, MN9 and MN5, MN10 and MN6, MN11 and MN7, and MN12 and MN8 respectively form four regulation submodules, where MN9, MN10, MN11, and MN12 are all second MOS transistors, MN5, MN6, MN7, and MN8 are all third MOS transistors, TRIM is a current regulation value with a bit number of 4 bits output by a register, TRIM <0> to TRIM <3> represent the first bit to the fourth bit of TRIM, and IOUT is the sum of output currents of the four regulation submodules.
Referring to fig. 5, fig. 5 is a circuit diagram of a regulating module according to the present invention, the output module in fig. 5 is the circuit shown in fig. 4, and MP4 and MP5 constitute a current mirror module.
As a preferred embodiment, the control module 1 is further configured to:
when the second clock deviation value is between the second threshold value and the fourth threshold value, the output value of the register is adjusted through the counter, so that each adjusting sub-module outputs a target current output value;
if the actual clock number is larger than the theoretical clock number, the current regulating value output by the control register is reduced by a unit regulating value; if the number of the actual clocks is smaller than the number of the theoretical clocks, controlling the current regulating value output by the register to increase a unit regulating value;
when the second clock deviation value is smaller than a fourth threshold value, judging that the clock of the touch chip is accurate;
the second threshold and the fourth threshold decrease in sequence. In this embodiment, if the second clock deviation value is between the second threshold and the fourth threshold, it indicates that the clock is inaccurate, and the output value of the register needs to be adjusted by the counter, so that each adjusting submodule outputs a target current output value, and specifically, if the actual number of clocks is greater than the theoretical number of clocks, the current adjusting value output by the register is controlled to decrease the unit adjusting value, so that the number of clocks generated by the oscillating circuit is decreased; and if the number of the actual clocks is less than the number of the theoretical clocks, controlling the current regulation value output by the register to increase the unit regulation value so as to increase the number of the clocks generated by the oscillation circuit.
If the second clock deviation value is smaller than the fourth threshold value, it indicates that the difference between the actual number of clocks and the theoretical number of clocks is not large, and the clock of the touch chip is judged to be accurate.
In summary, in the embodiment, whether the clock of the touch chip is accurate is determined according to the specific deviation of the second clock deviation value, and the corresponding clock calibration mode is selected, so that the accuracy of clock calibration is ensured.
As a preferred embodiment, the preset threshold further includes a third threshold having a magnitude between the second threshold and the fourth threshold;
the control module 1 is used for:
when the second clock deviation value is between the second threshold value and the third threshold value, the output value of the register is adjusted through software, so that each regulating submodule outputs a target current output value;
and when the second clock deviation value is between the third threshold value and the fourth threshold value, the output value of the register is adjusted through the counter, so that each adjusting submodule outputs a target current output value.
In this embodiment, in consideration of the fact that the accuracy of the counter calibration is higher than that of the counter calibration directly using the software write register, but the speed is slow, so that the software calibration can be selected when the error is large, and the counter calibration can be selected when the error is small.
Specifically, when the second clock deviation value is between the second threshold value and the third threshold value, the degree of clock inaccuracy is relatively large, and the output value of the register is adjusted through software, so that each adjusting sub-module outputs a target current output value; when the second clock deviation value is between the third threshold value and the fourth threshold value, the clock deviation degree is small, and the output value of the register is adjusted through the counter, so that each adjusting submodule outputs a target current output value.
In a preferred embodiment, the width-to-length ratios of the first MOS transistor and the third MOS transistors in the respective regulator sub-modules are different from each other.
The first MOS tube and the third MOS tube form a common-gate-common-source current mirror, the ratio of the output current of the first MOS tube to the output current of the third MOS tube is determined by the width-length ratio of the first MOS tube to the third MOS tube, in the embodiment, the width-length ratio of the first MOS tube to the third MOS tube in each regulation submodule is different from each other, so that the adjustment of the input current of the oscillation circuit in different degrees can be realized by changing the current adjustment value output by the second control module, the adjustment mode is more flexible, and the adjustment range is larger.
As a preferred embodiment, the oscillation circuit includes a first inverter, a second inverter and M oscillation sub-circuits, the oscillation sub-circuit includes a fourth MOS transistor and a fifth MOS transistor, M is a positive integer;
the input end of the oscillation sub-circuit is the input end of the oscillation circuit, the output end of the oscillation sub-circuit is connected with the input end of the first phase inverter, the output end of the first phase inverter is connected with the input end of the second phase inverter, and the output end of the second phase inverter is the output end of the oscillation circuit;
the common end that the input interconnect of the fifth MOS pipe among M oscillator sub-circuit and connection is the input of oscillator sub-circuit, the common end that the control end of fourth MOS pipe and the control end of fifth MOS pipe are connected and are connected is the first end of oscillator sub-circuit, the common end that the drain electrode of fourth MOS pipe and the drain electrode of fifth MOS pipe are connected and are connected is the second end of oscillator sub-circuit, the first end and the second end of M oscillator sub-circuit are established ties in proper order, the common end that the both ends of the circuit after establishing ties are connected and are connected is the output of oscillator sub-circuit.
Referring to fig. 5, fig. 5 is a circuit diagram of an adjusting module according to the present invention, in fig. 5, MP1 and MN1, MP2 and MN2, and MP3 and MN3 respectively form 3 oscillator sub-circuits, where MP1, MP2, and MP3 are fourth MOS transistors, MN1, MN2, and MN3 are fifth MOS transistors, INV1 is a first inverter, and INV2 is a second inverter.
The invention also provides a touch display device which comprises the touch chip and a display screen connected with the touch chip.
For the related description of the touch display device provided by the present invention, please refer to the above-mentioned embodiments of the touch chip and the control method of the touch chip, which are not described herein again.
In the present specification, the embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed in the embodiment corresponds to the method disclosed in the embodiment, so that the description is simple, and the relevant points can be referred to the description of the method part.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Claims (16)
1. The clock calibration method of the touch chip is characterized in that the touch chip comprises a counter and a register;
the clock calibration method of the touch chip comprises the following steps:
s1: acquiring a current frame synchronous signal frequency of a display screen connected with the touch chip, wherein a clock cycle corresponding to the current frame synchronous signal frequency is a frequency cycle, and the frequency cycle is used as a reference clock cycle of the touch chip;
s2: calculating the number of actual clocks of the touch chip in the reference clock period through the counter;
s3: comparing the actual clock number with the theoretical clock number corresponding to the frequency cycle to obtain a first clock deviation value;
s4: when the first clock deviation value exceeds a first threshold value, the counter feeds back the first clock deviation value to the register, the register calibrates the clock frequency of the touch chip, and the calibration result is used as the clock frequency of the touch chip for next working;
s5: calculating first clock deviation values in M continuous reference clock cycles, and if N continuous first clock deviation values are smaller than the first threshold value, determining that the clock frequency of the touch chip is calibrated and stable, wherein M and N are positive integers, and M is larger than or equal to N.
2. The clock calibration method of a touch chip according to claim 1, further comprising the following steps after step S5:
s6: comparing the actual number of clocks after the clock frequency calibration is stable in the step S5 with the theoretical number of clocks corresponding to the frequency cycle to obtain a second clock deviation value;
s7: judging whether the current clock frequency of the touch chip is accurate or not according to the second clock deviation value and a preset threshold value; if the current clock frequency is inaccurate, further selecting a calibration mode, wherein the calibration mode comprises frequency self-adaptive calibration and counter calibration; if the current clock frequency is accurate, no calibration is required.
3. The clock calibration method of the touch chip according to claim 1 or 2, wherein the step S4 calibrates the clock frequency of the touch chip through a register, specifically:
when the actual number of clocks is larger than the theoretical number of clocks corresponding to the frequency period, the register reduces an output value, so that the current input by an oscillation circuit connected with the output end of the register is reduced, and the clock frequency of the touch chip is reduced;
and when the actual number of clocks is less than the theoretical number of clocks corresponding to the frequency period, the register increases the output value, so that the current input by an oscillation circuit connected with the output end of the register is increased, and the clock frequency of the touch chip is increased.
4. The clock calibration method of the touch chip according to claim 2, wherein the preset threshold includes a second threshold and a fourth threshold, the number values of which are sequentially decreased;
when the second clock deviation value is larger than the second threshold value, executing the frequency self-adaptive calibration mode;
and when the second clock deviation value is greater than the fourth threshold and smaller than a second threshold, executing the counter calibration mode.
5. The clock calibration method of the touch chip according to claim 4, wherein the performing the frequency adaptive calibration method specifically comprises:
traversing the pre-stored theoretical clock numbers corresponding to each frequency cycle, searching the theoretical clock number with the minimum deviation from the actual clock number corresponding to the stable clock frequency calibration in the step S5, taking the deviation between the two clock numbers as a third deviation value, and defining the frequency corresponding to the theoretical clock number with the minimum deviation from the actual clock number corresponding to the stable clock frequency calibration in the step S5 as an adaptive frequency;
when the third deviation value is smaller than the fifth threshold, the reference clock cycle of the touch chip is switched to the frequency cycle corresponding to the theoretical clock number with the minimum deviation of the actual clock number corresponding to the stable clock frequency calibration in step S5.
6. The clock calibration method of a touch chip according to claim 5, wherein the performing the frequency adaptive calibration method further comprises:
after switching the reference clock cycle of the touch chip to the frequency cycle corresponding to the theoretical clock number with the minimum deviation of the actual clock number corresponding to the stable clock frequency calibration in step S5,
calculating first clock deviation values in P continuous reference clock periods, and if Q continuous first clock deviation values are smaller than the first threshold value, determining that the clock frequency of the touch chip is calibrated and stable, wherein P and Q are positive integers, and P is larger than or equal to Q.
7. The clock calibration method of a touch chip according to claim 4,
the calibration method in step S7 further includes executing a software calibration method, and the preset threshold further includes a third threshold with a magnitude value between the second threshold and the fourth threshold;
when the second clock deviation value is greater than the third threshold and smaller than the second threshold, executing the software calibration mode, wherein the software calibration mode is to modify the output value of the register through a software program so that the current input by an oscillating circuit connected with the output end of the register is changed, thereby adjusting the clock frequency of the touch chip;
and when the second clock deviation value is larger than the fourth threshold and smaller than the third threshold, executing the counter calibration mode.
8. A touch chip, comprising the clock calibration apparatus of the touch chip of claim 7, further comprising a first control module and a regulation module;
the first control module comprises a counter, and is used for acquiring the number of actual clocks generated by the touch chip in a reference clock cycle through the counter, and triggering the adjusting module when a first clock deviation value between the number of the actual clocks and a theoretical clock number preset in a corresponding frequency cycle exceeds a first threshold;
the adjusting module comprises a register, and the adjusting module is used for controlling the register to reduce an output value when the number of the actual clocks is larger than the number of the theoretical clocks, so that the current input by an oscillating circuit connected with the output end of the register is reduced, and the oscillating frequency of the oscillating circuit is reduced; and when the number of the actual clocks is smaller than that of the theoretical clocks, controlling the register to increase the output value, so that the current input by the oscillating circuit connected with the output end of the register is increased, and the oscillating frequency of the oscillating circuit is increased.
9. The touch chip of claim 8, wherein the first control module is further configured to:
after the adjustment of the adjusting module is completed, acquiring the number of the current actual clocks of the touch chip in the reference clock period;
judging whether a frequency cycle serving as a reference clock cycle of the touch chip is changed or not according to a second clock deviation value between the current actual clock number and the theoretical clock number, wherein the frequency cycle is a clock cycle corresponding to the frequency of a frame synchronization signal of a display screen connected with the touch chip;
and when the second clock deviation value is larger than a second preset threshold value, judging that the frequency cycle is changed, and switching the theoretical clock number of the counter to the frequency corresponding to the current actual clock number.
10. The touch chip of claim 9, wherein switching the theoretical number of clocks of the counter to a frequency corresponding to the current actual number of clocks comprises:
obtaining the frequency after the frame synchronization signal is switched according to the list corresponding to the number of the current actual clocks and the number of the theoretical clocks corresponding to each frequency cycle, and defining the frequency after the frame synchronization signal is switched as a self-adaptive frequency;
and updating the theoretical clock number configuration value of the counter to the theoretical clock number configuration value corresponding to the self-adaptive frequency.
11. The touch chip of any one of claims 8 to 10, wherein the adjustment module further comprises a first MOS transistor, a current mirror module, and X adjustment sub-modules, wherein the adjustment sub-modules comprise a second MOS transistor and a third MOS transistor, and X is a positive integer;
the input end of the register is a first input end of the adjusting module, the output end of the register is connected with first control ends of X adjusting sub-modules, the input end of the first MOS tube is a second input end of the adjusting module, the output end of the first MOS tube is grounded, a common end of the control end of the first MOS tube, which is connected with the input end of the first MOS tube and is connected with the second control ends of the X adjusting sub-modules, is correspondingly connected with the second control ends of the X adjusting sub-modules one by one, the second ends of the X adjusting sub-modules are grounded, the first ends of the X adjusting sub-modules are connected with each other, the common end of the X adjusting sub-modules is connected with the input end of the current mirror module, and the output end of the current mirror module is the output end of the current adjusting module;
the output of second MOS pipe does the first end of regulation submodule, the control end of second MOS pipe does the first control end of regulation submodule, the input of second MOS pipe with the input of third MOS pipe is connected, the control end of third MOS pipe does the second control end of regulation submodule, the output of third MOS pipe does the second end of regulation submodule.
12. The touch chip of claim 11, wherein the first control module is further configured to:
when the second clock deviation value is between the second threshold value and the fourth threshold value, adjusting the output value of the register through the counter, so that each regulating submodule outputs a target current output value;
if the number of the actual clocks is larger than the number of the theoretical clocks, controlling the current regulating value output by the register to reduce a unit regulating value; if the number of the actual clocks is less than the number of the theoretical clocks, controlling the current regulating value output by the register to increase the unit regulating value;
when the second clock deviation value is smaller than the fourth threshold value, judging that the clock of the touch chip is accurate;
the second threshold and the fourth threshold decrease in sequence.
13. The touch chip of claim 12, wherein the predetermined threshold further comprises a third threshold with a magnitude between the second threshold and the fourth threshold;
the first control module is configured to:
when the second clock deviation value is between the second threshold value and the third threshold value, adjusting the output value of the register through software to enable each regulating submodule to output the target current output value;
and when the second clock deviation value is between the third threshold value and the fourth threshold value, adjusting the output value of the register through the counter, so that each regulating submodule outputs the target current output value.
14. The touch chip of claim 13, wherein the width-to-length ratios between the first MOS transistor and the third MOS transistor in each of the adjusting submodules are different from each other.
15. The touch chip of claim 11, wherein the oscillation circuit comprises a first inverter, a second inverter and M oscillation sub-circuits, the oscillation sub-circuits comprise a fourth MOS transistor and a fifth MOS transistor, and M is a positive integer;
the input end of the oscillation sub-circuit is the input end of the oscillation circuit, the output end of the oscillation sub-circuit is connected with the input end of the first phase inverter, the output end of the first phase inverter is connected with the input end of the second phase inverter, and the output end of the second phase inverter is the output end of the oscillation circuit;
m the common terminal that the input interconnect of the fifth MOS pipe among the oscillation sub-circuit and connection does the input of oscillation sub-circuit, the control end of fourth MOS pipe with the common terminal that the control end of fifth MOS pipe is connected and is connected does the first end of oscillation sub-circuit, the drain electrode of fourth MOS pipe with the common terminal that the drain electrode of fifth MOS pipe is connected and is connected does the second end of oscillation sub-circuit, M the first end and the second end of oscillation sub-circuit establish ties in proper order, and the common terminal that the both ends of the circuit after establishing ties are connected and are connected does the output of oscillation sub-circuit.
16. A touch display device, comprising the touch chip of any one of claims 8 to 15, and further comprising a display screen connected to the touch chip.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210826783.3A CN115097961A (en) | 2022-07-14 | 2022-07-14 | Clock calibration method of touch chip, touch chip and touch display device |
| TW111143829A TWI837951B (en) | 2022-07-14 | 2022-11-16 | Clock calibration method of touch chip, touch chip and touch display device |
| PCT/CN2023/106731 WO2024012436A1 (en) | 2022-07-14 | 2023-07-11 | Clock calibration method for touch control chip, touch control chip, and touch control display apparatus |
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| CN202210826783.3A CN115097961A (en) | 2022-07-14 | 2022-07-14 | Clock calibration method of touch chip, touch chip and touch display device |
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| CN115097961A true CN115097961A (en) | 2022-09-23 |
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| CN202210826783.3A Pending CN115097961A (en) | 2022-07-14 | 2022-07-14 | Clock calibration method of touch chip, touch chip and touch display device |
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| CN (1) | CN115097961A (en) |
| WO (1) | WO2024012436A1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116909351A (en) * | 2023-09-14 | 2023-10-20 | 深圳扬兴科技有限公司 | Clock chip internal clock precision correction method |
| WO2024012436A1 (en) * | 2022-07-14 | 2024-01-18 | 敦泰科技(深圳)有限公司 | Clock calibration method for touch control chip, touch control chip, and touch control display apparatus |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9041636B2 (en) * | 2011-01-14 | 2015-05-26 | Sharp Kabushiki Kaisha | Liquid crystal display device and drive method therefor |
| CN103513698B (en) * | 2012-06-29 | 2017-03-01 | 联想(北京)有限公司 | A kind of clock signal calibration, device and electronic equipment |
| JP6208975B2 (en) * | 2013-05-07 | 2017-10-04 | シナプティクス・ジャパン合同会社 | Display driver IC |
| JP2015191120A (en) * | 2014-03-28 | 2015-11-02 | シナプティクス・ディスプレイ・デバイス合同会社 | display drive circuit |
| CN108111166A (en) * | 2018-01-08 | 2018-06-01 | 深圳信息职业技术学院 | A kind of on piece oscillator and its calibration method with self-calibration function |
| CN114285409A (en) * | 2020-09-28 | 2022-04-05 | 深圳英集芯科技股份有限公司 | Method and related device for automatically calibrating clock frequency in chip |
| CN113721702A (en) * | 2021-09-06 | 2021-11-30 | 合肥松豪电子科技有限公司 | Clock compensation method applied to externally-hung touch chip |
| CN115097961A (en) * | 2022-07-14 | 2022-09-23 | 敦泰科技(深圳)有限公司 | Clock calibration method of touch chip, touch chip and touch display device |
-
2022
- 2022-07-14 CN CN202210826783.3A patent/CN115097961A/en active Pending
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2023
- 2023-07-11 WO PCT/CN2023/106731 patent/WO2024012436A1/en unknown
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024012436A1 (en) * | 2022-07-14 | 2024-01-18 | 敦泰科技(深圳)有限公司 | Clock calibration method for touch control chip, touch control chip, and touch control display apparatus |
| CN116909351A (en) * | 2023-09-14 | 2023-10-20 | 深圳扬兴科技有限公司 | Clock chip internal clock precision correction method |
| CN116909351B (en) * | 2023-09-14 | 2023-12-19 | 深圳扬兴科技有限公司 | Clock chip internal clock precision correction method |
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| WO2024012436A1 (en) | 2024-01-18 |
| TW202403521A (en) | 2024-01-16 |
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