CN115084360A - Ferroelectric multivalued memory with local regulation and control characteristics and preparation method thereof - Google Patents

Ferroelectric multivalued memory with local regulation and control characteristics and preparation method thereof Download PDF

Info

Publication number
CN115084360A
CN115084360A CN202210608891.3A CN202210608891A CN115084360A CN 115084360 A CN115084360 A CN 115084360A CN 202210608891 A CN202210608891 A CN 202210608891A CN 115084360 A CN115084360 A CN 115084360A
Authority
CN
China
Prior art keywords
ferroelectric
memory
local
hafnium
gate electrodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202210608891.3A
Other languages
Chinese (zh)
Inventor
王天宇
孟佳琳
何振宇
陈琳
孙清清
张卫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fudan University
Original Assignee
Fudan University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fudan University filed Critical Fudan University
Priority to CN202210608891.3A priority Critical patent/CN115084360A/en
Publication of CN115084360A publication Critical patent/CN115084360A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20Multistable switching devices, e.g. memristors
    • H10N70/253Multistable switching devices, e.g. memristors having three or more electrodes, e.g. transistor-like devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011Manufacture or treatment of multistable switching devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/881Switching materials
    • H10N70/883Oxides or nitrides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/881Switching materials
    • H10N70/883Oxides or nitrides
    • H10N70/8836Complex metal oxides, e.g. perovskites, spinels

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)

Abstract

The invention discloses a ferroelectric multivalued memory with local regulation and control characteristics and a preparation method thereof. The ferroelectric multivalued memory with local regulating characteristics of the present invention comprises: a substrate; a channel material formed on the substrate; a source electrode and a drain electrode formed at both ends of the channel material; a hafnium-based ferroelectric material covering the device as a gate dielectric layer; and four gate electrodes are arranged on the gate dielectric layer in parallel at intervals and are positioned above the channel material, and electric pulses are used as excitation sources of the ferroelectric memory to apply voltages to the four gate electrodes respectively to obtain four different resistance states '00', '01', '10' and '11', so that a multi-value storage function based on local regulation and control characteristics is realized.

Description

Ferroelectric multi-value memory with local regulation and control characteristics and preparation method thereof
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to a ferroelectric multi-value memory with local regulation and control characteristics and a preparation method thereof.
Background
The memory plays an important role in the field of integrated circuits, and data can be written in and erased by regulating and controlling high and low resistance states. However, the conventional memory has only two memory states of "0" and "1", and the memory capacity can be realized only by integrating more device cells in a unit area. As the size of semiconductor features is continuously reduced, the size of the memory is also gradually faced with physical limits, and it is difficult to achieve an increase in memory capacity through an increase in integration density. Therefore, it is necessary to develop a new memory device having a multi-value storage capability, which achieves an increase in the overall storage capacity from the viewpoint of the increase in the storage capability of a single device cell.
Ferroelectric memories, which are a typical memory device, have been the focus of research in recent years. The traditional ferroelectric memory is based on PbZr x Ti 1-x O 3 (PZT)、BaTiO 3 (BTO) and the like, and has the problems of poor CMOS process compatibility and environmental pollution. Doped hafnium-based ferroelectric materials (Hf) 0.5 Zr 0.5 O 2 ,HfAlO x ,HfLaO x ,HfSiO x Etc.) has application as an environmentally friendly ferroelectric material system compatible with CMOS processes.
Based on the principle of electric domain polarization inversion, the doped hafnium-based ferroelectric memory can realize stable resistance state transition and information storage. Most of the existing hafnium-doped ferroelectric memories realize the conversion of multi-valued storage states based on the incomplete switching of electric domains under the regulation and control of voltage. However, this operation mode faces problems such as uncertainty of the inversion of the electric domain and instability and randomness of the intermediate state, and is not suitable for the application of the multi-value memory. The ferroelectric multi-value memory with local regulation and control characteristics needs to be developed, electric domain turnover is regulated and controlled quantitatively, stable step-type multi-state transformation is realized, and the ferroelectric multi-value memory has important significance for commercial application.
Disclosure of Invention
The invention relates to a ferroelectric multivalued memory with local regulation and control characteristics, which comprises: a substrate; a channel material formed on the substrate; a source electrode and a drain electrode formed at both ends of the channel material; a hafnium-based ferroelectric material covering the device as a gate dielectric layer; and four gate electrodes are arranged on the gate dielectric layer in parallel at intervals and are positioned above the channel material, and electric pulses are used as excitation sources of the ferroelectric memory to apply voltages to the four gate electrodes respectively to obtain four different resistance states '00', '01', '10' and '11', so that a multi-value storage function based on local regulation and control characteristics is realized.
In the ferroelectric multivalued memory with local regulation and control characteristics, preferably, the channel material is InGaZnO 4 ZnO or SnO 2
In the ferroelectric multi-value memory with local control characteristics of the present invention, preferably, the hafnium-based ferroelectric material is Hf 0.5 Zr 0.5 O 2 ,HfAlO x ,HfLaO x Or HfSiO x
In the ferroelectric multivalued memory having local control characteristics according to the present invention, preferably, the pitch between adjacent gate electrodes is 5 μm to 20 μm.
The invention also discloses a preparation method of the ferroelectric multivalued memory with local regulation and control characteristics, which comprises the following steps: forming a channel material on a substrate; forming a source electrode and a drain electrode at two ends of the channel material; forming a hafnium-based ferroelectric material on the device to serve as a gate dielectric layer; and forming a separation gate electrode on the gate dielectric layer, wherein the four gate electrodes are arranged in parallel at intervals and are positioned above the channel material, and applying voltages to the four gate electrodes by using an electric pulse as an excitation source of the ferroelectric memory to obtain four different resistance states '00', '01', '10' and '11', thereby realizing a multi-value storage function based on local regulation and control characteristics.
In the method for manufacturing a ferroelectric multivalued memory with local control characteristics according to the present invention, preferably, the step of forming the hafnium-based ferroelectric material includes: growing a hafnium-doped base material film with the thickness of 10nm to 20nm at the temperature of 250 ℃ to 350 ℃ by utilizing an atomic layer deposition technology; using rapid thermal annealing equipment in N 2 Annealing at 450-550 ℃ for 20s to up to60s, a film having ferroelectric properties was obtained.
In the method for manufacturing a ferroelectric multivalued memory with local control characteristics of the present invention, preferably, the hafnium-based ferroelectric material is Hf 0.5 Zr 0.5 O 2 ,HfAlO x ,HfLaO x Or HfSiO x
In the method for manufacturing the ferroelectric multivalued memory with local regulation and control characteristics, the distance between the adjacent gate electrodes is preferably 5-20 μm.
Has the advantages that:
(1) by designing a memory with multi-valued resistance states, the memory capacity is improved from the perspective of a single device, the problem that the memory density of an integrated circuit is difficult to improve can be solved, and a high-capacity chip with multi-bit memory capability is developed.
(2) The doped hafnium-based thin film material is used as a novel inorganic ferroelectric material, can be grown and deposited by utilizing an atomic layer deposition technology, can solve the problems of environmental pollution caused by lead in the traditional ferroelectric thin film and incompatibility of CMOS (complementary metal oxide semiconductor) process, and is suitable for the next generation of hafnium-based ferroelectric memory.
(3) The traditional electric domain modulation mode is broken through in the working principle, the electric domain controlled by the separation area is designed to be turned step by step to replace the incomplete turning of the electric domain in the traditional ferroelectric device, the randomness of the device resistance in the incomplete turning process is avoided, and the stable multi-value resistance state is obtained.
Drawings
Fig. 1 is a flow chart of a method for manufacturing a ferroelectric multivalued memory with local control characteristics.
Fig. 2 to 5 are schematic structural diagrams of stages of a ferroelectric multivalued memory with local control characteristics.
Fig. 6 and 7 are schematic diagrams of the control of four different electric domain switching states by using an electric pulse as an excitation source of a ferroelectric multivalued memory.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more clearly and completely understood, the technical solutions in the embodiments of the present invention will be described below with reference to the accompanying drawings in the embodiments of the present invention, and it should be understood that the specific embodiments described herein are only for explaining the present invention and are not intended to limit the present invention. The described embodiments are only some embodiments of the invention, not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "upper", "lower", "vertical", "horizontal", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience in describing the present invention and simplifying the description, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
Furthermore, numerous specific details of the invention, such as structure, materials, dimensions, processing techniques and techniques of the devices are described below in order to provide a more thorough understanding of the invention. However, as will be understood by those skilled in the art, the present invention may be practiced without these specific details. Unless otherwise specified below, each part in the device may be formed of a material known to those skilled in the art, or a material having a similar function developed in the future may be used.
Fig. 1 is a flow chart of a method for manufacturing a ferroelectric multivalued memory with local control characteristics. As shown in fig. 1, the method for manufacturing a ferroelectric multivalued memory with local control characteristics includes the following steps:
in step S1, a silicon oxide substrate is prepared for preparing a ferroelectric multi-value memory having local regulating characteristics. The silicon oxide substrate includes a silicon oxide layer 101 and a silicon wafer 100, wherein the thickness of the silicon oxide layer may be 100nm, 200nm, 300 nm.
In step S2, InGaZnO with a thickness of 40 nm-70 nm is prepared on the substrate by physical vapor deposition 4 The film serves as a channel 102, as shown in fig. 2. The length of the channel is preferably 10 mu m, and the range can be 5 mu m-40 mu m; the channel width is preferably 100 μm, and the range may be 50 μm to 150 μm. The channel material can also be ZnO or SnO 2 And the like.
In step S3, source electrode 103 and drain electrode 104 are fabricated across the channel material using photolithography and electron beam evaporation, as shown in fig. 3. Among them, the thickness of Ti is preferably 5nm to 15nm, and the thickness of Pt is preferably 30nm to 70 nm. The source and drain electrodes may be of Ti/Pt, Ti/Au, Ti/Pd, etc.
In step S4, growing a doped hafnium-based material Hf with a thickness of 10nm to 20nm at a temperature of 250 ℃ to 350 ℃ by using an atomic layer deposition technique 0.5 Zr 0.5 O 2 Film and annealing at N using a rapid thermal annealing apparatus 2 Annealing is performed in the atmosphere, and a film with ferroelectricity is obtained as the gate dielectric layer 105, as shown in fig. 4. The annealing temperature is preferably 500 ℃, and the range can be 450-550 ℃; the annealing time is preferably 20s, and the range of 20s to 60s is preferable. The doped hafnium-based material may also be HfAlO x ,HfLaO x ,HfSiO x And the like.
In step S5, Al with a thickness of 30nm to 70nm is prepared on the gate dielectric layer 105 by photolithography and electron beam evaporation to form separate gate electrodes 106,107,108,109, and a ferroelectric multivalued memory with locally controlled characteristics is obtained, as shown in fig. 5. The split gate electrodes 106,107,108,109 are located above the channel 102, i.e. the projections of the split gate electrodes in the horizontal direction have an overlapping area with the projections of the channel in the horizontal direction. Preferably, the extension direction of the respective gate electrode is perpendicular to the extension direction of the channel material. The size of the overlapping area of each electrode and the channel is 10 mu m multiplied by 10 mu m, and the distance between the adjacent electrodes is 5 mu m to 20 mu m. The material of the split gate electrode may also be Au, Pt, Pd, etc.
In step S6, as shown in fig. 6 and 7, the local domain inversion effect of the hafnium-doped ferroelectric material is achieved by applying voltages to the 4 gate electrodes using the electrical pulse as the excitation source of the ferroelectric multi-value memory. Because the areas with applied voltage are different, the corresponding areas can generate electric domain inversion, and the areas without applied voltage can not generate electric domain inversion, thereby realizing the control of four different electric domain inversion states corresponding to four different stable multivalued resistance states. Specifically, when a voltage is applied only to the gate electrode 106, the resistance state corresponding to 1: "00"; when a voltage is applied to the gate electrodes 106,107, the corresponding resistance state 2: "01"; when a voltage is applied to the gate electrodes 106,107,108, the corresponding resistance state 3: "10"; when a voltage is applied to the gate electrodes 106,107,108,109, the corresponding resistance state 4: "11".
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention.

Claims (8)

1. A ferroelectric multivalued memory with local control characteristics is characterized in that,
the method comprises the following steps:
a substrate;
a channel material formed on the substrate;
a source electrode and a drain electrode formed at both ends of the channel material;
a hafnium-based ferroelectric material covering the device as a gate dielectric layer;
four gate electrodes are arranged on the gate dielectric layer in parallel at intervals and are positioned above the channel material,
the electric pulse is used as an excitation source, voltages are respectively applied to the four gate electrodes, four different resistance states '00', '01', '10' and '11' are obtained, and the multi-value storage function based on the local regulation and control characteristics is achieved.
2. A ferroelectric multi-value memory with local regulating characteristics as claimed in claim 1,
the channel material is InGaZnO 4 ZnO or SnO 2
3. A ferroelectric multi-value memory with local regulating characteristics as claimed in claim 1,
the hafnium-based ferroelectric material is Hf 0.5 Zr 0.5 O 2 ,HfAlO x ,HfLaO x Or HfSiO x
4. A ferroelectric multi-value memory with local regulating characteristics as claimed in claim 1,
the pitch of the adjacent gate electrodes is 5 to 20 μm.
5. A method for preparing ferroelectric multivalued memory with local regulation and control characteristics is characterized in that,
the method comprises the following steps:
forming a channel material on a substrate;
forming a source electrode and a drain electrode at two ends of the channel material;
forming a hafnium-based ferroelectric material on the device to serve as a gate dielectric layer;
forming a separation gate electrode on the gate dielectric layer, wherein the four gate electrodes are arranged in parallel at intervals and are positioned above the channel material,
the electric pulse is used as an excitation source, voltages are respectively applied to the four gate electrodes, four different resistance states '00', '01', '10' and '11' are obtained, and the multi-value storage function based on the local regulation and control characteristics is achieved.
6. A method for manufacturing a ferroelectric multi-valued memory having local regulating properties as claimed in claim 5,
the step of forming the hafnium-based ferroelectric material includes:
growing a hafnium-doped base material film with the thickness of 10nm to 20nm at the temperature of 250 ℃ to 350 ℃ by utilizing an atomic layer deposition technology;
using rapid thermal annealing equipment at N 2 Annealing at 450-550 deg.C for 20-60 s to obtain ferroelectric film.
7. A method for manufacturing a ferroelectric multi-valued memory having local regulating properties as claimed in claim 5,
the hafnium-based ferroelectric material is Hf 0.5 Zr 0.5 O 2 ,HfAlO x ,HfLaO x Or HfSiO x
8. The method of manufacturing a ferroelectric multi-valued memory having local regulatory properties as in claim 5,
the pitch of the adjacent gate electrodes is 5 to 20 μm.
CN202210608891.3A 2022-05-31 2022-05-31 Ferroelectric multivalued memory with local regulation and control characteristics and preparation method thereof Pending CN115084360A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210608891.3A CN115084360A (en) 2022-05-31 2022-05-31 Ferroelectric multivalued memory with local regulation and control characteristics and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210608891.3A CN115084360A (en) 2022-05-31 2022-05-31 Ferroelectric multivalued memory with local regulation and control characteristics and preparation method thereof

Publications (1)

Publication Number Publication Date
CN115084360A true CN115084360A (en) 2022-09-20

Family

ID=83248458

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210608891.3A Pending CN115084360A (en) 2022-05-31 2022-05-31 Ferroelectric multivalued memory with local regulation and control characteristics and preparation method thereof

Country Status (1)

Country Link
CN (1) CN115084360A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117156863A (en) * 2023-10-31 2023-12-01 浙江大学杭州国际科创中心 Ferroelectric memory structure, method of manufacturing the same, ferroelectric memory device, and method of controlling the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117156863A (en) * 2023-10-31 2023-12-01 浙江大学杭州国际科创中心 Ferroelectric memory structure, method of manufacturing the same, ferroelectric memory device, and method of controlling the same
CN117156863B (en) * 2023-10-31 2024-02-06 浙江大学杭州国际科创中心 Ferroelectric memory structure, method of manufacturing the same, ferroelectric memory device, and method of controlling the same

Similar Documents

Publication Publication Date Title
US10192972B2 (en) Semiconductor ferroelectric storage transistor and method for manufacturing same
Baek et al. Ferroelectric field‐effect‐transistor integrated with ferroelectrics heterostructure
Vorotilov et al. Ferroelectric memory
CN111223873B (en) Asymmetric ferroelectric functional layer array and preparation method of ferroelectric tunnel junction multi-value storage unit
CN100388497C (en) Metal thin film and method of manufacturing the same, dielectric capacitor and method of manufacturing the same, and semiconductor memory device
CN108281544B (en) Multi-resistance-state ferroelectric quantum tunnel junction based on ferroelectric coexisting domain and preparation method thereof
CN101645446A (en) Integrated circuit with dielectric layer
WO2021024598A1 (en) Non-volatile memory device and method for operating same
JPH10341002A (en) Ferroelectric transistor, semiconductor storage, and handling method and manufacture of ferroelectric transistor
CN103180952B (en) Getter in memorizer charge storage structure
CN111211135B (en) Modulation method of asymmetric ferroelectric tunneling junction multi-value storage unit
Ali et al. Principles and challenges for binary oxide based ferroelectric memory FeFET
CN115084360A (en) Ferroelectric multivalued memory with local regulation and control characteristics and preparation method thereof
Yu et al. Improved Ferroelectricity and Tunneling Electro Resistance in Zr-Rich Hf x Zr 1-x O 2 Ferroelectric Tunnel Junction
CN111627920A (en) Ferroelectric memory cell
Demkov et al. Integrated films of transition metal oxides for information technology
Müller Development of HfO2-based ferroelectric memories for future CMOS technology nodes
JPWO2017068859A1 (en) Nonvolatile memory element
CN113363384B (en) HfO 2 Ferroelectric tunnel junction device and method for manufacturing the same
CN1319256A (en) Ferroelectric thin film of reduced tetragonality
Rajwade et al. A ferroelectric and charge hybrid nonvolatile memory—Part II: Experimental validation and analysis
Rajwade et al. Ferroelectric-assisted dual-switching speed DRAM–flash hybrid memory
Orlov et al. Nonvolatile memory cells based on the effect of resistive switching in depth-graded ternary Hf x Al 1− x O y oxide films
WO2022190817A1 (en) Method for forming ferroelectric thin film and semiconductor device provided with same
TW569461B (en) A fabrication method for a ferroelectric capacitor applied in a low driving voltage

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination