CN115084207A

CN115084207A - Display substrate, preparation method thereof and display device

Info

Publication number: CN115084207A
Application number: CN202210740702.8A
Authority: CN
Inventors: 龚泳豪
Original assignee: BOE Technology Group Co Ltd; Hefei BOE Zhuoyin Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Hefei BOE Zhuoyin Technology Co Ltd
Priority date: 2022-06-27
Filing date: 2022-06-27
Publication date: 2022-09-20

Abstract

The disclosure provides a display substrate, a preparation method thereof and a display device. The display substrate comprises a substrate, an anode conducting layer arranged on the substrate and a pixel defining layer arranged on one side, far away from the substrate, of the anode conducting layer; the anode conducting layer at least comprises an anode, a first electrode and a second electrode, a pixel opening is arranged on the pixel defining layer, the anode is exposed out of the pixel opening, the first electrode and the second electrode are arranged between the adjacent pixel openings, and the first electrode and the second electrode are used for applying an electric field to the organic light-emitting material during ink-jet printing. According to the display device, the first electrode and the second electrode are arranged in the anode conducting layer, and the first electrode and the second electrode can apply an electric field to the organic light-emitting material during ink-jet printing, so that organic molecules tend to be horizontally arranged and distributed, and the light-emitting efficiency of the display device is improved.

Description

Display substrate, preparation method thereof and display device

Technical Field

The present disclosure relates to but not limited to the field of display technologies, and in particular, to a display substrate, a method for manufacturing the same, and a display device.

Background

Organic Light Emitting Diodes (OLEDs) and Quantum-dot Light Emitting Diodes (QLEDs) are active Light Emitting display devices, and have the advantages of self-luminescence, wide viewing angle, high contrast, low power consumption, very high response speed, thinness, flexibility, low cost, and the like. With the continuous development of Display technology, a Flexible Display device (Flexible Display) using an OLED or a QLED as a light emitting device and performing signal control by a Thin Film Transistor (TFT) has become a mainstream product in the Display field at present.

The research of the inventor of the application finds that the existing display device has the problem of low light-emitting efficiency.

Disclosure of Invention

The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

The technical problem to be solved by the embodiments of the present disclosure is to provide a display substrate, a manufacturing method thereof, and a display device, so as to improve the light extraction efficiency of the display device.

The embodiment of the disclosure provides a display substrate, which comprises a substrate, an anode conducting layer arranged on the substrate, and a pixel defining layer arranged on one side of the anode conducting layer far away from the substrate; the anode conducting layer at least comprises an anode, a first electrode and a second electrode, a pixel opening is arranged on the pixel defining layer, the anode is exposed out of the pixel opening, the first electrode and the second electrode are arranged between the adjacent pixel openings, and the first electrode and the second electrode are used for applying an electric field to the organic light-emitting material during ink-jet printing.

The embodiment of the present disclosure also provides a display device including the display substrate according to the exemplary embodiment of the present disclosure.

The present disclosure also provides a method for manufacturing a display substrate, including:

forming a driving circuit layer on a substrate;

forming an anode conducting layer on one side of the driving circuit layer, which is far away from the substrate, wherein the anode conducting layer at least comprises an anode, a first electrode and a second electrode;

and forming a pixel defining layer on one side of the anode conducting layer, which is far away from the substrate, wherein a pixel opening is formed in the pixel defining layer, the anode is exposed out of the pixel opening, the first electrode and the second electrode are arranged between the adjacent pixel openings, and the first electrode and the second electrode are used for applying an electric field to the organic light-emitting material during ink-jet printing.

According to the display substrate, the manufacturing method thereof and the display device provided by the embodiment of the disclosure, the first electrode and the second electrode are arranged in the anode conducting layer, and the first electrode and the second electrode can apply an electric field to the organic light-emitting material during ink-jet printing, so that organic molecules tend to be horizontally arranged and distributed, and the light-emitting efficiency of the display device is improved.

Other aspects will be apparent upon reading and understanding the attached drawings and detailed description.

Drawings

The accompanying drawings are included to provide an understanding of the disclosed embodiments and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the examples serve to explain the principles of the disclosure and not to limit the disclosure.

FIG. 1 is a schematic diagram of a display device;

FIG. 2 is a schematic plan view of a display substrate;

FIG. 3 is an equivalent circuit diagram of a pixel driving circuit;

fig. 4 is a schematic plan view illustrating a display substrate according to an exemplary embodiment of the disclosure;

FIG. 5 is a cross-sectional view taken along line A-A of FIG. 4;

FIG. 6 is a schematic diagram after forming a driver circuit layer pattern according to an exemplary embodiment of the present disclosure;

FIG. 7 is a schematic illustration of an exemplary embodiment of the present disclosure after patterning of an anode conductive layer;

FIG. 8 is a schematic plan view of an anode conductive layer according to an exemplary embodiment of the present disclosure;

FIG. 9 is a schematic view after forming a pixel defining layer pattern according to an exemplary embodiment of the present disclosure;

fig. 10 is a schematic view after an organic light emitting layer pattern is formed according to an exemplary embodiment of the present disclosure;

FIG. 11 is a schematic diagram of an electric field applied by a control electrode during ink jet printing according to an exemplary embodiment of the present disclosure;

FIG. 12 is a schematic view after a cathode pattern is formed in accordance with an exemplary embodiment of the present disclosure;

fig. 13 is a schematic plan view of another display substrate according to an exemplary embodiment of the disclosure;

fig. 14 is a schematic plan view of a display substrate according to an exemplary embodiment of the present disclosure;

FIG. 15 is a cross-sectional view taken along line A-A of FIG. 14;

fig. 16 is a schematic plan view illustrating a display substrate according to an exemplary embodiment of the disclosure;

fig. 17 is a schematic plan view illustrating a display substrate according to another exemplary embodiment of the disclosure;

fig. 18 is a schematic plan view of a display substrate according to an exemplary embodiment of the disclosure.

Description of reference numerals:

10-a substrate; 20-a driving circuit layer; 20A — a transistor;

20B — storage capacitance; 31-an anode; 32-a control electrode;

321 — a first electrode; 322 — a second electrode; 33-electrode pins;

331 — a first pin; 332 — second pin; 34 — a first connection line;

341-first sub-line; 342-a second sub-line; 343-third sub-line;

35-a second connecting line; 351-fourth sub-line; 352-fifth sub-line;

353-sixth sub-line; 40-pixel definition layer; 41-pixel opening;

50 — an organic light-emitting layer; 60-a baking device; 70-cathode

Detailed Description

To make the objects, technical solutions and advantages of the present disclosure more apparent, embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. Note that the embodiments may be implemented in a plurality of different forms. Those skilled in the art can readily appreciate the fact that the forms and details may be varied into a variety of forms without departing from the spirit and scope of the present disclosure. Therefore, the present disclosure should not be construed as being limited to the contents described in the following embodiments. The embodiments and features of the embodiments in the present disclosure may be arbitrarily combined with each other without conflict.

The drawing scale in this disclosure may be referenced in the actual process, but is not limited thereto. For example: the width-length ratio of the channel, the thickness and the interval of each film layer and the width and the interval of each signal line can be adjusted according to actual needs. The number of pixels in the display substrate and the number of sub-pixels in each pixel are not limited to the numbers shown in the drawings, and the drawings described in the present disclosure are only schematic structural views, and one embodiment of the present disclosure is not limited to the shapes, numerical values, and the like shown in the drawings.

The ordinal numbers such as "first", "second", "third", and the like in the present specification are provided for avoiding confusion among the constituent elements, and are not limited in number.

In this specification, for convenience, words such as "middle", "upper", "lower", "front", "rear", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicating orientations or positional relationships are used to explain positional relationships of constituent elements with reference to the drawings, only for convenience of description and simplification of description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present disclosure. The positional relationship of the components is changed as appropriate in accordance with the direction in which each component is described. Therefore, the words described in the specification are not limited to the words described in the specification, and may be replaced as appropriate.

In this specification, the terms "mounted," "connected," and "connected" are to be construed broadly unless otherwise specifically indicated and limited. For example, it may be a fixed connection, or a removable connection, or an integral connection; can be a mechanical connection, or an electrical connection; either directly or indirectly through intervening components, or both may be interconnected. The specific meaning of the above terms in the present disclosure can be understood in specific instances by those of ordinary skill in the art.

In this specification, a transistor refers to an element including at least three terminals of a gate electrode, a second stage, and a first electrode. The transistor has a channel region between a second stage (a second stage terminal, a drain region, or a second stage) and a first pole (a first pole terminal, a source region, or a first pole), and current can flow through the second stage, the channel region, and the first pole. Note that in this specification, a channel region refers to a region where current mainly flows.

In this specification, the first pole may be the second pole, the second pole may be the first pole, or the first pole may be the first pole, the second pole may be the second pole. In the case where transistors of opposite polarities are used, or in the case where the direction of current flow during circuit operation changes, the functions of the "first stage" and the "second stage" may be interchanged. Therefore, in this specification, "first pole" and "second pole" may be interchanged with each other.

In this specification, "electrically connected" includes a case where constituent elements are connected together by an element having some kind of electrical action. The "element having a certain electric function" is not particularly limited as long as it can transmit and receive an electric signal between connected components. Examples of the "element having some kind of electric function" include not only an electrode and a wiring but also a switching element such as a transistor, a resistor, an inductor, a capacitor, other elements having various functions, and the like.

In the present specification, "parallel" means a state in which an angle formed by two straight lines is-10 ° or more and 10 ° or less, and therefore, includes a state in which the angle is-5 ° or more and 5 ° or less. The term "perpendicular" refers to a state in which the angle formed by two straight lines is 80 ° or more and 100 ° or less, and therefore includes a state in which the angle is 85 ° or more and 95 ° or less.

In the present specification, "film" and "layer" may be interchanged with each other. For example, the "conductive layer" may be sometimes replaced with a "conductive film". Similarly, the "insulating film" may be replaced with an "insulating layer".

In this specification, a triangle, a rectangle, a trapezoid, a pentagon, a hexagon, or the like is not strictly defined, and may be an approximate triangle, a rectangle, a trapezoid, a pentagon, a hexagon, or the like, and some small deformations due to tolerances may exist, and a lead angle, a curved edge, deformation, or the like may exist.

"about" in this disclosure means that the limits are not strictly defined, and that the numerical values are within the tolerances allowed for the process and measurement.

Fig. 1 is a schematic structural diagram of a display device. As shown in fig. 1, the display device may include a timing controller connected to the data driver, the scan driver and the light emitting driver, respectively, the data driver connected to the plurality of data signal lines (D1 to Dn), respectively, the scan driver connected to the plurality of scan signal lines (S1 to Sm), respectively, the light emitting driver connected to the plurality of light emitting signal lines (E1 to Eo), respectively, and a pixel array. The pixel array may include a plurality of sub-pixels Pxij, i and j may be natural numbers, at least one of the sub-pixels Pxij may include a circuit unit and a light emitting device connected to the circuit unit, and the circuit unit may include at least one scan signal line, at least one data signal line, at least one light emitting signal line, and a pixel driving circuit. In an exemplary embodiment, the timing controller may supply a gray value and a control signal suitable for the specification of the data driver to the data driver, may supply a clock signal, a scan start signal, etc. suitable for the specification of the scan driver to the scan driver, and may supply a clock signal, an emission stop signal, etc. suitable for the specification of the light emitting driver to the light emitting driver. The data driver may generate data voltages to be supplied to the data signal lines D1, D2, D3, … …, and Dn using the gray scale value and the control signal received from the timing controller. For example, the data driver may sample a gray value using a clock signal and apply a data voltage corresponding to the gray value to the data signal lines D1 to Dn in units of pixel rows, n may be a natural number. The scan driver may generate scan signals to be supplied to the scan signal lines S1, S2, S3, … …, and Sm by receiving a clock signal, a scan start signal, and the like from the timing controller. For example, the scan driver may sequentially supply scan signals having on-level pulses to the scan signal lines S1 to Sm. For example, the scan driver may be constructed in the form of a shift register, and may generate the scan signals in such a manner that scan start signals provided in the form of on-level pulses are sequentially transmitted to the next stage circuit under the control of a clock signal, and m may be a natural number. The light emission driver may generate emission signals to be supplied to the light emission signal lines E1, E2, E3, … …, and Eo by receiving a clock signal, an emission stop signal, and the like from the timing controller. For example, the light emission driver may sequentially supply emission signals having off-level pulses to the light emission signal lines E1 to Eo. For example, the light emitting driver may be configured in the form of a shift register, and the emission signal may be generated in such a manner that the emission stop signal provided in the form of an off-level pulse is sequentially transmitted to the next stage circuit under the control of a clock signal, and o may be a natural number.

Fig. 2 is a schematic plan view of a display substrate. As shown in fig. 2, the display substrate may include a plurality of pixel units P arranged in a matrix, at least one of the plurality of pixel units P including a first sub-pixel P1 emitting light of a first color, a second sub-pixel P2 emitting light of a second color, and a third sub-pixel P3 emitting light of a third color, the first sub-pixel P1, the second sub-pixel P2, and the third sub-pixel P3 each including a pixel driving circuit and a light emitting device. The pixel driving circuits in the first, second and third sub-pixels P1, P2 and P3 are connected to the scan signal line, the data signal line and the light emitting signal line, respectively, and the pixel driving circuits are configured to receive the data voltage transmitted from the data signal line and output corresponding currents to the light emitting devices under the control of the scan signal line and the light emitting signal line. The light emitting devices in the first, second and third sub-pixels P1, P2 and P3 are respectively connected to the pixel driving circuit of the sub-pixel in which they are located, and the light emitting devices are configured to emit light of corresponding luminance in response to a current output from the pixel driving circuit of the sub-pixel in which they are located.

In an exemplary embodiment, the first sub-pixel P1 may be a red sub-pixel emitting red (R) light, the second sub-pixel P2 may be a blue sub-pixel emitting blue (B) light, and the third sub-pixel P3 may be a green sub-pixel emitting green (G) light. In an exemplary embodiment, the shape of the sub-pixels in the pixel unit may be a rectangle, a diamond, a pentagon, a hexagon, or the like, and may be arranged in a horizontal juxtaposition, a vertical juxtaposition, or a delta arrangement.

In an exemplary embodiment, the pixel unit may include four sub-pixels, and the four sub-pixels may be arranged in a horizontal parallel manner, a vertical parallel manner, a square shape, a diamond shape, or the like, and the disclosure is not limited thereto.

Fig. 3 is an equivalent circuit diagram of a pixel driving circuit. In an exemplary embodiment, the pixel driving circuit may be a 3T1C, 4T1C, 5T1C, 5T2C, 6T1C, or 7T1C structure. As shown in fig. 3, the pixel driving circuit may include 7 transistors (the first transistor T1 to the seventh transistor T7) and 1 storage capacitor C, and the pixel driving circuit may be connected to 7 signal lines (the data signal line D, the first scanning signal line S1, the second scanning signal line S2, the light emitting signal line E, the initial signal line INIT, the first power line VDD, and the second power line VSS).

In an exemplary embodiment, the pixel driving circuit may include a first node N1, a second node N2, and a third node N3. The first node N1 is respectively connected to the first pole of the third transistor T3, the second pole of the fourth transistor T4, and the second pole of the fifth transistor T5, the second node N2 is respectively connected to the second pole of the first transistor T2, the first pole of the third transistor T3, and the second end of the storage capacitor C, and the third node N3 is respectively connected to the second pole of the second transistor T2, the second pole of the third transistor T3, and the first pole of the sixth transistor T6.

In an exemplary embodiment, a first terminal of the storage capacitor C is connected to the first power line VDD, and a second terminal of the storage capacitor C is connected to the second node N2, that is, the second terminal of the storage capacitor C is connected to the control electrode of the third transistor T3.

A control electrode of the first transistor T1 is connected to the second scan signal line S2, a first electrode of the first transistor T1 is connected to the initialization signal line INIT, and a second electrode of the first transistor is connected to the second node N2. When the on-level scan signal is applied to the second scan signal line S2, the first transistor T1 transmits an initialization voltage to the control electrode of the third transistor T3 to initialize the charge amount of the control electrode of the third transistor T3.

A control electrode of the second transistor T2 is connected to the first scan signal line S1, a first electrode of the second transistor T2 is connected to the second node N2, and a second electrode of the second transistor T2 is connected to the third node N3. When the on-level scan signal is applied to the first scan signal line S1, the second transistor T2 connects the control electrode of the third transistor T3 with the second electrode.

A control electrode of the third transistor T3 is connected to the second node N2, that is, a control electrode of the third transistor T3 is connected to the second terminal of the storage capacitor C, a first electrode of the third transistor T3 is connected to the first node N1, and a second electrode of the third transistor T3 is connected to the third node N3. The third transistor T3 may be referred to as a driving transistor, and the third transistor T3 determines the amount of driving current flowing between the first power supply line VDD and the second power supply line VSS according to a potential difference between a control electrode and a first electrode thereof.

A control electrode of the fourth transistor T4 is connected to the first scan signal line S1, a first electrode of the fourth transistor T4 is connected to the data signal line D, and a second electrode of the fourth transistor T4 is connected to the first node N1. The fourth transistor T4 may be referred to as a switching transistor, a scan transistor, or the like, and when an on-level scan signal is applied to the first scan signal line S1, the fourth transistor T4 causes the data voltage of the data signal line D to be input to the pixel driving circuit.

A control electrode of the fifth transistor T5 is connected to the light emitting signal line E, a first electrode of the fifth transistor T5 is connected to the first power source line VDD, and a second electrode of the fifth transistor T5 is connected to the first node N1. A control electrode of the sixth transistor T6 is connected to the light emitting signal line E, a first electrode of the sixth transistor T6 is connected to the third node N3, and a second electrode of the sixth transistor T6 is connected to the first electrode of the light emitting device. The fifth transistor T5 and the sixth transistor T6 may be referred to as light emitting transistors. When the on-level light emission signal is applied to the light emission signal line E, the fifth transistor T5 and the sixth transistor T6 make the light emitting device emit light by forming a driving current path between the first power line VDD and the second power line VSS.

A control electrode of the seventh transistor T7 is connected to the first scanning signal line S1, a first electrode of the seventh transistor T7 is connected to the initial signal line INIT, and a second electrode of the seventh transistor T7 is connected to the first electrode of the light emitting device. When the on-level scan signal is applied to the first scan signal line S1, the seventh transistor T7 transmits an initialization voltage to the first pole of the light emitting device to initialize or release the amount of charge accumulated in the first pole of the light emitting device.

In an exemplary embodiment, the second pole of the light emitting device is connected to a second power line VSS, the second power line VSS being a low level signal, and the first power line VDD being a high level signal.

In an exemplary embodiment, the first to seventh transistors T1 to T7 may be P-type transistors or may be N-type transistors. The same type of transistors are adopted in the pixel driving circuit, so that the process flow can be simplified, the process difficulty of the display panel is reduced, and the yield of products is improved. In some possible implementations, the first to seventh transistors T1 to T7 may include P-type transistors and N-type transistors.

In an exemplary embodiment, the first scan signal line S1, the second scan signal line S2, the light emitting signal line E, and the initial signal line INIT extend in a horizontal direction, and the second power supply line VSS, the first power supply line VDD, and the data signal line D extend in a vertical direction.

In an exemplary embodiment, the light emitting device may be an organic electroluminescent diode (OLED) including a first electrode (anode), an organic light emitting layer, and a second electrode (cathode) stacked.

Taking the example that 7 transistors in the pixel driving circuit illustrated in fig. 3 are all P-type transistors, the working process of the pixel driving circuit may include:

in the first stage a1, which is referred to as a reset stage, the signal of the second scan signal line S2 is a low level signal, and the signals of the first scan signal line S1 and the light emitting signal line E are high level signals. The signal of the second scan signal line S2 is a low level signal, turning on the first transistor T1, and the signal of the initialization signal line INIT is provided to the second node N2, initializing the storage capacitor C, and clearing the original data voltage in the storage capacitor. The signals of the first scanning signal line S1 and the light emitting signal line E are high level signals, turning off the second transistor T2, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6 and the seventh transistor T7, and the OLED does not emit light at this stage.

In the second phase a2, which is referred to as a data write phase or a threshold compensation phase, the signal of the first scanning signal line S1 is a low level signal, the signals of the second scanning signal line S2 and the light emitting signal line E are high level signals, and the data signal line D outputs a data voltage. At this stage, the second terminal of the storage capacitor C is at a low level, so the third transistor T3 is turned on. The signal of the first scan signal line S1 is a low level signal to turn on the second transistor T2, the fourth transistor T4, and the seventh transistor T7. The second transistor T2 and the fourth transistor T4 are turned on so that the data voltage output from the data signal line D is supplied to the second node N2 through the first node N1, the turned-on third transistor T3, the turned-on third node N3, and the turned-on second transistor T2, and a difference between the data voltage output from the data signal line D and the threshold voltage of the third transistor T3 is charged in the storage capacitor C, the voltage at the second terminal (the second node N2) of the storage capacitor C is Vd- | Vth |, Vd is the data voltage output from the data signal line D, and Vth is the threshold voltage of the third transistor T3. The seventh transistor T7 is turned on to supply the initial voltage of the initial signal line INIT to the first electrode of the OLED, initialize (reset) the first electrode of the OLED, clear the pre-stored voltage therein, complete the initialization, and ensure that the OLED does not emit light. The signal of the second scanning signal line S2 is a high level signal, turning off the first transistor T1. The signal of the light emitting signal line E is a high level signal, turning off the fifth transistor T5 and the sixth transistor T6.

In the third stage a3, referred to as a light-emitting stage, the signal of the light-emitting signal line E is a low-level signal, and the signals of the first scanning signal line S1 and the second scanning signal line S2 are high-level signals. The signal of the light emitting signal line E is a low level signal, the fifth transistor T5 and the sixth transistor T6 are turned on, and the power voltage output from the first power line VDD supplies a driving voltage to the first electrode of the OLED through the turned-on fifth transistor T5, the third transistor T3 and the sixth transistor T6, thereby driving the OLED to emit light.

During the driving of the pixel driving circuit, the driving current flowing through the third transistor T3 (driving transistor) is determined by the voltage difference between the gate electrode and the first electrode thereof. Since the voltage of the second node N2 is Vdata- | Vth |, the driving current of the third transistor T3 is:

I＝K*(Vgs-Vth) ² ＝K*[(Vdd-Vd+|Vth|)-Vth] ² ＝K*[(Vdd-Vd] ²

where I is a driving current flowing through the third transistor T3, that is, a driving current driving the OLED, K is a constant, Vgs is a voltage difference between the gate electrode and the first electrode of the third transistor T3, Vth is a threshold voltage of the third transistor T3, Vd is a data voltage output from the data signal line D, and Vdd is a power voltage output from the first power line Vdd.

Fig. 4 is a schematic plan view illustrating a display substrate according to an exemplary embodiment of the present disclosure. Fig. 5 is a sectional view taken along the line a-a in fig. 4.

In an exemplary embodiment, the display substrate may include at least a substrate, a driving circuit layer 20 disposed on the substrate, an anode conductive layer disposed on a side of the driving circuit layer 20 away from the substrate, and a pixel defining layer disposed on a side of the anode conductive layer away from the substrate, the anode conductive layer may include at least an anode 31, a first electrode 321, and a second electrode 322, the pixel defining layer is disposed with a pixel opening 41 thereon, the pixel opening 41 exposes the anode 31, the pixel opening 41 forms a pixel light emitting region PA, a pixel blank region PK is formed between adjacent pixel light emitting regions PA, and the first electrode 321 and the second electrode 322 are used to apply an electric field to an organic light emitting material at the time of inkjet printing.

In an exemplary embodiment, the pixel opening 41 may have a first length L1 in the first direction X and a second length L2 in the second direction Y, and the second length L2 may be greater than or equal to the first length L1.

In an exemplary embodiment, the first and

second electrodes

321 and 322 may have a bar shape extending along the second direction Y, and the first and

second electrodes

321 and 322 may be disposed between the pixel openings 41 adjacent to each other in the first direction X. The first electrodes 321 and the second electrodes 322 may be disposed in different pixel blank areas PK, and the first electrodes 321 and the second electrodes 32 are alternately disposed in the first direction X. The orthographic projections of the first electrode 321 and the second electrode 322 on the substrate are within the range of the orthographic projection of the pixel space PK on the substrate.

In an exemplary embodiment, the display substrate may include at least a display region D and a bezel region M located at least one side of the display region D. The first electrode 321 and the second electrode 322 may be disposed in the display region D. In an exemplary embodiment, the anode conductive layer may further include an electrode pin 33, a first connection line 34, and a second connection line 35, the electrode pin 33, the first connection line 34, and the second connection line 35 may be disposed at the bezel region M, and the electrode pin 33 may be configured to provide a voltage signal to the first electrode 321 and the second electrode 322.

In an exemplary embodiment, the electrode pins 33 may include at least a first pin 331 and a second pin 332. The first and

second leads

331 and 332 may be disposed in the frame region M on one side or both sides of the first direction X, for example, the first and

second leads

331 and 332 may be disposed in the frame region M on the opposite side of the first direction X.

In an exemplary embodiment, the first pin 331 is connected to the plurality of first electrodes 321 through the first connection line 34, the first pin 331 is configured to provide a first voltage signal to the plurality of first electrodes 321, the second pin 332 is connected to the plurality of second electrodes 322 through the second connection line 35, and the second pin 332 is configured to provide a second voltage signal to the plurality of second electrodes 322.

In an exemplary embodiment, a first end of the first connection line 34 is connected to the first pin 331, a second end of the first connection line 34 is connected to the first electrode 321, a first end of the second connection line 35 is connected to the second pin 332, and a second end of the second connection line 35 is connected to the second electrode 322.

In an exemplary embodiment, the first connection line 34 may have a zigzag shape, the first connection line 34 may include at least a first sub line 341 and a second sub line 342, the first sub line 341 may be disposed in a frame region M on a side opposite to the first direction X, and the second sub line 342 may be disposed in a frame region M on a side opposite to the second direction Y.

In an exemplary embodiment, the first sub-line 341 may have a shape of a line extending along the second direction Y, the second sub-line 342 may have a shape of a line extending along the first direction X, a first end of the first sub-line 341 is connected to the first pin 331, a second end of the first sub-line 341 is connected to a first end of the second sub-line 342 after extending in a direction opposite to the second direction Y, and a second end of the second sub-line 342 extends along the first direction X.

In an exemplary embodiment, the second connection line 35 may have a zigzag shape, the second connection line 35 may include at least a fourth sub-line 351 and a fifth sub-line 352, the fourth sub-line 351 may be disposed in a frame region M on a side opposite to the first direction X, and the fifth sub-line 352 may be disposed in a frame region M on a side of the second direction Y.

In an exemplary embodiment, the fourth sub-line 351 may have a line shape extending along the second direction Y, the fifth sub-line 352 may have a line shape extending along the first direction X, a first end of the fourth sub-line 351 is connected to the second pin 332, a second end of the fourth sub-line 351 is connected to a first end of the fifth sub-line 352 after extending along the second direction Y, and a second end of the fifth sub-line 352 extends along the first direction X.

In an exemplary embodiment, the first electrode 321 may have a bar shape extending along the second direction Y, a first end of the first electrode 321 is connected to the second sub-line 342 of the first connection line 34, and a second end of the first electrode 321 extends along the second direction Y. The second electrode 322 may have a bar shape extending along the second direction Y, a first end of the second electrode 322 is connected to the fifth sub-line 352 of the second connection line 35, and a second end of the second electrode 322 extends along a direction opposite to the second direction Y.

By arranging the first electrode 321 and the second electrode 322 in the anode conductive layer, the display substrate of the embodiment can apply an electric field to the organic light emitting material during inkjet printing, and under the action of an electric field applied by the electric field to dipole moments of organic molecules in the organic light emitting material, the organic molecules can tend to be horizontally arranged and distributed, so that the light extraction efficiency of the display device is improved.

The following is an exemplary description through a process of manufacturing a display substrate. The "patterning process" referred to in the present disclosure includes processes of coating a photoresist, mask exposure, development, etching, stripping a photoresist, and the like, for a metal material, an inorganic material, or a transparent conductive material, and processes of coating an organic material, mask exposure, development, and the like, for an organic material. The deposition can be any one or more of sputtering, evaporation and chemical vapor deposition, the coating can be any one or more of spraying, spin coating and ink-jet printing, and the etching can be any one or more of dry etching and wet etching, and the disclosure is not limited. "thin film" refers to a layer of a material deposited, coated, or otherwise formed on a substrate. The "thin film" may also be referred to as a "layer" if it does not require a patterning process throughout the fabrication process. If the "thin film" requires a patterning process during the entire fabrication process, the "thin film" is referred to as the "thin film" before the patterning process, and the "layer" after the patterning process. The "layer" after the patterning process includes at least one "pattern". In the present disclosure, the term "a and B are disposed in the same layer" means that a and B are formed simultaneously by the same patterning process, and the "thickness" of the film layer is the dimension of the film layer in the direction perpendicular to the display substrate. In the exemplary embodiment of the present disclosure, "the forward projection of B is located within the range of the forward projection of a" or "the forward projection of a includes the forward projection of B", it means that the boundary of the forward projection of B falls within the boundary range of the forward projection of a, or the boundary of the forward projection of a overlaps with the boundary of the forward projection of B.

In an exemplary embodiment, taking three sub-pixels of a display substrate as an example, a manufacturing process of the display substrate may include the following operations.

(1) Forming a driving circuit layer pattern. In an exemplary embodiment, the forming of the driving circuit layer pattern may include:

the method includes the steps of depositing a first insulating film and a semiconductor film on a substrate in sequence, patterning the semiconductor film through a patterning process to form a first insulating layer covering the substrate, and forming a semiconductor layer pattern disposed on the first insulating layer, wherein the semiconductor layer pattern at least includes an active layer in each sub-pixel.

And then, depositing a second insulating film and a first metal film in sequence, and patterning the first metal film through a patterning process to form a second insulating layer covering the semiconductor layer pattern and a first metal layer pattern arranged on the second insulating layer, wherein the first metal layer pattern at least comprises a gate electrode and a first polar plate in each sub-pixel.

And then, sequentially depositing a third insulating film and a second metal film, patterning the second metal film through a patterning process to form a third insulating layer covering the first metal layer and a second metal layer pattern arranged on the third insulating layer, wherein the second metal layer pattern at least comprises a second polar plate positioned in each sub-pixel, and the orthographic projection of the second polar plate on the substrate is at least partially overlapped with the orthographic projection of the first polar plate on the substrate.

And depositing a fourth insulating film, forming a fourth insulating layer pattern covering the second metal layer by a patterning process, forming a plurality of first via holes on the fourth insulating layer, and etching the fourth insulating layer, the third insulating layer and the second insulating layer in the first via holes to expose two ends of the active layer.

And then depositing a third metal film, patterning the third metal film through a patterning process, and forming a third metal layer pattern on the fourth insulating layer, wherein the third metal layer pattern at least comprises a first pole and a second pole which are positioned in each sub-pixel, and the first pole and the second pole are respectively connected with the active layer through first via holes.

And then, coating a flat film, patterning the flat film through a patterning process to form a flat layer covering the third metal layer, wherein a second through hole is formed in the flat layer, and the flat film in the second through hole is etched away to expose the second level in each sub-pixel.

To this end, a pattern of the driving circuit layer 20 is prepared on the substrate 10, as shown in fig. 6. In an exemplary embodiment, the driving circuit layer 20 of each sub-pixel may include a plurality of transistors and storage capacitors constituting a pixel driving circuit, and only the pixel driving circuit including one transistor 20A and one storage capacitor 20B is exemplified in fig. 6. In an exemplary embodiment, the transistor 20A may include an active layer, a gate electrode, a first pole, and a second pole, and the storage capacitor 20B may include a first plate and a second plate. In an exemplary embodiment, the Transistor may be a driving Transistor in a pixel driving circuit, and the driving Transistor may be a Thin Film Transistor (TFT).

In an exemplary embodiment, the substrate may be a rigid substrate, or may be a flexible substrate, or may be a silicon Wafer (Wafer). In an exemplary embodiment, the rigid substrate may be made of glass or quartz, the flexible substrate may be made of Polyimide (PI) or polyethylene terephthalate (PET), and the flexible substrate may be a single layer structure or a stacked structure of an inorganic material layer and a flexible material layer, which is not limited in this disclosure.

In example embodiments, the first, second, third, and fourth insulating layers may employ any one or more of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON), and may be a single layer, a multilayer, or a composite layer. The first insulating layer is referred to as a Buffer (Buffer) layer for improving water and oxygen resistance of the substrate, the second and third insulating layers are referred to as Gate Insulating (GI) layers, and the fourth insulating layer is referred to as an interlayer Insulating (ILD) layer. The planarization layer may employ an organic material such as resin or the like. The first metal layer, the second metal layer, and the third metal layer may employ a metal material, such as any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), or an alloy material of the above metals, such as aluminum neodymium alloy (AlNd) or molybdenum niobium alloy (MoNb), and may be a single-layer structure, or a multi-layer composite structure, such as Ti/Al/Ti, and the like. The semiconductor layer may be made of various materials such as amorphous indium gallium zinc Oxide (a-IGZO), zinc oxynitride (ZnON), Indium Zinc Tin Oxide (IZTO), amorphous silicon (a-Si), polycrystalline silicon (p-Si), hexathiophene, polythiophene, and the like, that is, the present disclosure is applicable to transistors manufactured based on Oxide technology, silicon technology, and organic technology.

In an exemplary embodiment, the driving circuit layer 20 may further include a power line, a connection electrode, and the like, which are not limited herein.

(2) An anode conductive layer pattern is formed. In an exemplary embodiment, the forming of the anode conductive layer pattern may include: depositing an anode conductive film on the substrate on which the aforementioned pattern is formed, and patterning the anode conductive film through a patterning process to form an anode conductive layer pattern, where the anode conductive layer pattern at least includes an anode 31 and a control electrode 32, as shown in fig. 7 and 8, and fig. 8 is a schematic plan view of an anode conductive layer according to an exemplary embodiment of the present disclosure.

In an exemplary embodiment, the anode conductive layer may employ a metal material, which may include any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), or an alloy material of the above metals, or a transparent conductive material, which may include Indium Tin Oxide (ITO) or Indium Zinc Oxide (IZO). In an exemplary embodiment, the anode conductive layer may be a single layer structure, or a multi-layer composite structure such as ITO/Al/ITO, etc.

In an exemplary embodiment, an anode 31 may be disposed in each sub-pixel, the anode 31 may be connected to the second stage of the transistor 20A through a second via, a control electrode 32 may be disposed between adjacent anodes 31, and the control electrode 32 may include at least a first electrode 321 and a second electrode 322.

In an exemplary embodiment, the anode 31 may have a first length L1 in the first direction X and a second length L2 in the second direction Y, and the second length L2 may be greater than or equal to the first length L1.

In an exemplary embodiment, the first electrodes 321 and the second electrodes 322 may have a bar shape extending along the second direction Y, and the first electrodes 321 and the second electrodes 322 may be disposed between the adjacent anodes 31 in the first direction X in which the first electrodes 321 and the second electrodes 322 are alternately disposed.

second leads

In an exemplary embodiment, the first voltage signal may be greater than the second voltage signal, or the first voltage signal may be less than the second voltage signal, and the disclosure is not limited thereto.

In the exemplary embodiment, the first electrodes 321 and the second electrodes 322 are alternately disposed between adjacent anodes 31 in the first direction X, forming an "interdigitated" structure. For one anode 31, the first electrode 321 and the second electrode 322 may be respectively disposed on both sides of the anode 31 in the first direction X, for example, the first electrode 321 may be disposed on the opposite side of the anode 31 in the first direction X, and the second electrode 322 may be disposed on the opposite side of the anode 31 in the first direction X, or the first electrode 321 may be disposed on the first direction X side of the anode 31, and the second electrode 322 may be disposed on the opposite side of the anode 31 in the first direction X.

(3) Forming a pixel defining layer pattern. In an exemplary embodiment, forming the pixel defining layer pattern may include: a pixel defining film is coated on the substrate on which the aforementioned pattern is formed, and the pixel defining film is patterned by a patterning process to form a pixel defining layer 40, as shown in fig. 9.

In an exemplary embodiment, the pixel defining layer 40 may include a pixel opening 41 in each sub-pixel, and the entire thickness of the pixel defining layer within the pixel opening 41 is removed to expose the surface of the anode electrode 31.

In an exemplary embodiment, the pixel opening 41 forms a pixel emission region PA, a pixel blank region PK is formed between adjacent pixel emission regions PA, the pixel opening 41 is configured to allow a subsequently formed organic emission layer to emit light in the region, and thus the pixel defining layer 40 may form a pixel emission region PA and a pixel blank region PK within the sub-pixel, the pixel emission region PA being an emission region, the pixel blank region PK being a non-emission region, and the pixel blank region PK being located at the periphery of the pixel emission region PA. For example, the area between the pixel light emitting area PA of the first sub-pixel and the pixel light emitting area PA of the second sub-pixel is the pixel blank area PK. Thus, the display substrate may include a plurality of pixel light emitting areas PA arranged periodically, and a plurality of pixel blank areas PK between adjacent pixel light emitting areas PA.

In an exemplary embodiment, the first electrodes 321 and the second electrodes 322 may be disposed on different pixel blank areas PK, in the first direction X, the first electrodes 321 and the second electrodes 322 are alternately disposed, the first electrodes 321 and the second electrodes 322 are covered by the pixel defining layer 40, and orthographic projections of the first electrodes 321 and the second electrodes 322 on the substrate are located within a range of orthographic projections of the pixel blank areas PK on the substrate.

(4) An organic light emitting layer pattern is formed. In an exemplary embodiment, forming the organic light emitting layer pattern may include: the organic light emitting layer 50 is first patterned by ink jet printing, and the organic light emitting layer 50 of each sub-pixel is connected to the anode 31 of the sub-pixel through the pixel opening 41, as shown in fig. 10.

In an exemplary embodiment, the organic light emitting layer 50 may include an emission layer (EML), and any one or more of: a Hole Injection Layer (HIL), a Hole Transport Layer (HTL), an Electron Blocking Layer (EBL), a Hole Blocking Layer (HBL), an Electron Transport Layer (ETL), and an Electron Injection Layer (EIL).

In an exemplary embodiment, taking the formation of the light emitting layer as an example, the process of forming the light emitting layer by inkjet printing may include:

a baking device 60 is arranged below the display substrate, and the baking device 60 can bake the display substrate;

after the organic light emitting material is sprayed by the inkjet printing method, a first voltage signal is applied to the first pin 331 and a second voltage signal is applied to the second pin 332.

Fig. 11 is a schematic view of an electric field applied by a control electrode in inkjet printing according to an exemplary embodiment of the present disclosure.

In an exemplary embodiment, the first electrodes 321 and the second electrodes 322 are disposed in different pixel blank areas PK, and the first electrodes 321 and the second electrodes 322 are alternately disposed in the first direction X.

In an exemplary embodiment, for one pixel opening 41, the first electrode 321 and the second electrode 322 may be respectively disposed at two sides of the pixel opening 41, for example, the first electrode 321 may be disposed at one side of the pixel opening 41 opposite to the first direction X, and the second electrode 322 may be disposed at one side of the pixel opening 41 opposite to the first direction X, or the first electrode 321 may be disposed at one side of the pixel opening 41 opposite to the first direction X, and the second electrode 322 may be disposed at one side of the pixel opening 41 opposite to the first direction X.

In an exemplary embodiment, the electric field direction may be directed from the first electrode 321 to the second electrode 322 adjacent to the first electrode 321, or the electric field direction may be directed from the second electrode 322 to the first electrode 321 adjacent to the second electrode 322.

The display substrate of the present embodiment, by providing the first electrode 321 and the second electrode 322 in the anode conductive layer, the first electrode 321 and the second electrode 322 can apply an electric field to the organic light emitting material during inkjet printing, and under the action of an electric field applied by the electric field to dipole moments of organic molecules in the organic light emitting material, the organic molecules can tend to be horizontally arranged and distributed in the first direction X, i.e., the short axis direction of the pixel opening 41, so that the light extraction efficiency of the display device is improved.

In an exemplary embodiment, when the first electrode 321 and the second electrode 322 are alternately disposed in the first direction X in the pixel margin PK between the adjacent pixel openings 41 and the light emitting layer is formed by an ink jet printing method, an electric field strength of 0.5 to 5kV/cm can be generated by applying a voltage of several tens of volts between the first electrode 321 and the second electrode 322, which can ensure safe production and convenient operation.

The pixel openings 41 adjacent to each other in the first direction X share one first electrode 321 or one second electrode 322, so that the structure of the display substrate can be simplified and the cost can be saved on the basis of applying an electric field to the organic light-emitting material.

In an exemplary embodiment, the light emitting layer may include a Host (Host) material and a guest (Host) material doped in the Host material, and the doping ratio of the guest material of the light emitting layer is 1% to 20%. In the range of the doping proportion, on one hand, the host material of the light-emitting layer can effectively transfer exciton energy to the guest material of the light-emitting layer to excite the guest material of the light-emitting layer to emit light, and on the other hand, the host material of the light-emitting layer carries out 'dilution' on the guest material of the light-emitting layer, thereby effectively improving the fluorescence quenching caused by the mutual collision among molecules and the mutual collision among energies of the guest material of the light-emitting layer, and improving the light-emitting efficiency and the service life of the device. In an exemplary embodiment, the doping ratio refers to a ratio of the mass of the guest material to the mass of the light emitting layer, i.e., mass percentage. In an exemplary embodiment, the host material and the guest material may be co-evaporated by a multi-source evaporation process to be uniformly dispersed in the light emitting layer, and the doping ratio may be controlled by controlling an evaporation rate of the guest material during evaporation, or by controlling an evaporation rate ratio of the host material and the guest material. In an exemplary embodiment, the thickness of the light emitting layer may be about 10nm to 50 nm.

In exemplary embodiments, the hole injection layer may employ an inorganic oxide such as molybdenum oxide, titanium oxide, vanadium oxide, rhenium oxide, ruthenium oxide, chromium oxide, zirconium oxide, hafnium oxide, tantalum oxide, silver oxide, tungsten oxide, or manganese oxide, or may employ a p-type dopant of a strong electron-withdrawing system and a dopant of a hole-transporting material. In an exemplary embodiment, the thickness of the hole injection layer may be about 5nm to 20 nm.

In an exemplary embodiment, a material with high hole mobility, such as an arylamine compound, may be used for the hole transport layer, and the substituent group may be carbazole, methylfluorene, spirofluorene, dibenzothiophene, furan, or the like. In an exemplary embodiment, the thickness of the hole transport layer may be about 40nm to 150 nm.

In exemplary embodiments, the hole blocking layer and the electron transport layer may employ aromatic heterocyclic compounds, for example, imidazole derivatives such as benzimidazole derivatives, imidazopyridine derivatives, benzimidazolophenanthrin derivatives, and the like; oxazine derivatives such as pyrimidine derivatives and triazine derivatives; and compounds containing a nitrogen-containing six-membered ring structure (including compounds having a phosphine oxide substituent on the heterocyclic ring) such as quinoline derivatives, isoquinoline derivatives, and phenanthroline derivatives. In an exemplary embodiment, the hole blocking layer may have a thickness of about 5nm to 15nm, and the electron transport layer may have a thickness of about 20nm to 50 nm.

In an exemplary embodiment, the electron injection layer may employ an alkali metal or metal, such as lithium fluoride (LiF), ytterbium (Yb), magnesium (Mg), or calcium (Ca), or a compound of these alkali metals or metals, or the like. In an exemplary embodiment, the thickness of the electron injection layer may be about 0.5nm to 2 nm.

(5) A cathode pattern is formed. In an exemplary embodiment, the forming of the cathode pattern may include: the cathode 70 is patterned by evaporation or deposition, and the cathode 70 is connected to the organic light emitting layer 50, as shown in fig. 12.

In an exemplary embodiment, the cathode may employ a metal material, which may include any one or more of magnesium (Mg), silver (Ag), aluminum (Al), copper (Cu), and lithium (Li), or an alloy material of the above metals, or a transparent conductive material, which may include Indium Zinc Oxide (IZO). In exemplary embodiments, the cathode may be a single layer structure, or a multi-layer composite structure, such as Mg/Ag, etc.

In some possible exemplary embodiments, the optical coupling layer pattern may be formed after the cathode pattern is formed, the optical coupling layer is disposed on the cathode, the refractive index of the optical coupling layer may be greater than that of the cathode, which is beneficial for light extraction and increases light extraction efficiency, and the optical coupling layer may be made of an organic material, or an inorganic material, or an organic material and an inorganic material, and may be a single layer, a multilayer, or a composite layer, which is not limited in this disclosure.

To this end, a pattern of a light emitting structure layer is prepared, the light emitting structure layer may include a pixel defining layer 40 and a light emitting device, the light emitting device may include an anode 31, an organic light emitting layer 50, and a cathode 70, the organic light emitting layer 50 is disposed between the anode 31 and the cathode 70, and the organic light emitting layer 50 emits light by being driven by the anode 31 and the cathode 70.

The subsequent preparation may include processes of forming a package structure layer, forming a protection layer, attaching a cover plate, and the like, which are not described herein again.

Fig. 13 is a schematic plan view of another display substrate according to an exemplary embodiment of the disclosure.

The structure of the display substrate of the present exemplary embodiment is substantially the same as that of the display substrate of the exemplary embodiment of fig. 4, except that the first and

second electrodes

321 and 322 may have a bar shape extending along the first direction X, the first and

second electrodes

321 and 322 may be disposed between the pixel openings 41 adjacent in the second direction Y, the first and

second electrodes

321 and 322 may be disposed in different pixel blank regions PK, and the first and

second electrodes

321 and 322 may be alternately disposed in the second direction Y.

In an exemplary embodiment, the first connection line 34 may include at least a first sub line 341, a second sub line 342, and a third sub line 343, and the first sub line 341, the second sub line 342, and the third sub line 343 may be disposed at the frame region M at a side opposite to the first direction X.

In an exemplary embodiment, the first sub line 341 may have a shape of a line extending along the second direction Y, the second sub line 342 may have a shape of a line extending along the first direction X, and the third sub line 343 may have a shape of a line extending along the second direction Y. The first end of the first sub-line 341 is connected to the first lead 331, the second end of the first sub-line 341 extends in the opposite direction of the second direction Y and then is connected to the first end of the second sub-line 342, the second end of the second sub-line 342 extends in the first direction X and then is connected to the first end of at least one first electrode 331, and the third sub-line 343 extends in the second direction Y and is connected to the first ends of the plurality of first electrodes 331.

In an exemplary embodiment, the second connection line 35 may include at least a fourth sub-line 351, a fifth sub-line 352, and a sixth sub-line 353, the fourth sub-line 351 and the fifth sub-line 352 may be disposed in a rim region M on a side opposite to the first direction X, and the sixth sub-line 353 may be disposed in the rim region M on a side opposite to the first direction X.

In an exemplary embodiment, the fourth sub-line 351 may have a shape of a line extending along the second direction Y, the fifth sub-line 352 may have a shape of a line extending along the first direction X, and the sixth sub-line 353 may have a shape of a line extending along the second direction Y. A first end of the fourth sub-line 351 is connected to the second pin 332, a second end of the fourth sub-line 351 is connected to a first end of the fifth sub-line 352 after extending along the second direction Y, a second end of the fifth sub-line 352 is connected to a second end of the at least one second electrode 332 after extending along the first direction X, and the sixth sub-line 353 extends along the second direction Y and is connected to first ends of the plurality of second electrodes 332.

In an exemplary embodiment, the first electrodes 321 may have a bar shape extending along the first direction X, a first end of the first electrodes 321 is connected to the third sub-line 343 of the first connection line 34, and a first end of at least one first electrode 321 is connected to the second sub-line 342 of the first connection line 34, and a second end of the first electrodes 321 extends along the first direction X.

In an exemplary embodiment, the second electrodes 322 may have a shape of a bar extending along the first direction X, a first end of the second electrode 322 is connected to the sixth sub-line 353 of the second connection line 35, a second end of the second electrode 322 extends along the opposite direction of the first direction X, and a second end of at least one second electrode 322 is connected to the fifth sub-line 352 of the second connection line 35.

In the exemplary embodiment, the first electrodes 321 and the second electrodes 322 are alternately disposed between adjacent pixel openings 41 in the second direction Y, forming an "interdigitated" structure. For one pixel opening 41, the first electrode 321 and the second electrode 322 may be respectively disposed on two sides of the pixel opening 41 in the second direction Y, for example, the first electrode 321 may be disposed on one side of the pixel opening 41 opposite to the second direction Y, and the second electrode 322 may be disposed on one side of the pixel opening 41 in the second direction Y, or the first electrode 321 may be disposed on one side of the pixel opening 41 in the second direction Y, and the second electrode 322 may be disposed on one side of the pixel opening 41 opposite to the second direction Y.

The display substrate of the present embodiment, by providing the first electrode 321 and the second electrode 322 in the anode conductive layer, the first electrode 321 and the second electrode 322 can apply an electric field to the organic light emitting material during inkjet printing, and under the action of an electric field applied by the electric field to a dipole moment of organic molecules in the organic light emitting material, the organic molecules can tend to be horizontally arranged and distributed in the second direction Y, i.e., the long axis direction of the pixel opening 41, so that the light extraction efficiency of the display device is improved.

In the exemplary embodiment, when the first electrode 321 and the second electrode 322 are alternately disposed in the pixel margin PK between the adjacent pixel openings 41 in the second direction Y, and the light emitting layer is formed by ink jet printing, an electric field strength of 0.5 to 5kV/cm can be generated by applying a voltage of several tens of volts between the first electrode 321 and the second electrode 322, which can ensure safe production and convenient operation.

The pixel openings 41 adjacent to each other in the second direction Y share one first electrode 321 or one second electrode 322, so that the structure of the display substrate can be simplified and the cost can be saved on the basis of applying an electric field to the organic light-emitting material.

Fig. 14 is a schematic plan view of a display substrate according to an exemplary embodiment of the disclosure. Fig. 15 is a sectional view taken along the line a-a in fig. 14.

The structure of the display substrate of the present exemplary embodiment is substantially the same as that of the display substrate of the exemplary embodiment of fig. 4, except that at least one pixel blank area PK may be provided with a first electrode 321 and a second electrode 322, the first electrode 321 and the second electrode 322 being disposed side by side in the first direction X.

In an exemplary embodiment, the first electrode 321 and the second electrode 322 may be sequentially disposed along the first direction X in one pixel blank region PK and another pixel blank region PK adjacent to the first direction X, for example, the first electrode 321 may be disposed on a side of the second electrode 322 opposite to the first direction X in one pixel blank region PK, as shown in fig. 14, or the first electrode 321 may be disposed on a side of the second electrode 322 in the first direction X, as shown in fig. 15.

In an exemplary embodiment, the first electrode 321 and the second electrode 322 are disposed in the pixel margin PK between the adjacent pixel openings 41 in the first direction X, and when the light emitting layer is formed by an ink jet printing method, an electric field strength of 0.5 to 5kV/cm can be generated by applying a voltage of several tens of volts between the first electrode 321 and the second electrode 322, which can ensure safe production and convenient operation.

In a pixel margin Pk, the first electrode 321 and the second electrode 322 are arranged side by side along the first direction X, and the pixel openings 41 adjacent to each other in the first direction X correspond to different first electrodes 321 and second electrodes 322, so that not only can the distance between the organic light emitting layer in the pixel opening 41 and the corresponding first electrode 321 and second electrode 322 be reduced, but also different electric fields can be applied to the organic light emitting layers in different pixel openings 41, thereby improving the arrangement distribution efficiency of the organic light emitting layers, and on the basis of satisfying the requirement of applying an electric field to the organic light emitting material, the voltage applied to the first electrode 321 and the second electrode 322 can be reduced, and the production cost can be reduced.

Fig. 16 is a schematic plan view illustrating a display substrate according to an exemplary embodiment of the disclosure.

The structure of the display substrate of the present exemplary embodiment is substantially the same as that of the display substrate of the exemplary embodiment of fig. 13, except that at least one pixel margin PK may be provided with a first electrode 321 and a second electrode 322, the first electrode 321 and the second electrode 322 being disposed side by side in the second direction Y.

In an exemplary embodiment, the first electrode 321 and the second electrode 322 may be sequentially disposed along the second direction Y in one pixel blank region PK and another pixel blank region PK adjacent to the second direction Y, for example, the first electrode 321 may be disposed on a side of the second electrode 322 opposite to the second direction Y in one pixel blank region PK, or the first electrode 321 may be disposed on a side of the second electrode 322 opposite to the second direction Y.

In an exemplary embodiment, the first electrode 321 and the second electrode 322 are disposed in the pixel margin PK between the pixel openings 41 adjacent to each other in the second direction Y, and when the light emitting layer is formed by an ink jet printing method, an electric field of 0.5 to 5kV/cm can be generated by applying a voltage of several tens of volts between the first electrode 321 and the second electrode 322, thereby ensuring safe production and convenient operation.

In a pixel margin Pk, the first electrode 321 and the second electrode 322 are arranged side by side along the second direction Y, and the adjacent pixel openings 41 in the second direction Y correspond to different first electrodes 321 and second electrodes 322, so that not only can the distance between the organic light emitting layer in the pixel opening 41 and the corresponding first electrode 321 and second electrode 322 be reduced, but also different electric fields can be applied to the organic light emitting layers in different pixel openings 41, thereby improving the arrangement distribution efficiency of the organic light emitting layers, and on the basis of satisfying the requirement of applying the electric fields to the organic light emitting materials, the voltages applied to the first electrode 321 and the second electrode 322 can be reduced, and the production cost can be reduced.

Fig. 17 is a schematic plan view illustrating a display substrate according to an exemplary embodiment of the disclosure.

The structure of the display substrate of the present exemplary embodiment is substantially the same as that of the display substrate of the exemplary embodiment of fig. 14, except that at least one of the first electrode 321 and the second electrode 322 may have a shape of a broken line extending along the second direction Y.

In an exemplary embodiment, the first electrode 321 may have a polygonal line shape extending along the second direction Y, and the first electrode 321 may include at least a plurality of linear portions and a plurality of bent portions, which are alternately disposed and connected to each other in the second direction Y.

In an exemplary embodiment, the straight portion may have a strip shape extending along the second direction Y, the straight portion may be disposed between the pixel openings 41 adjacent to each other in the first direction X, and the bent portion may have a broken line shape or an arc shape corresponding to the edge shape of the pixel opening 41.

In an exemplary embodiment, the second electrode 322 may have a polygonal line shape extending along the second direction Y, and the second electrode 322 may include at least a plurality of linear portions and a plurality of bent portions, which are alternately disposed and connected to each other in the second direction Y.

In the display substrate of the embodiment, at least one of the first electrode 321 and the second electrode 322 is configured to be a folded line shape extending along the second direction Y, and a bent portion in the folded line shape can be adapted to the edge shape of the pixel opening 41, so that when an electric field is applied to the organic light emitting material, the uniformity of the electric field can be improved when the first electrode 321 and the second electrode 322 apply the electric field to the organic light emitting material, and the effect of horizontal arrangement distribution of organic molecules in the first direction X can be improved, thereby further improving the light extraction efficiency of the display device.

Fig. 18 is a schematic plan view illustrating a display substrate according to another exemplary embodiment of the disclosure.

The structure of the display substrate of the present exemplary embodiment is substantially the same as that of the display substrate of the exemplary embodiment of fig. 16, except that at least one of the first electrode 321 and the second electrode 322 may have a shape of a broken line extending along the first direction X.

In an exemplary embodiment, the first electrode 321 may have a polygonal line shape extending along the first direction X, and the first electrode 321 may include at least a plurality of linear portions and a plurality of bent portions, which are alternately disposed and connected to each other in the first direction X.

In an exemplary embodiment, the straight portion may have a strip shape extending along the first direction X, the straight portion may be disposed between the pixel openings 41 adjacent in the second direction Y, and the bent portion may have a broken line shape or an arc line shape corresponding to the edge shape of the pixel opening 41.

In an exemplary embodiment, the second electrode 322 may have a polygonal line shape extending along the first direction X, and the second electrode 322 may include at least a plurality of linear portions and a plurality of bent portions, which are alternately disposed and connected to each other in the first direction X.

In the display substrate of the embodiment, at least one of the first electrode 321 and the second electrode 322 is in the shape of a folded line extending along the first direction X, and a bent portion in the folded line can be adapted to the edge shape of the pixel opening 41, so that when an electric field is applied to the organic light emitting material, the uniformity of the electric field can be improved when the first electrode 321 and the second electrode 322 apply the electric field, the effect of horizontal arrangement and distribution of organic molecules in the second direction Y can be improved, and the light extraction efficiency of the display device can be further improved.

The embodiment of the disclosure also provides another electric field applied by the control electrode during ink-jet printing.

The structure of the display substrate forming the electric field of the present embodiment is substantially the same as that of the display substrate forming the electric field of the exemplary embodiment of fig. 11, except that at least one pixel margin PK may be provided with a first electrode 321 and a second electrode 322, the first electrode 321 and the second electrode 322 being disposed side by side in the first direction X.

In an exemplary embodiment, the first electrode 321 and the second electrode 322 may be sequentially disposed along the first direction X in one pixel blank region PK and another pixel blank region PK adjacent to the first direction X, for example, the first electrode 321 may be disposed on a side of the second electrode 322 opposite to the first direction X in the one pixel blank region PK, or the first electrode 321 may be disposed on a side of the second electrode 322 opposite to the first direction X.

By providing the first electrode 321 and the second electrode 322 in the anode conductive layer, the display substrate of the present embodiment can apply an electric field to the organic light emitting material during ink jet printing, and under the action of an electric field applied by the electric field to a dipole moment of organic molecules in the organic light emitting material, the organic molecules can tend to be horizontally arranged and distributed in the first direction X, i.e., in the short axis direction of the pixel opening 41, so as to improve the light extraction efficiency of the display device.

The embodiment of the present disclosure also provides a display device including the display substrate according to the exemplary embodiment of the present disclosure. The display device may be: any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, and a navigator, etc., but the embodiment of the present invention is not limited thereto.

The embodiment of the present disclosure further provides a method for manufacturing a display substrate, including:

forming a driving circuit layer on a substrate;

Although the embodiments disclosed in the present disclosure are described above, the descriptions are only for the convenience of understanding the present disclosure, and are not intended to limit the present disclosure. It will be understood by those skilled in the art of the present disclosure that various changes in form and details may be made therein without departing from the spirit and scope of the disclosure, and that the scope of the present disclosure is to be limited only by the terms of the appended claims.

Claims

1. A display substrate is characterized by comprising a substrate, an anode conducting layer arranged on the substrate and a pixel defining layer arranged on one side, far away from the substrate, of the anode conducting layer; the anode conducting layer at least comprises an anode, a first electrode and a second electrode, a pixel opening is arranged on the pixel defining layer, the anode is exposed out of the pixel opening, the first electrode and the second electrode are arranged between the adjacent pixel openings, and the first electrode and the second electrode are used for applying an electric field to the organic light-emitting material during ink-jet printing.

2. The display substrate according to claim 1, wherein the pixel openings form pixel light emitting areas, a pixel blank area is formed between adjacent pixel light emitting areas, and orthographic projections of the first electrode and the second electrode on the substrate are located within an orthographic projection range of the pixel blank area on the substrate.

3. The display substrate of claim 2, wherein the pixel opening has a first length in a first direction and a second length in a second direction, the first direction and the second direction intersecting, and the second length is greater than or equal to the first length.

4. The display substrate according to claim 3, wherein the first electrodes and the second electrodes are shaped like stripes extending along the second direction, the first electrodes and the second electrodes are disposed in different pixel blank areas, and the first electrodes and the second electrodes are alternately disposed in the first direction.

5. The display substrate according to claim 3, wherein the first electrode and the second electrode are shaped like a stripe extending in the first direction, the first electrode and the second electrode are disposed in different pixel blank areas, and the first electrode and the second electrode are alternately disposed in the second direction.

6. The display substrate according to claim 3, wherein the first electrode and the second electrode are shaped as a bar extending along the second direction, at least one pixel blank area is provided with the first electrode and the second electrode, and the first electrode and the second electrode are arranged side by side in the first direction.

7. The display substrate according to claim 6, wherein the first electrode and the second electrode are sequentially disposed along the first direction in one pixel blank region and another pixel blank region adjacent to the first direction.

8. The display substrate according to claim 3, wherein the first electrode and the second electrode are shaped like a bar extending along the first direction, at least one pixel blank area is provided with the first electrode and the second electrode, and the first electrode and the second electrode are arranged side by side in the second direction.

9. The display substrate according to claim 8, wherein the first electrode and the second electrode are sequentially disposed along the second direction in one pixel blank region and another pixel blank region adjacent to the second direction.

10. The display substrate according to claim 3, wherein at least one of the first electrode and the second electrode has a polygonal line shape extending in the second direction, and comprises a plurality of linear portions and a plurality of bent portions, the plurality of linear portions and the plurality of bent portions are alternately arranged in the second direction and connected to each other, the linear portions have a bar shape extending in the second direction and arranged between the pixel openings adjacent to each other in the first direction, and the bent portions have a polygonal line shape or an arc shape corresponding to an edge shape of the pixel openings.

11. The display substrate according to claim 3, wherein at least one of the first electrode and the second electrode has a polygonal line shape extending in the first direction, and comprises a plurality of linear portions and a plurality of bent portions, the plurality of linear portions and the plurality of bent portions are alternately arranged and connected to each other in the first direction, the linear portions have a bar shape extending in the first direction and are arranged between adjacent pixel openings in the second direction, and the bent portions have a polygonal line shape or an arc shape corresponding to an edge shape of the pixel openings.

12. The display substrate according to any one of claims 1 to 11, wherein the anode conductive layer further comprises an electrode pin configured to provide a voltage signal to the first electrode and the second electrode; the display substrate comprises a display area and a frame area located on at least one side of the display area, the first electrode and the second electrode are arranged in the display area, and the electrode pins are arranged in the frame area.

13. The display substrate of claim 12, wherein the electrode pins comprise at least a first pin and a second pin, the first pin configured to provide a first voltage signal to the first electrode, the second pin configured to provide a second voltage signal to the second electrode.

14. The display substrate according to claim 13, wherein the anode conductive layer further comprises a first connection line and a second connection line, a first end of the first connection line is connected to the first pin, a second end of the first connection line is connected to the first electrode, a first end of the second connection line is connected to the second pin, and a second end of the second connection line is connected to the second electrode.

15. The display substrate according to claim 14, wherein the first connecting lines are disposed in the frame region, and the second connecting lines are disposed in the frame region.

16. A display device comprising the display substrate according to any one of claims 1 to 15.

17. A method for preparing a display substrate is characterized by comprising the following steps:

forming a driving circuit layer on a substrate;