CN115051782A - Timing synchronization method of continuous phase modulation system - Google Patents

Timing synchronization method of continuous phase modulation system Download PDF

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CN115051782A
CN115051782A CN202210981100.1A CN202210981100A CN115051782A CN 115051782 A CN115051782 A CN 115051782A CN 202210981100 A CN202210981100 A CN 202210981100A CN 115051782 A CN115051782 A CN 115051782A
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branch
loop
timing error
lagging
metric value
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CN115051782B (en
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刘荣科
刘誉楷
张添策
陈祺治
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Beihang University
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0014—Carrier regulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/20—Modulator circuits; Transmitter circuits
    • H04L27/2003—Modulator circuits; Transmitter circuits for continuous phase modulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/0014—Carrier regulation
    • H04L2027/0044—Control loops for carrier regulation
    • H04L2027/0063—Elements of loops
    • H04L2027/0069—Loop filters

Abstract

The invention provides a timing synchronization method of a continuous phase modulation system, which comprises the following steps: firstly, an input signal simultaneously carries out a forward Viterbi process through a leading branch and a lagging branch to obtain an accumulated metric value of the corresponding branch; secondly, acquiring an estimated timing error of a current input signal; thirdly, updating the state by utilizing the estimated timing error to enable the loop to allow the next iterative computation, and acquiring an initial phase and a frequency control word through the loop; fourthly, updating the local filter by the initial phase and the local oscillator frequency control word; fifthly, applying the updated local filter in the lead-lag branch; the forward viterbi process for the leading branch and the lagging branch are then reset such that their corresponding leading branch accumulated metrics and lagging accumulated metrics are zeroed out. The invention solves the problem of serious performance loss of the traditional lead-lag branch timing synchronization method under the condition of low signal-to-noise ratio, and simultaneously improves the reliability of a timing synchronization system.

Description

Timing synchronization method of continuous phase modulation system
Technical Field
The invention relates to the field of communication timing synchronization, in particular to a timing synchronization method of a continuous phase modulation system.
Background
Continuous Phase Modulation (CPM) has received extensive attention and research as one of modulation techniques. The greatest improvement of the CPM modulation technique as a phase modulation technique is that the input signal is first subjected to a phase shaping process by a frequency response pulse, so that a sudden phase change is avoided, and the spectral bandwidth is reduced. By virtue of the advantages, the CPM becomes a powerful competitor of the next generation of global satellite navigation system and Beidou satellite navigation signals, and the CPM is also listed as a modulation technology recommended by a space data Consultation Committee (CCSDS).
The lead-lag branch timing synchronization algorithm calculates and extracts the timing error based on the metric of the maximum likelihood sequence. After the timing error value is extracted, the conventional scheme resamples the input signal by adopting a farrow filter or an interpolation method in a lead-lag sampling mode, and then corrects the timing error. At the position where the CPM signal is close to the waterfall area, the input signal-to-noise ratio is relatively low, and at this time, additional performance loss is introduced when the input signal is resampled, so that the performance is seriously influenced at the waterfall area by the method.
In view of the problem of poor anti-noise capability of the traditional lead-lag branch timing synchronization algorithm, the invention provides a timing synchronization method based on a local filter, and a method for resampling a high-precision noise-free filter is used for avoiding performance loss caused by resampling under a low signal-to-noise ratio, so that the performance under the low signal-to-noise ratio is effectively improved.
Disclosure of Invention
The invention aims to: the phase-sequential modulation timing synchronization method based on the local filter is provided to solve the problem of serious performance loss of the traditional lead-lag branch timing synchronization method under the condition of low signal-to-noise ratio and improve the reliability of a timing synchronization system.
The invention provides a timing synchronization method of a continuous phase modulation system, which comprises the following specific steps:
step one, an input signal simultaneously carries out a forward Viterbi process through a leading branch and a lagging branch to obtain corresponding leading branch accumulated metric values and lagging branch accumulated metric values;
taking a time-varying noiseless received signal as
Figure 100002_DEST_PATH_IMAGE001
With a symbol period of
Figure 100002_DEST_PATH_IMAGE002
(ii) a When the timing error of the input signal is
Figure 100002_DEST_PATH_IMAGE003
By continuous phase modulation CPM signal model, the noise-free received signal can be represented as:
Figure 100002_DEST_PATH_IMAGE004
in the formula (I), the compound is shown in the specification,
Figure 100002_DEST_PATH_IMAGE005
represents the energy of the symbol and is,
Figure 100002_DEST_PATH_IMAGE006
represents the input of
Figure 100002_DEST_PATH_IMAGE007
The information of the number of symbols is,
Figure 100002_DEST_PATH_IMAGE008
is composed of
Figure 509638DEST_PATH_IMAGE006
The corresponding modulation index is set to be,
Figure 100002_DEST_PATH_IMAGE009
then as a function of the phase impulse response of the CPM,
Figure 100002_DEST_PATH_IMAGE010
then the phase impulse response function is expressed after the timing error is introduced. j represents an imaginary phase, without meaning.
For the forward Viterbi procedure, the amount of lag in lead is
Figure 100002_DEST_PATH_IMAGE011
In the case of leading branch, the received signal of leading branch
Figure 100002_DEST_PATH_IMAGE012
And the reception signal of the lagging branch
Figure 100002_DEST_PATH_IMAGE013
Can be expressed as:
Figure 100002_DEST_PATH_IMAGE014
Figure 100002_DEST_PATH_IMAGE015
the length of the data block entering the timing synchronization system each time is set as
Figure 100002_DEST_PATH_IMAGE016
Then after the forward Viterbi procedure, the first one can be obtained
Figure 100002_DEST_PATH_IMAGE017
Leading branch accumulated metric value of each data block
Figure 100002_DEST_PATH_IMAGE018
And the accumulated metric value of the lagging branch
Figure 100002_DEST_PATH_IMAGE019
The formula is obtained as follows:
Figure 100002_DEST_PATH_IMAGE020
Figure 100002_DEST_PATH_IMAGE021
Figure 100002_DEST_PATH_IMAGE022
Figure 100002_DEST_PATH_IMAGE023
in the formula (I), the compound is shown in the specification,
Figure 100002_DEST_PATH_IMAGE024
representing the received demodulation sequence.
Step two, the accumulated metric value of the leading branch acquired in the step one
Figure 714415DEST_PATH_IMAGE018
Sum-lag branch accumulated metric value
Figure 732925DEST_PATH_IMAGE019
Obtaining an estimated timing error of a current input signal through the following steps 2.1-2.2;
step 2.1, accumulating the measurement value by the leading branch
Figure 330259DEST_PATH_IMAGE018
And the accumulated metric value of the lagging branch
Figure 351305DEST_PATH_IMAGE019
And acquiring a timing normalization measurement value.
Under CPM system, timing error accumulates metric value for leading branch
Figure 819327DEST_PATH_IMAGE018
And the accumulated metric value of the lagging branch
Figure 775781DEST_PATH_IMAGE019
The effect of (a) can be expressed as:
Figure 100002_DEST_PATH_IMAGE025
in the formula (I), the compound is shown in the specification,
Figure 100002_DEST_PATH_IMAGE026
the average modulation index for a symbol within a sequence can be calculated by:
Figure 100002_DEST_PATH_IMAGE027
in that
Figure 100002_DEST_PATH_IMAGE028
Inner, leading branch accumulated metric value
Figure 502822DEST_PATH_IMAGE018
And the accumulated metric value of the lagging branch
Figure 327559DEST_PATH_IMAGE019
The timing error is expressed as a convex function, and the timing normalization measurement value can be designed by utilizing the convexity
Figure 100002_DEST_PATH_IMAGE029
To measure the accumulated metric value of the leading branch
Figure 86305DEST_PATH_IMAGE018
And the accumulated metric value of the lagging branch
Figure 807136DEST_PATH_IMAGE019
The difference of (a):
Figure 100002_DEST_PATH_IMAGE030
and 2.2, searching a timing error estimation curve through the timing normalization measurement value to obtain an estimated timing error.
Timing normalization metric value
Figure 51167DEST_PATH_IMAGE029
Relative normalized timing error
Figure 100002_DEST_PATH_IMAGE031
Is fixed, the curve having timing-normalized metric values in the region near the zero crossing
Figure 554961DEST_PATH_IMAGE029
And timing error
Figure 653367DEST_PATH_IMAGE003
Approximately linear, is used in the design as a timing error curve. Based on the curve, the accumulated metric value of the leading branch is obtained in the step one
Figure 187510DEST_PATH_IMAGE018
And the accumulated metric value of the lagging branch
Figure 981153DEST_PATH_IMAGE019
Thereafter, the metric values are normalized by calculating the timing
Figure 147692DEST_PATH_IMAGE029
By comparing the timing error curves, the estimated timing error can be obtained
Figure 100002_DEST_PATH_IMAGE032
。
Step three, updating the state by using the estimated timing error obtained in the step two, so that the loop allows the next iterative computation, and simultaneously obtaining an initial phase and a local oscillator frequency control word through the loop;
and 3.1, updating the loop state of the obtained estimated timing error through a second-order loop.
Noise interference exists under the actual working condition, and the estimated timing error obtained by the step two
Figure 116917DEST_PATH_IMAGE032
And (3) introducing a second-order loop filter to process errors when fluctuation exists in a certain range, wherein the loop updating formula of the adopted second-order loop is as follows:
Figure 100002_DEST_PATH_IMAGE033
in the formula (I), the compound is shown in the specification,
Figure 100002_DEST_PATH_IMAGE034
represents the first
Figure 287873DEST_PATH_IMAGE017
A data block input is
Figure 427867DEST_PATH_IMAGE017
Local oscillator frequency control words at the next iteration. Using the local oscillator frequency control word and the estimated timing error obtained in step two
Figure 273463DEST_PATH_IMAGE032
And delay thereof
Figure 100002_DEST_PATH_IMAGE035
And filtering the signal by a second-order filter to obtain a new frequency control word so as to complete the state updating of the loop.
A resonant frequency of
Figure 100002_DEST_PATH_IMAGE036
Accumulated length of oscillator
Figure 100002_DEST_PATH_IMAGE037
Second order filter coefficients
Figure 100002_DEST_PATH_IMAGE038
And
Figure 100002_DEST_PATH_IMAGE039
setting the loop bandwidth to
Figure 100002_DEST_PATH_IMAGE040
Damping coefficient of
Figure 100002_DEST_PATH_IMAGE041
Loop gain
Figure 100002_DEST_PATH_IMAGE042
When, it is specified by the following formula:
Figure 100002_DEST_PATH_IMAGE043
and 3.2, after updating the loop state, calculating the length of the data block and the initial phase through the oscillator frequency control word in the new state.
In order to make full use of the information already in the loop, the invention proposes to derive the second from the oscillator frequency control word
Figure 175822DEST_PATH_IMAGE017
Using data block length per data block input
Figure 100002_DEST_PATH_IMAGE044
And initial phase
Figure 100002_DEST_PATH_IMAGE045
The calculation mode and the subsequent iteration formula of (1):
Figure 100002_DEST_PATH_IMAGE046
in the formula (I), the compound is shown in the specification,
Figure 100002_DEST_PATH_IMAGE047
representing a reference frequency control word of up-sampling magnification
Figure 100002_DEST_PATH_IMAGE048
The inverse of (c) determines:
Figure 100002_DEST_PATH_IMAGE049
by controlling the data block length
Figure 100002_DEST_PATH_IMAGE050
Can be in the initial phase
Figure 100002_DEST_PATH_IMAGE051
When the phase is too large, the use of one sampling point is reduced, so that the initial phase is reduced
Figure 728465DEST_PATH_IMAGE034
And further avoid
Figure 355755DEST_PATH_IMAGE051
Overflow affects subsequent calculations.
And 3.3, judging whether the current loop is stable or not according to the length of the data block.
Figure 100002_DEST_PATH_IMAGE052
And is used to determine the stability of the current loop, the loop output being in a stable state without clock error
Figure 100002_DEST_PATH_IMAGE053
It should satisfy:
Figure 100002_DEST_PATH_IMAGE054
when in use
Figure 847785DEST_PATH_IMAGE052
When the tuning occurs, the loop enters a metastable state.
Figure 509711DEST_PATH_IMAGE050
When the value is equal to the ideal value continuously, the loop can be judged to enter a locking state, and a loop locking signal is given. Determining that the loop is locked allows subsequent steps to continue the iterative process, otherwise the iterative process is called out from step 3.3 and the outside is notified for reacquisition.
And step four, updating the local filter of the instant branch circuit by the initial phase and the local oscillator frequency control word obtained in the step three, so that the sampling position of the instant branch circuit is controlled by the estimated timing error, and the timing error can be gradually aligned after multiple recursive calculations.
And 4.1, acquiring a digital phase through the frequency control word and the initial phase.
The local filter is obtained by resampling a high-precision filter, and the high-precision filter is essentially a CPM signal matched filter bank with ultrahigh up-sampling multiplying factor
Figure 100002_DEST_PATH_IMAGE055
The generation rule is expressed by the following formula:
Figure 100002_DEST_PATH_IMAGE056
Figure 100002_DEST_PATH_IMAGE057
in the formula (I), the compound is shown in the specification,
Figure 100002_DEST_PATH_IMAGE058
representing the sample position of the high-precision filter,
Figure 100002_DEST_PATH_IMAGE059
then it means that the input sequence is
Figure 100002_DEST_PATH_IMAGE060
A bank of matched filters in time of day,
Figure 100002_DEST_PATH_IMAGE061
representing the sampling accuracy of the high-accuracy filter,
Figure 100002_DEST_PATH_IMAGE062
the length of the tail is represented.
Figure 100002_DEST_PATH_IMAGE063
Represents the equivalent correlation length of CPM, and the inherent correlation length of CPM is
Figure 100002_DEST_PATH_IMAGE064
Then, the conventional Viterbi algorithm is satisfied
Figure 100002_DEST_PATH_IMAGE065
However, for the forward viterbi process using the skewed Phase Frequency Pulse Truncation (TPFPT) method, there is
Figure 100002_DEST_PATH_IMAGE066
。
Figure 100002_DEST_PATH_IMAGE067
A sequence of digital phases, called filters, from 0 to 1 corresponding to a symbol period
Figure 228661DEST_PATH_IMAGE002
Inner sampling position, embodied as
Figure 100002_DEST_PATH_IMAGE068
And (4) accumulating.
After acquiring the frequency control word and the initial phase through step three, the first phase may be acquired by superposition
Figure 516817DEST_PATH_IMAGE017
A data block address of
Figure 438636DEST_PATH_IMAGE007
Corresponding digital phase point of
Figure 100002_DEST_PATH_IMAGE069
And corresponding digital phase sequence
Figure 100002_DEST_PATH_IMAGE070
：
Figure 100002_DEST_PATH_IMAGE071
And 4.2, generating a local filter through the digital phase.
From a sequence of digital phases
Figure 830435DEST_PATH_IMAGE070
The local filter to be used for the set of data blocks can be determined, taking into account
Figure 45253DEST_PATH_IMAGE069
Is not necessarily at
Figure 100002_DEST_PATH_IMAGE072
On samples, therefore using linear interpolation with high precision filters to obtain local filters
Figure 100002_DEST_PATH_IMAGE073
：
Figure 100002_DEST_PATH_IMAGE074
Figure 100002_DEST_PATH_IMAGE075
In the formula (I), the compound is shown in the specification,
Figure 100002_DEST_PATH_IMAGE076
represents the first
Figure 725764DEST_PATH_IMAGE017
A data block input sequence of
Figure 100002_DEST_PATH_IMAGE077
Time local filter of
Figure 359264DEST_PATH_IMAGE007
The value of the individual sample points is,
Figure 100002_DEST_PATH_IMAGE078
then it represents that the input sequence is
Figure 402306DEST_PATH_IMAGE077
Time high precision filter
Figure 100002_DEST_PATH_IMAGE079
The value of the individual sample points is,
Figure 100002_DEST_PATH_IMAGE080
、
Figure 100002_DEST_PATH_IMAGE081
respectively representing the digital phase sequences determined in step 4.1
Figure 788026DEST_PATH_IMAGE058
Is first and second
Figure 752571DEST_PATH_IMAGE079
The value of the individual samples.
In each recursion, after the frequency control word and the initial phase are obtained in the third step, the corresponding local filter can be obtained through the process, and the updating process is completed.
And step five, applying the updated local filter to the leading branch and the lagging branch. The forward viterbi process for the leading branch and the lagging branch are then reset such that their corresponding leading branch accumulated metrics and lagging accumulated metrics are zeroed out.
In order to ensure the output stability, in the instant branch, the received signal directly carries out a forward Viterbi process to obtain an instant branch metric value; in order to ensure the output stability, the instant branch metric value is not reset along with the leading branch and the lagging branch; in order to ensure that the loop output can correct the instant branch, the local filter used by the instant branch can be updated synchronously with the updating of the local filters of the leading branch and the lagging branch, so that the instant branch can be ensured to be capable of locking the timing error.
The invention has the advantages and beneficial effects that: compared with the timing synchronization method of the traditional continuous phase modulation system, the method avoids the delay resampling of the low signal-to-noise ratio signal, solves the problem of signal-to-noise ratio degradation caused by the sampling process, and improves the performance of the continuous phase modulation overall system in the area close to the waterfall, so that the timing synchronization process has stronger anti-noise capability. Meanwhile, the local filter is formed by resampling the high-precision filter, and the phase impulse response function used for continuous phase modulation can be changed at any time by changing the information stored by the high-precision filter, so that the system is more flexible and has stronger adaptability and expansibility.
Drawings
FIG. 1 is a graph illustrating the effect of timing error on the accumulated metric value in the present invention.
Fig. 2 is a timing graph of the timing error versus the normalized timing metric according to the present invention.
Fig. 3 is a schematic diagram of the generation of the local filter proposed by the present invention.
Fig. 4 is a block diagram of a scheme for acquiring timing error using early-late sampling in accordance with the present invention.
Fig. 5 is a flow chart of generating a local filter according to the present invention.
Detailed Description
The present invention will be described in further detail below by way of examples.
CPM modulation index set with external parameters
Figure DEST_PATH_IMAGE082
Symbol period
Figure DEST_PATH_IMAGE083
Code rate of
Figure DEST_PATH_IMAGE084
To literSampling multiplying power
Figure 750614DEST_PATH_IMAGE048
To 8, initial timing error
Figure DEST_PATH_IMAGE085
. System parameter lead-lag
Figure DEST_PATH_IMAGE086
Loop bandwidth
Figure DEST_PATH_IMAGE087
Coefficient of damping
Figure DEST_PATH_IMAGE088
Loop gain
Figure DEST_PATH_IMAGE089
Length of data block
Figure DEST_PATH_IMAGE090
Sampling accuracy of high-accuracy filter
Figure DEST_PATH_IMAGE091
For the purpose of example, the detailed description of the embodiments of the invention is provided.
An accumulated metric is first obtained from the input signal through the lead-lag two branches, as shown in step 1.
Step 1: the input signal is sampled with lead-lag amount of
Figure DEST_PATH_IMAGE092
That is to say
Figure DEST_PATH_IMAGE093
And
Figure DEST_PATH_IMAGE094
the leading branch signal and the lagging branch signal are generated. Two paths of signals pass through the forward Viterbi process of the TPFPT method to generate the accumulated metric value of the leading branch of the 0 th data block
Figure DEST_PATH_IMAGE095
And the accumulated metric value of the lagging branch
Figure DEST_PATH_IMAGE096
。
After the accumulated metric values of the two branches are obtained, the accumulated metric values are compared with a timing error curve to obtain an estimated timing error, and the specific flow is as in step 2.1-step 2.2.
Step 2.1: cumulative metric of leading branch
Figure 958084DEST_PATH_IMAGE095
Sum-lag branch accumulated metric value
Figure 517635DEST_PATH_IMAGE096
Obtaining timing normalization measurement value after difference and normalization processing
Figure 235055DEST_PATH_IMAGE029
。
Step 2.2: using a pre-stored set of modulation indices
Figure DEST_PATH_IMAGE097
Timing error curve meeting conditional requirements and timing normalization metric value obtained through step 2.1
Figure 833527DEST_PATH_IMAGE029
Obtaining the estimated timing error by a table look-up method
Figure DEST_PATH_IMAGE098
。
After the estimated timing error is obtained, the frequency control word and the initial phase of the oscillator are obtained through a second-order loop, and meanwhile, the loop state is updated to enable the loop to be ready for the next recursion process, wherein the specific flow is as the step 3.1-the step 3.3.
Step 3.1: the estimated timing error value updates the frequency control word of the oscillator via a loop update formula. Use ofThe second order loop filter parameter satisfies the loop bandwidth
Figure 585582DEST_PATH_IMAGE087
Coefficient of damping
Figure 578684DEST_PATH_IMAGE088
Loop gain
Figure 642455DEST_PATH_IMAGE089
(ii) a To obtain
Figure DEST_PATH_IMAGE099
；
Figure DEST_PATH_IMAGE100
. Obtaining the frequency control word of the next time through loop filtering
Figure DEST_PATH_IMAGE101
. For the first cycle, there are
Figure DEST_PATH_IMAGE102
To clarify the iterative process, the following
Figure DEST_PATH_IMAGE103
And (4) indicating.
Step 3.2: using frequency control words
Figure 562394DEST_PATH_IMAGE103
Obtaining new used data block length by accumulation calculation
Figure DEST_PATH_IMAGE104
And initial phase
Figure DEST_PATH_IMAGE105
。
Step 3.3: by using data block length
Figure DEST_PATH_IMAGE106
Whether the number of times equal to the theoretical data block length 1320 exceeds the required numberAnd calculating the times to judge whether the loop enters a locking state or not and giving a locking signal.
After the initial phase, the frequency control word of the oscillator is obtained, the local filter used in the forward Viterbi procedure is updated using the above information, and the specific flow is as in step 4.1 to step 4.2.
Step 4.1: calculating a digital phase sequence of a local filter from an initial phase and a frequency control word of an oscillator
Figure DEST_PATH_IMAGE107
And further converting the digital phase value of the high-precision filter into the address of the high-precision filter by searching the maximum digital phase value of the high-precision filter which is smaller than the digital phase
Figure DEST_PATH_IMAGE108
：
Figure DEST_PATH_IMAGE109
Step 4.2: and obtaining the updated local filter by the high-precision filter address and the digital phase through a linear interpolation method.
Figure DEST_PATH_IMAGE110
Figure DEST_PATH_IMAGE111
After linear interpolation is performed to obtain the local filter, the local filters of the advance branch, the lag branch and the immediate branch need to be updated, and the local filters of the up-conversion branch and the down-conversion branch need to be updated, and the specific flow is as in step 5.
And 5: the updated local filter is applied in the leading branch and the lagging branch. The forward viterbi process for the leading branch and the lagging branch are then reset such that their corresponding leading branch accumulated metrics and lagging accumulated metrics are zeroed out.
The function of correcting the timing error and the frequency error provided by the invention can be realized by continuously repeating all the steps from step 1 to step 5.
In summary, the timing synchronization method of the continuous phase modulation system provided by the present invention avoids the noise immunity deterioration caused by resampling the input signal in the conventional algorithm by resampling the local filter, thereby improving the reliability of the synchronization system.

Claims (6)

1. A timing synchronization method of a continuous phase modulation system is characterized by comprising the following specific steps:
step one, an input signal simultaneously carries out a forward Viterbi process through a leading branch and a lagging branch to obtain corresponding leading branch accumulated metric values and lagging branch accumulated metric values;
step two, acquiring an estimated timing error of the current input signal according to the leading branch accumulated metric value and the lagging branch accumulated metric value in the step one;
step three, updating the state by using the estimated timing error obtained in the step two, so that the loop allows the next iterative computation, and simultaneously obtaining an initial phase and a local oscillator frequency control word through the loop;
step four, updating the local filter of the instant branch circuit by the initial phase and the local oscillator frequency control word obtained in the step three, so that the sampling position is controlled by the estimated timing error, and the timing error can be gradually aligned after multiple recursive calculations;
step five, the updated local filter of the instant branch is applied to the leading branch and the lagging branch; then resetting the forward Viterbi process of the leading branch and the lagging branch to return the corresponding leading branch accumulated metric value and the lagging accumulated metric value to zero.
2. The timing synchronization method of a continuous phase modulation system according to claim 1, wherein: in the first step, the method specifically comprises the following steps: taking a time-varying noiseless received signal as
Figure DEST_PATH_IMAGE001
With a symbol period of
Figure DEST_PATH_IMAGE002
(ii) a When the timing error of the input signal is
Figure DEST_PATH_IMAGE003
By continuous phase modulation CPM signal model, the noise-free received signal is represented as:
Figure DEST_PATH_IMAGE004
in the formula (I), the compound is shown in the specification,
Figure DEST_PATH_IMAGE005
represents the energy of the symbol and is,
Figure DEST_PATH_IMAGE006
represents the input of
Figure DEST_PATH_IMAGE007
The information of the number of symbols is,
Figure DEST_PATH_IMAGE008
is composed of
Figure 87139DEST_PATH_IMAGE006
The corresponding modulation index is set to be,
Figure DEST_PATH_IMAGE009
then as a function of the phase impulse response of the CPM,
Figure DEST_PATH_IMAGE010
then the phase impulse response function is expressed after introducing the timing error; j represents an imaginary phase, without meaning;
for the forward Viterbi procedure, the leading lag isThe rear amount is
Figure DEST_PATH_IMAGE011
In the case of leading branch, the received signal of leading branch
Figure DEST_PATH_IMAGE012
And the reception signal of the lagging branch
Figure DEST_PATH_IMAGE013
Expressed as:
Figure DEST_PATH_IMAGE014
Figure DEST_PATH_IMAGE015
the length of the data block entering the timing synchronization system each time is set as
Figure DEST_PATH_IMAGE016
Obtaining the cumulative metric of the leading branch of the nth data block after the forward Viterbi procedure
Figure DEST_PATH_IMAGE017
And the accumulated metric value of the lagging branch
Figure DEST_PATH_IMAGE018
The formula is obtained as follows:
Figure DEST_PATH_IMAGE019
Figure DEST_PATH_IMAGE020
Figure DEST_PATH_IMAGE021
Figure DEST_PATH_IMAGE022
in the formula (I), the compound is shown in the specification,
Figure DEST_PATH_IMAGE023
representing the received demodulation sequence.
3. A timing synchronization method of a continuous phase modulation system according to claim 2, characterized in that: in the second step, the method specifically comprises the following steps: step 2.1, accumulating the measurement value by the leading branch
Figure DEST_PATH_IMAGE024
And the accumulated metric value of the lagging branch
Figure 413734DEST_PATH_IMAGE018
Acquiring a timing normalization measurement value;
under CPM system, timing error accumulates metric value for leading branch
Figure 599996DEST_PATH_IMAGE024
And the accumulated metric value of the lagging branch
Figure 526364DEST_PATH_IMAGE018
The effect of (c) is expressed as:
Figure DEST_PATH_IMAGE025
in the formula (I), the compound is shown in the specification,
Figure DEST_PATH_IMAGE026
the average modulation index for a symbol within a sequence is calculated by:
Figure DEST_PATH_IMAGE027
in that
Figure DEST_PATH_IMAGE028
Inner, leading branch cumulative metric value
Figure 652320DEST_PATH_IMAGE024
And the accumulated metric value of the lagging branch
Figure 146887DEST_PATH_IMAGE018
Design timing normalization metric value expressed as convex function relative to timing error
Figure DEST_PATH_IMAGE029
To measure the accumulated metric value of the leading branch
Figure 351603DEST_PATH_IMAGE024
And the accumulated metric value of the lagging branch
Figure 724072DEST_PATH_IMAGE018
The difference of (a):
Figure DEST_PATH_IMAGE030
step 2.2, a timing error curve is obtained through the timing normalization measurement value, and an estimated timing error is obtained;
timing normalization metric value
Figure DEST_PATH_IMAGE031
Relative normalized timing error
Figure DEST_PATH_IMAGE032
Is fixed, the curve ofThe line having a timed normalized metric value in the region near the zero crossing
Figure 799475DEST_PATH_IMAGE031
And timing error
Figure 199364DEST_PATH_IMAGE003
Approximating a linear relationship, used as a timing error curve in design; in the first step, the accumulated metric value of the leading branch is obtained
Figure 750431DEST_PATH_IMAGE017
And the accumulated metric value of the lagging branch
Figure 392503DEST_PATH_IMAGE018
Thereafter, the metric values are normalized by calculating the timing
Figure 587992DEST_PATH_IMAGE031
Obtaining the estimated timing error of the nth data block by referring to the timing error curve
Figure DEST_PATH_IMAGE033
。
4. A timing synchronization method of a continuous phase modulation system according to claim 3, characterized in that: in the third step, the concrete steps are as follows: step 3.1, the obtained estimated timing error is subjected to loop state updating through a second-order loop;
in the actual working condition, noise interference exists, and the timing error is estimated through the obtained estimation
Figure 221098DEST_PATH_IMAGE033
And (3) introducing a second-order loop filter to process errors when range fluctuation exists, wherein the loop updating formula of the adopted second-order loop is as follows:
Figure DEST_PATH_IMAGE034
in the formula (I), the compound is shown in the specification,
Figure DEST_PATH_IMAGE035
representing the input of the nth data block, namely a local oscillator frequency control word under the nth iteration; using the local oscillator frequency control word and the estimated timing error obtained in step two
Figure 827836DEST_PATH_IMAGE033
And delay thereof
Figure DEST_PATH_IMAGE036
Filtering the signal by a second-order filter to obtain a new frequency control word so as to complete the state updating of the loop;
a resonant frequency of
Figure DEST_PATH_IMAGE037
Accumulated length of oscillator
Figure DEST_PATH_IMAGE038
Second order filter coefficients
Figure DEST_PATH_IMAGE039
And
Figure DEST_PATH_IMAGE040
setting the loop bandwidth to
Figure DEST_PATH_IMAGE041
Damping coefficient of
Figure DEST_PATH_IMAGE042
Loop gain
Figure DEST_PATH_IMAGE043
When, it is specified by the following formula:
Figure DEST_PATH_IMAGE044
step 3.2, after updating the loop state, calculating the length of the data block and the initial phase through the local oscillator frequency control word in the new state;
obtaining the used data block length of the input of the nth data block from the local oscillator frequency control word
Figure DEST_PATH_IMAGE045
And initial phase
Figure DEST_PATH_IMAGE046
The calculation mode and the subsequent iteration formula of (1):
Figure DEST_PATH_IMAGE047
in the formula (I), the compound is shown in the specification,
Figure DEST_PATH_IMAGE048
representing a reference local oscillator frequency control word, by up-sampling rate
Figure DEST_PATH_IMAGE049
The inverse of (c) determines:
Figure DEST_PATH_IMAGE050
by controlling the data block length
Figure DEST_PATH_IMAGE051
At the initial phase
Figure DEST_PATH_IMAGE052
When the phase is too large, the use of one sampling point is reduced, so that the initial phase is reduced
Figure 683053DEST_PATH_IMAGE035
To avoid
Figure 231584DEST_PATH_IMAGE052
Overflow affects subsequent calculations;
step 3.3, judging whether the current loop is stable or not according to the length of the data block;
Figure DEST_PATH_IMAGE053
and is used to determine the stability of the current loop, the steady state loop output being made without clock error
Figure DEST_PATH_IMAGE054
It should satisfy:
Figure DEST_PATH_IMAGE055
when in use
Figure 238854DEST_PATH_IMAGE053
When the adjustment occurs, the loop enters a metastable state;
Figure 374300DEST_PATH_IMAGE051
when the loop is continuously equal to the ideal value, the loop is judged to enter a locking state, and a loop locking signal is given; determining that the loop is locked allows subsequent steps to continue the iterative process, otherwise the iterative process is called out from step 3.3 and reacquired.
5. The timing synchronization method of a continuous phase modulation system according to claim 4, wherein: in the fourth step, the method specifically comprises the following steps: step 4.1, acquiring a digital phase through a local oscillator frequency control word and an initial phase;
the local filter is obtained by resampling a high-precision filter, and the high-precision filter is essentially a CPM signal with ultrahigh up-sampling multiplying powerMatched filter bank
Figure DEST_PATH_IMAGE056
The generation rule is expressed by the following formula:
Figure DEST_PATH_IMAGE057
Figure DEST_PATH_IMAGE058
where i represents the sample position of the high-precision filter,
Figure DEST_PATH_IMAGE059
then it means that the input sequence is
Figure DEST_PATH_IMAGE060
A bank of matched filters in time of day,
Figure DEST_PATH_IMAGE061
representing the sampling accuracy of the high-accuracy filter,
Figure DEST_PATH_IMAGE062
then the trailing length is represented;
Figure DEST_PATH_IMAGE063
represents the equivalent correlation length of CPM, and the inherent correlation length of CPM is
Figure DEST_PATH_IMAGE064
For the Viterbi algorithm to satisfy
Figure DEST_PATH_IMAGE065
However, for the forward Viterbi procedure using the ramp phase frequency pulse truncation TPFPT method, there is
Figure DEST_PATH_IMAGE066
A sequence of digital phases, called filters, from 0 to 1 corresponding to a symbol period
Figure 548055DEST_PATH_IMAGE002
Inner sampling position, embodied as
Figure DEST_PATH_IMAGE067
Accumulation of (1);
after obtaining the local oscillator frequency control word and the initial phase, obtaining the nth data block address as
Figure 626126DEST_PATH_IMAGE007
Corresponding digital phase point of
Figure DEST_PATH_IMAGE068
And corresponding digital phase sequences
Figure DEST_PATH_IMAGE069
；
Figure DEST_PATH_IMAGE070
Step 4.2, generating a local filter through the digital phase;
by a sequence of digital phases
Figure 804297DEST_PATH_IMAGE069
I.e. determining the local filter to be used for the set of data blocks, taking into account
Figure 427040DEST_PATH_IMAGE068
Is not necessarily in
Figure DEST_PATH_IMAGE071
On samples, therefore, the local filter is obtained by linear interpolation of the high-precision filter
Figure DEST_PATH_IMAGE072
：
Figure DEST_PATH_IMAGE073
Figure DEST_PATH_IMAGE074
In the formula (I), the compound is shown in the specification,
Figure DEST_PATH_IMAGE075
represents the input sequence of the nth data block as
Figure 293233DEST_PATH_IMAGE060
Time local filter of
Figure 176876DEST_PATH_IMAGE007
The value of the individual sample points is,
Figure DEST_PATH_IMAGE076
Figure DEST_PATH_IMAGE077
then it represents that the input sequence is
Figure 507974DEST_PATH_IMAGE060
Time high precision filter
Figure DEST_PATH_IMAGE078
The value of the individual sample points is,
Figure DEST_PATH_IMAGE079
、
Figure DEST_PATH_IMAGE080
respectively representing the digital phases determined in step 4.1Sequence No
Figure DEST_PATH_IMAGE081
A first and a second
Figure 257493DEST_PATH_IMAGE078
The value of each sample point;
in each recursion, the corresponding local filter is obtained by the process, and the updating process is completed.
6. The timing synchronization method of a continuous phase modulation system according to claim 5, wherein: in the fifth step, the method specifically comprises the following steps: in the instant branch, the received signal directly carries out a forward Viterbi process to obtain an instant branch metric value; in order to ensure the output stability, the instant branch metric value is not reset along with the leading branch and the lagging branch; in order to ensure that the loop output can correct the instant branch, the local filter used by the instant branch can be updated synchronously with the updating of the local filters of the leading branch and the lagging branch, so that the instant branch can be ensured to be capable of locking the timing error.
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