CN115047965B - Rapid synchronous frequency sweep wave source device and method for magnetic resonance system - Google Patents
Rapid synchronous frequency sweep wave source device and method for magnetic resonance system Download PDFInfo
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Abstract
The invention discloses a fast synchronous sweep frequency wave source device and a method for a magnetic resonance system, which comprises a PC upper computer, an FPGA core module, a direct digital synthesizer wave source module and a mixing filter module; the PC upper computer is communicated with the FPGA core module and is used for setting the wave source output frequency data of the direct digital synthesizer and resetting, starting and suspending the system through a software end; the FPGA core module comprises an upper computer data buffer module, a phase loop driving module, a frequency tuning word main memory, a direct digital synthesizer wave source initialization read-only memory, a data output control module, a direct digital synthesizer wave source control module, a data selector module and a quick synchronization module. The wave source has the advantages of short frequency-cutting dead time, high output frequency and high output bandwidth, and can acquire the currently required frequency in real time through an external trigger digital interface, so that the experimental efficiency is improved.
Description
Technical Field
The invention relates to the technical field of magnetic resonance, in particular to a rapid synchronous frequency sweeping wave source device and a method for a magnetic resonance system.
Background
The magnetic resonance technology is a scientific method for controlling spin by electromagnetic waves, and a sample is excited by a radio frequency field to generate a resonance phenomenon, so that the characteristic detection of the sample is realized. The device can detect the composition, structure and kinetic properties of the substance unit on the microscopic scale of the tested sample without causing damage to the tested sample. In recent years, with the development of technologies such as fourier transform spectroscopy, two-dimensional spectroscopy, and magnetic resonance imaging, magnetic resonance technology has been widely and importantly used in many fields such as information science, materials, chemistry, biology, and medicine. For example, the method is applied to the optical detection magnetic resonance technology in the field of quantum precision measurement, the radio frequency source provides a continuously-changing uninterrupted excitation signal for a magnetic resonance system through frequency sweeping, magnetic resonance measurement is carried out on a sample, and finally the spin magnetic resonance frequency of a target color center is accurately obtained.
However, as the integration and complexity of magnetic resonance systems increase, the synchronization of the excitation signal and the detection device becomes critical. Particularly in the field of quantum precision measurement, taking a quantum experiment system based on an NV color center as an example, devices integrated by the system mainly comprise a wave source, a pulse generator, an acquisition card and the like. In order to accurately obtain the resonance frequency of the NV color center, the wave source needs to be accurately synchronized with other instrument equipment in the frequency sweeping process, and the one-to-one correspondence of experimental parameters is ensured. If commercial wave sources on the market are adopted, the wave sources can be coordinated with other experimental equipment only by using a computer. This approach involves a large amount of communication and system reset time, which adds significantly to the time overhead.
Meanwhile, the dead time of switching among different frequency points is also very important. Similarly, quantum experimental systems based on NV color centers are used as examples. Due to the influence of factors such as the output power of a microwave source on the overturning time between electron spin energy levels, the duration required by each frequency point is only in the order of us or even ns. Currently, a phase-locked loop based on a Voltage Controlled Oscillator (VCO) is mostly used for generating a stable output signal in a commercial wave source. However, when the output frequency is changed, the dead time when different frequency points are switched is increased due to the longer time for re-locking the phase-locked loop, so that the experimental time overhead is increased. The Direct Digital Synthesizer (DDS) can effectively shorten the dead time of switching between different frequency points. The wave source based on the DDS technology can modify data for driving the ADC through the change of phase information in the phase accumulator in one period of the switching frequency, so that the output frequency is changed, and the rapid frequency switching is realized. For example, for a DDS technology-based wave source with 145MHz of operating clock, the output delay is in ns when the frequency is changed.
Disclosure of Invention
The invention aims to provide a rapid synchronous sweep frequency wave source device and a rapid synchronous sweep frequency wave source method for a magnetic resonance system, so as to overcome the defects in the prior art.
In order to achieve the purpose, the invention provides the following technical scheme:
the invention discloses a fast synchronous sweep frequency wave source device for a magnetic resonance system, which comprises a PC upper computer, an FPGA core module, a direct digital synthesizer wave source module and a mixing filtering module;
the PC upper computer is communicated with the FPGA core module and is used for setting the wave source output frequency data of the direct digital synthesizer and resetting, starting and suspending the system through a software end;
the FPGA core module comprises an upper computer data buffer module, a phase-locked loop driving module, a frequency tuning word main memory, a direct digital synthesizer wave source initialization read-only memory, a data output control module, a direct digital synthesizer wave source control module, a data selector module and a quick synchronization module;
the upper computer data buffer module is connected with the phase-locked loop driving module, the frequency tuning word main memory and the data output control module, the data output control module is connected with the rapid synchronization module, the frequency tuning word main memory, the direct digital synthesizer wave source initialization read-only memory and the direct digital synthesizer wave source control module, and the frequency tuning word main memory, the direct digital synthesizer wave source initialization read-only memory and the direct digital synthesizer wave source control module are all connected with the data selector module;
the fast synchronization module provides an external synchronization enabling interface and an external synchronization triggering interface; the FPGA core module is used for initializing a direct digital synthesizer wave source, outputting frequency tuning word data for controlling the direct digital synthesizer wave source, switching the working mode of the direct digital synthesizer wave source, and controlling the output, reset, start and pause of the direct digital synthesizer wave source;
the direct digital synthesizer wave source module and the mixing filter module are respectively provided with a phase-locked loop, and an FPGA internal clock manager IP core is used for creating a clock source for a reference clock when the phase-locked loop works.
Preferably, the PC upper computer packs the frequency data and sends the frequency data to a frequency tuning word main memory of the FPGA for storage; triggering an FPGA core module through software, and outputting a control signal for controlling a wave source of the direct digital synthesizer; reading currently output frequency data in real time; and/or the upper computer data buffer module is used for buffering frequency tuning word data sent by the upper computer, and data for driving a phase-locked loop, a software trigger signal, a global reset signal and a system start or pause signal.
Preferably, the phase-locked loop driving module is used for driving phase-locked loops in the direct digital synthesizer wave source module and the mixing filtering module; the clock signal output by a phase-locked loop in the wave source module of the direct digital synthesizer is used as a reference clock of the wave source module of the direct digital synthesizer; the clock signal output by the phase-locked loop in the frequency mixing filtering module is used for a local oscillator signal required by the frequency mixing filtering module during frequency mixing; and/or the frequency tuning word main memory is used for storing the frequency tuning word calculated by the PC upper computer, and outputting frequency tuning word data in a new address when a trigger signal is received each time.
Preferably, the direct digital synthesizer wave source initialization read only memory stores data for initializing the direct digital synthesizer wave source, and a register in the direct digital synthesizer wave source is initialized before operation; and/or the data output control module is used for managing the main memory output of the frequency tuning words, the wave source initialization read-only memory output of the direct digital synthesizer and the wave source control module output of the direct digital synthesizer, and receiving a software trigger signal of the data buffer module of the PC upper computer and a quick synchronization trigger signal of the quick synchronization module; and/or the direct digital synthesizer wave source control module is used for configuring the direct digital synthesizer wave source working mode, resetting the direct digital synthesizer wave source, outputting an enable pulse by the direct digital synthesizer wave source and controlling a functional port.
Preferably, an external synchronization enabling interface of the fast synchronization module is used for synchronously resetting address data in the frequency tuning word main memory, and the external synchronization triggering interface receives the triggering pulse, updates the address data of the frequency tuning word main memory, outputs the frequency tuning word data in the new address, and realizes fast synchronization triggering frequency sweeping.
Preferably, the direct digital synthesizer wave source module includes a direct digital synthesizer and a phase-locked loop, a clock output of the phase-locked loop is used for a reference clock of the direct digital synthesizer wave source, the reference clock of the phase-locked loop is a 50MHz clock source created by an FPGA internal clock manager, and the FPGA internal clock is a source clock of the system.
Preferably, the frequency mixing and filtering module includes a phase-locked loop, a mixer and a filter, a signal output by the phase-locked loop is used for a local oscillation signal of the mixer, the mixer receives an output signal of the phase-locked loop and a signal output by the direct digital synthesizer wave source module, and the mixed signal passes through the filter to obtain a frequency signal with a single output and no harmonic.
The invention discloses a rapid synchronous frequency sweeping method for a magnetic resonance system, which comprises the following steps: the method comprises the following steps:
s1, a PC upper computer calculates frequency tuning word data for controlling the output frequency of a wave source of a direct digital synthesizer, calculates configuration data for controlling the output frequency of a phase-locked loop in a wave source module of the direct digital synthesizer and configuration data for the output frequency of the phase-locked loop in a frequency mixing filter module, packs the data and sends the data to an FPGA core module for processing, and the FPGA core module stores the frequency tuning word data and drives a clock signal output by the phase-locked loop for a reference clock frequency of the wave source of the direct digital synthesizer and a frequency mixing local oscillator signal of the frequency mixing filter module;
s2, after the PC upper computer sends a system reset instruction to reset, sending a direct digital synthesizer wave source initialization instruction to the FPGA core module, sending an initialization signal by a data output control module in the FPGA core module, setting a function configuration signal into an initialization mode after the initialization signal is collected by the direct digital synthesizer wave source control module in the FPGA core module, and sending a selection signal to an internal data selector module by the direct digital synthesizer wave source control module for selectively outputting data in a direct digital synthesizer wave source initialization read-only memory; after the direct digital synthesizer wave source initialization read-only memory collects the initialization signal, the direct digital synthesizer wave source initialization read-only memory is enabled, the address signal sent by the data control module is received, the data stored in the direct digital synthesizer wave source initialization read-only memory is output, after the initialization of the direct digital synthesizer wave source is completed, the data output control module resets the selection signal and releases the direct digital synthesizer wave source initialization read-only memory, and the function configuration signal output by the direct digital synthesizer wave source control module is set to be in a frequency output mode;
s3, sending a synchronization enabling pulse to a rapid synchronization module in the FPGA core module, and resetting an address in a frequency tuning word main memory by a data control module after detecting a pulse rising edge in the FPGA core module;
and S4, after the synchronous enabling pulse is sent, acquiring a pulse triggering signal by an external synchronous triggering interface of a quick synchronous module in the FPGA core module.
Preferably, the specific processing procedure of the FPGA core module in step S1 is as follows: distributing the frequency tuning word data to a frequency tuning word main memory inside the FPGA core module through an upper computer data buffer module inside the FPGA core module, and storing the frequency tuning word data; and sending the configuration data of the output frequency of the phase-locked loop to a phase-locked loop driving module to drive the phase-locked loop to work, wherein the clock signal output by the phase-locked loop is used for the reference clock frequency of the direct digital synthesizer wave source work and the frequency mixing local oscillator signal of the frequency mixing filtering module after being output by a filter.
Preferably, the specific process of step S4 is: the fast synchronization module in the FPGA core module detects the rising edge of the trigger pulse signal, and once the rising edge of the trigger pulse signal is detected, the fast synchronization module sends a data output instruction to the data control module, the data control module sends address data to the frequency tuning word main memory, and the frequency data sent by the frequency tuning word main memory is output to a wave source sampling port of the direct digital synthesizer through the data selector module; after the data is kept for a period of time, the direct digital synthesizer wave source control module sends an output pulse signal to the direct digital synthesizer wave source, the direct digital synthesizer wave source collects the output pulse signal, and the frequency signal set by the frequency tuning word data is output.
The invention has the beneficial effects that: the invention provides a wave source device for a magnetic resonance system and supporting quick external trigger synchronization, which has the advantages of short frequency-cutting dead time, high output frequency and high output bandwidth.
Drawings
FIG. 1 is a block diagram of a fast synchronous swept-wave source arrangement for a magnetic resonance system;
FIG. 2 is a system diagram of an FPGA according to an embodiment of the present invention;
FIG. 3 is a diagram of a fast synchronization timing scheme according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to the accompanying drawings and examples. It should be understood, however, that the description herein of specific embodiments is only intended to illustrate the invention and not to limit the scope of the invention. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present invention.
As shown in fig. 1 and fig. 2, an embodiment of the present invention provides a fast synchronous frequency sweep wave source device for a magnetic resonance system, which includes a PC upper computer, an FPGA core module, a DDS wave source module, and a mixing filter module.
The PC upper computer is communicated with the FPGA core module and is mainly used for setting DDS wave source output frequency data and resetting, starting or suspending the system through a software end. The PC upper computer packs the Frequency data and sends the Frequency data to a Frequency Tuning Word (FTW) RAM (Random Access Memory, namely a main Memory) of the FPGA for storage; the FPGA core module can be triggered through software to output data for controlling a DDS wave source; reading the current output frequency in real time; a Clock Manager (CMT) IP core inside the FPGA is used for outputting a 50MHz Clock for an external DDS wave source and a PLL working reference Clock in the frequency mixing filtering module.
The FPGA core module is used for initializing a DDS wave source, outputting FTW data for controlling the DDS wave source, switching the working mode of the DDS wave source, and controlling the output, reset, start, pause and the like of the DDS wave source; an external synchronous enabling interface and an external synchronous triggering interface are designed to realize rapid synchronous frequency sweeping.
The FPGA core module comprises an upper computer data buffer module, a Phase Locked Loop (PLL) driving module, an FTW RAM, a DDS wave source initialization ROM (Read-Only Memory), a data output control module, a DDS wave source control module, a MUX (Multiplexer, data selector) module and a quick synchronization module;
the quick synchronization module provides two external interfaces including an external synchronization enabling interface and an external synchronization triggering interface. The external synchronous enabling interface is used for synchronously resetting address data in the FTW RAM, the external synchronous triggering interface receives the triggering pulse, updates the address data of the FTW RAM, outputs the FTW data in a new address and realizes quick synchronous triggering frequency sweeping.
The upper computer data buffer module is used for buffering FTW data sent by an upper computer, data for driving a PLL (phase locked loop), a software trigger signal, a global reset signal, a system start or pause signal and the like.
The PLL driving module is used for driving phase-locked loops in the DDS wave source module and the frequency mixing filtering module, and a clock signal output by the PLL in the DDS wave source module is used for a reference clock of the DDS wave source module; the PLL in the frequency mixing filter module outputs a clock signal which is used for a local oscillator signal required by the frequency mixing filter module during frequency mixing.
The FTW RAM is used for storing frequency tuning words FTW calculated by the upper computer, and FTW data in a new address is output when a trigger signal is received each time.
The DDS wave source initialization ROM stores data for initializing the DDS wave source, and a register in the DDS wave source needs to be initialized before the DDS wave source initialization ROM works, so that the DDS wave source is guaranteed to work reliably.
The data output control module is used for managing FTW RAM output, DDS wave source initialization ROM output and DDS wave source control module output, and receiving software trigger signals of the PC upper computer data buffer module and quick synchronization trigger signals of the quick synchronization module.
The DDS wave source control module comprises a DDS wave source configuration working mode, a reset DDS wave source, a DDS wave source output enabling pulse and control of some functional ports.
The MUX module is used for selecting FTW data output or data in the DDS wave source initialization ROM, and the selection signal is provided by the DDS wave source control module.
The DDS wave source module comprises a DDS and a PLL, and the clock output of the PLL is used for a reference clock of the DDS wave source. Because the reference clock of the PLL is 50MHz created by the CMT inside the FPGA, namely the FPGA internal clock is the source clock of the system, the reliability of the system is ensured.
The frequency mixing filtering module comprises a PLL (phase locked loop), a frequency mixer and a filter, wherein a signal output by the PLL is used for a local oscillation signal of the frequency mixer, the frequency mixer receives an output signal of the PLL and a signal output by the DDS (direct digital synthesizer) wave source module, and the signal after frequency mixing passes through the filter to obtain a frequency signal with single output and no harmonic.
The embodiment of the invention provides a fast synchronous frequency sweeping device for a magnetic resonance system, which is based on a solid state spin (NV color center) experiment platform. Since solid state spins are affected by external mechanical vibration, microwave broadening and other factors, the spin magnetic resonance frequency of the solid state spins is shifted. Therefore, in the experiment, the spin magnetic resonance frequency needs to be frequently updated by means of frequency sweep measurement to ensure the accuracy of the experimental result. The frequency switching speed of the output signal of the frequency sweeping source also affects the accuracy of the measurement result of the spin magnetic resonance frequency. In order to evaluate the working performance of the rapid synchronous frequency sweeping device provided by the invention, the frequency sweeping device is applied to a solid-state spin quantum experiment platform, a good expected effect is obtained, and the time consumption of a spin magnetic resonance frequency sweeping measurement experiment is greatly shortened.
The embodiment of the invention provides a quick synchronous frequency sweeping method for a magnetic resonance system, which comprises the following steps:
step S1, a PC upper computer calculates FTW data for controlling DDS wave source output frequency, calculates configuration data for controlling PLL output frequency in a DDS wave source module and configuration data for controlling PLL output frequency in a frequency mixing filter module, packs the data and sends the data to an FPGA, distributes the FTW data to an FTW RAM in the FPGA through an upper computer data buffer module, and stores the FTW data; and sending the PLL configuration data to a PLL driving module to drive a phase-locked loop PLL to work, wherein a clock signal output by the phase-locked loop is used for a reference clock frequency of the DDS wave source work and a mixing local oscillator signal of a mixing filtering module after being output by a filter.
S2, the PC upper computer sends a system reset instruction, after the reset is finished, the PC upper computer sends a DDS wave source initialization instruction, the data output control module sends an initialization signal, and after the DDS wave source control module collects the initialization signal, the function configuration signal is set to an initialization mode, and a selection signal is sent to the MUX module and used for selectively outputting data in the DDS wave source initialization ROM; after the DDS wave source initialization ROM collects the initialization signal, the DDS wave source initialization ROM is enabled, the address signal sent by the data control module is received, the data stored in the DDS wave source initialization ROM is output, after the initialization of the DDS wave source is completed, the data output control module resets the selection signal, the DDS wave source initialization ROM is released, and the function configuration signal output by the DDS wave source control module is set to be in a frequency output mode.
And S3, sending a synchronous enabling pulse to a designed FPGA synchronous enabling interface according to the quick synchronous time sequence shown in the figure 3, and resetting an address in the FTW RAM by the data control module after detecting the rising edge of the pulse in the FPGA. Before each frequency sweep, the address of the FTW RAM is reset by sending a synchronous enabling pulse, so that the wave source can be accurately synchronized with other instrument equipment in the frequency sweep process, the one-to-one correspondence of experimental parameters is ensured, and the resonance frequency of the NV color center is accurately obtained.
And S4, after the synchronous enabling pulse is sent, acquiring a pulse triggering signal by an external synchronous triggering interface. The fast synchronization module detects the rising edge of the trigger pulse signal, and once the rising edge of the trigger pulse signal is detected, the fast synchronization module sends a data output instruction to the data control module, the data control module sends address data to the FTW RAM, and the FTW RAM sends frequency data to be output to the DDS wave source sampling port through the MUX module. After the data is kept for a period of time, the DDS wave source control module sends an output pulse signal to the DDS wave source, and the DDS wave source collects the output pulse signal and outputs a frequency signal set by the FTW data. And finally, a frequency signal output by the DDS wave source passes through the frequency mixing filtering module to obtain an output signal, and one-time triggering is completed. The time delay from the detection of the rising edge of the trigger pulse to the final DDS wave source output signal is in ns order. In addition, the external synchronous trigger interface can receive ns-level pulse trigger signals. And the external synchronous trigger interface receives the continuous trigger signal, when the RAM reads the last FTW data, the data control module resets the address and outputs the FTW at the address, and finally the purpose of quickly and synchronously sweeping the frequency is realized.
And finally, inputting the microwave signal output by the frequency sweeping device into a microwave radiation structure. The radiation structure converts the signal into an alternating magnetic field and acts on the NV color center to realize spin control; and then synchronously collecting NV color center fluorescence signals by using a photoelectric detection device, sending the NV color center fluorescence signals to a data acquisition card, and carrying out data processing on the NV color center fluorescence signals by using a PC (personal computer) upper computer so as to obtain the spin magnetic resonance frequency of the NV color center fluorescence signals.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents or improvements made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (10)
1. A fast synchronous sweep frequency wave source device for a magnetic resonance system is characterized in that: the system comprises a PC upper computer, an FPGA core module, a direct digital synthesizer wave source module and a mixing filtering module;
the PC upper computer is communicated with the FPGA core module and is used for setting the wave source output frequency data of the direct digital synthesizer and resetting, starting and suspending the system through a software end;
the FPGA core module comprises an upper computer data buffer module, a phase-locked loop driving module, a frequency tuning word main memory, a direct digital synthesizer wave source initialization read-only memory, a data output control module, a direct digital synthesizer wave source control module, a data selector module and a rapid synchronization module;
the upper computer data buffer module is connected with the phase-locked loop driving module, the frequency tuning word main memory and the data output control module, the data output control module is connected with the rapid synchronization module, the frequency tuning word main memory, the direct digital synthesizer wave source initialization read-only memory and the direct digital synthesizer wave source control module, and the frequency tuning word main memory, the direct digital synthesizer wave source initialization read-only memory and the direct digital synthesizer wave source control module are all connected with the data selector module;
the fast synchronization module provides an external synchronization enabling interface and an external synchronization triggering interface; the FPGA core module is used for initializing a direct digital synthesizer wave source, outputting frequency tuning word data for controlling the direct digital synthesizer wave source, switching the working mode of the direct digital synthesizer wave source, and controlling the output, reset, start and pause of the direct digital synthesizer wave source;
the direct digital synthesizer comprises a direct digital synthesizer wave source module, a frequency mixing filtering module and a clock source, wherein the direct digital synthesizer wave source module and the frequency mixing filtering module are respectively provided with a phase-locked loop, and the clock source is established by using an IP core of an FPGA internal clock manager and is used for a reference clock when the phase-locked loops work.
2. A fast synchronized swept-wave source apparatus for a magnetic resonance system, as claimed in claim 1, wherein: the PC upper computer packs the frequency data and sends the frequency data to a frequency tuning word main memory of the FPGA for storage; triggering an FPGA core module through software, and outputting a control signal for controlling a wave source of the direct digital synthesizer; reading currently output frequency data in real time; and/or the upper computer data buffer module is used for buffering frequency tuning word data sent by the upper computer, data for driving a phase-locked loop, a software trigger signal, a global reset signal and a system start or pause signal.
3. A fast synchronized swept-wave source apparatus for a magnetic resonance system, as claimed in claim 1, wherein: the phase-locked loop driving module is used for driving phase-locked loops in the direct digital synthesizer wave source module and the frequency mixing filtering module; the clock signal output by a phase-locked loop in the wave source module of the direct digital synthesizer is used for a reference clock of the wave source module of the direct digital synthesizer; the clock signal output by the phase-locked loop in the frequency mixing filtering module is used for a local oscillator signal required by the frequency mixing filtering module during frequency mixing; and/or the frequency tuning word main memory is used for storing the frequency tuning word calculated by the PC upper computer, and outputting frequency tuning word data in a new address when a trigger signal is received each time.
4. A fast synchronized swept-wave source apparatus for a magnetic resonance system as claimed in claim 1, wherein: the direct digital synthesizer wave source initialization read only memory stores data for initializing the direct digital synthesizer wave source, and a register in the direct digital synthesizer wave source is initialized before working; and/or the data output control module is used for managing the output of the frequency tuning word main memory, the output of the direct digital synthesizer wave source initialization read-only memory and the output of the direct digital synthesizer wave source control module, and receiving a software trigger signal of the PC upper computer data buffer module and a quick synchronization trigger signal of the quick synchronization module.
5. A fast synchronized swept-wave source apparatus for a magnetic resonance system as claimed in claim 1, wherein: the direct digital synthesizer wave source control module is used for configuring a direct digital synthesizer wave source working mode, resetting a direct digital synthesizer wave source, outputting an enable pulse by the direct digital synthesizer wave source and controlling a functional port; and/or an external synchronization enabling interface of the rapid synchronization module is used for synchronously resetting address data in the frequency tuning word main memory, and the external synchronization triggering interface receives triggering pulses, updates the address data of the frequency tuning word main memory, outputs the frequency tuning word data in a new address and realizes rapid synchronization triggering frequency sweeping.
6. A fast synchronized swept-wave source apparatus for a magnetic resonance system as claimed in claim 1, wherein: the direct digital synthesizer wave source module comprises a direct digital synthesizer and a phase-locked loop, wherein the clock output of the phase-locked loop is used for the reference clock of the direct digital synthesizer wave source, the reference clock of the phase-locked loop is a 50MHz clock source created by an FPGA internal clock manager, and the FPGA internal clock is a source clock of the system.
7. A fast synchronized swept-wave source apparatus for a magnetic resonance system, as claimed in claim 1, wherein: the frequency mixing filtering module comprises a phase-locked loop, a frequency mixer and a filter, wherein signals output by the phase-locked loop are used for local oscillation signals of the frequency mixer, the frequency mixer receives output signals of the phase-locked loop and signals output by the direct digital synthesizer wave source module, and the signals after frequency mixing pass through the filter to obtain frequency signals with single output and no harmonic.
8. A fast synchronous frequency sweep method for a magnetic resonance system: the method is characterized in that: the method comprises the following steps:
s1, a PC upper computer calculates frequency tuning word data for controlling the output frequency of a wave source of a direct digital synthesizer, calculates configuration data for controlling the output frequency of a phase-locked loop in a wave source module of the direct digital synthesizer and configuration data for the output frequency of the phase-locked loop in a frequency mixing filter module, packs the data and sends the data to an FPGA core module for processing, and the FPGA core module stores the frequency tuning word data and drives a clock signal output by the phase-locked loop for a reference clock frequency of the wave source of the direct digital synthesizer and a frequency mixing local oscillator signal of the frequency mixing filter module;
s2, after the PC upper computer sends a system reset instruction to reset, sending a direct digital synthesizer wave source initialization instruction to the FPGA core module, sending an initialization signal by a data output control module in the FPGA core module, setting a function configuration signal into an initialization mode after the initialization signal is collected by the internal direct digital synthesizer wave source control module, and sending a selection signal to an internal data selector module by the direct digital synthesizer wave source control module for selectively outputting data in the direct digital synthesizer wave source initialization read-only memory; after the direct digital synthesizer wave source initialization read-only memory collects the initialization signal, the direct digital synthesizer wave source initialization read-only memory is enabled, the address signal sent by the data control module is received, the data stored in the direct digital synthesizer wave source initialization read-only memory is output, after the initialization of the direct digital synthesizer wave source is completed, the data output control module resets the selection signal and releases the direct digital synthesizer wave source initialization read-only memory, and the function configuration signal output by the direct digital synthesizer wave source control module is set to be in a frequency output mode;
s3, sending a synchronization enabling pulse to a rapid synchronization module in the FPGA core module, and resetting an address in the frequency tuning word main memory by the data control module after detecting a pulse rising edge in the FPGA core module;
and S4, after the synchronous enabling pulse is sent, acquiring a pulse trigger signal by an external synchronous trigger interface of a quick synchronization module in the FPGA core module.
9. A fast synchronized frequency sweep method for a magnetic resonance system as set forth in claim 8, wherein: the specific processing procedure of the FPGA core module in the step S1 is as follows: distributing the frequency tuning word data to a frequency tuning word main memory in the FPGA core module through an upper computer data buffer module in the FPGA core module, and storing the frequency tuning word data; and sending the configuration data of the output frequency of the phase-locked loop to a phase-locked loop driving module to drive the phase-locked loop to work, wherein the clock signal output by the phase-locked loop is used for the reference clock frequency of the direct digital synthesizer wave source work and the frequency mixing local oscillator signal of the frequency mixing filtering module after being output by a filter.
10. A fast synchronized frequency sweep method for a magnetic resonance system as set forth in claim 8, wherein: the specific process of the step S4 is as follows: the fast synchronization module in the FPGA core module detects the rising edge of the trigger pulse signal, and once the rising edge of the trigger pulse signal is detected, the fast synchronization module sends a data output instruction to the data control module, the data control module sends address data to the frequency tuning word main memory, and the frequency data sent by the frequency tuning word main memory is output to a wave source sampling port of the direct digital synthesizer through the data selector module; after the data is kept for a period of time, the direct digital synthesizer wave source control module sends an output pulse signal to the direct digital synthesizer wave source, the direct digital synthesizer wave source collects the output pulse signal, and the frequency signal set by the frequency tuning word data is output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202210977892.5A CN115047965B (en) | 2022-08-16 | 2022-08-16 | Rapid synchronous frequency sweep wave source device and method for magnetic resonance system |
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