CN115037140A - Voltage surge suppression circuit - Google Patents

Voltage surge suppression circuit Download PDF

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Publication number
CN115037140A
CN115037140A CN202210898392.2A CN202210898392A CN115037140A CN 115037140 A CN115037140 A CN 115037140A CN 202210898392 A CN202210898392 A CN 202210898392A CN 115037140 A CN115037140 A CN 115037140A
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CN
China
Prior art keywords
circuit
resistor
pin
control chip
capacitor
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Pending
Application number
CN202210898392.2A
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Chinese (zh)
Inventor
石寿展
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Weiking Electronics Manufacturing Xi'an Co ltd
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Weiking Electronics Manufacturing Xi'an Co ltd
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Priority to CN202210898392.2A priority Critical patent/CN115037140A/en
Publication of CN115037140A publication Critical patent/CN115037140A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The invention discloses a voltage surge suppression circuit, which comprises a comparator circuit, a gating circuit, a driving circuit, a feedback circuit and a clock circuit, wherein the gating circuit is connected with the comparator circuit; the comparator circuit is connected with the gating circuit; the gating circuit is respectively connected with the driving circuit and the clock circuit; the driving circuit is respectively connected with the feedback circuit and the switching tube; the feedback circuit is connected with the clock circuit and used for sampling the output voltage and inputting the output voltage into the clock circuit to control the duty ratio of the output signal of the clock circuit. When surge voltage impacts, the comparator circuit is turned over, the gating circuit enables a switching signal of the clock circuit to be connected into the driving circuit, the switching tube is in a switching state, the circuit is in a voltage reduction working mode, and the switching tube is prevented from being in a linear working state.

Description

Voltage surge suppression circuit
Technical Field
The invention belongs to the technical field of switching power supplies, and particularly relates to a voltage surge suppression circuit.
Background
The direct current surge voltage refers to overvoltage surge pulse which is generated by various loads in a system and exceeds normal power supply in a direct current power supply network. Without protection, excessive transient surge voltages can cause damage or failure of the consumer electronics.
The surge suppression circuit is applied to the power supply input end of electric equipment, and adopts an active device to track and suppress over-high transient surge voltage, so that the output voltage is always maintained within the power supply range allowed by the equipment, and the current voltage energy exceeding the normal power supply part is absorbed by the surge protection module, thereby achieving the purpose of purifying and supplying power and ensuring the reliable work of the system.
According to the requirement of GJB 181, when the aircraft power supply is supplied, an 80V/50ms overvoltage surge impact condition exists, and the electric equipment needs to work normally under the overvoltage surge impact condition.
According to the requirement of GJB298, an overvoltage surge condition of 100V/500ms exists in the vehicle-mounted electric equipment, and the electric equipment needs to work normally when the overvoltage surge impacts.
The voltage surge suppression circuit in the current market enables the MOS tube to be in a linear working state when overvoltage surge impacts, and realizes a voltage surge suppression function by utilizing an SOA (service-oriented architecture) area of the power MOS tube. When the method is applied, the instantaneous power consumption of the MOS tube is large, the method completely depends on the safe working area of the MOS tube, and the method is not beneficial to the application of high power and long-time overvoltage surge suppression.
Disclosure of Invention
The invention aims to provide a voltage surge suppression circuit which is large in working current, small in internal power consumption and high in efficiency, and effectively solves the problem that the safety working area of an MOS (metal oxide semiconductor) transistor is excessively relied on in the prior art.
In order to solve the problems in the prior art, the invention adopts the technical scheme that:
a voltage surge suppression circuit comprises a comparator circuit, a gating circuit, a driving circuit, a feedback circuit and a clock circuit;
the comparator circuit is connected with the gating circuit and is used for dividing the input voltage and comparing the divided voltage with a reference voltage to control the on-off of the gating circuit;
the gating circuit is respectively connected with the driving circuit and the clock circuit and is used for selecting whether to input a direct current level signal or a clock signal into the driving circuit according to a signal given by the comparator circuit;
the driving circuit is respectively connected with the feedback circuit and the switching tube and is used for driving the MOS tube to be switched on and off according to the signal given by the gating circuit;
the feedback circuit is connected with the clock circuit and used for sampling the output voltage and inputting the output voltage into the clock circuit to control the duty ratio of the output signal of the clock circuit.
The voltage stabilizing circuit is respectively electrically connected with the comparator circuit, the gating circuit, the driving circuit and the clock circuit, and is used for linearly stabilizing the input voltage and supplying power to the comparator circuit, the gating circuit, the driving circuit and the clock circuit.
The power supply further comprises a filter circuit and a switch tube, wherein the filter circuit is respectively electrically connected with the switch tube and the positive output end of the power supply, and the filter circuit is used for rectifying/filtering the voltage output by the switch tube and outputting stable voltage.
Further, the voltage stabilizing circuit comprises a resistor R26, a resistor R27, a zener diode V11, a triode V13, a capacitor C29, a capacitor C30 and a capacitor C38, wherein the resistor R26 is connected with the resistor R27 in parallel, one end of a resistor R27 is connected with the positive electrode of an input power supply, the other end of the resistor R27 is connected with the negative electrode of the zener diode V11, the positive electrode of the zener diode V11 is grounded, and the capacitor C38 is connected with the zener diode V11 in parallel and used for filtering; the base electrode of the triode V13 is connected with the negative electrode of the voltage stabilizing diode V11, the collector electrode of the triode V13 is connected with the positive electrode of the input power supply, and the emitter electrode of the triode V13 is connected with the capacitor C29 and the capacitor C30; the capacitors C29 and C30 are connected in parallel, one end of the capacitor C29 is connected with the emitter of the triode V13, and the other end of the capacitor C29 is grounded.
Further, the comparator circuit comprises a comparator U1, a resistor R7, a resistor R10, a resistor R12, a resistor R31 and a capacitor C26; pin 2 of comparator U1 passes through resistance R7 and is connected with the anodal of input power supply, and pin 2 of comparator U1 passes through resistance R31 ground connection, electric capacity C26 is parallelly connected with resistance R31, and pin 3 of comparator U1 passes through resistance R10 and is connected with reference voltage, and pin 8 and the VCC of comparator U1 are connected, and pin 1 of comparator U1 passes through resistance R12 and VCC connection, and the model of comparator U1 is LM 2903.
Further, the gating circuit comprises a MOS transistor V4, a MOS transistor V5 and a resistor R30, one end of the resistor R30 is connected with VCC, one end of the resistor R30 is connected with the drain of the MOS transistor V4 and the drain of the MOS transistor V5, the gate of the MOS transistor V5 is connected with a pin 1 of the comparator U1, the source of the MOS transistor V5 is grounded, and the source of the MOS transistor V4 is grounded.
Further, the driving circuit comprises a control chip U3 and a resistor R24, and a pin 1 of the control chip U3 and a pin 3 of the control chip U3 are respectively connected with VCC; pin 2 of the control chip U3 is grounded; and a pin 4 of the control chip U3 is connected with a drain electrode of the MOS tube V4 and a drain electrode of the MOS tube V5, and the type of the control chip U3 is UCC 27517.
Further, the filter circuit comprises a rectifier diode V14, an inductor L1 and a capacitor C8, wherein the cathode of the rectifier diode V14 is connected with the anode of the input power supply, one end of the inductor L1 is connected with the anode of the rectifier diode V14, and the other end of the inductor L1 is connected with the capacitor C8, namely the output negative terminal; the other end of the capacitor C8 is connected to the cathode of the rectifier diode V14.
Further, the clock circuit comprises a control chip U5, a resistor R23, a resistor R25, a resistor R32, a resistor R33, a capacitor C32 and a capacitor C35; pin 1 of the control chip U5 is grounded, pin 2 of the control chip U5 is grounded through a capacitor C35, pin 3 of the control chip U5 is connected with an emitter of a triode V13 through a resistor R33, pin 3 of the control chip U5 is connected with a gate of a MOS transistor V4 through a resistor R25, pin 4 of the control chip U5 and pin 8 of the control chip U5 are both connected with an emitter of a triode V13, pin 5 of the control chip U5 is grounded through a capacitor C32, pin 5 of the control chip U5 is connected with a feedback circuit, pin 6 of the control chip U5 is grounded through a capacitor C35, pin 6 of the control chip U5 is connected with pin 7 of the control chip U5 through a resistor R23, and pin 7 of the control chip U5 is connected with an emitter of a triode V13 through a resistor R32. The model of the control chip U5 is LM 555.
Further, the switching tube is a MOS tube Q1, the drain of the MOS tube Q1 is connected to the negative input end of the power supply, the source of the MOS tube Q1 is connected to the positive electrode of the rectifier diode V14, and the gate of the MOS tube Q1 is connected to the pin 5 of the control chip U3 through a resistor R24.
The invention has the beneficial effects that:
1. in the rated working voltage range, the switching tube is in a saturated conduction state, and the internal loss is very small; when surge voltage impacts, the comparator circuit is turned over, the gating circuit enables a switching signal of the clock circuit to be connected into the driving circuit, the switching tube is in a switching state, the circuit is in a voltage reduction working mode, the switching tube is prevented from being in a linear working state, and loss of the switching tube is reduced.
2. The loss of a switching tube in a surge suppression stage is reduced, the heat productivity of a circuit is reduced, the output power of the circuit is provided, and the surge suppression time is prolonged. The reliability of the circuit is improved.
Drawings
Fig. 1 is a schematic diagram of the present invention.
FIG. 2 is a circuit diagram of the present invention.
FIG. 3 is a circuit diagram of the voltage regulator circuit of FIG. 2.
Fig. 4 is a circuit diagram of the comparator circuit of fig. 2.
Fig. 5 is a circuit diagram of the gate circuit of fig. 2.
Fig. 6 is a circuit diagram of the driving circuit in fig. 2.
Fig. 7 is a circuit diagram of the feedback circuit of fig. 2.
Fig. 8 is a circuit diagram of the clock circuit of fig. 2.
Detailed Description
The invention will be further elucidated with reference to the drawings and reference numerals.
In order that the above objects, features and advantages of the present invention can be more clearly understood, a detailed description of the present invention will be given below with reference to the accompanying drawings and specific embodiments. It should be noted that the embodiments and features of the embodiments of the present application may be combined with each other without conflict.
The terms "first," "second," "third," and the like are used solely to distinguish one from another and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should also be noted that, unless otherwise explicitly specified or limited, the terms "disposed," "mounted," "connected," and "connected" are to be construed broadly and may, for example, be fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
The following detailed description of embodiments of the invention refers to the accompanying drawings. It should be understood that the detailed description and specific examples, while indicating the present invention, are given by way of illustration and explanation only, not limitation.
Example 1:
as shown in fig. 1 and 2, a voltage surge suppression circuit includes a comparator circuit, a gate circuit, a drive circuit, a feedback circuit, and a clock circuit;
the comparator circuit is connected with the gating circuit and used for dividing the input voltage and comparing the divided voltage with a reference voltage to control the on-off of the gating circuit;
the gating circuit is respectively connected with the driving circuit and the clock circuit and is used for selecting whether to input a direct current level signal or a clock signal into the driving circuit according to a signal given by the comparator circuit;
the driving circuit is respectively connected with the feedback circuit and the switching tube and is used for driving the MOS tube to be switched on and off according to the signal given by the gating circuit;
the feedback circuit is connected with the clock circuit and used for sampling the output voltage and inputting the output voltage into the clock circuit to control the duty ratio of the output signal of the clock circuit.
Example 2:
as shown in fig. 1 to 8, a voltage surge suppression circuit includes a comparator circuit, a gate circuit, a drive circuit, a feedback circuit, and a clock circuit;
the comparator circuit is connected with the gating circuit and used for dividing the input voltage and comparing the divided voltage with a reference voltage to control the on-off of the gating circuit;
the gating circuit is respectively connected with the driving circuit and the clock circuit and is used for selecting whether to input a direct current level signal or a clock signal into the driving circuit according to a signal given by the comparator circuit;
the driving circuit is respectively connected with the feedback circuit and the switching tube and is used for driving the MOS tube to be switched on and off according to the signal given by the gating circuit;
the feedback circuit is connected with the clock circuit and used for sampling the output voltage and inputting the output voltage into the clock circuit to control the duty ratio of the output signal of the clock circuit.
The voltage stabilizing circuit is respectively and electrically connected with the comparator circuit, the gating circuit, the driving circuit and the clock circuit, and is used for linearly stabilizing the input voltage and supplying power to the comparator circuit, the gating circuit, the driving circuit and the clock circuit.
The power supply circuit further comprises a filter circuit and a switch tube, wherein the filter circuit is respectively electrically connected with the switch tube and the positive output end of the power supply, and the filter circuit is used for rectifying/filtering the voltage output by the switch tube and outputting stable voltage.
The voltage stabilizing circuit comprises a resistor R26, a resistor R27, a voltage stabilizing diode V11, a triode V13, a capacitor C29, a capacitor C30 and a capacitor C38.
The resistor R26 is connected with the resistor R27 in parallel, one end of the resistor R27 is connected with the anode of an input power supply, the other end of the resistor R27 is connected with the cathode of a voltage stabilizing diode V11, the anode of the voltage stabilizing diode V11 is grounded, and the capacitor C38 is connected with the voltage stabilizing diode V11 in parallel and used for filtering; the base electrode of the triode V13 is connected with the negative electrode of the voltage stabilizing diode V11, the collector electrode of the triode V13 is connected with the positive electrode of the input power supply, and the emitter electrode of the triode V13 is connected with the capacitor C29 and the capacitor C30; the capacitors C29 and C30 are connected in parallel, one end of the capacitor C29 is connected with the emitter of the triode V13, and the other end of the capacitor C29 is grounded.
The comparator circuit comprises a comparator U1, a resistor R7, a resistor R10, a resistor R12, a resistor R31 and a capacitor C26;
pin 2 of comparator U1 passes through resistance R7 and is connected with the anodal of input power supply, and pin 2 of comparator U1 passes through resistance R31 ground connection, electric capacity C26 is parallelly connected with resistance R31, and pin 3 of comparator U1 passes through resistance R10 and is connected with reference voltage, and pin 8 and the VCC of comparator U1 are connected, and pin 1 of comparator U1 passes through resistance R12 and is connected with the VCC.
The gating circuit comprises a MOS transistor V4, a MOS transistor V5 and a resistor R30.
One end of the resistor R30 is connected with VCC, one end of the resistor R30 is connected with the drain of the MOS tube V4 and the drain of the MOS tube V5, the grid of the MOS tube V5 is connected with the pin 1 of the comparator U1, the source of the MOS tube V5 is grounded, and the source of the MOS tube V4 is grounded.
The driving circuit comprises a control chip U3 and a resistor R24.
Pin 1 of the control chip U3 and pin 3 of the control chip U3 are respectively connected with VCC; pin 2 of the control chip U3 is grounded; pin 4 of the control chip U3 is connected to the drain of the MOS transistor V4 and the drain of the MOS transistor V5.
The filter circuit comprises a rectifier diode V14, an inductor L1 and a capacitor C8;
the negative electrode of the rectifying diode V14 is connected with the positive electrode of the input power supply, one end of the inductor L1 is connected with the positive electrode of the rectifying diode V14, and the other end of the inductor L1 is connected with the capacitor C8, namely the output negative end; the other end of the capacitor C8 is connected to the cathode of the rectifier diode V14.
The clock circuit comprises a control chip U5, a resistor R23, a resistor R25, a resistor R32, a resistor R33, a capacitor C32 and a capacitor C35;
pin 1 of the control chip U5 is grounded, pin 2 of the control chip U5 is grounded through a capacitor C35, pin 3 of the control chip U5 is connected with an emitter of a triode V13 through a resistor R33, pin 3 of the control chip U5 is connected with a gate of a MOS transistor V4 through a resistor R25, pin 4 of the control chip U5 and pin 8 of the control chip U5 are both connected with an emitter of a triode V13, pin 5 of the control chip U5 is grounded through a capacitor C32, pin 5 of the control chip U5 is connected with a feedback circuit, pin 6 of the control chip U5 is grounded through a capacitor C35, pin 6 of the control chip U5 is connected with pin 7 of the control chip U5 through a resistor R23, and pin 7 of the control chip U5 is connected with an emitter of a triode V13 through a resistor R32.
The switching tube is an MOS tube Q1.
The drain of the MOS transistor Q1 is connected with the negative input end of the power supply, the source of the MOS transistor Q1 is connected with the anode of the rectifier diode V14, and the gate of the MOS transistor Q1 is connected with the pin 5 of the control chip U3 through the resistor R24.
The specific working principle is as follows:
firstly, the comparator circuit divides the input voltage and then compares the divided voltage with the reference voltage, meanwhile, the feedback circuit samples the output voltage, the input clock circuit controls the duty ratio of the output signal of the clock circuit, and the clock circuit generates signals with fixed frequency and different duty ratios according to the signals provided by the feedback circuit and accesses the gating circuit. Then, the gating circuit selects whether to input a direct current level signal or a clock signal into the driving circuit according to a signal given by the comparator circuit, the driving circuit drives the switching tube to be switched on and off according to the signal given by the gating circuit, and the filtering circuit rectifies/filters the voltage output by the switching tube and outputs stable voltage.
The invention is not limited to the above alternative embodiments, and any other various forms of products can be obtained by anyone in the light of the present invention, but any changes in shape or structure thereof, which fall within the scope of the present invention as defined in the claims, fall within the scope of the present invention.

Claims (10)

1. A voltage surge suppression circuit, characterized by: the circuit comprises a comparator circuit, a gating circuit, a driving circuit, a feedback circuit and a clock circuit;
the comparator circuit is connected with the gating circuit and used for dividing the input voltage and comparing the divided voltage with a reference voltage to control the on-off of the gating circuit;
the gating circuit is respectively connected with the driving circuit and the clock circuit and is used for selecting whether to input a direct current level signal or a clock signal into the driving circuit according to a signal given by the comparator circuit;
the driving circuit is respectively connected with the feedback circuit and the switching tube and is used for driving the MOS tube to be switched on and off according to the signal given by the gating circuit;
the feedback circuit is connected with the clock circuit and used for sampling the output voltage and inputting the output voltage into the clock circuit to control the duty ratio of the output signal of the clock circuit.
2. The voltage surge suppression circuit of claim 1, wherein: the voltage stabilizing circuit is electrically connected with the comparator circuit, the gating circuit, the driving circuit and the clock circuit respectively.
3. The voltage surge suppression circuit of claim 1, wherein: the power supply circuit further comprises a filter circuit and a switch tube, wherein the filter circuit is electrically connected with the switch tube and the positive output end of the power supply respectively.
4. The voltage surge suppression circuit of claim 2, wherein: the voltage stabilizing circuit comprises a resistor R26, a resistor R27, a voltage stabilizing diode V11, a triode V13, a capacitor C29, a capacitor C30 and a capacitor C38, wherein the resistor R26 is connected with the resistor R27 in parallel, one end of the resistor R27 is connected with the positive electrode of an input power supply, the other end of the resistor R27 is connected with the negative electrode of a voltage stabilizing diode V11, the positive electrode of the voltage stabilizing diode V11 is grounded, and the capacitor C38 is connected with the voltage stabilizing diode V11 in parallel; the base electrode of the triode V13 is connected with the negative electrode of the voltage stabilizing diode V11, the collector electrode of the triode V13 is connected with the positive electrode of the input power supply, and the emitter electrode of the triode V13 is connected with the capacitor C29 and the capacitor C30; the capacitors C29 and C30 are connected in parallel, one end of the capacitor C29 is connected with the emitter of the triode V13, and the other end of the capacitor C29 is grounded.
5. The voltage surge suppression circuit of claim 4, wherein: the comparator circuit comprises a comparator U1, a resistor R7, a resistor R10, a resistor R12, a resistor R31 and a capacitor C26; pin 2 of comparator U1 is connected with the positive pole of input power supply through resistance R7, and pin 2 of comparator U1 is through resistance R31 ground connection, electric capacity C26 is parallelly connected with resistance R31, and pin 3 of comparator U1 is connected with reference voltage through resistance R10, and pin 8 of comparator U1 is connected with triode V13's emitter, and pin 1 of comparator U1 is connected with VCC through resistance R12.
6. The voltage surge suppression circuit of claim 5, wherein: the gating circuit comprises a MOS transistor V4, a MOS transistor V5 and a resistor R30; one end of the resistor R30 is connected with VCC, the other end of the resistor R30 is connected with the drain of the MOS tube V4 and the drain of the MOS tube V5, the grid of the MOS tube V5 is connected with the pin 1 of the comparator U1, the source of the MOS tube V5 is grounded, and the source of the MOS tube V4 is grounded.
7. The voltage surge suppression circuit of claim 6, wherein: the driving circuit comprises a control chip U3 and a resistor R24; pin 1 of the control chip U3 and pin 3 of the control chip U3 are respectively connected with VCC; pin 2 of the control chip U3 is grounded; pin 4 of the control chip U3 is connected to the drain of the MOS transistor V4 and the drain of the MOS transistor V5.
8. The voltage surge suppression circuit of claim 2, wherein: the filter circuit comprises a rectifier diode V14, an inductor L1 and a capacitor C8; the negative electrode of the rectifying diode V14 is connected with the positive electrode of the input power supply, one end of the inductor L1 is connected with the positive electrode of the rectifying diode V14, the other end of the inductor L1 is connected with the capacitor C8, and the other end of the capacitor C8 is connected with the negative electrode of the rectifying diode V14.
9. The voltage surge suppression circuit of claim 6, wherein: the clock circuit comprises a control chip U5, a resistor R23, a resistor R25, a resistor R32, a resistor R33, a capacitor C32 and a capacitor C35; pin 1 of the control chip U5 is grounded, pin 2 of the control chip U5 is grounded through a capacitor C35, pin 3 of the control chip U5 is connected with an emitter of a triode V13 through a resistor R33, pin 3 of the control chip U5 is connected with a gate of a MOS transistor V4 through a resistor R25, pin 4 of the control chip U5 and pin 8 of the control chip U5 are both connected with an emitter of a triode V13, pin 5 of the control chip U5 is grounded through a capacitor C32, pin 5 of the control chip U5 is connected with a feedback circuit, pin 6 of the control chip U5 is grounded through a capacitor C35, pin 6 of the control chip U5 is connected with pin 7 of the control chip U5 through a resistor R23, and pin 7 of the control chip U5 is connected with an emitter of a triode V13 through a resistor R32.
10. The voltage surge suppression circuit of claim 8, wherein: the switching tube is an MOS tube Q1; the drain of the MOS transistor Q1 is connected with the negative input end of the power supply, the source of the MOS transistor Q1 is connected with the anode of the rectifier diode V14, and the gate of the MOS transistor Q1 is connected with the pin 5 of the control chip U3 through the resistor R24.
CN202210898392.2A 2022-07-28 2022-07-28 Voltage surge suppression circuit Pending CN115037140A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210898392.2A CN115037140A (en) 2022-07-28 2022-07-28 Voltage surge suppression circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210898392.2A CN115037140A (en) 2022-07-28 2022-07-28 Voltage surge suppression circuit

Publications (1)

Publication Number Publication Date
CN115037140A true CN115037140A (en) 2022-09-09

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210898392.2A Pending CN115037140A (en) 2022-07-28 2022-07-28 Voltage surge suppression circuit

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116826683A (en) * 2023-08-28 2023-09-29 陕西中科天地航空模块有限公司 Airborne surge voltage clamping circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116826683A (en) * 2023-08-28 2023-09-29 陕西中科天地航空模块有限公司 Airborne surge voltage clamping circuit
CN116826683B (en) * 2023-08-28 2023-12-22 陕西中科天地航空模块有限公司 Airborne surge voltage clamping circuit

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