CN115036205A - Low-damage silicon wafer silicon oxide film forming process - Google Patents
Low-damage silicon wafer silicon oxide film forming process Download PDFInfo
- Publication number
- CN115036205A CN115036205A CN202210528116.7A CN202210528116A CN115036205A CN 115036205 A CN115036205 A CN 115036205A CN 202210528116 A CN202210528116 A CN 202210528116A CN 115036205 A CN115036205 A CN 115036205A
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- China
- Prior art keywords
- tray
- lower groove
- silicon wafer
- quartz plate
- film forming
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
- H01L21/67346—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders characterized by being specially adapted for supporting a single substrate or by comprising a stack of such individual supports
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B3/00—Ohmic-resistance heating
- H05B3/02—Details
- H05B3/06—Heater elements structurally combined with coupling elements or holders
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
Abstract
The invention discloses a silicon wafer silicon oxide film forming process with low damage, S1, processing a lower groove at the center of a tray, and then placing a silicon wafer in the lower groove to make the edge of the silicon wafer in line contact with the lower groove of the tray; s2, arranging a quartz plate below the tray at a certain distance, wherein the quartz plate is provided with a lower groove corresponding to the tray; the size of the lower groove of the quartz plate 3 is consistent with that of the lower groove of the tray; s3, laying a heating wire below the quartz plate, wherein the heating wire is directly contacted with the quartz plate, and by setting the heating temperature, the heat is transferred from the quartz plate to the tray and then to the silicon wafer. The invention reduces the damage of the silicon wafer without influencing the film forming process.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a silicon wafer silicon oxide film forming process with low damage.
Background
Because the requirements of the semiconductor on the defects on the surface of the silicon wafer are gradually improved, equipment is required to heat the silicon wafer in the silicon wafer silicon oxide film forming process, so that the contact between processing equipment and the surface of the silicon wafer cannot be avoided, the silicon wafer is damaged, and if the contact is reduced, the heating effect is inevitably poor.
Disclosure of Invention
The invention provides a silicon wafer silicon oxide film forming process with low damage.
A silicon wafer silicon oxide film forming process with low damage is characterized by comprising the following steps:
s1, processing a lower groove in the center of the tray, and then placing the silicon wafer in the lower groove to enable the edge of the silicon wafer to be in line contact with the lower groove of the tray;
s2, arranging a quartz plate below the tray at a certain distance, wherein the quartz plate is provided with a lower groove corresponding to the tray; the size of the lower groove of the quartz plate 3 is consistent with that of the lower groove of the tray;
s3, laying a heating wire below the quartz plate, wherein the heating wire is directly contacted with the quartz plate, and by setting the heating temperature, the heat is transferred from the quartz plate to the tray and then to the silicon wafer.
Preferably, the lower groove of the tray is directly 302 mm.
Preferably, the depth of the lower groove of the tray is 0.7 mm.
Preferably, the lower groove of the quartz plate is sized to correspond to the lower groove of the tray.
Compared with the prior art, the invention has the beneficial effects that: the damage of the silicon wafer is reduced while the film forming process is not influenced.
Drawings
Fig. 1 is a schematic view of a heating structure.
Detailed Description
The technical solutions in the embodiments of the present invention are clearly and completely described below.
Referring to fig. 1, a low damage silicon wafer silicon oxide film forming process includes the following steps:
s1, processing a lower groove in the center of the tray, and then placing the silicon wafer in the lower groove to enable the edge of the silicon wafer to be in line contact with the lower groove of the tray; the lower groove of the tray is 302mm directly and 0.7mm deep.
S2, arranging a quartz plate 3 below the tray at a certain distance, wherein the quartz plate 3 is provided with a lower groove corresponding to the tray; the lower groove of the quartz plate 3 is dimensioned to coincide with the lower groove of the tray.
S3, laying a heating wire 4 below the quartz plate, wherein the heating wire is directly contacted with the quartz plate, and the heat is transferred from the quartz plate to the tray and then to the silicon wafer by setting the heating temperature.
The working principle of the invention is as follows: through the shape transformation of the tray, the contact piece between the tray and the silicon wafer is reduced, excessive damage is avoided, a concave thermal field is also artificially manufactured below the tray corresponding to the concave design of the tray through the shape transformation of the quartz plate, the temperature difference of the center and the edge of the silicon wafer is reduced, a good temperature condition is provided for uniform film forming, and the damage of the silicon wafer is reduced while the film forming process is not influenced.
To verify the effect of the test, the silicon oxide deposition experiment through a 12 "polished wafer is demonstrated:
1. preparing a silicon wafer with double-side polishing.
2. The modified tray and the quartz plate are used in the film forming equipment, and silicon oxide is deposited on the upward surface of the wafer.
3. And testing the thickness uniformity of the film layer on the surface of the wafer, comparing the film forming performance before improvement, and confirming that the film forming uniformity meets the requirement.
4. And turning the wafer over, turning the wafer downwards to upwards, and polishing the wafer upwards by using polishing equipment.
5. And gradually increasing the removal amount of polishing, and confirming the condition of the surface defects after polishing until the surface damage defects are completely removed.
6. The defect depth was confirmed by the overall removal of the polish, in contrast to the use of a weird modified tray.
7. The improved protocol was confirmed to be less damaging to the wafer surface.
The silicon wafer silicon oxide film forming process with low damage reduces the damage of the silicon wafer without influencing the film forming process.
Although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments described in the foregoing embodiments, or equivalents may be substituted for elements thereof.
Claims (4)
1. A silicon wafer silicon oxide film forming process with low damage is characterized by comprising the following steps:
s1, processing a lower groove in the center of the tray, and then placing the silicon wafer in the lower groove to enable the edge of the silicon wafer to be in line contact with the lower groove of the tray;
s2, arranging a quartz plate below the tray at a certain distance, wherein the quartz plate is provided with a lower groove corresponding to the tray; the size of the lower groove of the quartz plate 3 is consistent with that of the lower groove of the tray;
s3, laying a heating wire below the quartz plate, wherein the heating wire is directly contacted with the quartz plate, and by setting the heating temperature, the heat is transferred from the quartz plate to the tray and then to the silicon wafer.
2. The silicon oxide film forming process for the low-damage silicon wafer according to claim 1, wherein: the lower groove of the tray is directly 302 mm.
3. The silicon oxide film forming process for the low-damage silicon wafer according to claim 1, wherein: the depth of the lower groove of the tray is 0.7 mm.
4. The silicon oxide film forming process for the low-damage silicon wafer according to claim 1, wherein: the size of the lower groove of the quartz plate is consistent with that of the lower groove of the tray.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210528116.7A CN115036205A (en) | 2022-05-16 | 2022-05-16 | Low-damage silicon wafer silicon oxide film forming process |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210528116.7A CN115036205A (en) | 2022-05-16 | 2022-05-16 | Low-damage silicon wafer silicon oxide film forming process |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115036205A true CN115036205A (en) | 2022-09-09 |
Family
ID=83121706
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210528116.7A Pending CN115036205A (en) | 2022-05-16 | 2022-05-16 | Low-damage silicon wafer silicon oxide film forming process |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115036205A (en) |
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2022
- 2022-05-16 CN CN202210528116.7A patent/CN115036205A/en active Pending
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