CN115019656B - Display panel motherboard, display panel and display device - Google Patents

Abstract

The application provides a display panel motherboard, a display panel and a display device, which solve the problem that a conductive material area on a cutting surface of the display panel causes a short circuit of a bonding pad of a circuit board for testing in the prior art. Wherein, the display panel motherboard includes: aligning marks; the test pad is positioned at one side of a cutting line formed by the alignment marks; the anti-bonding pad is positioned on the side of the test bonding pad of the cutting line, and the orthographic projection of the anti-bonding pad in the direction vertical to the display surface is intersected with the orthographic projection of the cutting line in the direction vertical to the display surface; and a load circuit connected with the anti-bonding pad for consuming the current flowing in the anti-bonding pad.

Description

Display panel motherboard, display panel and display device

Technical field

The present application relates to the field of display technology, and specifically to a display panel motherboard, a display panel and a display device.

Background technique

In the manufacturing process of display panels, it is usually necessary to cut a large-sized display panel motherboard to obtain a small-sized display panel. The position of the cutting line usually includes organic materials. Organic materials are prone to carbonization during the cutting process, thereby forming a material area with conductive function (hereinafter referred to as the conductive material area) on the cutting surface of the display panel obtained after cutting. In this case, when the test circuit board and the cut display panel are connected for lighting testing, the pads of the test circuit board are likely to come into contact with the conductive material area on the cut surface of the display panel, causing the test circuit to If a short circuit occurs between adjacent pads of the board, the short circuit current will cause the test circuit board to be burned, and in severe cases, it will cause abnormalities in the signal generator used for the lighting test.

Contents of the invention

In view of this, embodiments of the present application provide a display panel motherboard, a display panel, and a display device to solve the problem in the prior art that the conductive material area on the cutting surface of the display panel causes the pads of the test circuit board to be short-circuited. .

The first aspect of this application provides a display panel motherboard, including: an alignment mark; a test pad located on one side of the cutting line formed by the alignment mark; and a protective pad located on the side of the test pad of the cutting line. The orthographic projection of the protective pad in the direction perpendicular to the display surface intersects with the orthographic projection of the test pad in the direction perpendicular to the display surface; and a load circuit connected to the protective pad for consuming the energy flowing through the protective pad. current. According to the display panel provided in this embodiment, by arranging the protective pad and the load circuit connected to the protective pad, the orthographic projection of the protective pad in the direction perpendicular to the display surface and the test pad in the direction perpendicular to the display surface are intersection of the orthographic projections, even if a conductive material area is formed on the cutting surface of the display panel after cutting along the cutting line, when the test circuit board pad is overlapped with the test pad of the display panel, the conductive material area will cause the test The short-circuit current generated by short-circuiting the pads on the circuit board can be introduced into the load circuit through the protective pad and consumed by the load circuit, thereby preventing the short-circuit current from damaging the test circuit board or even the signal generator used for lighting tests.

In one embodiment, the test pad and the protective pad are arranged on the same layer. The advantage of this is that the test pad and protective pad can be realized through a patterning process, making the preparation process simpler.

In one embodiment, the guard pads and the test pads are spaced apart in a direction parallel to the cutting line. This weakens electromagnetic interference between currents flowing in different pads.

In one embodiment, the display panel motherboard further includes a ground pad, which is connected to the protective pad to serve as a load circuit; or the display panel motherboard further includes a pixel unit, which is connected to the protective pad to serve as a load circuit. load circuit. Using the ground pad as the load circuit has a simple structure and is easy to implement. By using the pixel unit as a load circuit, the location of the signal line where the short circuit problem occurs can be determined based on the display condition of the pixel unit.

In one embodiment, the display panel motherboard further includes a thermistor, and the thermistor is disposed on a test line connected to the test pad. The impedance of the thermistor increases as the current increases, thereby limiting the current within the effective current range and preventing large currents from flowing back along the test pad and entering the test circuit board and signal generator, thereby providing the test circuit board with and signal generator provide further protection.

In one embodiment, the display panel motherboard further includes a frame area in contact with the cutting line and a display area located on a side of the frame area away from the cutting line, and the test pad and the protective pad are located in the frame area.

A second aspect of this application provides another display panel, including: a test pad. The test pad includes a first end and a second end arranged oppositely. The first end is connected to a test line, and the second end points to one side of the display panel. ; Protective pad, the orthographic projection of the protective pad in the direction perpendicular to the display surface intersects with the orthographic projection of the side in the direction perpendicular to the display surface; and a load circuit connected to the protective pad for consuming the protective soldering The current flowing in the disk.

In one embodiment, the test pads and the protective pads are arranged on the same layer; preferably, in the direction parallel to the cutting line, the protective pads and the test pads are arranged at intervals.

In one embodiment, the display panel further includes a ground pad connected to the protective pad to serve as a load circuit; or the display panel further includes a pixel unit connected to the protective pad to serve as a load circuit.

A third aspect of the present application provides a display device, including the display panel provided in the second aspect.

According to the display panel motherboard, display panel and display device provided by the embodiment of the present application, by arranging the protective pad and the load circuit connected to the protective pad, the orthographic projection of the protective pad in the direction perpendicular to the display surface is consistent with the test welding The orthographic projection of the disk in the direction perpendicular to the display surface intersects, and a conductive material area is formed on the cutting surface of the display panel obtained after cutting along the cutting line. When the pads of the test circuit board overlap the test pads of the display panel When connected, the short-circuit current generated by the short-circuit of the pads on the test circuit board caused by the conductive material area can be introduced into the load circuit through the protective pad and consumed by the load circuit, thereby preventing the short-circuit current from damaging the test circuit board or even damaging it. Signal generator used for lighting tests.

Description of the drawings

Figure 1 is a top view of a conventional display panel motherboard.

FIG. 2 is a schematic structural diagram of a display panel obtained after cutting a display panel motherboard according to an embodiment of the present application.

FIG. 3 is a schematic cross-sectional structural diagram of the display panel shown in FIG. 2 during a lighting test according to an embodiment of the present application.

FIG. 4 is a top view of the display panel shown in FIG. 2 during a lighting test according to an embodiment of the present application. FIG. 5 is a schematic structural diagram of a display panel motherboard provided by the first embodiment of the present application.

FIG. 6 is a schematic cross-sectional structural diagram of the display panel motherboard shown in FIG. 5 along line A1A2.

FIG. 7 is a schematic structural diagram of a display panel motherboard provided by the second embodiment of the present application.

FIG. 8 is a schematic cross-sectional structural diagram of the display panel motherboard shown in FIG. 7 along line B1B2.

FIG. 9 is a schematic structural diagram of a display panel motherboard provided by the third embodiment of the present application.

FIG. 10 is a schematic structural diagram of a display panel motherboard provided by the fourth embodiment of the present application.

FIG. 11 is a schematic structural diagram of a display panel motherboard provided by the fifth embodiment of the present application.

FIG. 12 is a schematic structural diagram of a display panel provided by an embodiment of the present application.

FIG. 13 is a schematic structural diagram of a display panel provided by the second embodiment of the present application.

FIG. 14 is a schematic structural diagram of a display panel provided by the third embodiment of the present application.

Detailed ways

Figure 1 is a top view of a conventional display panel motherboard. As shown in FIG. 1 , the display panel motherboard includes a plurality of display panels 10 and alignment marks N disposed between the plurality of display panels 10 , as shown by black solid dots in FIG. 1 . The alignment mark N on the display panel motherboard is used to align with the alignment mark on the cutting equipment to determine the cutting line L on the display panel motherboard. The cutting equipment cuts the display panel motherboard along the cutting line L. , a large-sized display panel motherboard can be divided into multiple small-sized display panels 10 . The display panel 10 includes a display area AA and a frame area at least partially surrounding the display area AA. The frame area includes the pad area BB. The pad area BB is provided with pads with various functions, such as test pads for lighting tests, drive pads for connecting the driver chip, etc. The pads are used to transmit external signals to the display. Area AA to achieve the corresponding functions.

FIG. 2 is a schematic structural diagram of a display panel obtained after cutting a display panel motherboard according to an embodiment of the present application. As shown in FIGS. 1 and 2 , the display panel 10 includes at least one side surface produced by cutting, which is marked as the cutting surface S. The cutting surface S is easily carbonized due to cutting, thereby forming the conductive material area Q. The pad area BB of the display panel 10 is closer to the cutting surface S than the display area AA. The pad area BB is provided with at least one test pad 11. The test pad 11 includes a first end and a second end arranged oppositely. The first end is connected to the test line, and the second end points to the cutting surface S.

FIG. 3 is a schematic cross-sectional structural diagram of the display panel shown in FIG. 2 during a lighting test according to an embodiment of the present application. FIG. 4 is a top view of the display panel shown in FIG. 2 during a lighting test according to an embodiment of the present application. As shown in FIGS. 3 and 4 , when performing a lighting test on the display panel 10 shown in FIG. 2 , the pads 21 on the test circuit board 20 need to be overlapped with the test pads 11 of the display panel 10 . In this case, it may be due to various reasons, for example, the test circuit board 20 is bent at the edge of the display panel 10 , resulting in a conductive gap between the pad 21 on the test circuit board 20 and the cutting surface S of the display panel 10 . The material area Q comes into contact, which in turn causes the adjacent pads 20 to be short-circuited. The short-circuit current may cause the test circuit board 20 to be burned. In severe cases, it may cause abnormalities in the signal generator used for the lighting test.

In view of this, embodiments of the present application provide a display panel motherboard, a display panel and a display device. By arranging a protective pad in the pad area BB and a load circuit connected to the protective pad, the protective pad is positioned perpendicular to the display The orthographic projection in the direction of the surface intersects the orthographic projection of the cutting line L in the direction perpendicular to the display surface. When the display panel motherboard is cut along the cutting line L, the protective pad is on the cutting surface S of the obtained display panel. exposed. In this case, even if the conductive material area Q is formed on the cutting surface S, when the pad 21 of the test circuit board 20 overlaps the test pad 11 of the display panel 10, the conductive material area Q causes the test circuit board to be damaged. The short-circuit current generated by the short-circuit of pad 21 on 20 can be introduced into the load circuit through the protective pad and consumed by the load circuit, thereby preventing the short-circuit current from damaging the test circuit board 20 or even damaging the signal generator used for the lighting test.

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of this application.

FIG. 5 is a schematic structural diagram of a display panel motherboard provided by the first embodiment of the present application. FIG. 6 is a schematic cross-sectional structural diagram of the display panel motherboard shown in FIG. 4 along line A1A2. In this embodiment, the display panel motherboard includes two display panels 10 as an example. It should be understood that the number of display panels 10 can be reasonably set according to actual needs. Referring to FIGS. 5 and 6 , it can be seen that the difference between the display panel motherboard and the display panel shown in FIG. 1 is that the display panel motherboard also includes a protective pad 12 and a load circuit connected to the protective pad 12 . The protective pad 12 is located on the side of the cutting line L where the test pad 11 is located, that is, the protective pad 12 and the test pad 11 are located on the same side of the cutting line L. The orthographic projection of the guard pad 12 in the direction perpendicular to the display surface intersects the orthographic projection of the cutting line L in the direction perpendicular to the display surface. The intersection mentioned here may be the intersection of the orthographic projection of the protective pad 12 and the orthographic projection of the cutting line L, that is, the protective pad 12 passes through the cutting line L to extend from one display panel to another display panel; or it may also be It is the orthographic projection of the protective pad 12 that just extends to the cutting line L. By arranging the orthographic projection of the protective pad 12 in the direction perpendicular to the display surface to intersect with the orthographic projection of the cutting line L in the direction perpendicular to the display surface, it can be ensured that after cutting along the cutting line L, one end of the protective pad 12 is The cutting surface S is exposed, thereby contacting the conductive material area Q on the cutting surface S, and then the short-circuit current generated by the short circuit of the pad 21 of the test circuit board 20 caused by the conductive material area Q is introduced into the load circuit to be loaded. The circuit is consumed.

As shown in FIG. 6 , from the perspective of film layer structure, the display panel motherboard includes an array substrate 110 and a light-emitting device layer 120 stacked on the array substrate 110 . The light-emitting device layer 120 includes a first light-emitting device region 121 and a second light-emitting device region 122 that are spaced apart. The alignment mark N is provided on the array substrate 110 between the first light-emitting device region 121 and the second light-emitting device region 122 . The cutting plane S can divide the array substrate 11 into a first array substrate 111 and a second array substrate 112 . The first light emitting device region 121 is located on the first array substrate 111 , and the second light emitting device region 122 is located on the second array substrate 112 . After cutting along the cutting plane S, the first array substrate 111 and the first light-emitting device region 121 form the first display panel. The first light-emitting device region 121 forms the display area AA of the first display panel. The first array substrate 111 is not The area covered by the first light emitting device area 121 forms a frame area of the first display panel. The second array substrate 112 and the second light emitting device region 122 form a second display panel. The second light emitting device region 122 forms the display area AA of the second display panel. The portions of the second array substrate 112 that are not covered by the second light emitting device region 122 The area forms a frame area of the second display panel.

The protective pad 12 can be arranged on the same layer as the test pad 11 , or can be located on a different layer than the test pad 11 . In this embodiment, as shown in FIG. 6 , the test pad 11 and the protective pad 12 are arranged on the same layer. The advantage of this is that the test pad 11 and the protective pad 12 can be realized through one patterning process, and the preparation process is simpler. When the test pad 11 and the protective pad 12 are arranged on the same layer, as shown in Figure 5, in the direction parallel to the cutting line L, the test pad 11 and the protective pad 12 are arranged at intervals; or, the test pads 11 and the protective pad 12 are arranged facing each other, that is, the test pad 11 and the protective pad 12 are collinear, and the straight line where the test pad 11 and the protective pad 12 are located is perpendicular to the cutting line L. In comparison, the spaced arrangement of the protective pads 11 and the test pads 12 is beneficial to achieving a narrow frame. The distance between the test pad 11 and the protective pad 12 can be set reasonably according to actual needs. In an example, the number of the test pads 11 and the protective pads 12 is multiple. In the direction parallel to the cutting line L, the test pads 11 and the protective pads 12 are spaced apart, and the width of the protective pads 12 is greater than Or equal to 1/3 of the distance between adjacent test pads 11 , and less than or equal to 2/3 of the distance between adjacent test pads 11 . For example, the spacing between adjacent test pads 11 is 60 microns, and the width of the guard pad 12 is 20 microns. The larger the width of the protective pad 12, the higher the reliability, and the greater the electromagnetic interference between it and the adjacent test pads 11. The width of the protective pad 12 is set to 1/3 of the interval between adjacent test pads 11. ~2/3, a compromise can be achieved between improving the reliability of the protective pad 12 and reducing the electromagnetic interference between the protective pad 12 and the test pad 11 . The plurality of protective pads 12 may be arranged linearly along the direction of the cutting line L, or may be arranged in a fan shape. Similarly, the plurality of test pads 11 may be arranged linearly along the direction of the cutting line L, or may be arranged in a fan shape, etc.

In this embodiment, the load circuit is implemented as a ground circuit. Specifically, as shown in Figure 5, the array substrate 110 is also provided with a ground pad 13. The ground pad 13 and the test pad 11 are arranged on the same layer. The ground pad 13 is connected to the protective pad 12. The ground pad 13 Together with its connected ground wire, it serves as a load circuit. In this case, during the lighting test, the short-circuit current generated in the pad 21 of the test circuit board 20 can be introduced into the ground pad 13 through the protective pad 12 and then conducted away by the ground wire, thereby avoiding damage to the test circuit. board 20 and even the signal generator causing damage.

FIG. 7 is a schematic structural diagram of a display panel motherboard provided by the second embodiment of the present application. FIG. 8 is a schematic cross-sectional structural diagram of the display panel motherboard shown in FIG. 7 along line B1B2. As shown in Figure 7 and Figure 8, in this embodiment, the test pad 11 and the protective pad 12 are located on different layers, the test pad 11 and the ground pad 13 are located on the same layer, and the protective pad 12 passes through the via hole. Connect to ground pad 13.

Specifically, the orthographic projection of the protective pad 12 in the direction perpendicular to the display surface and the orthographic projection of the test pad 11 in the direction perpendicular to the display surface are arranged at intervals or facing each other. In this embodiment, there are multiple test pads 11 and multiple protective pads 12 . The orthographic projection of the multiple protective pads 12 in the direction perpendicular to the display surface and the orthogonal projection of the multiple test pads 11 in the direction perpendicular to the display surface. The orthographic projections in the plane direction are alternately arranged, and the local area of the orthographic projection of each protective pad 12 is located between the orthographic projections of two adjacent test pads 11 .

According to the display panel provided in this embodiment, by arranging the test pad 11 and the protective pad 12 on different layers, the advantage of arranging the test pad 11 and the protective pad 12 on the same layer is that the frame can be reduced. The size of the area can reduce the electromagnetic interference between the test pad 11 and the protective pad 12 at the same time.

FIG. 9 is a schematic structural diagram of a display panel motherboard provided by the third embodiment of the present application. As shown in Figure 9, the difference between this display panel motherboard and the display panel motherboard provided in any of the above embodiments is that the display panel motherboard also includes multiple thermistors 14, and the multiple thermistors 14 are connected with multiple test Pad 11 corresponds one to one. Each test pad 11 is disposed on a test line connected to the corresponding test pad 11 , that is, the thermistor 14 is located at an end of the test pad 11 away from the protective pad 12 . The material of the thermistor 14 may be, for example, Fe ₂ O ₃ , Al ₂ O ₃ or the like. In this case, as shown in FIG. 3 , after the display panel motherboard is cut along the cutting line L, when the display panel and the test circuit board 20 are subjected to a lighting test, if the pad 21 of the test circuit board 20 is Short circuit, part of the short-circuit current is conducted through the protective pad 12 and the ground pad 13, and the other part flows through the test pad 11 and the thermistor 14. The impedance of the thermistor 14 increases as the current increases, thus Limiting the current within the effective current range prevents large current from flowing back along the test pad 11 into the test circuit board 20 and the signal generator, thereby providing further protection for the test circuit board 20 and the signal generator. It should be understood that the thermistor 14 can also be provided separately without providing a load circuit, which can also provide protection for the test circuit board 20 and the signal generator to prevent short-circuit current from causing damage to them.

FIG. 10 is a schematic structural diagram of a display panel motherboard provided by the fourth embodiment of the present application. As shown in FIG. 10 , the difference between the display panel motherboard and the display panel motherboard shown in FIGS. 5 and 6 is that in this embodiment, the load circuit is implemented as at least one pixel unit. Specifically, taking the load circuit as a pixel column as an example, a plurality of pixel circuits 15 are also provided in the first array substrate 111 , and a plurality of light-emitting devices 16 are provided in the first light-emitting device region 121 . At least one light-emitting device 16 is connected to a pixel circuit 15 to form a pixel unit 130. The first array substrate 111 is also provided with a driving signal line 17 . The driving signal line 17 connects a row of pixel units 130 and the protective pads 12 , or connects a column of pixel units 130 and the protective pads 12 . The row or column of pixel units may be, for example, a plurality of green pixel units arranged linearly.

In this embodiment, the protective pad 12 and the test pad 11 are arranged on the same layer, the protective pad 12 and the driving signal line 17 are located on different layers, and the driving signal line 17 and the protective pad 12 are connected through via holes.

When the display panel obtained after cutting the display panel motherboard provided in this embodiment and the test circuit board 20 are subjected to a lighting test, if the pad 21 of the test circuit board 20 is short-circuited, the short-circuit current will flow along the protective pad 12, drive The signal line 17 is provided to a row or column of pixel units 130. In this case, the pixel unit 130 of the row or column displays a bright line, thereby determining the abnormal product and realizing the detection of the abnormal product.

FIG. 11 is a schematic structural diagram of a display panel motherboard provided by the fifth embodiment of the present application. As shown in Figure 11, the difference between this display panel motherboard and the display panel motherboard shown in Figures 5 and 6 is that in this embodiment, the protective pads 12 and the test pads 11 are located on different layers. The disk 12 and the drive signal line 17 are located on the same layer.

This application also provides a display panel. FIG. 12 is a schematic structural diagram of a display panel provided by an embodiment of the present application. The display panel may be a display panel obtained by cutting the display panel motherboard provided in any of the above embodiments along the cutting line L. As shown in Figure 12, the display panel includes a test pad 11, a protective pad 12, and a load circuit. The test pad 11 includes a first end and a second end arranged oppositely. The first end is connected to the test line, and the second end points to one side of the display panel, and the side is the cutting surface S. The orthographic projection of the protective pad 12 in the direction perpendicular to the display surface intersects the orthographic projection of the cutting surface S in the direction perpendicular to the display surface. For example, the frame area includes a first pad area N1 and a second pad area N2. The first pad area N1 is located between the display area AA and the second pad area N2. The side S is in a direction perpendicular to the display surface. The orthographic projection forms a partial edge of the orthographic projection of the second pad area N2 in a direction perpendicular to the display surface. The test pad 11 is located in the first pad area N1, and the protective pad 12 is located in the second pad area N2. The protective pad 12 extends to the side S and is exposed on the side S. The load circuit is implemented as a ground circuit. The ground circuit includes a ground pad 13 and a ground wire. The protective pad 12 is connected to the ground pad 13 . The test pad 11 and the protective pad 12 are arranged on the same layer. In this case, in the direction parallel to the cutting line, the protective pads 12 and the test pads 11 are arranged at intervals; or, the protective pads 12 and the test pads 11 are arranged facing each other in pairs.

As shown in FIG. 3 , when the solder pads 21 on the test circuit board 20 overlap the test pads 11 , the test circuit board 20 bends at the edge of the display panel, causing the solder joints on the test circuit board 20 to break. When the pad 21 comes into contact with the conductive material area Q on the cutting surface S, causing a short circuit in the adjacent pad 21, the short-circuit current passes through the pad 21, the conductive material area Q, the protective pad 12, the grounding pad 13, and is finally grounded. The wires are routed to prevent the test circuit board 20 from being burned.

FIG. 13 is a schematic structural diagram of a display panel provided by the second embodiment of the present application. The difference between this display panel and the display panel shown in FIG. 12 is that in this embodiment, the load circuit is implemented as at least one pixel unit 130. Specifically, the display panel also includes a plurality of pixel units 130, some of the pixel units 130 of the plurality of pixel units 130 are connected to the protective pad 12, and some of the pixel units 130 connected to the protective pad 12 serve as load circuits. The partial pixel unit 130 serving as the load circuit may be, for example, a plurality of green pixel units arranged linearly.

Figure 14 is a schematic structural diagram of a display panel provided by three embodiments of the present application. As shown in Figure 14, the difference between this display panel and the display panel shown in Figure 12 is that the display panel also includes a thermistor 14. The thermistor 14 is set on the test line connected to the test pad 11, that is, the thermistor. 14 is located at one end of the test pad 11 away from the protective pad 12 . The material of the thermistor 14 may be, for example, Fe ₂ O ₃ , Al ₂ O ₃ or the like.

This application also provides a display device, including the display panel provided in any embodiment of this application. For the specific structure of the display panel, please refer to the above-mentioned display panel embodiment and will not be described again here.

The foregoing description has been presented for the purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of the present application to the form disclosed herein. Although various example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, changes, additions and sub-combinations thereof.

Claims (11)

1. A display panel motherboard, characterized in that it includes: counterpoint mark; The test pad is located on one side of the cutting line formed by the alignment mark; A protective pad, located on the side of the cutting line where the test pad is located. The orthographic projection of the protective pad in a direction perpendicular to the display surface is the same as the orthographic projection of the cutting line in a direction perpendicular to the display surface. orthographic projection intersection; and A load circuit is connected to the protective pad and used to consume the current flowing in the protective pad. 2. The display panel motherboard according to claim 1, wherein the test pad and the protective pad are arranged on the same layer. 3. The display panel motherboard according to claim 2, wherein the protective pads and the test pads are spaced apart in a direction parallel to the cutting line. 4. The display panel motherboard according to any one of claims 1 to 3, further comprising a ground pad connected to the protective pad to serve as the load circuit; or, The display panel motherboard further includes a pixel unit connected to the protective pad to serve as the load circuit. 5. The display panel motherboard according to any one of claims 1 to 3, further comprising a thermistor, the thermistor being disposed on a test line connected to the test pad. 6. The display panel motherboard according to any one of claims 1 to 3, characterized in that it includes a frame area in contact with the cutting line and a display area located on the side of the frame area away from the cutting line, so The test pad and the protective pad are located in the frame area. 7. A display panel, characterized in that it includes: A test pad, the test pad includes a first end and a second end arranged oppositely, the first end is connected to a test line, and the second end points to one side of the display panel; A protective pad, the orthographic projection of the protective pad in a direction perpendicular to the display surface intersects the orthographic projection of the side surface in a direction perpendicular to the display surface; and A load circuit is connected to the protective pad and used to consume the current flowing in the protective pad. 8. The display panel according to claim 7, wherein the test pad and the protective pad are arranged on the same layer. 9. The display panel according to claim 8, wherein the protective pads and the test pads are spaced apart in a direction parallel to the cutting line. 10. The display panel according to any one of claims 7-9, further comprising a ground pad connected to the protective pad to serve as the load circuit; or, The display panel further includes a pixel unit connected to the protective pad to serve as the load circuit. 11. A display device, comprising the display panel according to claim 10.