CN115015824B - Logarithmic detector calibration circuit and calibration method and logarithmic detector - Google Patents
Logarithmic detector calibration circuit and calibration method and logarithmic detector Download PDFInfo
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- G01R35/02—Testing or calibrating of apparatus covered by the other groups of this subclass of auxiliary devices, e.g. of instrument transformers according to prescribed transformation ratio, phase angle, or wattage rating
Abstract
The invention discloses a logarithmic detector calibration circuit, a calibration method and a logarithmic detector, and relates to the field of electronics, wherein the calibration circuit comprises: a compensation voltage generation circuit for generating a compensation voltage VF related to the logarithmic detector input signal frequency; a calibration circuit body circuit for generating a first current related to the ambient temperature of the logarithmic detector and obtaining a second current related to the frequency of the logarithmic detector input signal based on the compensation voltage VF and the first current; the calibration current output circuit is used for adjusting the second current into the output current of the calibration circuit according to a proportion; the invention can carry out temperature compensation and frequency compensation on the output of the logarithmic detector.
Description
Technical Field
The invention relates to the field of electronics, in particular to a logarithmic detector calibration circuit, a logarithmic detector calibration method and a logarithmic detector.
Background
Continuous logarithmic detectors are widely used in automatic gain control and pulse detection where, in an ideal state, the output voltage of the logarithmic detector varies linearly with the input signal amplitude or power and can be quantized to a slope and intercept. In practice, however, when the amplitude of the input signal remains unchanged, the temperature variation causes a drift in the intercept of the linear voltage, which is also related to the frequency of the input signal. Calibrating the linear output of the logarithmic detection to a fixed intercept determines the consistency of the dynamic range of the logarithmic detection. How to compensate different temperatures and frequencies and how to integrate the two to minimize the complexity is a general concern at present, however, the existing logarithmic detectors have no calibration circuit for integrating temperature compensation and frequency compensation, and no related report is made.
Disclosure of Invention
The invention aims to perform temperature compensation and frequency compensation on the output of a logarithmic detector.
To achieve the above object, the present invention provides a logarithmic detector calibration circuit comprising:
a compensation voltage generation circuit for generating a compensation voltage VF related to the logarithmic detector input signal frequency;
a calibration circuit body circuit for generating a first current related to the ambient temperature of the logarithmic detector and obtaining a second current related to the frequency of the logarithmic detector input signal based on the compensation voltage VF and the first current;
and the calibration current output circuit is used for adjusting the second current into the output current of the calibration circuit according to a proportion.
The logarithmic detector calibration circuit in the invention is designed with a compensation voltage generation circuit capable of generating a compensation voltage VF related to the frequency of an input signal of the logarithmic detector, and is designed with a calibration circuit main body circuit capable of generating a first current related to the environmental temperature of the logarithmic detector, then a second current related to the frequency of the input signal of the logarithmic detector is obtained by using the compensation voltage VF and the first current, and the second current is regulated into an output current of the calibration circuit by using a calibration current output circuit according to the proportion, namely the logarithmic detector calibration circuit in the invention can realize the calibration of the output of the logarithmic detector according to the frequency of the input signal of the logarithmic detector and the environmental temperature thereof.
Preferably, in the present invention:
the compensation voltage generation circuit includes: a resistor R1 and a resistor R2;
the calibration circuit body circuit includes: resistor R0, resistor R3, amplifier and transistor Q0;
the calibration current output circuit includes: a transistor M0 and a transistor M1;
resistor R0, resistor R1, resistor R2, resistor R3, amplifier, transistor M0, transistor M1, and transistor Q0;
one end of a resistor R1, one end of a resistor R2 and a negative input end of an amplifier are all connected with a compensation voltage VF, the other end of the resistor R1 is connected with a variable resistor, the other end of the resistor R2 is connected with a power supply, a positive input end of the amplifier is connected with one end of a resistor R3, the other end of the resistor R3, a drain electrode of a transistor M0 and one end of the resistor R0 are all connected with a regulating voltage VA, the other end of the resistor R0 is connected with a base electrode and a collector electrode of the transistor Q0, an emitter electrode of the transistor Q0 is grounded, an output end of the amplifier is connected with a grid electrode of the transistor M1 and a grid electrode of the transistor Q0, a source electrode of the transistor M1 and a source electrode of the transistor Q0 are all connected with the power supply, and a drain electrode of the transistor M1 is connected with an output end of a logarithmic detector calibration circuit.
Preferably, in the present invention, the other end of the resistor R1 is connected to the variable resistor by being connected to the external input port RADJ. The purpose of the variable resistor is to correct the compensation voltage VF at different frequencies by means of the resistance adjustment of the resistors R1, R2 and the external variable resistor.
Preferably, in the present invention, the transistor M0 and the transistor M1 are PMOS transistors. The PMOS tube is adopted to feed back the drain electrode to the positive electrode of the operational amplifier, and is used as a current mirror tube, and the PNP tube can be adopted in the invention.
Preferably, in the present invention, the transistor Q0 is a heterojunction bipolar transistor. The purpose of using heterojunction bipolar transistors is that a diode-connected HBT can generate a voltage inversely proportional to temperature, and here a common NPN can be used.
The linear relation between the output voltage and the input signal amplitude of the logarithmic detector in the prior art is a negative slope, the intercept increases with the rising of the temperature under the condition that the frequency of the input signal is unchanged, and the intercept increases with the rising of the frequency under the condition that the temperature is unchanged. Therefore, in the prior art, the output of the logarithmic detector is inaccurate when the frequency of the input signal changes or the ambient temperature changes, in order to calibrate the logarithmic detector, the logarithmic detector is improved, and a new logarithmic detector with a calibration circuit is provided, and the logarithmic detector comprises:
first to nth stage units, a filter and said logarithmic detector calibration circuit, wherein each stage unit comprises: limiting amplifier and rectifier;
the input end of the limiting amplifier of the first stage unit is connected with an input signal Vin, the first output end of the limiting amplifier of the first stage unit is connected with the input end of the limiting amplifier of the second stage unit, the second output end of the limiting amplifier of the first stage unit is connected with the input end of the rectifier of the first stage unit, and the rectifier of the first stage unit outputs a first output signal;
the first output end of the limiting amplifier of the ith stage unit is connected with the input end of the limiting amplifier of the (i+1) th stage unit, the second output end of the limiting amplifier of the ith stage unit is connected with the input end of the rectifier of the ith stage unit, the rectifier of the ith stage unit outputs an ith output signal, and i is an integer greater than 1 and less than N;
the output end of the limiting amplifier of the Nth stage unit is connected with the input end of the rectifier of the Nth stage unit, and the rectifier of the Nth stage unit outputs an Nth output signal;
summing the first output signal to the Nth output signal to obtain a first summed signal, and filtering the first summed signal by a filter to obtain a summed current ISUM;
the output end of the filter is connected with the output end of the logarithmic detector calibration circuit, and the output signal Vout of the logarithmic detector is obtained based on the summation current ISUM and the calibration current ICAL output by the logarithmic detector calibration circuit.
The logarithmic detector of the invention carries the logarithmic detector calibration circuit, so that the logarithmic detector calibration circuit can be utilized to calibrate the output of the logarithmic detector, and the influence caused by the input frequency change and the environmental temperature change is overcome.
Preferably, the method of the present invention obtains the output signal Vout of the logarithmic detector based on the sum current ISUM and the calibration current ICAL output by the logarithmic detector calibration circuit, specifically including:
subtracting the summation current ISUM from the calibration current ICAL to obtain an output current Iout;
the output current Iout is converted into an output signal Vout by a current-to-voltage circuit.
The invention also provides an output calibration method of the logarithmic detector, which comprises the following steps:
generating an ambient temperature dependent current IA1 across a resistor R0 when the ambient temperature of the logarithmic detector rises;
adjusting the current IA1 to a calibration current ICAL through the logarithmic detector calibration circuit;
calibrating the output of the logarithmic detector based on the calibration current ICAL;
a kind of electronic device with high-pressure air-conditioning system;
when the frequency of the input signal of the logarithmic detector increases, the resistance value of the variable resistor is adjusted to generate an adjusting current IA2 which is related to the frequency on a resistor R0;
adjusting the current IA2 to a calibration current ICAL through the logarithmic detector calibration circuit;
the output of the logarithmic detector is calibrated based on the calibration current ICAL.
Preferably, the method comprises:
obtaining the frequency f of the input signal of the logarithmic detector;
testing the resistance k of the variable resistor based on the frequency f;
and adjusting the resistance value of the variable resistor based on the resistance value k.
The one or more technical schemes provided by the invention have at least the following technical effects or advantages:
the invention realizes the adjustment of the output voltage of the logarithmic detector by adjusting the current by utilizing the temperature characteristic of the transistor in the diode connection mode and the resistance value of the external variable resistor, thereby realizing the temperature compensation and the frequency compensation simultaneously.
The invention has high integration level, realizes two compensation functions by adopting one circuit, and greatly reduces the design complexity of the logarithmic detection calibration circuit.
Drawings
The accompanying drawings, which are included to provide a further understanding of embodiments of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention;
FIG. 1 is a schematic diagram of a logarithmic detector calibration circuit;
FIG. 2 is a schematic diagram of the output calibration principle of a logarithmic detector;
fig. 3 is a schematic diagram of a logarithmic detector.
Detailed Description
In order that the above-recited objects, features and advantages of the present invention will be more clearly understood, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description. In addition, the embodiments of the present invention and the features in the embodiments may be combined with each other without collision.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, however, the present invention may be practiced in other ways than within the scope of the description, and the scope of the invention is therefore not limited to the specific embodiments disclosed below.
Example 1
Referring to fig. 1, fig. 1 is a schematic circuit diagram of a logarithmic detector calibration circuit, and a first embodiment of the invention provides a logarithmic detector calibration circuit for compensating for intercept drift caused by temperature variation and frequency variation.
The logarithmic detection calibration circuit in this embodiment integrates temperature compensation and frequency compensation, and includes a frequency compensation voltage generation circuit, a calibration circuit main body circuit, and a calibration current output circuit.
The compensation voltage generation circuit has the function of generating compensation voltages VF under different frequencies through the matching of the external variable resistor and the internal fixed resistor, and the voltages can be configured through the external resistor to provide the calibrated compensation voltage for the subsequent-stage circuit.
The function of the main circuit of the calibration circuit is to generate a current proportional to temperature on a resistor R0 by utilizing the characteristic that the voltage between the base electrode and the emitter electrode of a transistor Q0 in a diode connection mode is inversely proportional to absolute temperature, and simultaneously generate a current IA proportional to frequency on the resistor R0 by compensating the voltage obtained by the voltage generating circuit under the condition of unchanged temperature.
The function of the calibration current output circuit is that the calibration current ICAL is amplified (or reduced) to the calibration current ICAL through the calibration current output circuit, so that the requirements of practical application are met, and the requirements of different output voltages are realized.
The compensation voltage generating circuit is characterized in that two resistors R1 and R2 are connected in series, the common end of the two resistors is connected with the input VF of the main circuit of the calibration circuit, the other end of the R2 is connected with a power supply, the other end of the R1 is connected with an external input port RADJ, the RADJ can be connected with an external variable resistor, the variable resistor and the resistance values of the fixed resistors R1 and R2 jointly determine the frequency compensation voltage, and the compensation voltage VF under different frequencies is corrected by adjusting the values of the external variable resistor; the structure of the amplifier of the main circuit of the calibration circuit is a differential input single-ended output high-gain operational amplifier, but the invention relates to a diode connection mode, wherein the negative end input of the amplifier is connected with VF, the positive end input of the amplifier is connected with VA through a feedback resistor R3, the output of the amplifier is connected with the grid electrode of a transistor (such as a PMOS tube) M0, the source electrode of the M0 tube is connected with a power supply, the drain electrode of the M0 tube is connected with VA, and the amplifier is connected with the positive end through R3, meanwhile, the other end of the connecting resistor R0 is connected with the base electrode and the collector electrode of an HBT tube Q0, and the emitter electrode of the Q0 tube is grounded; the calibration current output circuit is a transistor M1, the grid electrode of the transistor M1 is connected with the grid electrode of the transistor M0, the source electrode is connected with a power supply, and the drain electrode is connected with an output ICAL.
In the embodiment of the present invention, the transistor M0 and the transistor M1 are PMOS transistors, and a PNP transistor may be used in the present invention, and the transistor Q0 is a heterojunction bipolar transistor, where a common NPN transistor may be used.
The compensation voltage generation circuit corrects the compensation voltage VF under different frequencies through the fixed resistors R1 and R2 and the external variable resistor (connected through the RADJ), changes the value of the adjustment voltage VA (the R3 resistor plays an isolating role), so as to generate the adjustment current IA on R0, the ICAL output by the calibration current output circuit in a mirror image mode is adjusted in proportion, so as to adjust the output voltage of the logarithmic detector, for the high-frequency condition, the resistance value of the external variable resistor can be increased, the VF is raised, the VA is raised, the IA is increased, the current is amplified (or reduced) into the calibration current ICAL in proportion to the frequency through the calibration current output circuit, the ICAL is also the current proportional to the frequency, the output voltage can be reduced by extracting more output voltage currents, so that the intercept is reduced, and for the low-frequency condition, the intercept is reversely reduced, the resistance value of the external variable resistor is reduced, so that the intercept is increased, and the aim of calibrating the intercept through frequency compensation is achieved. The calibration principle of the main circuit of the calibration circuit is as follows: when VF is fixed, VA remains unchanged, since the voltage between the base and emitter of the diode-connected transistor Q0 has a characteristic inversely proportional to absolute temperature, when the temperature rises, the voltage VB decreases, thus generating a temperature-proportional current IA on the resistor R0, which is proportional amplified (or reduced) to a calibration current ICAL by the calibration current output circuit, so ICAL is also a temperature-proportional current, and for high temperature conditions, by extracting more output voltage current, the output voltage can be reduced, thus reducing the intercept, and for low temperature conditions, conversely, VB increases, IA and ICAL decrease, thus increasing the intercept, achieving the purpose of calibrating the intercept by temperature compensation.
Referring to fig. 2, fig. 2 is a schematic diagram illustrating an output calibration principle of the logarithmic detector; temperature compensation: as can be seen from the temperature characteristics of the logarithmic detector, when the temperature increases, the current ISUM (see fig. 2) output from the summer increases with the temperature (presents a PTAT characteristic), thereby leading to an increase in Iout, and an increase in Vout, which is represented by an intercept increase on the output voltage characteristic curve, in order to keep Vout unchanged when the temperature changes, i.e., the intercept on the output voltage characteristic curve, the temperature calibration method of the present patent comprises the steps of: first, the voltage between the base and the emitter of the diode-connected transistor Q0 has a characteristic inversely proportional to absolute temperature, and when the temperature rises, the voltage VB drops, so that a current IA proportional to the temperature is generated at the resistor R0; this current is then scaled up (or reduced) to the calibration current ICAL by the calibration current output section, so ICAL is also a current proportional to temperature; then, the ICAL current and the ISUM current are subjected to difference to obtain output current Iout, namely Iout=ISUM-ICAL, and by the method, a current part which increases with the temperature rise or decreases with the temperature fall can be offset between the two, so that the output current Iout is ensured to be constant at different temperatures; and finally converting the Iout into Vout through a current-to-voltage circuit. Or, for high temperature conditions, the output voltage can be reduced by extracting more output voltage and current, so that the intercept is reduced, and for low temperature conditions, the VB is increased, the IA and ICAL are reduced, so that the intercept is increased, and the aim of calibrating the intercept through temperature compensation is fulfilled.
Frequency compensation: when the frequency of the input signal increases, the current ISUM (see fig. 2) output by the summer increases with the frequency, thereby causing the Iout to increase, and Vout to also increase, which is represented by an intercept increase on the output voltage characteristic curve, so as to keep Vout unchanged when the input frequency changes, i.e. the intercept on the output voltage characteristic curve is unchanged, the frequency calibration method of the present patent comprises the steps of: firstly, correcting compensation voltage VF under different frequencies through fixed resistors R1 and R2 and an external variable resistor (accessed through RADJ), changing the value of regulating voltage VA (the resistor R3 plays an isolating role), thereby generating regulating current IA on R0, regulating ICAL outputted through a calibrated current output part in a mirror image mode in proportion, and thus regulating the output voltage of a logarithmic detector; this current is then scaled up (or reduced) to the calibration current ICAL by the calibration current output section, so ICAL is also a current proportional to frequency; then, the ICAL current and the ISUM current are subjected to difference to obtain output current Iout, namely Iout=ISUM-ICAL, and by the method, a current part which increases with the rising of the frequency or decreases with the falling of the frequency can be offset between the two, so that the output current Iout is ensured to be constant under different frequencies; and finally converting the Iout into Vout through a current-to-voltage circuit. Or, under the high-frequency condition, the output voltage can be reduced by extracting more output voltage and current, so that the intercept is reduced, and under the low-frequency condition, the resistance value of the external variable resistor can be reduced, so that the intercept is increased, and the aim of calibrating the intercept through frequency compensation is fulfilled.
Example two
Referring to fig. 3, fig. 3 is a schematic structural diagram of a logarithmic detector, and based on the first embodiment, a second embodiment of the present invention provides a novel logarithmic detector with a calibration circuit, where the logarithmic detector includes:
first to nth stage units, a filter and said logarithmic detector calibration circuit, wherein each stage unit comprises: limiting amplifier and rectifier;
the input end of the limiting amplifier of the first stage unit is connected with an input signal Vin, the first output end of the limiting amplifier of the first stage unit is connected with the input end of the limiting amplifier of the second stage unit, the second output end of the limiting amplifier of the first stage unit is connected with the input end of the rectifier of the first stage unit, and the rectifier of the first stage unit outputs a first output signal;
the first output end of the limiting amplifier of the ith stage unit is connected with the input end of the limiting amplifier of the (i+1) th stage unit, the second output end of the limiting amplifier of the ith stage unit is connected with the input end of the rectifier of the ith stage unit, the rectifier of the ith stage unit outputs an ith output signal, and i is an integer greater than 1 and less than N;
the output end of the limiting amplifier of the Nth stage unit is connected with the input end of the rectifier of the Nth stage unit, and the rectifier of the Nth stage unit outputs an Nth output signal;
summing the first output signal to the Nth output signal to obtain a first summed signal, and filtering the first summed signal by a filter to obtain a summed current ISUM;
the output end of the filter is connected with the output end of the logarithmic detector calibration circuit, and the output signal Vout of the logarithmic detector is obtained based on the summation current ISUM and the calibration current ICAL output by the logarithmic detector calibration circuit.
The logarithmic detector of the invention carries the logarithmic detector calibration circuit, so that the logarithmic detector calibration circuit can be utilized to calibrate the output of the logarithmic detector, and the influence caused by the input frequency change and the environmental temperature change is overcome.
In a second embodiment of the present invention, the obtaining the output signal Vout of the logarithmic detector based on the sum current ISUM and the calibration current ICAL output by the logarithmic detector calibration circuit specifically includes:
subtracting the summation current ISUM from the calibration current ICAL to obtain an output current Iout;
the output current Iout is converted into an output signal Vout by a current-to-voltage circuit.
Example III
On the basis of the second embodiment, the third embodiment of the present invention provides an output calibration method of the logarithmic detector, which includes:
generating an ambient temperature dependent current IA1 across a resistor R0 when the ambient temperature of the logarithmic detector rises;
adjusting the current IA1 to a calibration current ICAL through the logarithmic detector calibration circuit;
calibrating the output of the logarithmic detector based on the calibration current ICAL;
a kind of electronic device with high-pressure air-conditioning system;
when the frequency of the input signal of the logarithmic detector increases, the resistance value of the variable resistor is adjusted to generate an adjusting current IA2 which is related to the frequency on a resistor R0;
adjusting the current IA2 to a calibration current ICAL through the logarithmic detector calibration circuit;
the output of the logarithmic detector is calibrated based on the calibration current ICAL.
Preferably, the method comprises:
obtaining the frequency f of the input signal of the logarithmic detector;
testing the resistance k of the variable resistor based on the frequency f;
and adjusting the resistance value of the variable resistor based on the resistance value k.
When the frequency is increased, a larger variable resistor is selected, a specific resistance value is suitable for the intercept of the design requirement, when the frequency is reduced, a smaller variable resistor is selected, the specific resistance value is suitable for the intercept of the design, the variable resistors are also different under different frequencies, and the intercept is ensured to be fixed as much as possible.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
Claims (8)
1. A logarithmic detector calibration circuit, the calibration circuit comprising:
a compensation voltage generation circuit for generating a compensation voltage VF related to the logarithmic detector input signal frequency;
a calibration circuit body circuit for generating a first current related to the ambient temperature of the logarithmic detector and obtaining a second current related to the frequency of the logarithmic detector input signal based on the compensation voltage VF and the first current;
the calibration current output circuit is used for adjusting the second current into the output current of the calibration circuit according to a proportion and outputting the output current to the output end of the logarithmic detector;
the compensation voltage generation circuit includes: a resistor R1 and a resistor R2;
the calibration circuit body circuit includes: resistor R0, resistor R3, amplifier and transistor Q0;
the calibration current output circuit includes: a transistor M0 and a transistor M1;
resistor R0, resistor R1, resistor R2, resistor R3, amplifier, transistor M0, transistor M1, and transistor Q0;
one end of a resistor R1, one end of a resistor R2 and a negative input end of an amplifier are all connected with a compensation voltage VF, the other end of the resistor R1 is connected with a variable resistor, the other end of the resistor R2 is connected with a power supply, a positive input end of the amplifier is connected with one end of a resistor R3, the other end of the resistor R3, a drain electrode of a transistor M0 and one end of the resistor R0 are all connected with a regulating voltage VA, the other end of the resistor R0 is connected with a base electrode and a collector electrode of the transistor Q0, an emitter electrode of the transistor Q0 is grounded, an output end of the amplifier is connected with a grid electrode of the transistor M1 and a grid electrode of the transistor Q0, a source electrode of the transistor M1 and a source electrode of the transistor Q0 are all connected with the power supply, and a drain electrode of the transistor M1 is connected with an output end of a logarithmic detector calibration circuit.
2. The logarithmic detector calibration circuit of claim 1, wherein the other end of resistor R1 is connected to the variable resistor by connecting to an external input port RADJ.
3. The logarithmic detector calibration circuit of claim 1, wherein transistor M0 and transistor M1 are PMOS transistors.
4. The logarithmic detector calibration circuit of claim 1, wherein transistor Q0 is a heterojunction bipolar transistor.
5. A logarithmic detector, the logarithmic detector comprising:
the logarithmic detector calibration circuit of any of claims 2-4, and first through nth stage units, wherein each stage unit comprises: limiting amplifier and rectifier;
the input end of the limiting amplifier of the first stage unit is connected with an input signal Vin, the first output end of the limiting amplifier of the first stage unit is connected with the input end of the limiting amplifier of the second stage unit, the second output end of the limiting amplifier of the first stage unit is connected with the input end of the rectifier of the first stage unit, and the rectifier of the first stage unit outputs a first output signal;
the first output end of the limiting amplifier of the ith stage unit is connected with the input end of the limiting amplifier of the (i+1) th stage unit, the second output end of the limiting amplifier of the ith stage unit is connected with the input end of the rectifier of the ith stage unit, the rectifier of the ith stage unit outputs an ith output signal, and i is an integer greater than 1 and less than N;
the output end of the limiting amplifier of the Nth stage unit is connected with the input end of the rectifier of the Nth stage unit, and the rectifier of the Nth stage unit outputs an Nth output signal;
summing the first output signal to the Nth output signal to obtain a first summed signal, and filtering the first summed signal by a filter to obtain a summed current ISUM;
the output end of the filter is connected with the output end of the logarithmic detector calibration circuit, and the output signal Vout of the logarithmic detector is obtained based on the summation current ISUM and the calibration current ICAL output by the logarithmic detector calibration circuit.
6. The logarithmic detector of claim 5, wherein said logarithmic detector output signal Vout is obtained based on said sum current ISUM and a calibration current ICAL output by said logarithmic detector calibration circuit, comprising in particular:
subtracting the calibration current ICAL from the sum current ISUM to obtain an output current Iout;
the output current Iout is converted into an output signal Vout by a current-to-voltage circuit.
7. A method of calibrating the output of a logarithmic detector according to any of claims 5-6, said method comprising:
when the ambient temperature of the logarithmic detector rises, the compensation voltage VF at different frequencies is corrected through the resistors R1 and R2 and an external variable resistor, the value of the regulating voltage VA is changed, and a current IA1 related to the ambient temperature is generated on the resistor R0;
adjusting the current IA1 to a calibration current ICAL through the logarithmic detector calibration circuit;
calibrating the output of the logarithmic detector based on the calibration current ICAL, and obtaining the output current Iout of the logarithmic detector by carrying out difference between the sum current ISUM and the calibration current ICAL;
a kind of electronic device with high-pressure air-conditioning system;
when the frequency of the input signal of the logarithmic detector increases, the resistance value of the variable resistor is adjusted to generate an adjusting current IA2 which is related to the frequency on a resistor R0;
adjusting the current IA2 to a calibration current ICAL through the logarithmic detector calibration circuit;
and calibrating the output of the logarithmic detector based on the calibration current ICAL, and obtaining the output current Iout of the logarithmic detector by carrying out difference between the sum current ISUM and the calibration current ICAL.
8. The method of calibrating the output of a logarithmic detector of claim 7, wherein said method comprises:
obtaining the frequency f of the input signal of the logarithmic detector;
testing the resistance k of the variable resistor based on the frequency f;
and adjusting the resistance value of the variable resistor based on the resistance value k.
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| US11349512B1 (en) * | 2021-04-23 | 2022-05-31 | Analog Devices International Unlimited Company | Logarithmic power detector with noise compensation |
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