CN115015605A - Anti-electromagnetic interference high-voltage harmonic testing device and method - Google Patents

Anti-electromagnetic interference high-voltage harmonic testing device and method Download PDF

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Publication number
CN115015605A
CN115015605A CN202210469821.4A CN202210469821A CN115015605A CN 115015605 A CN115015605 A CN 115015605A CN 202210469821 A CN202210469821 A CN 202210469821A CN 115015605 A CN115015605 A CN 115015605A
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loop
pcb
interference
electromagnetic interference
cavity
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CN202210469821.4A
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Chinese (zh)
Inventor
汪泽州
陈刚
张明明
鲍建飞
陆建琴
舒能文
周弘毅
王晨波
胡燕伟
孙帅
孙豪豪
屠孝杰
高原
李豹
张建荣
张宇
陆超宇
李想
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State Grid Zhejiang Electric Power Co Ltd Haiyan County Power Supply Co
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State Grid Zhejiang Electric Power Co Ltd Haiyan County Power Supply Co
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Priority to CN202210469821.4A priority Critical patent/CN115015605A/en
Publication of CN115015605A publication Critical patent/CN115015605A/en
Pending legal-status Critical Current

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/18—Screening arrangements against electric or magnetic fields, e.g. against earth's field
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/20—Modifications of basic electric elements for use in electric measuring instruments; Structural combinations of such elements with such instruments
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/20—Modifications of basic electric elements for use in electric measuring instruments; Structural combinations of such elements with such instruments
    • G01R1/24—Transmission-line, e.g. waveguide, measuring sections, e.g. slotted section
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
    • G01R23/16—Spectrum analysis; Fourier analysis
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/60—Arrangements for transfer of electric power between AC networks or generators via a high voltage DC link [HVCD]

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

The invention discloses an anti-electromagnetic interference high-voltage harmonic testing device and method; the device is arranged in the electromagnetic interference preventing shell, so that the influence of external electromagnetic interference on an internal circuit is reduced; meanwhile, the circuit is divided into different parts according to functions, all circuit connection modes capable of completing the functions are called, and all connection loops capable of completing the harmonic wave acquisition function are obtained; acquiring a cavity three-dimensional model, an intra-cavity medium condition and an interference frequency point of a PCB (printed Circuit Board) to configure an electromagnetic boundary condition of the cavity three-dimensional model; obtaining whether interference exists in the shell or not according to simulation, if so, calling a new PCB connecting loop again for simulation until no electromagnetic interference exists in the shell; internal electromagnetic interference is eliminated by selecting a PCB circuit matched with the anti-interference shell, external electromagnetic interference is eliminated by the anti-interference shell, and the fact that the measurement result is not influenced by the electromagnetic interference in the harmonic detection process is guaranteed.

Description

Anti-electromagnetic interference high-voltage harmonic testing device and method
Technical Field
The invention relates to the technical field of electronic communication, in particular to an anti-electromagnetic interference high-voltage harmonic testing device and method.
Background
The extra-high voltage converter station (generally over +/-800 kv) plays an important role in the process of large-capacity energy transmission and linkage, and the electromagnetic environment of the high-voltage direct current converter station is different from and more complex than that of an alternating current transformer substation. Due to the sudden change of voltage caused by the switching on and off of the converter valves, the generated radio frequency electromagnetic waves may interfere with neighboring buildings and computer equipment, preventing the normal operation of the system, for example, affecting carrier systems, radio and television signal stations. So that the electromagnetic environment of the converter station needs to be fully understood in order to be able to avoid the harm of interference. The measurement of the electromagnetic environment of the converter station can only be performed during the maintenance of the converter station, the workload is heavy, the time is consumed, and the measurement condition cannot be comprehensive, so that the establishment of an accurate converter station model and the analysis of the electromagnetic level of the converter station are very necessary. In order to predict the electromagnetic interference level of the extra-high voltage converter station in advance and fully analyze the electromagnetic environment of the extra-high voltage converter station, research on an electromagnetic interference prediction method of the extra-high voltage converter station capable of being practically applied is urgently needed in the field.
For example, a chinese patent document discloses "a method and a system for predicting electromagnetic interference of an extra-high voltage converter station", which is published under the publication number CN 105469162B; respectively establishing a node impedance model of each device according to basic information of each device in the extra-high voltage converter station; establishing an equivalent circuit based on a node impedance model of each device according to the device connection condition of the extra-high voltage converter station; acquiring voltage before the converter valve is conducted, performing voltage step processing, and determining transient current generated by the conduction of the converter valve according to the voltage step processing result of the voltage before the converter valve is conducted; and calculating electromagnetic interference at any position of the extra-high voltage converter station, wherein the electromagnetic interference comprises obtaining the electric field intensity of the converter station according to the electromagnetic interference of each current carrying element in each axial direction of the measured point, and calculating the electromagnetic interference. However, the target of the present invention is the electromagnetic interference generated by each node, and the signal is processed by using the voltage step, but the present invention is still not suitable for the high voltage harmonic detection, and meanwhile, the relative measurement cost is high, and the electromagnetic interference existing in the high voltage harmonic cannot be directly eliminated from the structure.
Disclosure of Invention
The invention mainly aims at the problem that the electromagnetic interference is difficult to predict and eliminate in the prior art; the high-voltage harmonic testing device and method for resisting electromagnetic interference are provided; the device is arranged in the electromagnetic interference preventing shell, so that the influence of external electromagnetic interference on an internal circuit is reduced; meanwhile, the circuit is divided into different parts according to functions, all circuit connection modes capable of completing the functions are called, and all connection loops capable of completing the harmonic wave acquisition function are obtained; acquiring a cavity three-dimensional model, an intra-cavity medium condition and an interference frequency point of a PCB (printed Circuit Board) to configure an electromagnetic boundary condition of the cavity three-dimensional model; obtaining whether interference exists in the shell or not according to simulation, if so, calling a new PCB connecting loop again for simulation until no electromagnetic interference exists in the shell; internal electromagnetic interference is eliminated by selecting a PCB circuit matched with the anti-interference shell, external electromagnetic interference is eliminated by the anti-interference shell, and the fact that the measurement result is not influenced by the electromagnetic interference in the harmonic detection process is guaranteed.
The technical problem of the invention is mainly solved by the following technical scheme:
a high-voltage harmonic testing device for resisting electromagnetic interference is arranged in an anti-interference shell and comprises a testing circuit board, a harmonic measuring circuit and a harmonic measuring circuit, wherein the testing circuit board is connected with a high-voltage power grid and is used for measuring the harmonic quantity in the high-voltage circuit; the acquisition device is used for acquiring and processing voltage signals of the coupling power grid, calculating the content of each subharmonic of the power grid, and transmitting the subharmonic to the receiving device after wireless modulation; and the receiving device is used for demodulating the received harmonic information, displaying the content of each harmonic and giving an early warning to the abnormal signal. The testing device is arranged in the electromagnetic interference preventing shell, so that the influence of external electromagnetic interference on an internal circuit is reduced; and meanwhile, the circuit is tested through the test circuit, the acquisition device and the receiving device to complete the measurement of the harmonic signals in the high-voltage power grid. Be provided with the earthing hole of adaptation in the wire on this jam-proof shell, can directly connect out the earth connection, when avoiding the circuit to draw forth, external environment influences the inside measurement of circuit.
A method of anti-electromagnetic interference of a high voltage harmonic test apparatus, the method comprising:
a1, calling a PCB connecting loop, and configuring electromagnetic boundary conditions of the cavity three-dimensional model according to the cavity three-dimensional model, the medium conditions in the cavity and the interference frequency points of the PCB;
a2, carrying out simulation analysis on the three-dimensional cavity model according to the electromagnetic boundary condition and the condition of the medium in the cavity to obtain a simulation result, wherein the simulation result comprises at least one eigenfrequency of the cavity;
a3, judging whether the eigenfrequency of the cavity is the same as the interference frequency point; if not, selecting the loop; if yes, a new PCB connecting loop is called again, and the steps S1-S3 are repeated until the fact that electromagnetic interference cannot be generated after adjustment is determined.
Dividing the circuit into different parts according to functions, calling all circuit connection modes capable of completing the functions, and obtaining all connection loops capable of completing the harmonic acquisition function; acquiring a cavity three-dimensional model, an intra-cavity medium condition and an interference frequency point of a PCB (printed Circuit Board) to configure an electromagnetic boundary condition of the cavity three-dimensional model; and obtaining whether the inside of the shell has interference or not according to the simulation, if so, calling a new PCB connecting loop again for simulation until the inside of the shell has no electromagnetic interference.
Preferably, the step of obtaining the interference frequency point of the PCB according to the PCB and the components mounted on the PCB comprises:
a11, constructing an equivalent circuit model according to the PCB and the components mounted on the PCB;
and A12, carrying out simulation calculation on the equivalent circuit model to obtain the interference frequency point of the PCB.
Interference frequency points in a circuit board with fixed components and fixed component mounting positions are fixed, and the interference frequency points in the circuit can be measured and calculated through network simulation, such as a radio station frequency calculation formula; the combined interference frequency can also be obtained directly by calculation.
Preferably, the circuit setting method of the PCB includes:
step S1, dividing the circuit into different areas according to function classification according to a conventional high-voltage harmonic testing circuit, and dividing a minimum function loop;
step S2, carrying out PCB simulation connection on the minimum function loop to form a high-voltage harmonic wave test circuit, and obtaining all possibilities of connecting the loop;
s3, constructing an equivalent loop according to the components connected with the loop, acquiring interference frequency points of the PCB and obtaining the dielectric constant of the PCB;
step S3, collecting the loop number and loop area of different possible connection loops; acquiring loop connection points which are not possible to connect loops, and calculating the number of loops connected by the loop connection points;
and step S4, weighting the dielectric constant, the number of loops, the area of the loops and the number of loops connected with the loop connection points of the loops to obtain the evaluation value of the connection loops.
The dielectric constant, the number of loops, the area of the loops and the number of loops connected with loop connection points in the circuit all influence the electromagnetic interference generated by the circuit, wherein the influence of the dielectric constant is large, and meanwhile, the number of loops, the area of the loops and the number of loops connected with loop connection points all influence the electromagnetic interference generated by the circuit; the other circuit factors, such as the interference elimination of the filter circuit, are the single functions of the circuit, and besides the function influence of the circuit, the influence of the four points on the circuit interference is the largest, so the values are converted into evaluation values.
Preferably, the evaluation value is obtained according to the following formula: (ii) a Wherein, is an evaluation value; respectively representing a dielectric constant weighting coefficient, a loop number weighting coefficient, a loop area weighting coefficient and a loop number weighting coefficient connected with a loop connecting point; the size of the circuit is determined by the correlation between the electromagnetic interference of the circuit and the signal. The dielectric constant is inversely proportional to the generation of electromagnetic interference, the number of loops, the loop area and the number of loops connected to the loop connection points are proportional to each other, and the influence of the number of loops on the electromagnetic interference generated by the circuit is greater than the influence of the loop area and the number of loops connected to the loop connection points on the electromagnetic interference generated by the circuit, so the weighting selection is far greater than the weighting selection.
Preferably, the selection principle of the PCB loop includes: the connecting loops with the evaluation values from low to high are selected in sequence, the smaller the evaluation value is, the smaller the electromagnetic interference generated by the circuit is proved to be, and therefore the influence of the electromagnetic interference of the circuit can be reduced as much as possible according to the selection from small to large.
Preferably, according to the electromagnetic boundary condition and the intracavity medium, performing simulation analysis on the three-dimensional cavity model to obtain a simulation result: receiving convergence conditions, iteration times, minimum solving frequency and solving mode number input by a user; and carrying out eigen mode simulation analysis on the cavity three-dimensional model according to the electromagnetic boundary condition, the intracavity medium, the convergence condition, the iteration times, the minimum solving frequency and the solving mode number to obtain a simulation result. The process determines an internal electromagnetic boundary condition formula through the influence of various conditions on electromagnetic interference inside the cavity.
Preferably, the simulation result further includes an intra-cavity electric field distribution corresponding to the eigenfrequency, and the intra-cavity electric field distribution can facilitate subsequent evaluation and measurement of circuit interference.
The invention has the beneficial effects that:
internal electromagnetic interference is eliminated by selecting a PCB circuit matched with the anti-interference shell, external electromagnetic interference is eliminated by the anti-interference shell, and the fact that the measurement result is not influenced by the electromagnetic interference in the harmonic detection process is guaranteed.
Drawings
FIG. 1 is a flow chart of the present invention.
Detailed Description
It should be understood that the examples are for illustrative purposes only and are not intended to limit the scope of the present invention. Further, it should be understood that various changes or modifications of the present invention can be made by those skilled in the art after reading the teaching of the present invention, and these equivalents also fall within the scope of the claims appended to the present application.
The technical scheme of the invention is further specifically described by the following embodiments.
The high-voltage harmonic testing device comprises a testing circuit board, a collecting device and a receiving device. The test circuit board is connected with a high-voltage power grid and is used for measuring harmonic quantity in the high-voltage circuit; the acquisition device acquires the voltage information of the coupling power grid and calculates the content of each harmonic wave of the power grid; and the receiving device receives and displays the content of each subharmonic and warns an abnormal signal.
An anti-electromagnetic interference method of a high-voltage harmonic testing device comprises the following steps:
and A1, calling a PCB (printed Circuit Board) connecting loop from low to high according to the evaluation value, and configuring the electromagnetic boundary condition of the cavity three-dimensional model according to the cavity three-dimensional model, the condition of the medium in the cavity and the interference frequency point of the PCB.
The acquisition of the PCB interference frequency points requires that an equivalent circuit model is constructed according to the PCB and the components, and the interference frequency points of the PCB are acquired according to the simulation of the equivalent model.
Step A2, according to the electromagnetic boundary condition and the intracavity medium condition, carrying out simulation analysis on the cavity three-dimensional model to obtain a simulation result, wherein the simulation result comprises at least one eigenfrequency of the cavity. According to the electromagnetic boundary condition and the intracavity medium, receiving a convergence condition, iteration times, minimum solving frequency and solved mode number input by a user; and carrying out eigen mode simulation analysis on the three-dimensional cavity model according to the electromagnetic boundary condition, the intra-cavity medium, the convergence condition, the iteration frequency, the minimum solving frequency and the solving mode number, substituting a plurality of results influencing the electromagnetic induction inside the cavity into simulation software, and obtaining a simulation result through a plurality of simulation iterations, wherein the simulation result also comprises intra-cavity electric field distribution corresponding to the eigen frequency.
A3, judging whether the eigenfrequency of the cavity is the same as the interference frequency point; if not, selecting the loop; if yes, a new PCB connecting loop is called again, and the steps S1-S3 are repeated until the fact that electromagnetic interference cannot be generated after adjustment is determined. The PCB can be taken out for many times through the adjustment, and the internal environment which can not generate electromagnetic interference and the corresponding PCB state can be finally obtained through the matching of the electromagnetic interference and the internal dielectric environment which can be generated by the PCB.
The PCB state is obtained according to the following steps: according to a conventional high-voltage harmonic test circuit, dividing the circuit into different regions according to function classification, and dividing a minimum function loop; carrying out PCB simulation connection on the minimum function loop to form a high-voltage harmonic test circuit, and obtaining all possibilities of connecting the loops; constructing an equivalent loop according to the components connected with the loop, acquiring interference frequency points of the PCB and obtaining the dielectric constant of the PCB; collecting the number and area of loops of different possible connection loops; acquiring loop connection points which are not possible to connect loops, and calculating the number of loops connected by the loop connection points; and weighting the dielectric constants, the number of loops, the area of the loops and the number of loops connected with loop connection points of the loops to obtain the evaluation value of the connection loop.

Claims (8)

1. The utility model provides an anti-electromagnetic interference's high-pressure harmonic testing arrangement, sets up inside the jam-proof casing, its characterized in that:
the test circuit board is connected with the high-voltage power grid and used for measuring harmonic quantity in the high-voltage circuit;
the acquisition device is used for acquiring and processing voltage signals of the coupling power grid, calculating the content of each subharmonic of the power grid, and transmitting the subharmonic to the receiving device after wireless modulation;
and the receiving device is used for demodulating the received harmonic information, displaying the content of each harmonic and giving an early warning to the abnormal signal.
2. An anti-electromagnetic interference method is characterized by comprising the following steps: the method comprises the following steps:
a1, calling a PCB (printed Circuit Board) connecting loop, and configuring the electromagnetic boundary condition of the cavity three-dimensional model according to the cavity three-dimensional model, the condition of the medium in the cavity and the interference frequency point of the PCB;
a2, carrying out simulation analysis on the three-dimensional cavity model according to the electromagnetic boundary condition and the condition of the medium in the cavity to obtain a simulation result, wherein the simulation result comprises at least one eigenfrequency of the cavity;
a3, judging whether the eigenfrequency of the cavity is the same as the interference frequency point; if not, selecting the loop; if yes, a new PCB connecting loop is called again, and the steps S1-S3 are repeated until the fact that electromagnetic interference cannot be generated after adjustment is determined.
3. A method according to claim 2, wherein the method further comprises: the step of obtaining the interference frequency point of the PCB board according to the PCB board and the components and parts installed on the PCB board comprises the following steps:
a11, constructing an equivalent circuit model according to the PCB and the components mounted on the PCB;
and A12, carrying out simulation calculation on the equivalent circuit model to obtain the interference frequency point of the PCB.
4. A method according to claim 3, wherein the step of: the circuit setting method of the PCB comprises the following steps:
step S1, dividing the circuit into different areas according to function classification according to a conventional high-voltage harmonic testing circuit, and dividing a minimum function loop;
step S2, carrying out PCB simulation connection on the minimum function loop to form a high-voltage harmonic wave test circuit, and obtaining all possibilities of connecting the loop;
s3, constructing an equivalent loop according to the components connected with the loop, acquiring interference frequency points of the PCB and obtaining the dielectric constant of the PCB;
step S3, collecting the loop number and loop area of different possible connection loops; acquiring loop connection points which are not possible to connect loops, and calculating the number of loops connected by the loop connection points;
step S4, dielectric constant A for different circuits 1 Number of loops A 2 Loop area A 3 Number of loops A connected to loop connection point 4 And weighting to obtain an evaluation value of the connection loop.
5. A method according to claim 4, characterized in that: the evaluation value is obtained according to the following formula:
Figure FDA0003621933340000021
wherein A is an evaluation value; lambda [ alpha ] 1 、λ 2 、λ 3 、λ 4 、λ 5 Are respectively a dielectric constant weighting systemThe number, the loop number weighting coefficient, the loop area weighting coefficient and the loop number weighting coefficient connected with the loop connection point are calculated; lambda [ alpha ] 1 、λ 2 、λ 3 、λ 4 、λ 5 The magnitude is determined by its correlation with the electromagnetic interference of the circuit.
6. A method according to claim 2, wherein the method further comprises: the selection principle of the PCB loop comprises the following steps: and selecting the connecting loops from low to high according to the evaluation values.
7. A method of combating electromagnetic interference, as claimed in claim 2, wherein: the method comprises the following steps of carrying out simulation analysis on a three-dimensional cavity model according to electromagnetic boundary conditions and an intracavity medium to obtain a simulation result:
receiving a convergence condition, an iteration number, a minimum solving frequency and a solved mode number input by a user;
and carrying out eigen mode simulation analysis on the cavity three-dimensional model according to the electromagnetic boundary condition, the intracavity medium, the convergence condition, the iteration times, the minimum solving frequency and the solving mode number to obtain a simulation result.
8. A method according to claim 2, wherein the method further comprises: the simulation result also comprises intracavity electric field distribution corresponding to the eigenfrequency.
CN202210469821.4A 2022-04-28 2022-04-28 Anti-electromagnetic interference high-voltage harmonic testing device and method Pending CN115015605A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210469821.4A CN115015605A (en) 2022-04-28 2022-04-28 Anti-electromagnetic interference high-voltage harmonic testing device and method

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Application Number Priority Date Filing Date Title
CN202210469821.4A CN115015605A (en) 2022-04-28 2022-04-28 Anti-electromagnetic interference high-voltage harmonic testing device and method

Publications (1)

Publication Number Publication Date
CN115015605A true CN115015605A (en) 2022-09-06

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Family Applications (1)

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Country Status (1)

Country Link
CN (1) CN115015605A (en)

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